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Optical Interconnect Project
Status Update and Plan
M.Immonen/ TTM and Brice Achkir/ Cisco
Sep 15, 2011
1
Content
• Need and Rationale
• Objectives (Project Level)
• Project Test Vehicles
• Test Vehicle 1
• Description
• Goals and Deliveries
• Testing Plan
• Resources
• Schedule
• Scope Re-Check and Refinement Needs
2
The Need – System Level Overview
Joel Goergen/Cisco: FR-4 Circuit Board Technology: An Introduction to Fabrication
Issues in High Speed Channels. 03’2011
What problem are we solving?
High-Speed Channel SR
(27”..32”)?
High-Speed Channel SR (<12”)?
Bandwidth off-PKG/Module?
Bandwidth off-Card?
Front-panel density? NEXT Near-end crosstalk
FEXT Far-end crosstalk
Optics vs. Copper Rationale
4
Bandwidth Density
Gbps/mm2
mW/Gbps=pJ/bit
Objectives (Project Level)
1. Understanding on performance benefits and limitations
using optical fibers and polymer waveguides for intra-
system interconnects (Reach < 1-2 m)
2. Demonstrate backplane architecture(s) that shows cost or
performance improvements obtained by using optical links
3. Focus on optical fiber/WG link characteristics, connectivity
options, end-to-end link implementations and reliability of
the same
4. Showcasing technology options and cost competitiveness
to demonstrate optical connectivity using practical hybrid
fiber and polymer waveguide solutions that exist today
5. Use ”Black-box” approach, standardized components and
interfaces, be protocol-agnostic, focus on practical
solutions
5
Project Test Vehicle Designs
1st TV: Verification Test Vehicle (TV1)
• Board Backplane with connector interfaces
• Used to verify design parameters and connectivity options for TV2
• Basic TV, basic performance and reliability testing by the team
• Currently 3 available WG technologies to build TV1
• Specification and design must fit all WG technologies
• Design to include multiple WG components fitting realistic application targets
• Connector interfaces that can be used for performance testing and for
interfacing by OEMs and others to evaluate specific applications
• May want to include at least one daughter card with some kind of function on it
to test the backplane interface (no need for daughter card since the wg willl be
compared to copper directly)
• Must allow application/company specific tests and interoperability testing
2nd TV: Demonstration Test Vehicle (TV2)
• Backplane with N Line Card(s) and M Switch Card(s)
• More difficult TV, Enhanced testing by the team
• Expanded specification challenging the technologies
• Connector interfaces that can be used for performance testing and for
interfacing by OEMs and others to evaluate specific applications
• Must allow application/company specific tests and interoperability testing
6
TV1 Goals and Deliverables
1. Design and test multimode optical waveguides and high-
speed copper lines of varying length on a common passive
PCB test bed. Comparison provided on 1-3 base materials
representing standard-loss (FR408HR) mid-loss (HE-679G)
and ultra-low loss (R3003). Link lengths up to 8” (wgs)
2. Demonstrate high-density multichannel optical waveguide
links with low loss fabricated on standard size PCBs (single
layer, top surface, WG loss 0.05 dB/cm, board 12”x18”)
3. Design and test waveguide routing components needed to
realize practical Optical Backplane/Card interconnect
circuitries incl. straight, bend and crossing components
4. Characterize and compare end-to-end optical and copper
links on key link metrics – link loss, BW density, power,
signal integrity up to 25 Gbps
7
TV1 Goals and Deliverables
5. Characterize polymer waveguides functional parameters –
optical loss, bend loss, cross-over loss, waveguide NA and
index contrast, and coupling loss with MMFs at 850 nm
6. Demonstrate robust low-loss (< 2.5 dB) connectivity options
to interface polymer waveguides on-board (Chip-to-WG,
board-to-BP). Multiple optical connector options in TV1
7. Demonstrate unique polymer waveguide characteristics
and benefits over fiber for short reach (SR < 12”)
8. Provide robust and scalable polymer waveguide and
fiber/waveguide building blocks for TV2 functional
demonstrator
9. Provide end-use application and specification for TV2
optical interconnect backplane competitive to copper
solution
8
This Project will NOT…
• Evaluate polymer waveguide processing methods, address/solve
manufacturability or production scale up issues
• Develop optical engines or transceiver subassemblies
• Primarily focus on off-package optical connectivity. Use of
waveguides in PKG or for off-package routings may be addressed
• Study architectural benefits obtainable using polymer
interconnects. Novel photonic system architectures vs. more
efficient implementations of traditional designs
• Use communication architectures other than point-to-point
• Use transceivers limited to mount at the card edge
• Evaluate or use higher order modulation schemes in coding
• Build application specific prototypes (Applies TV1)
• Use solutions based on WDM or single mode fibers/WGs
• Primary interest: 850 nm (<1µm), exclude 1.3 µm and 1.55 µm
• Need for multi-protocol module support
• Provide development for chip-level photonic networks/interconn’s 9
Test Vehicle 1 Layout (Optical)
Nx12 WGs, Straight; Length L2
WG
channel loss
(Ref.)
WG end face
coupling loss
Link loss with
connectors
(multiple
connector options
and link lengths)
Connector
coupling loss
In-plane launch BP connector with
90-deg turn Right angle launch MT Edge/Mid-board
90-deg up turn in WGs
Waveguides
Nx 12 WGs, Straight; L2
12 WGs, Straight; L1
12 WGs, Straight; L1 12 WGs, Straight; L1
12 WGs, Straight; Length L2
12 WGs, Straight; L1
(multiple
connector options)
Crossings 90-deg bends, Cascading bends
BACKPLANE
.
.
.
.
.
.
Nx12 WGs, Straight; Length L1
12 WGs, Straight; Length L2
Point-to-point TV for Multimode based λ = 850 nm VCSELs
provided via externally launched test source and fiber-optic ribbons
Notes:
- All waveguide arrays are on board surface
- Layout is to be finalized in accordance with actual board design
- Schematic illustration, sizes not to scale, may not include all design variations
- Fiber ribbon links not shown
- Electrical connectors or ref. lanes not shown 10
Test Vehicle 1 Materials and Connections
11
• Laminates
• Isola FR408 Dk< 3.64 Df < 0.013
• Hitachi MCL-HE-679G
• Rogers R3003 Dk 3.9-4.1 Df 0.0013
• Optical waveguide materials
• GuideLink™ / OIL; NA=0.2-0.32
• LightLink™/ Dow EM; NA=0.26-0.31
• Proprietary/ API; NA=0.2-0.37
• OE4140/41/ Dow Corning; NA=0.2x
• Connectors and connectivities
• FCI Optical BP connector (90-turn)
• OIL Optical BP connector (90-turn)
• Mirror I/Os on waveguides (90-turn)
• WG Edge connector
• Molex Expanded beam MT (lensed)
WGs with Mirrors Wgs on PCB (top)
BP 90-turn Edge conn. BP 90-turn Expanded beam
(lensed)
WGs Flex
Waveguide Design Features
12
1 2
3
4
1
12
1. Straight waveguide array sets (N=12
channels)
• Fixed width w=50µm
• Fixed center-to-center spacing: 250 µm
• Varying length: L1=15 cm; L2=30 cm
2. Nested sets of 90° bends
• Varying ROC (R=RS…RN) with fixed width
E.g. R= 5’ … 20 mm, w= 50 µm
• Varying ROC Varying waveguide widths
E.g. w= 35‘ 50‘ 70 µm
• Straight section lin and lout E.g. 10 mm
3. Staggered cascaded bend
• Mode mismatch loss between segments of
different RoCs
4. Long waveguide loop (Not needed)
5. Over crossings
1
12 250
50
50
Test Vehicle 1 Layout (Electrical)
Layer Name
1 Top
2 P
3 G
4 S
5 G
6 P
7 P
8 G
9 S
10 G
Layer Name
11 G
12 P
13 Bottom
LS – Low Speed
HS – High Speed
Proposed Stackup:
G-S-G Config
Proposed Stackup:
G-S-S-G Config
Layer Name
1 Top
2 P
3 G
4 S - LS
5 S - HS
6 G
7 P
8 G
9 S – LS
10 S – GS
Layer Name
11 G
12 P
13 Bottom
13
Testing Plan Update
14
Fabricate Boards
As-built Testing
Electrical testing 1
Optical Loss:
Waveguide channel loss, material loss, bend losses, cross-over loss, coupling loss to MMFs,
loss post-lamination
Refractive index & NA
(NF/ Fiber Analyser)
Physical Xsect
Connectors: IL, RL, misalignment tolerance,
mate/unmate
With connectors
Comm. Measurements Copper Links: IL, Eye,
BER
Comm. Measurements: Optical Links
OTDR
Reliab.test
Link parts. System test In-situ
monitoring of IL at established read
points Link BER,
before/after
Waveguide loss and refractive index
stability
6x 260C
Reflow
Phase I tests to ensure waveguides and interfaces
are practical and they meet the specification
Optical Loss Measurements
15
Optical Tests——WG Transmission loss
nm850
L2
L1
Optical detector
In-coupling fiber Multimode 50µm NA=0.2
Out-coupling fiber MMF 62.5 µm NA=0.28
(Core > WG)
Optical Source
1 2T (IL IL ) /(L1 L2) (dB/cm)L
P10
P
out
in
IL Log
Link Evaluations
16 ©HDP User Group International, Inc.
Proprietary
TX +
Fiber
patch
cord
RX +
Fiber
patch
cord TP1 TP3
TP2
LINK 1: TX – OF – Conn 1 – Waveguide – Conn 2 – OF – RX
WG Ref.
(Unconnectorized)
MT Edge
MT Mid
board
MTP BP
(design example) MTP male
connector to 12
individual FC/APC
connectors, bare
ribbon to 900um
buffered, 0.45m
breakout, 2m total
length
MTP male to 12 FC/APC,
bare, 2m
BACKPLANE
Waveguide to
Fiber coupling
evaluations
Waveguide Channel
Scope and Deliveries – Re-Check
• Are we fine with objectives Project level?
• Are TV1 goals and deliverables realizable?
• Are deliverables sufficient to compensate the
effort?
• Novelty perspectives? Goals vs. previous work?
17
Schedule
Project Task Who Complete Planned
Completion
Phase I - Verification TV (TV1)
Design complete NGC 10/11
Copper and optical simulation complete Cisco, Dow Corning 10/11
Laminate materials received Hitachi, Isola, Rogers 11/11
PCB Board fabrication complete TTM 12/11
Electrical testing 1 TTM/Cisco 12/11
Waveguide layer fabrication complete OIL, Dow, API 01/12
Waveguide optical measurements complete Xyratex, OIL, API,
Fujitsu, EOS
02/12
Waveguide physical analysis complete TTM 02/12
Optical connectors received FCi, OIL, Molex 02/12
HS connectors received TBD 02/12
Optical connector assembly complete Source 03/12
HS connector assembly complete Source 03/12
Comm. measurements - Copper & Optical Links Cisco, Huawei, Celestica 04/12
Failure analysis complete TTM 05/12
Phase I report complete Team 07/12
Phase II - Demonstration TV (TV2)
18
Resources and Support
Resource VOLUNTEER (2011-08-30)
DESIGN AND MFG SERVICES
--- Design TV1 Backplane (Electrical and Optical) NGC
--- Waveguide Simulation Dow Corning
--- Copper Simulation Cisco
--- Fabricate Backplane TTM
--- Fabricate Optical Waveguide Layer & Provide material OIL, APi, Dow Corning
--- Optical Connector Assembly Source
--- HS Connector Assembly Source
MATERIALS AND COMPONENTS
--- Laminate Materials Rogers, Hitachi, Isola
--- Optical Connectors FCI, OIL, Molex?
--- High-speed electrical connectors Tyco, Amphenol, Molex – TBD
TESTING
--- Optical Waveguide Characterization OIL, Xyratex, API, Fujitsu
--- Comm. Measurements (Electrical & optical links) Cisco, Huawei, Celestica
--- Physical & FA TTM
19
PC
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eria
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ide
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eria
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incl
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and
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or
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Ass
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inte
grat
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sign
or
Test
ing
Serv
ice
s
End
-Use
r /
OEM
Oth
er
Contributing Members and Non-Members (Fabricators, testers, materials, components)
Rogers
Hitachi Isola
Guangdong Shengyi
Advanced Photonics
Dow EM Dow Corning
Optical Interlinks
Reflex Photonics
TTM
FCI
Molex
Tyco Electronics
Amphenol
Flextronics
Northropp Grumman
Celestica
Compass EOS
Cisco
Fujitsu
Huawei
Xyratex
Participants (Members/Non-members)
Project
Supply Chain
Total: 35 companies (11 non-members)
20 P
CB
Lam
inat
e M
ater
ials
Op
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egu
ide
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-Use
r /
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Oth
er
Other Members in Team
National Semicond.
Viasystems
Alcatel-Lucent
Boeing
Ericsson
IBM
Juniper
Oracle
Philips
Conpart
ITEQ
Nabaltec
Nihon Superior
Black = HDPUG Member
Brown= Non-HDPUG Member
Definition Stage Non-Member Participants
21
Red = Non-HDPUG Member, not offered to volunteer resources
Total: 20 companies (20 non-members)
PC
B L
amin
ate
Mat
eria
ls
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l Wav
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ide
Mat
eria
ls
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Non-members who have not volunteered to provide resources
Calumet
Adamant
Albemarle
Atotech
Chiral Photonics
Diamond USA
AMD
Nokia Siemens Network
Hakusan Mnf
ITRI
MMM
Opticomp
Optical Switch
Park Electrochem.
Promex
Purdue Univ.
Samsung
Triformix
UTA
Vario-Optics
END
22
Optical Interconnection Model
23
Interconnection Model
1 1
2
Terminology
1. Chip-to-Waveguide Connector
2. On-Card Link
3. Card-to-Backplane Connector
4. Card-to-Card Link
5. Chip-to-Chip/Module Link
6. Logic Chip (PU, SU, FPGA)
7. Optical Transceiver (E/O/E)
8. Card (Line Card, Switch Card)
9. Backplane/ Midplane
10. Chip/Module
8
6 6
4
3
9
CA
RD
CA
RD
BACKPLANE
3
5
2
4
2
2
5 7
10
Fiber
Waveguide
Optical Interconnection Model
24
Interconnection Model
1 1
2
Terminology
1. Chip-to-Waveguide Connector
2. On-Card Link
3. Card-to-Backplane Connector
4. Card-to-Card Link
5. Chip-to-Chip/Module Link
6. Logic Chip (PU, SU, FPGA)
7. Optical Transceiver (E/O/E)
8. Card (Line Card, Switch Card)
9. Backplane/ Midplane
10. Chip/Module
8
6 6
4
3
9
CA
RD
CA
RD
BACKPLANE
3
5
2
4
2
2
5 7
10
Fiber
Waveguide
TV 1