Matthew LadewPhilip Hart

Jenniffer Estrada

Operation Transistor

Pmos transistors MP1 and MP2 ensure identical biasing drain currents for MND1 and MND2 Active load- behaving as a current-stable

nonlinear resistor Act similarly to a current mirror

Nmos transistors MND1 and MND2 act as differential pair Common mode and differential mode can be

considered separately using superposition Differential gain is given by:

Current Source Uses a current mirror to supply a constant

dc biasing current to differential amplifier

Stage 1 Amplifier

Fig. 1: Stage one, the differential amplifier and current source

Gain of stage one: 29 V/V

MN2 matches reference current provided by MN1Since MN2 has the same

gate-source voltage, the drain current must be identical

Potentiometer Rref adjusts this gate-source voltage to obtain desired reference current

As long as MN2 remains in saturation, drain current will be mirrored

Current Mirror

Fig. 2. Current mirror schematic

Bode Plot

1 10 100 1000 10000 100000 1000000 10000000 1000000000

5

10

15

20

25

30

35

First Stage Gain Bode Plot

frequency [Hz]

Gai

n [V

/V]

Pmos MP3 added in common source configuration Inverting gain Drain current, IDP3, determined by

ratio: (W/L)P3/(W/L)P1 MP3 not doubled in width: only one

transistor in the CD4007 chip used

Nmos MN3 supplies a mirrored source current Drain current, IDN3, determined by

(W/L)N3/(W/L)N1

Good match occurs when drain currents IDP3 and IDN3 are identical, which results in DC bias voltage of zero at output VO2 Significant mismatch between

transistors MP1 and MP3 resulted in poor gain, we eventually replaced MP1 to achieve a much higher gain

Stage 2 Amplifier

Fig. 3 Two stage amplifier with second stage, common source amplifier on the right side of the schematic

Gain of stage two: -35 V/V

10 100 1000 10000 1000000

10

20

30

40

50

60

70

Second Stage Gain Bode Plot

Frequency [Hz]

Gai

n [d

B]

Bode Plot

Push pull structure added by MP4 and MP4Adds low output

impedanceCrossover distortion

minimized by correct value of RGGPotentiometers RGG

and Rref were tuned in succession several times so that

VGG > 1.1(Vtn + ⎟Vtp⎜) and VO = 0.

Stage 3 Amplifier

Fig. 4 Complete three stage amplifier, with third and final stage

Stage 3 Gain: 1800 V/V

Screenshot- Third Stage

Third stage: Yellow trace is Vo2+, Green is Vo, purple is Vo2+ - Vo; this demonstrates the effect of RGG on the crossover distortion.

Without RGG With RGG

Miller capacitor added between outputs of first and second stagesAdds a pole to the

bode plot to place the 3db point to a lower frequency

Prevented feedback oscillation

Miller Capacitor

1 10 100 1000 100000

10203040506070

Second Stage Gain Bode Plot with Miller Capacitor

Frequency [Hz]

Gai

n [d

B]

10 100 1000 10000 1000000

10203040506070

Second Stage Gain Bode Plot

Frequency [Hz]

Gai

n [d

B]

R1 = 2KohmR2 = 200ohmVin at non-inverting input V2,

R2 connected from inverting input V1 to ground

Non-Inverting Op-Amp

Screenshot – Non-inverting

Rf = 2KohmRi = 200ohmNon-inverting input at V2

grounded, Ri connected between inverting input V1 and Vin

Inverting Op-Amp

Screenshot – Inverting

The Final Circuit