Openmoko, Inc GTA02-Neo Freerunner...
19
Openmoko, Inc GTA02-Neo Freerunner Schematics This work is licensed under the Creative Commons Attribution-ShareAlike 3.0 License. To view a copy of this license, visit http://creativecommons.org/licenses/by-sa/3.0/legalcode; or, send a letter to Creative Commons, 172 2nd Street, Suite 300, San Francisco, California, 94105, USA. Version Date Signed off / Comment A7RC0 2008-08-04 jOERG (NAK) / prerelease based GTA02A7 cumulative A5-A7 DATE SHEET DWG. NUMBER TITLE MODEL COVER GTA02 A7 Allen Chang 1 2008/07/25 OPENMOKO Creative Commons Attribution Share-Alike 3.0 LICENSE
Transcript of Openmoko, Inc GTA02-Neo Freerunner...
Openmoko, Inc
GTA02-Neo Freerunner
Schematics
This work is licensed under the Creative Commons Attribution-ShareAlike 3.0 License.
To view a copy of this license, visit http://creativecommons.org/licenses/by-sa/3.0/legalcode;
or, send a letter to Creative Commons, 172 2nd Street, Suite 300, San Francisco, California, 94105, USA.
Version
Date
Signed off / Comment
A7RC0
2008-08-04
jOERG (NAK) / prerelease based GTA02A7 cumulative A5-A7
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
COVER
GTA02
A7
Allen Chang
1
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
ADD[1:26]
ADD[2:26]
ADD[0:25]
DATA[0:31]
DATA[0:31]
DATA[0:31]
STRUCTURE
LCD[0:17]
LCD[0:17]
AD
D[1
:23]
DA
TA
[0:1
6]
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
STRUCTURE
GTA02
A7
Allen Chang
2
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
SD
_D
AT
A2
SD
_D
AT
A3
SD
_C
MD
SD
_C
LK
SD
_D
AT
A0
SD
_D
AT
A1
V-SIM
SIM-RST
SIM-CLK
SIM-I/O
SD_CD
MEMORY_CARD
SHEET-9
YL
XR
YU
XL
L_HSYNC
L_VSYNC
L_PCLK
LCD_DE
LCD_RESET
LCD_SCL
LCD_DIN
LCD_CS
LCM&TOUCH_PANEL
SHEET-8
MICBIAS
IIS_C
LK
IIS_O
UT
IIS_IN
IIS_LR
C
IIS_M
CLK
MIC1
MIC2
EARN
EARP
HS_MIC
X_I2
C_SC
L
X_I2
C_SD
A
LOUTL
LOUTR
MICIP
MICIN
PCM_IN
PCM_CLK
PCM_SYNC
PCM_OUT
AUDIO_CODEC
SHEET-6
ADD26
ADD25
MRAS
MCAS
MWE
MCKE
MCS0
DQM0
DQM1
MCLK0
NAND_RDY
NAND_RD
NAND_WE
NAND_ALE
NAND_CLE
NAND_CS0
DQM2
DQM3
MEMORY
SHEET-5
X_I2C_SCL
X_I2C_SDA
ON_KEY
PWR_OK
RESET
PWR_IRQ
CLK32K
KEEPACT
POWER
SHEET-4
MICBIAS
LOUTR
LOUTL
X_I2C_SCL
X_I2C_SDA
VIB
RA
TO
R_O
N
RX_IR
DA
USB_D
-
USB_D
+
MWE
USB_PU
LLU
P
DQM0
DQM1
RESET
ST
CK
ST
DO
ST
RST
ON_KEY
CO
NSO
LE_T
XD
MIC2
MIC1
EIN
T3
HS_MIC
TX_IR
DA
ST
DI
ST
MS
CO
NSO
LE_R
XD
GSM
_EN
JAC
K_IN
SER
T
HO
LD
SS0
SPI_
MIS
O0
SPI_
MO
SI0
SPI_
CLK
0
INTERFACE
SHEET-7
ST
DO
ST
DI
ST
CK
ST
RST
ST
MS
X_I2C_SCL
X_I2C_SDA
IIS_O
UT
IIS_IN
IIS_M
CLK
IIS_C
LK
IIS_LR
C
YL
YU
XR
XL
VIB
RA
TO
R_O
N
PWR_IRQ
MODEM_ON
LCD_RESET
CO
NSO
LE_T
XD
CO
NSO
LE_R
XD
MODEM_RTS
PWR_OK
NAND_RDY
NAND_CS0
NAND_CLE
NAND_ALE
NAND_WE
NAND_RD
MWE
DQM0
DQM1
DQM2
DQM3
MCLK0
MCAS
MRAS
MCKE
MCS0
EIN
T3
WLA
N_D
AT
A3
WLA
N_D
AT
A2
WLA
N_D
AT
A1
WLA
N_D
AT
A0
WLA
N_SD
CM
D
WLA
N_SD
CLK
SD
_C
D
INT0
IO1
GSM
_EN
RX_MODEM
TX_MODEM
CTS_MODEM
RTS_MODEM
GPS_T
X_M
GPS_R
X_M
USB_PU
LLU
P
RESET
USB_D
-
USB_D
+
ADD25
ADD26
DP
DN
PIO
_2
PIO
_5
BT
_EN
JAC
K_IN
SER
T
HO
LD
SPI_
MIS
O0
SPI_
MO
SI0
G1_IN
T1
G2_C
S
G2_IN
T1
G1_C
S
SS0
SPI_
MIS
O1
SPI_
MO
SI1
SPI_
CLK
1
3D_CS
OE
WAIT
3D_INT
3D_RST
WLA
N_G
PIO
0
WLA
N_G
PIO
1
KEEPACT
SPI_
CLK
0
EXT
INT
0
MCU
SHEET-3
MODEM_RTS
MODEM_ON
V-S
IM
SIM
-RST
SIM
-CLK
SIM
-I/O
MICIP
MICIN
EARP
EARN
RX_IRDA
TX_IRDA
RTS_MODEM
CTS_MODEM
RX_MODEM
TX_MODEM
INT0
IO1
GSM
SHEET-14
DP
DN
PCM_SYNC
PCM_CLK
PCM_IN
BT
_EN
PIO
_2
PIO
_5
PCM_OUT
PIO9
PIO10
BLUETOOTH
SHEET-17
OE
MWE
LCD_SCL
3D_CS
DQM0
DQM1
3D_RST
CLK32K
L_HSYNC
L_VSYNC
WAIT
SD_CLK
SD_CMD
SD_DATA0
SD_DATA1
SD_DATA2
SD_DATA3
LCD_DIN
LCD_CS
L_PCLK
LCD_DE
3D_INT
MULTIMEDIA_CO-PROCESSOR
SHEET-12
PIO9
PIO10
WLA
N_SD
CLK
WLA
N_SD
CM
D
WLA
N_D
AT
A0
WLA
N_D
AT
A1
WLA
N_D
AT
A2
WLA
N_D
AT
A3
WLA
N_G
PIO
1
WLA
N_G
PIO
0
WLAN
SHEET-16
SPI_
CLK
1
SPI_
MO
SI1
G1_IN
T1
G2_IN
T1
SPI_
MIS
O1
G1_C
S
G2_C
S
MOTION_SENSOR
SHEET-11
GPS_T
X_M
EXT
INT
0
GPS_R
X_M
AGPS
SHEET-10
LOCATION:15XX
MCU
OM[1:0] : Clock Mode
00 : NAND Boot
01 : 16 Bit
10 : 32 Bit
11 : Test Mode
OM[3:2] : Clock Mode
00 : MPLL=Xtal, UPLL=Xtal
01 : MPLL=Xtal, UPLL=EXTCLK
10 : MPLL=EXTCLK, UPLL=Xtal
11 : MPLL=EXTCLK,
UPLL=EXTCLK
AUX KEY
0: Normal NAND flash(256Words/512Bytes page size, 3/4 address cycle)
1: Advance NAND flash(1KWords/2KBytes page size, 4/5 address cycle)
GPG13 : NAND flash memory page capacitance selection
0: Page=256Words(NCON = 0) or Page=1KWords(NCON = 1)
1: Page=512Bytes(NCON = 0) or Page=2KBytes(NCON = 1)
GPG14: NAND flash memory address cycle selection
0: 3 address cycle(NCON = 0) or 4 address cycle(NCON = 1)
1: 4 address cycle(NCON = 0) or 5 address cycle(NCON = 1)
GPG15 : NAND flash memory bus width selection
0: 8-bit bus width
1: 16-bit bus width
NCON : NAND flash memory selection(Normal / Advance)
Hardware Version Control
GPC13
GPD3
1
0
Version
GTA02A6
0
0
GTA02A5
0
1
GTA02BA1
1
1
GTA02A7
A6: R1548=10K,R1549=NC
A5: R1548=NC,R1549=NC
A7: R1548=10K,R1549=10K
A6: R1564 = 10K
A5: R1564 = 0 ohm
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
MCU
GTA02
A7
Allen Chang
3
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
R1515
10K
R1514
NC
C1502
100N
C1503
100N
C1504
100N
C1516
820P
C1515
1N
5
R1503
100K
R1504
NC
C1501
100N
C1508
100N
R1517
0R
R1516
0R
C1506
100N
C1507
100N
R1512
100K
R1513
100K
C1509
1U
C1510
1U
R1518
0R
C1505
100N
1
2
3
4
X1501
TAS4025A-12MHZ
C1511
15P
C1512
15P
SW1501
SW_DJT-1114S-2
R1502
100K
H-T
P1510
H-T
P1511
H-TP1516
H-TP1517
H-TP1518
H-T
P1520
H-T
P1521
H-T
P1522
H-TP1525
H-T
P1530
R1532
10K
R1531
10K
R1544
0R
R1519
NC
H-T
P1531
R1521
100K
R1522
NC
R1523
NC
R1524
100K
R1525
NC
R1526
33K
R1562
220R
R1563
220R
1
2
3
Q1502
ISC5804AT2
ISC5804AT2
1
2
3
LED1501
HT-210UD/NB
1
2
LED1502
HT-110USD5
R1561
220R
1
2
3
4
5
6
Q1501
EM
H4
EMH4
C1518
220P
SDRAM
Clock
Timer
ADC/TSP
IIS
IIC
POWER
Ext
ernal
Inte
race
CA
MER
A
DMA
LCD Interface
EINT+
JTAG
USB
SDIO
SPI
UART
NAND
Control
NAND
Interface
Memory
A1
NC
A2
ADDR10
A3
ADDR13
A4
NGCS5/GPA16
A5
NBE1
A6
NSR
AS
A7
NSC
AS
A8
ADDR2
A9
ADDR7
A10
ADDR9
A11
VSSM
OP
A12
ADDR11
A13
ADDR14
A14
ADDR24/GPA9
A15
DATA2
A16
DATA4
A17
DATA0
A18
DATA5
A19
DATA6
A20
VDDMOP
A21
DATA7
A22
DATA9
A23
DATA10
A24
DATA16
A25
DATA12
A26
NC
B1
ADDR6
B2
ADDR8
B3
SC
KE
B4
NG
CS6
B5
NGCS2/GPA13
B6
NBE3
B7
VDDI
B8
VSSC
OM
B9
ADDR4
B10
NOE
B11
ADDR1
B12
ADDR12
B13
ADDR15
B14
ADDR23/GPA8
B15
ADDR18/GPA3
B16
ADDR21/GPA6
B17
ADDR26/GPA11
B18
DATA3
B19
DATA1
B20
DATA8
B21
VDDI
B22
VSSO
P1
B23
DATA11
B24
VDDMOP
B25
DATA14
B26
DATA13
C1
ADDR5
C2
NWAIT
C25
DATA19
C26
DATA15
D1
ADDR3
D2
NGCS4/GPA15
D25
VSSM
OP
D26
DATA17
E1
NBE2
E2
VSSM
OP
E5
VSSM
OP
E6
NGCS3/GPA14
E7
NGCS1/GPA12
E8
VDDMOP
E9
VDDI
E10
SC
LK1
E11
ADDR0/GPA0
E12
VDDMOP
E13
VDDI
E14
VSSC
OM
E15
ADDR16/GPA1
E16
VDDI
E17
VDDMOP
E18
ADDR25/GPA10
E19
VSSM
OP
E20
TC
K
E21
TM
S
E22
XT
OPLL
E25
DATA21
E26
DATA18
F1
NBE0
F2
NG
CS7
F5
VDDI
F6
NGCS0
F7
VDDIARM
F8
VDDIARM
F9
CAMVSYNC/GPJ9
F10
VSSM
OP
F11
CAMCLKOUT/GPJ11
F12
ADDR20/GPA5
F13
ADDR19/GPA4
F14
ADDR17/GPA2
F15
ADDR22/GPA7
F16
CAMDATA0/GPJ0
F17
TXD
1/G
PH
4
F18
CAMRESET/GPJ12
F19
TO
UT
1/G
PB1
F20
PWREN
F21
VDDALIVE
F22
TD
I
F25
VDDI
F26
DATA20
G1
SC
LK0
G2
VDDMOP
G5
NFC
E/G
PA
22
G6
CAMDATA5/GPJ5
G21
VSSM
OP
G22
EXT
CLK
G25
VSSM
OP
G26
DATA22
H1
ALE
/GPA
18
H2
CLE
/GPA
17
H5
CAMHREF/GPJ10
H6
VSSO
P2
H21
VDDMOP
H22
NRESET
H25
VSSC
OM
H26
DATA26
J1
NFW
E/G
PA
19
J2
VSSC
OM
J5
CAMPCLK/GPJ8
J6
CAMDATA3/GPJ3
J21
NC
TS0/G
PH
0
J22
TO
UT
2/G
PB2
J25
DATA24
J26
DATA23
K1
NFR
E/G
PA
20
K2
CAMDATA1/GPJ1
K5
VDDALIVE
K6
CAMDATA2/GPJ2
K21
EINT6/GPF6
K22
VSSC
OM
K25
DATA31
K26
DATA27
L1
FRN
B
L2
CAMDATA7/GPJ7
L5
TO
UT
0/G
PB0
L6
CAMDATA6/GPJ6
L21
TXD
2/N
RT
S1/G
PH
6
L22
TXD
0/G
PH
2
L25
XT
IPLL
L26
DATA25
M1
CE
M2
CAMDATA4/GPJ4
M5
VSSC
OM
M6
NXBACK/GPB5
M13
VSSC
OM
M14
VSSC
OM
M21
RXD
2/N
CT
S1/G
PH
7
M22
TD
O
M25
BATT_FLT
M26
DATA29
N1
NWE
N2
TO
UT
3/G
PB3
N5
VDDOP2
N6
NXD
AC
K1/G
PB7
N12
VSSC
OM
N13
VSSC
OM
N14
VSSC
OM
N15
VSSC
OM
N21
EINT2/GPF2
N22
UC
LK/G
PH
8
N25
NT
RST
N26
DATA28
P1
VCC_NF
P2
TC
LK0/G
PB4
P5
NXBREQ/GPB6
P6
NXD
REQ
1/G
PB8
P12
VSSC
OM
P13
VSSC
OM
P14
VSSC
OM
P15
VSSC
OM
P21
VDDOP1
P22
VSSA
_U
PLL
P25
RXD
1/G
PH
5
P26
DATA30
R1
VSSC
OM
R2
NXD
AC
K0/G
PB9
R5
LEN
D/G
PC
0
R6
LCD
VF1
/GPC
6
R13
VSSC
OM
R14
VSSC
OM
R21
SD
DA
T1/G
PE8
R22
EINT4/GPF4
R25
RXD
0/G
PH
3
R26
NR
TS0/G
PH
1
T1
VSS_NF
T2
VM
/GPC
4
T5
VDDIARM
T6
NXD
REQ
0/G
PB10
T21
VDDA_UPLL
T22
EINT0/GPF0
T25
EINT7/GPF7
T26
EINT3/GPF3
U1
WP
U2
CS
U5
VDDIARM
U6
VFR
AM
E/G
PC
3
U21
IIC
SD
A/G
PE15
U22
VSSO
P
U25
EINT5/GPF5
U26
EINT1/GPF1
V1
LCD
VF0
/GPC
5
V2
VD
2/G
PC
10
V5
VLI
NE/G
PC
2
V6
VD
4/G
PC
12
V21
EIN
T15/S
PIC
LK1/G
PG
7
V22
AIN
6/X
M
V25
MPLL
CA
P
V26
XT
IRT
C
W1
VSSO
P3
W2
VSSC
OM
W5
VD
10/G
PD
2
W6
VD
6/G
PC
14
W21
EIN
T20/N
SPIC
S0/G
PG
12
W22
XT
OR
TC
W25
UPLL
CA
P
W26
VCC_NF
Y1
VD
5/G
PC
13
Y2
VD
7/G
PC
15
Y5
VD
3/G
PC
11
Y6
VC
LK/G
PC
1
Y21
NC
ON
0
Y22
VDDA_ADC
Y25
VDDA_MPLL
Y26
VDD_RTC
AA
1
VD
11/G
PD
3
AA
2
VD
8/G
PD
0/N
SPIC
S1
AA5
VDDIARM_1
AA
6
VD
0/G
PC
8
AA
7
VSSO
P3
AA
8
LCD
VF2
/GPC
7
AA
9
VD
1/G
PC
9
AA
10
I2SSC
LK/G
PE1
AA
11
I2SSD
I/G
PE3
AA
12
SD
CM
D/G
PE6
AA
13
CLK
OU
T0/N
SPIC
S0/G
PH
9
AA14
EINT8/GPG0
AA
15
SPIM
ISO
0/G
PE11
AA
16
SPIC
LK0/G
PE13
AA
17
DN
1/P
DN
0
AA
18
EIN
T13/S
PIM
ISO
1/G
PG
5
AA
19
EIN
T18/G
PG
10/N
CT
S1
AA20
VDDI
AA
21
VSSO
P
AA
22
OM
2
AA
25
AIN
5/Y
P
AA26
VSS_NF
AB1
VD
12/G
PD
4
AB2
VSSC
OM
AB5
VD
9/G
PD
1/S
PC
LK1
AB6
VD
14/G
PD
6/N
SS1
AB7
VD
16/G
PD
8/S
PIM
OSI1
AB8
VDDIARM
AB9
VDDIARM
AB10
SD
CLK
/GPE5
AB11
SD
DA
T3/G
PE10
AB12
IIC
SC
L/G
PE14
AB13
SPIM
OSI0
/GPE12
AB14
EIN
T12/L
CD
_PW
REN
/GPG
4
AB15
EIN
T10/N
SS0/G
PG
2
AB16
VDDOP
AB17
DP0
AB18
DN
0
AB19
EIN
T22/Y
MO
N/G
PG
14
AB20
EINT16/GPG8
AB21
EIN
T17/G
PG
9/N
RT
S1
AB22
OM1
AB25
AIN
7/X
P
AB26
VSSA
_M
PLL
AC1
VDDOP3
AC2
VDD_SDRAM
AC
25
AIN
3
AC26
VCC_NF
AD
1
VSS_SD
RA
M
AD2
VDDIARM
AD
25
AIN
2
AD
26
VSS_SD
RA
M
AE1
VD
13/G
PD
5
AE2
VSS_SD
RA
M
AE3
VD
18/G
PD
10/S
PIC
LK1
AE4
VD
17/G
PD
9/S
PIM
OSI1
AE5
I2SLR
CK/G
PE0
AE6
VD
15/G
PD
7/N
SS0
AE7
VD
22/N
SS1/G
PD
14
AE8
VD
19/G
PD
11
AE9
VD
23/N
SS0/G
PD
15
AE10
SD
DA
T0/G
PE7
AE11
I2SSD
O/G
PE4
AE12
SD
DA
T2/G
PE9
AE13
VDDIARM
AE14
CLK
OU
T1/G
PH
10
AE15
EINT9/GPG1
AE16
EIN
T14/S
PIM
OSI1
/GPG
6
AE17
DP1/P
DP0
AE18
NRSTOUT/GPA21
AE19
OM
3
AE20
AIN
0
AE21
VR
EF
AE22
AIN
1
AE23
OM0
AE24
EIN
T21/N
XPO
N/G
PG
13
AE25
VDD_SDRAM
AE26
AIN
4/Y
M
AF1
NC
AF2
VDD_SDRAM
AF3
VDDQ_SDRAM
AF4
VD
20/G
PD
12
AF5
VD
21/G
PD
13
AF6
VSSQ
_SD
RA
M
AF7
VDDQ_SDRAM
AF8
CD
CLK
/GPE2
AF9
VSSQ
_SD
RA
M
AF10
VDDQ_SDRAM
AF11
VSS_SD
RA
M
AF12
VSSQ
_SD
RA
M
AF13
VDD_SDRAM
AF1
4
EIN
T11/N
SS1/G
PG
3
AF15
VDDQ_SDRAM
AF16
EIN
T19/T
CLK
1/G
PG
11
AF17
VSSQ
_SD
RA
M
AF1
8
EIN
T23/N
YPO
N/G
PG
15
AF19
VDDQ_SDRAM
AF20
VSSA
_A
DC
AF21
VSSQ
_SD
RA
M
AF22
VSSQ
_SD
RA
M
AF23
VDDQ_SDRAM
AF24
VDD_SDRAM
AF25
VSS_SD
RA
M
AF26
NC
U1501
S3C2442
H-TP1523
R1530
0R
H-T
P1532
R1545
NC
R1546
NC
R1547
NC
H-TP1526
H-TP1527
H-T
P1533
R1548
10K
H-T
P1534
H-T
P1536
H-T
P1537
H-T
P1535
H-T
P1538
R1549
10K
R1564
10K
$$$16049
DATA[0:31]
[5,12]
STDO
[2,7]
STDI
[2,7]
STCK
[2,7]
IO_3V3
NCON
[3]
STRST
[2,7]
IO_3V3
STMS
[2,7]
IO_3V3
ADD[0:26]
[5]
MODEM_RST
[14,18]
IO_3V
3
X_I2C_SCL
[2,4,6,7]
X_I2C_SDA
[2,4,6,7]
IIS_OUT
[2,6]
IIS_IN
[2,6]
IIS_MCLK
[2,6]
IIS_CLK
[2,6]
IIS_LRC
[2,6]
PWR_IRQ
[4]
MODEM_ON
[2,14,18]
GPG15
[3]
GPG14
[3]
GPG13
[3]
NAND_RDY
[2,5]
NAND_CS0
[2,3]
MWE
[2,5,12]
NCON
[3]
INT0
[2,14,18]
IO1
[2,14,18]
GPS_TX_M
[2,10]
GPS_RX_M
[2,10]
USB_D-
[2,7]
USB_PULLUP
[2,7]
EINT3
[2,7]
JACK_INSERT
[2,7]
DN
[2,17]
DP
[2,17]
GSM_EN
[2,7]
HOLD
[2,7]
PIO_5
[2,17,22]
SS0
[2,7]
SPI_MISO0
[2,7]
SPI_MOSI0
[2,7]
SPI_CLK0
[2,7]
IO_3V3
PWREN
[4]
RESET
[2,4,5,7]
STBY_1V2
IO_3V3
IO_1V8
CORE_1V3
IO_3V3
IO_3V3
YU
[2,8]
YL
[2,8]
XR
[2,8]
XL
[2,8]
DQM0
[2,5,12]
DQM1
[2,5,12]
DQM2
[2,5]
DQM3
[2,5]
MCLK0
[2,5]
MCAS
[2,5]
MRAS
[2,5]
MCKE
[2,5]
USB_D+
[2,7]
EXTINT0
[2,10]
RTS_MODEM
[2,14,18]
CTS_MODEM
[2,14,18]
RX_MODEM
[2,14,18]
TX_MODEM
[2,14,18]
CONSOLE_TXD
[2,7]
CONSOLE_RXD
[2,7]
GPG15
[3]
GPG13
[3]
AMP_SHUT
[7]
HP_IN
[7]
IO_3V3
G1_INT
[11]
3D_INT
[2,12]
3D_RST
[2,12]
3D_CS
[2,12]
WAIT
[2,12]
OE
[2,5,12]
WLAN_SDCLK
[2,16]
WLAN_SDCMD
[2,16]
WLAN_DATA0
[2,16]
WLAN_DATA1
[2,16]
WLAN_DATA2
[2,16]
WLAN_DATA3
[2,16]
SPI_MISO1
[2,11]
SPI_MOSI1
[2,11]
SPI_CLK1
[2,11]
WLAN_GPIO0
[2,16]
KEEPACT
[2,4]
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
DATA16
DATA17
DATA18
DATA19
DATA20
DATA21
DATA22
DATA23
DATA24
DATA25
DATA26
DATA27
DATA28
DATA29
DATA30
DATA31
ADD2
ADD3
ADD4
ADD5
ADD6
ADD7
ADD8
ADD9
ADD10
ADD11
ADD12
ADD13
ADD14
ADD24
ADD25
NAND_CS0
[2,3]
MCS0
[2,5]
VIBRATOR_ON
[2,7]
SDRAM_1V8
FLASH_1V8
G2_INT
[3,11]
FLASH_1V8
GCS0
[5]
ADD1
IO_3V3
OM0
[3]
OM0
[3]
CHIP_PWD
[16,21]
WLAN_NRESET
[16]
GPG14
[3]
ADD15
ADD16
ADD17
ADD18
ADD19
ADD20
ADD21
ADD22
ADD23
PIO_2
[2,17,22]
WLAN_GPIO1
[2,16]
USB_OC
[7]
USB_FLT
[7]
GSM_OC
[4]
G1_CS
[2,11]
G2_CS
[2,11]
IO_3V3
BT_EN
[2,17]
GCS3
[5]
DL_GSM
[7]
SHUTDOWN
[4]
HDQ
[4]
G2_INT
[3,11]
IO_3V3
IO_3V3
LOCATION:17XX
POWER
POWER ON KEY
Battery Connector
A5 : C1767 =4.7uF
A6 : C1767=47uF
A5 : C1755= 10uF
A6 : C1755= 22uF
A7 : C1767=100uF
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
POWER
GTA02
A7
Allen Chang
4
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
C1705
100N
1
2
3
4
5
6
7
CON1701
BAT-CON_03JA4GE
2
1
BAT1701
HB414 IVO1E
R1719
0R
R1716
0R
R1717
0R
R1718
0R
R1715
0R
R1708
10K
R1707
10K
R1741
NC
4
2
3
1
X1701
MS2V-T1S
R1714
100K
L1702
4U7, PLL201212F4R7K SUBARU
R1722
0R
R1720
0R
L1701
2U2, PLL322512F2R2K SUBARU
R1721
0R
L1703
4U7, PLL201212F4R7K SUBARU
R1704
12K4
1%
C1702
10P
C1703
10P
C1708
22U
C1709
22U
C1720
100N
C1722
100N
C1721
100N
C1719
470N
C1718
470N
C1728
470N
C1716
470N
C1717
470N
SW1701
SW_PUSHBUTTON_0
EVQPUD02K PANASONIC
C1706
10U
B1701
KLB0603K601SA
H-TP1702
H-TP1701
R1731
100K
1%
R1732
39K
1%
R1713
100K
1
BATSNS
2
NTCSW
3
HCLDOUT
4
HCLDOIN
5
LDO5OUT
6
LDO56IN
7
LDO6OUT
8
ACCSW
9
ADCIN1
10
ADCIN2
11
VISA
12
REFG
ND
13
REFC
14
GPIO3
15
GPIO2
16
GPIO1
17
IRQ
18
SDA
19
SCL
20
CLK32K
21
RSTHC
22
DOWN2FB
23
DOWN2IN
24
DOWN2LX
25
DOWN1LX
26
DOWN1IN
27
DOWN1FB
28
GPO
29
LEDIN
30
LEDOUT
31
LEDLX
32
LEDAMB
33
LEDFB
34
LEDFBGND
35
EXTON1
36
EXTON2
37
EXTON3
38
KEEPACT
39
SHUTDOWN
40
ONKEY
41
AUTOLXB2
42
AUTOOUT2
43
AUTOOUT1
44
AUTOLXB1
45
AUTOLXA2
46
AUTOIN2
47
AUTOIN1
48
AUTOLXA1
49
BUBAT
50
OSCO
51
OSCI
52
LDO1OUT
53
LDO12IN
54
LDO2OUT
55
LDO3OUT
56
LDO34IN
57
LDO4OUT
58
SYS1
59
SYS2
60
USB1
61
USB2
62
BAT1
63
BAT2
64
VISC
65
CHGCUR
66
ADAPTSNS
67
ADAPTCTRL
68
BATTEMP
69
GN
D
U1701
PCF50633/04/N3
C1704
100N
C1761
100N
C1762
10N
L1704
2U2,PLL201212F2R2K SUBARU
R1763
42R2
C1764
10U
R1764
0R
C1765
4U7
C1766
100N
R1705
5K36
1%
R1765
10K
R1769
NC
R1709
100K
R1710
33K
H-TP1703
H-TP1704
C1707
47U
C1714
4U7
C1710
4U7
C1713
4U7
H-TP1705
R1751
100K
R1752
NC
C1730
1U
C1729
1U
1
VIN
2
GND
3
EN
4
NC
5
VOUT
U1702
RT9013-12PB
R1729
100K
H-TP1706
C1732
100P
C1733
100P
C1734
100P
1
EN
2
GND
3
FLG
4
VIN
5
VOUT
U1705
RT9702APB
R1753
10K
C1753
100N
R1701
NC
R1766
10K
R1767
10K
R1768
10K
R1761
10K
R1762
470R
C1754
100N
C1767
100U
C1755
22U
VB
VBUS
VB
IO_3V3
RESET
[2,3,5,7]
X_I2C_SCL
[2,3,6,7]
X_I2C_SDA
[2,3,6,7]
PWR_IRQ
[3]
KEEPACT
[2,3]
VB_SYS
PWREN
[3]
CLK32K
[2,12]
VB_SYS
BT_3V2
CODEC_3V3
GSENSOR_3V3
SD_3V3
LED+
LED-
IO_3V3
USB_ID
[7]
RF_3V
BAT_ID
[4]
BAT_ID
[4]
IO_3V3
GSM_ON
[4]
VBAT
GSM_ON
[4]
VB_GSM
VB_GSM
IO_3V3
LCM_3V
IO_1V8
STBY_1V2
EN_USBHOST
[7]
IO_1V8
IO_3V3
IO_3V3
CORE_1V3
IO_3V3
GSM_OC
[3]
SHUTDOWN
[3]
IO_3V3
BAT_ID
[4]
HDQ
[3]
LOCATION:22XX
SDRAM
LOCATION:25XX
NOR FLASH
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
MEMORY
GTA02
A7
Allen Chang
5
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
1
2
3
4
5
6
7
8
RP2202
RP_33R
33R
C2208
10N
C2207
10N
C2210
10N
C2206
10U
C2209
10N
C2211
10N
B2201
KLB0603K601SA
1
2
3
4
5
6
7
8
RP2203
RP_33R
33R
1
2
3
4
5
6
7
8
RP2201
RP_33R
33R
R2502
100K
R2503
100K
C2501
10N
C2502
100N
R2504
0R
A1
DQ26
A2
DQ24
A3
VSS
A7
VD
D
A8
DQ23
A9
DQ21
B1
DQ28
B2
VD
DQ
B3
VSSQ
B7
VD
DQ
B8
VSSQ
B9
DQ19
C1
VSSQ
C2
DQ27
C3
DQ25
C7
DQ22
C8
DQ20
C9
VD
DQ
D1
VSSQ
D2
DQ29
D3
DQ30
D7
DQ17
D8
DQ18
D9
VD
DQ
E1
VD
DQ
E2
DQ31
E3
NC
E7
NC
E8
DQ16
E9
VSSQ
F1
VSS
F2
DQM3
F3
A3
F7
A2
F8
DQM2
F9
VD
D
G1
A4
G2
A5
G3
A6
G7
A10
G8
A0
G9
A1
H1
A7
H2
A8
H3
A12
H7
NC
H8
BA1
H9
A11
J1
CLK
J2
CKE
J3
A9
J7
BA0
J8
CS
J9
RAS
K1
DQM1
K2
NC
K3
NC
K7
CAS
K8
WE
K9
DQM0
L1
VD
DQ
L2
DQ8
L3
VSS
L7
VD
D
L8
DQ7
L9
VSSQ
M1
VSSQ
M2
DQ10
M3
DQ9
M7
DQ6
M8
DQ5
M9
VD
DQ
N1
VSSQ
N2
DQ12
N3
DQ14
N7
DQ1
N8
DQ3
N9
VD
DQ
P1
DQ11
P2
VD
DQ
P3
VSSQ
P7
VD
DQ
P8
VSSQ
P9
DQ4
R1
DQ13
R2
DQ15
R3
VSS
R7
VD
D
R8
DQ0
R9
DQ2
U2201
K4M51323PE
R2505
100K
A1
A11
A2
A8
A3
VSS
A4
VD
D
A5
VPP
A6
A18
A7
A6
A8
A4
B1
A12
B2
A9
B3
NC
B4
K
B5
RP
B6
A17
B7
A5
B8
A3
C1
A13
C2
A10
C3
NC
C4
L
C5
W
C6
A19
C7
A7
C8
A2
D1
A15
D2
A14
D3
WAIT
D4
A16
D5
DQ12
D6
WP
D7
NC
D8
A1
E1
VD
DQ
E2
DQ15
E3
DQ6
E4
DQ4
E5
DQ2
E6
DQ1
E7
E
E8
A0
F1
VSS
F2
DQ14
F3
DQ13
F4
DQ11
F5
DQ10
F6
DQ9
F7
DQ0
F8
G
G1
DQ7
G2
VSSQ
G3
DQ5
G4
VD
D
G5
DQ3
G6
VD
DQ
G7
DQ8
G8
VSSQ
U2501
M58WR016KB
R2506
NC
AND
1
A
2
B
3
GND
4
Y
5
VCC
U2502
SN74LVC1G08DCKR
IO_1V8
SDRAM_1V8
ADD25
[2,3]
MRAS
[2,3]
MCAS
[2,3]
MWE
[2,3,5,12]
MCKE
[2,3]
MCS0
[2,3]
DQM3
[2,3]
DQM2
[2,3]
MCLK0
[2,3]
ADD[0:26]
[3,5]
DQM1
[2,3,12]
DQM0
[2,3,12]
FLASH_1V8
IO_1V8
FLASH_1V8
FLASH_1V8
NAND_RDY
[2,3]
ADD24
[3]
DATA[0:31]
[3,5,12]
ADD2
ADD3
ADD4
ADD5
ADD6
ADD7
ADD8
ADD9
ADD10
ADD11
ADD12
ADD13
ADD14
SDRAM_1V8
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
DATA16
DATA17
DATA18
DATA19
DATA20
DATA21
DATA22
DATA23
DATA24
DATA25
DATA26
DATA27
DATA28
DATA29
DATA30
DATA31
RESET
[2,3,4,7]
MWE
[2,3,5,12]
OE
[2,3,12]
ADD[0:26]
[3,5]
DATA[0:31]
[3,5,12]
ADD1
ADD2
ADD3
ADD4
ADD5
ADD6
ADD7
ADD8
ADD9
ADD10
ADD11
ADD12
ADD13
ADD14
ADD15
ADD16
ADD17
ADD18
FLASH_1V8
ADD19
ADD20
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
FLASH_1V8
NOR_WP
[7]
FLASH_1V8
FLASH_CE
[5]
FLASH_CE
[5]
GCS0
[3]
GCS3
[3]
LOCATION:30XX
AUDIO_CODEC
A5: C3012,C3013= 100nF
A6: C3012,C3013= 4.7uF
A7: C3012,C3013= 4.7uF
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
AUDIO CODEC
GTA02
A7
Allen Chang
6
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
C3002
100N
C3003
100N
B3001
KLB0603K601SA
B3002
KLB0603K601SA
C3010
100N
C3009
100N
C3008
100N
C3014
100N
C3015
4U7
C3013
4U7
C3012
4U7
R3001
0R
C3007
100N
C3006
100N
C3011
100N
C3016
100N
C3001
10U
C3004
10U
C3005
10U
1
VXD
OU
T
2
VXC
LK
3
VXFS
4
LRC
5
BC
LK
6
AD
CD
AT
7
DA
CD
AT
8
MC
LK
9
DBV
DD
10
DC
VD
D
11
DG
ND
12
PC
MC
LK
13
GP2/C
LK2
14
GP1/C
LK1
15
PG
ND
16
PV
DD
17
HPV
DD
18
OUT4
19
OUT3
20
ROUT1
21
LOUT1
22
HP/S
PKR
GN
D
23
ROUT2
24
LOUT2
25
SPKR
VD
D
26
MONO2
27
MONO1
28
AV
DD
29
AG
ND
30
VR
EF
31
VM
ID
32
MICBIAS
33
ACIN
34
ACOP
40
MIC1N
39
MIC1
35
LINE1
36
LINE2
38
RXN
37
RXP
41
MIC2
42
MIC2N
43
GPIO
4
46
SD
IN
47
SC
LK
44
MO
DE/G
PIO
3
45
CSB/G
PIO
5
48
VXD
IN
49
GN
D
U3001
WM8753L
C3017
100N
C3018
100N
R3010
0R
C3028
47P
C3029
47P
R3004
0R
R3005
0R
D3002
KEV040209151A KARMAX
D3001
KEV040209151A KARMAX
C3027
47P
1
2
REC4301
PHILIPS RECEIVER 2403 252 28828
1
2
3
4
B3004
EXC240CB102U
1
2
3
4
B3005
EXC240CB102U
C3020
NC
DVCC_CODEC
AVCC_CODEC
CODEC_3V3
MICBIAS
[2,7,14]
IIS_CLK
[2,3]
IIS_OUT
[2,3]
IIS_IN
[2,3]
IIS_LRC
[2,3]
IIS_MCLK
[2,3]
EARN
[2,14,18]
EARP
[2,14,18]
HS_MIC
[2,7]
MIC1
[2,7]
MICIN
[2,14,18]
MICIP
[2,14,18]
DVCC_CODEC
AVCC_CODEC
X_I2C_SDA
[2,3,4,7]
X_I2C_SCL
[2,3,4,7]
PCM_IN
[2,17,22]
PCM_CLK
[2,17,22]
PCM_SYNC
[2,17,22]
PCM_OUT
[2,17,22]
LOUTR
[2,7]
LOUTL
[2,7]
IO_3V3
MIC2
[2,7]
LOCATION:43XX
MIC
LOCATION:44XX
HEADSET
LOCATION:41XX
SPK
LOCATION:46XX
VIBRATOR
LOCATION:49XX
USB
LOCATION:47XX
DEBUG
USB_ID function
Assuming infinite ADCIN2 input resistance:
1) USB Device Mode: Rext > 100k
=>Vacd will be > 1.85V (2.4V max)
2)USB Host Mode : Rext < 10
=> Vacd will be < 330uV
3) Change Mode: Rext = 48K 1%
=> Vacd will be =1.5V
In RD side, the download path is
1`Download Jack insert
2`Host detect pin 2 of JK4401 is low,download cable confirm.
3`Host set /DL_GSM to low,download path is on.
In factory,the download path is
1`Operator put on the PCBA to download fixture.
2`Download directly through H_TP4401`H_TP4402.
A5: R4411 =NC
A6 : R4411 =100K
Host mode Power
Charge Path
A5: C4111,C4110 =1uF
A6: C4111,C4110 =1uF
A7: C4111,C4110 =TBD
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
INTERFACE
GTA02
A7
Allen Chang
7
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
R4305
2K2
R4303
0R
R4406
100K
R4407
33R
R4405
33R
C4403
22P
C4404
22P
C4304
100N
C4301
22P
C4302
22P
C4303
100N
1
2
MIC4301
MIC IMPERIAL IMP-413TN
IMPERIAL IMP-413TN
1
2
3
4
5
6
JK4401
NUCONN JAR02-062101
C4406
1U
R4401
220R
C4405
22P
R4404
NC
R4408
2K2
C4110
1U
C4111
1U
C4117
1U
C4128
10P
C4122
39P
C4120
18P
C4121
18P
C4119
39P
C4601
10P
2
N
1
P
VB4601
P0408B-13-P2H
D4601
D4602
1
2
3
Q4601
DTC123JETL
C4115
1U
C4114
1U
C4902
KEV
040205331A
KA
RM
AX
R4915
22R
R4914
22R
B4902
KLB0603K601SA
1
VBUS
2
D-
3
D+
4
ID
5
GND
6
SHELL1
7
SHELL2
8
SHELL3
9
SHELL4
CON4901
OTG_CON
CMK A425-206162-001
R4909
15K
R4908
15K
D4901
KEV
040209151A
KA
RM
AX
D4902
KEV
040209151A
KA
RM
AX
D4903
KEV
040205331A
KA
RM
AX
D4904
KEV
040209151A
KA
RM
AX
D4301
D4302
D4402
D4105
D4106
R4910
1K5
H-TP4901
H-TP4902
H-TP4903
H-TP4403
H-TP4904
R4410
100K
1
1OE
2
1A
3
2Y
4
GND
5
2A
6
1Y
7
2OE
8
VC
C
U4401
SN74LVC2G125
R4403
100K
C4305
22P
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
CON4702
HRS FH23-39S-0.3SHW(05)
4
3
2
1
B4105
EXC240CB102U
1
2
3
4
B4102
EXC240CB102U
H-TP4703
H-TP4704
H-TP4705
R4108
0R
2
1
D4603
1SS400
1SS400
1
LEFTIN
2
SHUTDOWN
3
HP-IN
4
GN
D
5
RIGHTIN
6
RIGHTOUT
7
BYPASS
8
BLTOUT+
9
VD
D
10
LEFTOUT/BLTOUT-
U4101
LM4853
R4109
100K
R4114
100K
R4110
20K
R4113
20K
R4112
20K
R4115
20K
R4116
1K
R4117
1K
1
2
SPK4102
P06-0231-00
1
OE
2
A
3
GND
4
Y
5
VCC
U4901
SN74AUP1G125
R1918
100K
C4909
KEV
040205331A
KA
RM
AX
C4911
100N
C4913
22U
R4920
100K
H-TP4706
H-TP4707
H-TP4708
H-TP4709
H-TP4710
H-TP4712
H-TP4711
H-TP4713
H-TP4714
1
LIN
2
EN
3
IN
4
VCC
5
GND
6
FB
7
FLT
8
SET
9
OUT2
10
OUT1
11
SW
12
SW
13
PGND
14
PGND
15
IN
16
LIN
U4904
AAT1275
L4901
2U2
R4918
14K
1%
R4912
10K
C4904
22U
C4905
22U
C4906
22U
R4917
432K
1%
R4916
59K
1%
1
1OE
2
1A
3
2Y
4
GND
5
2A
6
1Y
7
2OE
8
VC
C
U4903
SN74LVC2G126
H-TP4715
H-TP4716
H-TP4717
H-TP4718
NAND
1
A
2
B
3
GND
4
Y
5
VCC
U4902
74AUP1G00
H-TP4401
H-TP4402
1
FLG
2
GND
3
EN
4
VIN
5
VOUT
U4905
RT9711BPB
H-TP4101
H-TP4102
R4701
100K
R4702
100K
H-TP4406
H-TP4405
R4703
NC
R4306
NC
R4411
100K
C4306
NC
C4307
NC
MICBIAS
[2,6,7,14]
MIC2
[2,6]
MIC1
[2,6]
JACK_INSERT
[2,3]
IO_3V3
HS_MIC
[2,6]
MICBIAS
[2,6,7,14]
LOUTL
[2,6]
LOUTR
[2,6]
AMP_3V3
EP_R
[7]
EP_L
[7]
VIBRATOR_ON
[2,3]
VB
USB_D-
[2,3]
USB_D+
[2,3]
USB_VBUS
STDI
[2,3]
RESET
[2,3,4,5,7]
STMS
[2,3]
STCK
[2,3]
STDO
[2,3]
STRST
[2,3]
CONSOLE_TXD
[2,3]
CONSOLE_RXD
[2,3]
GSM_EN
[2,3]
HOLD
[2,3]
TX_IRDA
[2,14,18]
RX_IRDA
[2,14,18]
IO_3V3
EP_L
[7]
EP_R
[7]
SS0
[2,3]
SPI_MISO0
[2,3]
SPI_MOSI0
[2,3]
SPI_CLK0
[2,3]
X_I2C_SDA
[2,3,4,6]
X_I2C_SCL
[2,3,4,6]
EINT3
[2,3]
USB_ID
[4]
IO_3V3
DL_GSM
[3]
AMP_SHUT
[3]
AMP_3V3
HP_IN
[3]
IO_3V3
IO_3V3
IO_3V3
EN_USBHOST
[4,7]
USB_VBUS
VBUS
USB_OC
[3]
NOR_WP
[5]
EN_USBHOST
[4,7]
USB_FLT
[3]
IO_3V3
VB
USB_VBUS
IO_3V3
EN_USBHOST
[4,7]
IO_3V3
RESET
[2,3,4,5,7]
USB_PULLUP
[2,3]
IO_3V3
IO_3V3
LOCATION:6XXX
LCM_TOUCH_PANEL
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
LCM
GTA02
A7
Allen Chang
8
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
C6002
100N
C6003
100N
1
LED+
2
LED-
3
VDDIO
4
VDC
5
GND
6
YU
7
XL
8
YL
9
XR
10
XCS
11
DIN
12
GND
13
SCL
14
NC
15
XRES
20
B4
18
B2
38
HSYNC
37
VSYNC
30
R2
29
R1
26
G4
24
G2
39
DE
31
R3
27
G5
17
B1
28
R0
25
G3
23
G1
22
G0
21
B5
19
B3
34
GND
32
R4
36
GND
35
PCLK
16
B0
33
R5
CON6001
R6001
0R
4
3
2
1
8
7
6
5
9
10
RP6001
RP_T330R
FA2012-KR40PAA ACX
FILTER 50MA 25V 400MHZ SMT2012 10PIN FA2012-KR40PAA ACX FOR GSM LR
4
3
2
1
8
7
6
5
9
10
RP6002
RP_T330R
FA2012-KR40PAA ACX
4
3
2
1
8
7
6
5
9
10
RP6003
RP_T330R
FA2012-KR40PAA ACX
4
3
2
1
8
7
6
5
9
10
RP6004
RP_T330R
FA2012-KR40PAA ACX
C6001
10U
4
3
2
1
8
7
6
5
9
10
RP6005
RP_T330R
FA2012-KR40PAA ACX
R6002
0R
R6004
100K
C6004
47P
C6005
NC
C6006
47P
C6007
47P
C6008
NC
H-TP6001
H-TP6002
4
3
2
1
8
7
6
5
9
10
U6002
RP_T330R
FA2012-KR40PAA ACX
FILTER 50MA 25V 400MHZ SMT2012 10PIN FA2012-KR40PAA ACX FOR GSM LR
LCM_3V
LCD_SCL
[2,12]
LCD_DIN
[2,12]
LED+
LED-
XL
[2,3]
YU
[2,3]
XR
[2,3]
YL
[2,3]
L_PCLK
[2,12]
LCD2
[12]
LCD5
[12]
LCD7
[12]
LCD10
[12]
LCD11
[12]
LCD13
[12]
LCD18
[12]
LCD3
[12]
LCD15
[12]
LCD21
[12]
LCD_DE
[2,12]
LCD12
[12]
LCD14
[12]
LCD19
[12]
LCD20
[12]
L_VSYNC
[2,12]
L_HSYNC
[2,12]
LCD4
[12]
LCD6
[12]
LCD22
[12]
LCD23
[12]
LCD_RESET
[2,12]
LCD_CS
[2,12]
LOCATION:75XX
MEMORY_CARD
New on A7: C7501,C7502,C7503,C7504,C7505,C7506
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
MEMORY CARD
GTA02
A7
Allen Chang
9
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
R7511
10K
R7512
10K
R7513
10K
R7514
10K
R7515
10K
R7503
75R
R7504
75R
R7505
75R
R7506
75R
R7507
75R
R7508
75R
1
SD_DAT2
2
SD_DAT3/CD
3
SD_CMD
4
SD_VDD
5
SD_CLK
6
SD_VSS
7
SD_DAT0
8
SD_DAT1
9
GN
D
10
SIM_VCC
11
GND
12
SIM_RST
13
SIM_MCLK
14
SIM_SCLK
15
SIM_I/0
16
SIM_DAT0
17
SIM_MCMD
18
GN
D
19
GN
D
20
GN
D
21
GN
D
CON7501
C7501
NC
C7502
NC
C7503
NC
C7504
NC
C7505
NC
C7506
NC
SD_3V3
SD_3V3
V-SIM
[2,14,18]
SIM-RST
[2,14,18]
SIM-CLK
[2,14,18]
SIM-I/O
[2,14,18]
SD_DATA2
[2,12]
SD_DATA3
[2,12]
SD_CMD
[2,12]
SD_CLK
[2,12]
SD_DATA0
[2,12]
SD_DATA1
[2,12]
LOCATION:76XX
ublox_ANTARIS 4_ATR0635&ATR0610
17dB NF=1.2 @ 3V (13mA)
External ANT Module
Internal ANT Module
Note1
Note1
Note1:These traces are RF transmission line and the characteristic impedance is 50 ohm.
Note2
Note2: Differential RF traces and the balanced impedance is 100 ohm
When using 1.8V internal LDO: Connect R7602,R7603,R7604
When using 1.8V External LDO(PMU): Connect R7601,R7606,R7607
Near U7608.RF_ON Pin
Many thanks to u-blox AG, Switzerland, for encouraging and supporting Openmoko to publish the complete schematics of the GPS part.
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
AGPS
GTA02
A7
Shawn Lin
10
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
A1
XTO
A2
X
A3
GNDA
A4
AGCO
A5
VDIG
A6
GND
A7
NRESET
A8
CLK32
A9
GND
A10
VDD_USB
A11
P9/EXTINT0
A12
XT_IN
B1
GNDA
B2
NX
B3
NXTO
B4
GNDA
B5
VDDIO
B6
P26/GPSMODE10
B7
SIGLO0
B8
SIGHI0
B9
VDD18
B10
P13/GPSMODE3
B11
GND
B12
XT_OUT
C1
NRF
C2
VCC1
C3
MO
C4
SDI
C5
GDIG
C6
P2/BOOT_MODE
C7
P18/TXD1
C8
P0/ANTSHORT_N
C9
USB_DP
C10
P31/RXD1
C11
LDO_EN
C12
VBAT18
D1
RF
D2
GNDA
D3
TEST
D4
EGC
D5
P29/GPSMODE12
D6
P12/GPSMODE2
D7
P8/STATULED
D8
P1/GPSMODE0
D9
USB_DM
D10
P22/RXD2
D11
LDOBAT_IN
D12
VBAT
E1
GNDA
E2
GNDA
E3
GNDA
E4
VCC2
E5
VDD18
E6
P21/TXD2
E7
P28
E8
DBG_EN
E9
NSHDN
E10
NSLEEP
E11
LDO_IN
E12
LDO_OUT
F1
GNDA
F2
GNDA
F3
GNDA
F4
PUXTO
F5
GND
F6
P19/GPSMODE6
F7
P27/GPSMODE11
F8
P23/GPSMODE7
F9
TDO
F10
RF_ON
F11
P15/ANTON
F12
VDD18
G1
GNDA
G2
VBP
G3
VBP
G4
PURF
G5
P25/AADET0_N
G6
P14/AADET_N
G7
P20/TIMEPULSE/SCK2
G8
P16/EPROM_N
G9
TCK
G10
TMS
G11
VDD18
G12
P30/AGCOUT
H1
GNDA
H2
VBP
H3
VBP
H4
PURF
H5
VDDIO
H6
P17/GPSMODE5/SCK1
H7
P24/GPSMODE8
H8
GND
H9
VDD18
H10
TDI
H11
NTRST
H12
GND
U7608
ATR0635-7KQY
C7601
47P
C7602
1P8
L7602
4N7H
1
VCC
2
RF_OUT
3
DC_GND
4
RF_IN
5
RF_GND
6
PU
U7601
ATR0610-PQQW
1
2
3
4
5
U7603
B7840
C7604
1P5
C7605
1P5
L7603
6N2H
C7617
1U
C7616
1U
C7615
1U
C7614
1U
B7602
BLM15HD102SN1
1
GND
2
GND
3
OUT
4
VCC
X7601
C7606
12P
C7607
4P7
C7608
22P
1
2
X7602
CC7V-T1A
C7609
18P
C7610
18P
1
OUT
2
IN
3
GND
U7604
R3113D241A
C7611
2N2
C7626
1U
C7618
1U
C7619
1U
C7621
1U
C7622
1U
C7624
1U
C7625
1U
R7602
0R
R7601
NC
C7638
100N
1
2
3
CON7601
RCA_JACK_2
2
VSENSE+
3
VSENSE-
1
IOUT
U7605
ZXCT1009
R7613
6R8
1
OUTPUT1
2
GND
6
VDD
4
VCONT
3
OUTPUT2
5
INPUT
U7606
UPG2012TB
UPG2012TB
C7631
22P
C7630
22P
R7616
5K6
R7614
0R
1
2
3
CON7602
RCA-S25
6.5mm
C7637
22P
C7629
22P
L7609
39NH
L7601
39NH
C7628
100N
C7620
1N
R7620
100R
C7623
1N
1
2
3
Q7602
R7618
10R
R7617
10K
R7615
47K
C7603
10N
H-TP7601
H-TP7602
H-TP7603
R7604
0R
R7603
0R
H-TP7604
1
R2
2
3
D2
4
S2
5
ON/OFF
6
R1,C1
U7609
SI1040X
R7605
100K
C7633
10N
C7632
100N
R7606
NC
R7607
NC
R7608
100K
C7613
100N
B7601
BLM15HD102SN1
1
R2
2
3
D2
4
S2
5
ON/OFF
6
R1,C1
U7610
SI1040X
R7609
0R
RF_GND
RF_ON
[10]
RF_GND
RF_GND
RF_GND
RF_GND
RF_GND
RF_GND
VCCTCXO
VCCRF
RF_GND
RF_GND
RF_ON
[10]
VCCRF
RF_3V
RF_3V
IO_1V8
RF_3V
GPS_TX_M
[2,3]
GPS_RX_M
[2,3]
EXTINT0
[2,3]
VCCRF
VCONT
[10]
VCONT
[10]
LNA_AVDD
LNA_AVDD
RF_GND
RF_GND
RF_GND
RF_GND
RF_GND
RF_GND
RF_GND
RF_GND
VCCRF
RF_GND
RF_GND
NSLEEP
[10]
RF_GND
NSLEEP
[10]
VCCRF
VCCRF
VCCTCXO
RF_GND
RF_GND
RF_3V
RF_GND
RF_ON
[10]
VCCRF
VCCRF
RF_GND
LNA_AVDD
RF_GND
RF_GND
RF_GND
RF_GND
LOCATION:78XX
MOTION_SENSOR
A5 : R7809,R7808,R7810,R7807 =100K
A6 : R7809,R7808,R7810,R7807 =NC
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
MOTION SENSOR
GTA02
A7
Allen Chang
11
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
1
VDD_IO
2
GN
D
3
RESERVED
4
GN
D
5
GN
D
6
VDD
7
CS
8
INT1
9
INT2
10
GN
D
11
RESER
VED
12
SDO
13
SDI
14
SPC
U7801
LIS302DL
C7801
100N
C7802
10U
R7802
0R
1
VDD_IO
2
GN
D
3
RESERVED
4
GN
D
5
GN
D
6
VDD
7
CS
8
INT1
9
INT2
10
GN
D
11
RESER
VED
12
SDO
13
SDI
14
SPC
U7802
LIS302DL
C7803
100N
C7804
10U
R7804
0R
R7809
NC
R7810
NC
R7808
NC
R7807
NC
GSENSOR_3V3
SPI_CLK1
[2,3,11]
SPI_MOSI1
[2,3,11]
GSENSOR_3V3
SPI_MISO1
[2,3,11]
G1_CS
[2,3]
G2_CS
[2,3]
SPI_MISO1
[2,3,11]
SPI_MOSI1
[2,3,11]
SPI_CLK1
[2,3,11]
GSENSOR_3V3
GSENSOR_3V3
G1_INT
[3]
G2_INT
[3]
LOCATION:18XX
MULTIMEDIA_CO-PROCESSOR
CFG3 = '0': OSCI is 32 KHz
CFG3 = '1': OSCI is 13 MHz
CFG0 CFG1 HCLK HADVN HA10 Host Bus Type Description
0 0 0 0 A10 Direct addressing 16-bit 80 type 1
0 0 0 1 A10 Direct addressing 16-bit 80 type 2
0 0 1 N/A A10 Direct addressing 16-bit 68 type
0 1 0 ADV A10 Indirect addressing 16-bit 80 type
0 1 1 ADV A10 Indirect addressing 16-bit 68 type
0 1 0 ADV 1 Indirect addressing 8-bit 80 type
0 1 1 ADV 1 Indirect addressing 8-bit 68 type
1 1 ITF CLK ADVN NA Synchronous iBurst type
CFG2 = '0': Use internal PLL
CFG2 = '1': Use Oscillator
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
MULTIMEDIA CO-PROCESSOR
GTA02
A7
Allen Chang
12
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
OSCI
Power
Audio
I2S
LCD
Inte
rfac
e
MMC Bus
Sensor I/O
I/O
LCD
I/O
Audio
Sensor Interface
Config
Bus
Host
F3
HA1
F4
HA2
F5
HA3
G3
HA4
G2
HA5
H5
HA6
H4
HA7
H3
HA8
H2
HA9
H1
HA10
J5
HA11
J4
HA12
J3
HA13
J2
HA14
J1
HA15
K5
HA16
K4
HA17
K3
HA18
K1
HA19
L4
HA20/GPIO0
L3
HA21/GPIO1
L2
HA22/GPIO2
L1
HA23/GPIO3
B3
HD0
C3
HD1
A2
HD2
B2
HD3
B1
HD4
C1
HD5
C2
HD6
D1
HD7
D3
HD8
D4
HD9
E1
HD10
E2
HD11
E3
HD12
E4
HD13
E5
HD14
F1
HD15
B5
HCS#
C5
HRD#
D5
HWR#
A4
HWAIT#
C4
HLB#
A3
HUB#
D6
RST#
A5
INT#
F2
HCLK
B4
HADV#/GPIO19
A6
OSC
I
N10
LD0
L11
LD1
M11
LD2
N11
LD3
M12
LD4
N12
LD5
M13
LD6
L13
LD7
L12
LD8
K13
LD9
K12
LD10
K11
LD11
J13
LD12
J12
LD13
J11
LD14
J10
LD15
J9
GPIO8/LD16
H11
GPIO9/LD17
N8
GPIO6/LDCLK
M8
GPIO4/LCS0#
H10
GPIO5/LCS1#
L9
LHSYNC
M9
LVSNYC
K9
GPIO7/LDE#
N9
GPIO10/LSCK
L10
GPIO11/LSDA
M10
GPIO12/LSA0
H9
TVCLK
N6
AMCLK
M4
ACLK
N5
AWS
M5
ASDIN
M6
ZCLK
L6
ZWS
K6
GPIO20/ZSDOUT
H12
MM
CC
LK
G12
MM
CC
MD
G11
MM
CD
AT
F11
GPIO
16/M
MC
DA
T1
F12
GPIO
17/M
MC
DA
T2
F13
GPIO
18/M
MC
DA
T3
C9
GPIO
15/F
LCT
L
C12
CSD
A
D12
CSEN
D13
CSC
L
B12
CV
SY
NC
C13
CH
SY
NC
E13
PC
LK
D11
SC
LK
A10
CD
7
B10
CD
6
C10
CD
5
D10
CD
4
A11
CD
3
B11
CD
2
A12
CD
1
B13
CD
0
D9
GPIO
14/C
SG
PO
1
E9
GPIO
13/C
SG
PO
0
C6
EN
TEST
N2
CFG
3
M1
CFG
2
M2
CFG
1
M3
CFG
0
B8
DG
PIO
15
C8
DG
PIO
14
D8
DG
PIO
13
A9
DG
PIO
12
B9
DG
PIO
11
E12
DG
PIO
10
E11
DG
PIO
9
E10
DG
PIO
8
F10
DG
PIO
7
F9
DG
PIO
6
L8
DG
PIO
5
K8
DG
PIO
4
M7
DG
PIO
3
L7
DG
PIO
2
N4
DG
PIO
1
N3
DG
PIO
0
D7
IVD
D
G4
IVD
D
G10
IVD
D
K7
IVD
D
B7
AIVDD1
C7
AIVDD2
D2
HOVDD
K2
HOVDD
B6
AOVDD
A1
MO
VD
D
A7
MO
VD
D
A13
MO
VD
D
N1
MO
VD
D
N7
MO
VD
D
N13
MO
VD
D
K10
LOVDD
C11
COVDD
H13
TOVDD
L5
UOVDD
E6
VSS
E7
VSS
E8
VSS
G1
VSS
G5
VSS
G9
VSS
G13
VSS
J6
VSS
J7
VSS
J8
VSS
A8
AIV
SS
U1801
GLAMO_3362
C1809
1U
C1810
1U
C1807
1U
C1808
1U
C1811
1U
C1812
1U
C1813
1U
C1814
1U
C1801
1U
C1802
1U
C1803
1U
C1804
1U
C1805
1U
C1806
1U
B1802
MCB1005S601EA
C1815
22P
C1816
22P
R1801
10K
R1812
33R
C1817
NC
R1802
0R
R1803
0R
R1804
0R
R1805
0R
R1806
0R
R1807
0R
R1808
0R
R1809
0R
RP1801
RP_330R
100K
RP1803
RP_330R
100K
RP1804
RP_330R
100K
RP1802
RP_330R
100K
R1810
100K
R1811
100K
B1803
MCB1005S601EA
B1801
MCB1005S601EA
H-T
P1801
H-T
P1802
H-T
P1803
H-T
P1804
R1813
80K6
R1814
100K
R1815
5K6
MOVDD
IVDD
AIVDD1
AIVDD2
HOVDD
AOVDD
LOVDD
COVDD
TOVDD
UOVDD
AIVDD1
AIVDD2
IVDD
MOVDD
HOVDD
COVDD
LOVDD
TOVDD
UOVDD
AOVDD
IVDD
AIVDD1
AIVDD2
OE
[2,3,5]
MWE
[2,3,5]
ADD[1:23]
ADD4
DATA[0:31]
[3,5]
LCD[0:23]
LCD4
L_HSYNC
[2,8]
L_VSYNC
[2,8]
WAIT
[2,3]
HOVDD
SD_CLK
[2,9]
SD_CMD
[2,9]
SD_DATA0
[2,9]
SD_DATA1
[2,9]
SD_DATA2
[2,9]
SD_DATA3
[2,9]
LCD_SCL
[2,8]
LCD_DIN
[2,8]
LCD_CS
[2,8]
L_PCLK
[2,8]
LCD_DE
[2,8]
3D_CS
[2,3]
DQM0
[2,3,5]
DQM1
[2,3,5]
3D_INT
[2,3]
CLK32K
[2,4]
IO_1V8
MOVDD
IVDD
IO_3V3
HOVDD
COVDD
LOVDD
TOVDD
UOVDD
AOVDD
LCD2
LCD3
LCD5
LCD6
LCD7
LCD10
LCD11
LCD12
LCD13
LCD23
LCD22
LCD21
LCD20
LCD19
LCD18
LCD15
LCD14
DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
DATA9
DATA8
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
ADD23
ADD22
ADD21
ADD20
ADD19
ADD18
ADD17
ADD16
ADD15
ADD14
ADD13
ADD12
ADD11
ADD10
ADD9
ADD8
ADD7
ADD6
ADD5
ADD1
ADD2
ADD3
SD_3V3
IO_3V3
3D_RST
[2,3]
LCD_RESET
[2,8]
PCF50633/07/N3
Philips
Imax=
IOTA TWL3014
Imax=
S3C2440X IO
HCLDO 2.8V 200mA
LDO6 2.8V 50mA
LDO5 1.8V 150mA
LDO4 2.8V 150mA
LDO2 1.8V 50mA
MEM LDO 1.8V 1mA
LDO1 1.4V 50mA
LDO3 1.8V 50mA
RESET
nIRQ
PowerOK
SCL
SDA
VBATT
VBACK
Imax=100mA
2442's SDRAM
Imax=mA
LCM_3V
Imax=33.447mA
AVCC_CODEC(3V3)
Imax=19mA
AMP_3V3
Imax=130mA
Vibrator
Imax=20mA
2442's NAND FLASH
SD_3V3
Imax=
Imax=45mA
RF_ 3V
BT_3V2
Imin=1mA
Imin=0mA
Imin=0.018mA
Imin=0.2uA
Imin=0mA
Imin=0mA
Imin=0mA
Imin=0mA
Imin=8mA
Imin=0mA
Imax=30mA
LED
Imin=0mA
Imax=
Imin=0mA
STBY_1V2 ALIVE
Imax=
CORE_1V3 (NOT INCLUDING ALIVE &RTC)
Imin=
Imax=
WLAN_3V3
Imin=
DOWN1 1.2V 500mA
DOWN2 1.8V 500mA
AUTO 3.3V 1100mA
LED OUT
IO_3V3
IO_1V8
Imax=
Imin=0mA
GLAMO 3362 1V8
Imax=
Imin=0mA
GSENSOR_3V3
Imax=
Imin=0mA
GLAMO 3362 3V3
Imax=20mA
Imax=2.582mA
DVCC_CODEC(3V3)
Imin=0.007mA
Imax=90mA
SDRAM
Imin=1mA
Imax=
S3C2440X Memory
Imin=0mA
Imax=mA
LCM_(IO)3V
Imin=0mA
H-TP1702
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
POWER BLOCK
GTA02
A7
Allen Chang
13
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
SHEET18-20 deleted for NDA
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
GSM
GTA02
A7
Shawn Lin
14
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
TI CALYPSO HERCROM400G2+IOTA TWL3025
CTS_MODEM
RTS_MODEM
MO
DEM
_R
ST
MO
DEM
_O
N
TX_MODEM
RX_MODEM
RF-CLK
/WR
TSPACT09
TSPACT03
TSPEN2
TSPDO
TSPCLK
AFC
APC
ADIN-4
XOEN
BULQM
BULQP
BULIM
BULIP
SIM
-I/O
SIM
-CLK
SIM
-RST
TSPACT00
TSPACT01
TSPACT02
DSR
_M
OD
EM
TC
K
TM
S
/RD
/CS0
RX_IRDA
TX_IRDA
MIC
IP
MIC
IN
RPW
ON
FDP
/BLE
/BH
E
CS1
BU
LT
KBR0
KBR1
KBR2
KBR3
KBR4
DSR_MODEM
TXIR_IRDA
RXIR_IRDA
SD_IRDA
SCK
NC
S3
TD
O
CLK
13M
_O
UT
CLK
32K_O
UT
VBA
TS
ICT
L
VC
CS
PC
HG
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
AD
IN1
AD
IN2
AD
IN3
DA
C
LED
A
LED
B1
LED
B2
LED
C
HSM
ICBIA
S
HSO
HSM
ICP
MIC
BIA
S
AU
XI
AU
XO
P
AU
XO
N
VC
HG
AD
D0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
IO0
IO1
IO2
IO3
IO7
IO9
IO10
IO11
IO12
IO4
IO6
IO8
IO13
SIM_CD
EA
RP
EA
RN
KBC0
KBC1
KBC2
KBC3
KBC4
TSPACT04
NC
S2
A22
/CS4
SDA
VBA
T
V-S
IM
V-I
O
V-R
TC
INT0
BASEBAND_CHIP-SET
SHEET-18
T/R
SAW
PA
Crystal
Transceiver
TSPACT09
TSPACT03
APC
RF-CLK
BULQM
BULQP
BULIP
BULIM
TSPACT00
TSPDO
TSPCLK
TSPEN2
ADIN-4
XOEN
AFC
TSPA
CT
01
TSPA
CT
04
TSPA
CT
02
RF
SHEET-19
SAMSUNG K5A3240CBM
SRAM
FLASH
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
CS1
/BLE
/BH
E
FDP
/CS0
/RD
/WR
/CS4
GSM_MEMORY
SHEET-20
MODEM_RST
[3,18]
MODEM_ON
[2,3,18]
V-SIM
[2,9,18]
SIM-RST
[2,9,18]
SIM-CLK
[2,9,18]
SIM-I/O
[2,9,18]
MICIP
[2,6,18]
MICIN
[2,6,18]
EARP
[2,6,18]
EARN
[2,6,18]
RX_IRDA
[2,7,18]
TX_IRDA
[2,7,18]
RTS_MODEM
[2,3,18]
CTS_MODEM
[2,3,18]
RX_MODEM
[2,3,18]
TX_MODEM
[2,3,18]
INT0
[2,3,18]
IO1
[2,3,18]
BOT
GTA02 MB
Boss Hole&Fiducial Mask
TOP
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
TABLE
GTA02
A7
Allen Chang
15
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SH1
BOTTOM_SHIELDING
1
SH2
GPS_SHIELDING
1
SH3
BB_SHIELDING
1
H1
1
H3
1
H2
1
H4
1
H5
1
H6
1
R1
RF_GND
Samsung
S3C2442
PCF50633
NXP
IO_1V8
GPJ7
GPJ6
WLAN Module Board
GPIO&Control
Power Loop
Matching
Network
SDIO_CLK
SDIO_CMD
SDIO_DATA_0
SDIO_DATA_1
SDIO_DATA_2
GND
VDD3_3
SDIO Interface
BT_ACTIVE
2-Wire CO-EXISTENCE
IO_3V3
SDCLK
SDCMD
SDDAT0
LOCATION:79XX
WLAN
DFWM-MHG21
DFWM-AHG11
SWL-2480
SWL-2700S
DELTA
SAMSUNG
Marvell 88W8686
Marvell 88W8686
Atheros AR6001GZ
Atheros AR6001GZ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Pin
Module
:SPI Interface
:SDIO Interface
:Interruption Control
:4-wire Co-existence if BT supports
*3-wire co-existence supported only use CS324 BT module
SDIO_DATA_3
SDDAT1
SDDAT2
SDDAT3
WL_ACTIVE
VDD1_8
GPIO_0
GPIO_1
BT Module
PIO9
PIO10
:3-wire Co-existence if BT supports
:Power Loop
CHIP_PWD
WLAN_NRESET
GPJ11
GPJ12
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
WLAN
GTA02
A7
Allen Chang
16
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
1
VDD_3V3
2
GND
3
SPI_CLK(SDIO_CLK)
4
SPI_SDI(SDIO_CMD)
5
SPI_SDO(SDIO_DATA_0)
6
SPI_SINTN(SDIO_DATA_1)
7
SPI_SCS(SDIO_DATA_3)
8
GPIO0(SDIO_DATA_2)
9
GPIO1
18
GND
17
VDD_1V8
16
(VCCA)BT_FREQ
15
BT_PRIORITY
14
(WL_ACTIVE)RX_CLEAR
13
(BT_STATE)BT_ACTIVE
12
RESET
11
EXT_WAKE
10
SLEEP_CLK
CON7901
WLAN_PIN
R7901
27NH
R7902
0R
Test Pad
1
VDD_3V3
2
GND
3
SPI_CLK(SDIO_CLK)
4
SPI_SDI(SDIO_CMD)
5
SPI_SDO(SDIO_DATA_0)
6
SPI_SINTN(SDIO_DATA_1)
7
SPI_SCS(SDIO_DATA_3)
8
GPIO0(SDIO_DATA_2)
9
GPIO1
18
GND
17
VDD_1V8
16
(VCCA)BT_FREQ
15
BT_PRIORITY
14
(WL_ACTIVE)RX_CLEAR
13
(BT_STATE)BT_ACTIVE
12
RESET
11
EXT_WAKE
10
SLEEP_CLK
H-TP_WLAN7901
H-TP_WLAN
R7903
10K
R7909
NC
R7908
10K
R7907
10K
R7906
10K
R7905
10K
R7904
10K
R7911
0R
C7901
10N
C7905
8.2pF
IO_3V3
IO_3V3
IO_1V8
WLAN_SDCLK
[2,3]
WLAN_SDCMD
[2,3]
WLAN_DATA0
[2,3]
WLAN_DATA1
[2,3]
WLAN_DATA2
[2,3]
WLAN_DATA3
[2,3]
WLAN_GPIO1
[2,3]
WLAN_GPIO0
[2,3]
CHIP_PWD
[3,21]
WLAN_NRESET
[3,16]
PIO10
[2,17]
PIO9
[2,17]
IO_3V3
WLAN_NRESET
[3,16]
LOCATION:77XX
Bluetooth
Delta BT Module
Samsung
S3C2442
DFBM-CS320
BT_EN
PCM_OUT
PCM_IN
PCM_CLK
PCM_SYNC
DN
DP
PIO_2
PIO_5
IO_3V3
GND
Matching
Network
PCM Interface
USB Interface
Interruption Control
Power Loop
Wolfson
WM8753L
VXDIN
VXDOUT
VXDCLK
VXFS
PCF50633
NXP
IO_3V3
GPC7
GPC5
DN0
DP0
GPB5
RESET
2-wire Co-existence
PIO9
PIO10
BT_PRIORITY
WLAN_ACTIVE
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
BLUETOOTH
GTA02
A7
Shawn Lin
17
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
BTFPC01
BTFPC
R7701
0R
R7703
0R
R7704
0R
H-TP7701
H-TP7702
H-TP7703
H-TP7704
H-TP7705
H-TP7706
H-TP7707
H-TP7708
H-TP7709
H-TP7710
H-TP7711
H-TP7712
H-TP7713
C7701
8.2pF
DP
[2,3]
DN
[2,3]
PCM_CLK
[2,6,22]
PCM_SYNC
[2,6,22]
BT_EN
[2,3]
PCM_OUT
[2,6,22]
PCM_IN
[2,6,22]
PIO_5
[2,3,22]
PIO_2
[2,3,22]
BT_3V2
PIO9
[2,16]
PIO10
[2,16]
LOCATION:78XX
WLAN_Daughter Board
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
WLAN MODULE
GTA02
A1
Shawn Lin
1
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
1
VDD_3V3
2
GND
3
SPI_CLK(SDIO_CLK)
4
SPI_SDI(SDIO_CMD)
5
SPI_SDO(SDIO_DATA_0)
6
SPI_SINTN(SDIO_DATA_1)
7
SPI_SCS(SDIO_DATA_3)
8
GPIO0(SDIO_DATA_2)
9
GPIO1
10
SLEEP_CLK
11
EXT_WAKE
12
RESET
13
(BT_STATE)BT_ACTIVE
14
(WL_ACTIVE)RX_CLEAR
15
BT_PRIORITY
16
(VCCA)BT_FREQ
17
VDD_1V8
18
GND
CON7802
AXK6F18347YG
1
IN
2
OUT
3
4
5
6
CON7801
SW-IMS
R7801
0R
C7803'
NC
C7802'
NC
4
2
3
1
X7801
MS2V-T1S
R2
5M1
C7801'
100N
C7804'
1U
C7810
100N
C7809
100N
B2
VCCA
C1
A1
C2
A2
C3
A3
C4
A4
B4
GND
B3
EN
A4
Y4
A3
Y3
A2
Y2
A1
Y1
B1
VCCY
U7803
ADG3304_WLCSP
C7806
100N
C7805
1U
C7807
22P
C7808
22P
R3
0R
R7803
10K
1
GN
D1
2
OUT
3
GN
D3
4
IN
U7802'
C7811
100N
1
2
3
4
5
6
7
8
ANT7801
WTE06016
1
DRILLING
H-1
PAD0.5-2.0
1
DRILLING
H-2
PAD0.5-2.0
1
SHIELING
H-5
PAD0.8X3.8
1
SHIELING
H-6
PAD0.8X3.8
1
SHIELING
H-4
PAD0.8X1.4
1
SHIELING
H-7
PAD0.8X1.4
1
SHIELING
H-3
PAD0.8X11.5
1
GN
D
2
NC
3
GPIO8
4
GPIO10
5
NC
6
LDO
_BY
PA
SS
7
VD
D18
8
GN
D
9
EJTAG_SEL[1]
10
NC
11
VD
D33
12
VD
D33
13
GN
D
14
GN
D
15
NC
16
NC
17
VD
D18
18
VD
D18
19
CLK_REQ
20
LF_XTALI
21
LF_XTALO
22
GPIO9
23
NC
24
RF
25
VD
D18_SD
IO
26
VD
D_SD
IO
27
SDIO_DATA3
28
SDIO_DATA0
29
SDIO_DATA2
30
SDIO_DATA1
31
SDIO_CLK
32
SDIO_CMD
33
SD
IO_LD
O_BY
PA
SS
34
RESET
35
RST_OUT_L
36
VD
D18
37
GN
D
38
GN
D
39
TDO
40
CHIP_PWD
41
BT_FREQ
42
BT_PRIORITY
43
BT_ACTIVE
44
RX_CLEAR
45
RXD0
46
TXD0
47
VD
D18
48
NC
49
PA
D_G
ND
50
PA
D_G
ND
51
PA
D_G
ND
52
PA
D_G
ND
U7801'
WM3236AQ_48
R7805
10K
R4
10K
R7806
0R
R7807'
0R
R7808'
0R
R7809'
0R
WLAN_3V3
WLAN_3V3
WLAN_1V8
WLAN_1V8
WL_ACTIVE
[21]
BT_ACTIVE
[21]
BT_3V3
BT_3V3
WLAN_S_SDCLK
[21]
WLAN_S_SDCMD
[21]
WLAN_S_SDDATA0
[21]
WLAN_S_SDDATA3
[21]
WLAN_S_SDDATA1
[21]
WLAN_S_SDCLK
[21]
WLAN_S_SDDATA1
[21]
WLAN_S_SDDATA3
[21]
WLAN_S_SDDATA2
[21]
GPIO10
[21]
WL_ACTIVE
[21]
WLAN_S_SDDATA0
[21]
WLAN_S_SDDATA2
[21]
GPIO8
[21]
WLAN_1V8
BT_ACTIVE
[21]
WLAN_S_SDCMD
[21]
WLAN_1V8
WLAN_3V3
WLAN_3V3
GPIO10
[21]
GPIO8
[21]
RESET
[21,22]
RESET
[21,22]
CHIP_PWD
[3,16,21]
CHIP_PWD
[3,16,21]
WLAN_3V3
BT_MODULE
DATE
SHEET
DWG.
NUMBER
TITLE
MODEL
BT MODULE
GTA02
A1
Shawn Lin
1
2008/07/25
OPENMOKO
Creative Commons Attribution Share-Alike 3.0
LICENSE
1
NC
2
NC
3
FEED
4
GN
D
5
NC
6
NC
7
NC
8
NC
U1
WT
E0616
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
RP1
BTFPC
19
RESET
20
PIO
_5
21
PIO
_4
22
USB_D
P
23
USB_D
N
24
PC
M_IN
25
PC
M_C
LK
26
PC
M_SY
NC
27
PC
M_O
UT
9
AN
T
8
GN
D
7
AU
X_D
AC
6
PIO
_10
5
PIO
_0
4
PIO
_1
3
VD
D_1.8
V
2
VR
EG
_IN
1
VD
D_315
10
GND
11
PIO_9
12
PIO_2
13
PIO_3
14
SPI_MOSI
15
SPI_MISO
16
SPI_CLK
17
SPI_SYNC
18
GND
36
GND
35
XTAL_IN
34
XTAL_OUT
33
AIO_0
32
UART_RX
31
UART_CT
30
UART_TX
29
UART_RST
28
GND
U2
DFB
MC
S320
C1
22P
C2
NC
L1
3N
9H
C3
2U
2
C4
10N
PIO_10
[22]
PIO_9
[22]
PIO_2
[2,3,17,22]
RESET
[21,22]
PIO_5
[2,3,17,22]
USB_DP
[22]
USB_DN
[22]
PCM_IN
[2,6,17,22]
PCM_CLK
[2,6,17,22]
PCM_SYNC
[2,6,17,22]
PCM_OUT
[2,6,17,22]
3V15
3V15
PIO_9
[22]
PIO_2
[2,3,17,22]
RESET
[21,22]
PIO_5
[2,3,17,22]
USB_DP
[22]
USB_DN
[22]
PCM_IN
[2,6,17,22]
PCM_CLK
[2,6,17,22]
PCM_SYNC
[2,6,17,22]
PCM_OUT
[2,6,17,22]
PIO_10
[22]
