OpCode 16-Bit Processor (CapC4)
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Transcript of OpCode 16-Bit Processor (CapC4)
OpCode OpCode 16-Bit Processor16-Bit Processor(CapC4)(CapC4)
Steven Brown Steven Brown Sherry Bo LiuSherry Bo Liu
Sun-Ae KimSun-Ae Kim Robert PawlakRobert Pawlak
IntroductionIntroduction
16 Bit instructions16 Bit instructions 12 Bit addresses (2^12)Bits (==512KB) 12 Bit addresses (2^12)Bits (==512KB)
of memoryof memory Implement in Logic Works 4.0Implement in Logic Works 4.0 Followed Dr.Hasegawa’s design, for the Followed Dr.Hasegawa’s design, for the
most part.most part.
General LayoutGeneral Layout
Parts of the ProcessorParts of the Processor
Control Unit (CU)Control Unit (CU)
CLOCKCLOCK 160,10 / low, up160,10 / low, up 7 buffers with delay of 107 buffers with delay of 10
Run Flip Flop to control the on/off Run Flip Flop to control the on/off status.status.
State Flip Flop to control Fetch/Execute State Flip Flop to control Fetch/Execute status.status.
Automatically switches back to Fetch Automatically switches back to Fetch Cycle after once through Execution Cycle after once through Execution Cycle.Cycle.
The Register FileThe Register File
Compilation of the KB, One, Compilation of the KB, One, PC, G, and IR registers.PC, G, and IR registers.
G<15> hard wired to simplify G<15> hard wired to simplify wiring of JMI (Jump if wiring of JMI (Jump if Negative) instruction.Negative) instruction.
ColoursColours Green: Keyboard; Yellow: Input; Green: Keyboard; Yellow: Input;
Red: Output; Blue: BUSRed: Output; Blue: BUS
Arithmetic Logic Unit Arithmetic Logic Unit (ALU)(ALU)
Combinational circuits are our favourite.Combinational circuits are our favourite.
Made up of 16 Made up of 16 ALU Bit UnitsALU Bit Units (one for each bit) (one for each bit) Each one performs operations for one bitEach one performs operations for one bit
Contains three registers built in: X, Y, and Z.Contains three registers built in: X, Y, and Z. X: memory contents; Y: G Register contents; Z: result registerX: memory contents; Y: G Register contents; Z: result register
Memory Unit Memory Unit (RAM + PROM)(RAM + PROM)
ContainsContains MAR and MBR registers.MAR and MBR registers. 2k RAM and 2k PROM2k RAM and 2k PROM
PROM PROM starts at address 800hexstarts at address 800hex contains interrupt handling (not in contains interrupt handling (not in
ours)ours) RAMRAM
starts at address RAM at 000hexstarts at address RAM at 000hex Contents varies (by design)Contents varies (by design)
( See circuit for visual( See circuit for visual))
Problems EncounteredProblems Encountered
Logic Works cannot be trusted. =)Logic Works cannot be trusted. =)
Timing issues.Timing issues. Integration problems.Integration problems. Testing memory takes a Testing memory takes a longlong time. time.
ConclusionConclusion
Too much time spent on Too much time spent on testing testing and and debugging.debugging.
Logic Works seems inconsistent at times.Logic Works seems inconsistent at times. Wires sometimes… disappear.Wires sometimes… disappear. But.. Good hands-on experience.But.. Good hands-on experience.