OPAM

3. Operational Amplifier 3-1

3. Operational Amplifier


Overview

• Terminology and history

• The Differential Amplifier

• The Ideal Operational Amplifier

• Analysis of Circuits Containing Ideal Operational Amplifiers

- Inverting and Noninverting Amplifier

- Voltage Follower

- Summing Amplifier, Difference Amplifier, Instrumentation-Amplifier Configuration, Low-Pass Filter, Integrator

- Comparator, Schmitt Trigger, Astable Multivribator, Monostable Multivibrator

• Amplifier Terminology Review

• Nonideal Operational Amplifiers

• Frequency Response and Bandwidth of Operational Amplifiers

• Large-Signal Limitations – Slew Rate and Full-Power Bandwidth


• The operational amplifier or op amp is a fundamental building block of analog circuit design.

• The name “operational amplifier” originates from the use of this type of amplifier to perform specific electronic circuit functions oroperations, such as scaling, summation, and integration, in analogcomputers.

• The µA-709, introduced by Fairchild Semiconductors in 1965, was one of the first widely used general-purpose IC operational amplifiers.

• The now classic µA-741 amplifier by Fairchild Semiconductors, which appeared in the late 1960s, is a robust amplifier with excellent characteristics for most general-purpose applications.

Terminology and History


In most applications, VCC ≥ 0 and –VEE ≤ 0, and the voltages are often symmetric — that is, ±5V, ±12V, ±15V, and so on.

These power supply voltages limit the output voltage range:

-VEE ≤ vO ≤ VCC

+

+v

-v

+

+

+ -+

+

vO

VCC

VEE

vID

+

-A

-VEE

+VCC

Basic differential amplifier, including power supplies

Differential Amplifier (1)


+vid

+

vo

+

(a)

+vid

+

vo

+

(b)

A A

(b) Differential amplifier with implied ground connections

(a) Amplifier without power supplies explicitly included

But we must always remember that the power and ground terminals are always present in the implementation of a real circuit!

Differential Amplifier (2) - Simplifications


+

-

+-

i -

i +

R ORID

+v

-v

+

-

vid

A vid

vo

Simplified g-parameter two-port representation of the differential amplifier (g12=0)

A = open-ciruit voltage gain or open-loop gain

vid = (v+ - v- ) = differential input signal voltage

RID = amplifier open-loop input resistance

RO = amplifier open-loop output resistance

Differential Amplifier (3) – Equivalent Circuit


A is the maximum gain available from the device.

The signal voltage developed at the output of the amplifier is in phase with the voltage applied to the + input terminal and180° out of phase with the signal applied to the – input terminal.

The v+ and v- terminals are therefore referred to asnoninverting input and inverting input, respectively.

Operational amplifiers are most often dc-coupled amplifiers, i.e. they amplify dc signals or signals at very low frequencies. ( In ‘MES’ you will learn how such amplifiers are realized with transistors! ☺)

Differential Amplifier (4) – Signal Analysis


In a typical application, the amplifier is driven by a signal source having a Thévenin equivalent voltage vs and resistance Rs and is connected to a load RL.

Analysis by two voltage dividers:

+

-

+-

ROvs

vo

RS

RLA vid

RID+

-

vid

Amplifier with source and load attached

SID

IDsid

LO

Lido

RR

Rvv

RR

RAvv

+=

+=

Lo

L

SID

ID

s

oV RR

RRR

RA

vv

A++

==⇒

Differential Amplifier (5) – Voltage Gain


An ideal differential amplifier would produce an output that depends only on the voltage difference vid between its two input terminals, and this voltage would be independent of source and load resistances.

This behavior can be achieved if the input resistance of the amplifier is infinite (RID -> ∞ ) and the output resistance is zero (RO -> 0 ). Then AV

from the last slide reduces to:

ido Avv = or Avv

Aid

oV ==

Reminder: A was referred to as either the open-circuit voltage gain or open-loop gain of the amplifier and represented the maximum voltage gain available from the device.

Ideal Differential Amplifier (1)


The case of infinite input resistance RID>>RS and zero output resistance RO<<RL corresponds to a fully mismatched condition.

For this mismatched case, the overall amplifier gain is independent of the source and load resistances, and multiple amplifier stages can be cascaded without concern for interaction between stages.

Ideal Differential Amplifier (2)


An ideal operational amplifier is an ideal differential amplifier with infinite voltage gain A:

∞→=

∞→

A

R

R

O

ID

0

Infinite gain leads to the first of two central assumption in analyzingcircuits containing op amps:

A

vv o

id = 0lim =⇒∞→ id

Av

(1) If A is infinite, then the input voltage vid will be forced to zero for any finite output voltage:

0=IDv

Ideal Operational Amplifier (1) - Assumptions


(2) If the input resistance RID is infinite, then the two input currents i+ and i- will be forced to zero:

0=+i 0=−iand

These two results, combined with Kirchhoff‘s voltage (KVL) and current laws (KCL), form the basis for analysis of ALL ideal op amp circuits.

Ideal Operational Amplifier (2) - Analysis


The ideal operational amplifier actually has quite a number of additional implicit properties which are:

• Infinite common-mode rejection

• Infinite power supply rejection

• Infinite output voltage range (not limited by –VEE ≤ vO ≤ VCC)

• Infinite output current capability

• Infinite open-loop bandwidth

• Infinite slew-rate

• Zero output resistance

• Zero input-bias currents and offset currents

• Zero input-offset voltage

Ideal Operational Amplifier (3)


The connecting resistors R1 and R2 are called the feedback network, between the inverting input and the signal source and amplifier output node, respectively.

We are now looking for the closed-loop parameters of the overall amplifier:AV overall voltage gainRIN input resistanceROUT output resistance

R 2

+

R1

vo

is

v s

Inverting amplifier-circuit

The Inverting Amplifier (1)


0221 =−−− oss vRiRiv

R2

+

R1

vid

is

vs +

i2

i-

+vo

io

virtual ground

loop:

node

loop

node: 2iiis += −

The Inverting Amplifier (2)


0221 =−−− oss vRiRiv 22 iiiii ss =⇒+= −

021 =−−− osss vRiRiv

11 R

v

R

vvi sss =−= − 0

00

=⇒=⇒=−=

−

+−+

v

vvvvid

01

2 =−− os vRR

v

s

oV v

vA =

1

2

RR

AV −=⇒

because 0=−i

and because of virtual ground:

(1)

(2) in (1):

from (3) we finally obtain:

(2)

(3)

180° phase shift

The Inverting Amplifier (3) - Voltage Gain


01 =+− idss vRiv

2iis =

0=idv

1

2

R

R

v

vA

s

oV −==⇒

input loop:

output loop:

inverting-amplifier input node:

022 =−+ ido vRiv

Assumption 1:

Dividing equation (1) through (2) yields:

(1)

(2)

The Inverting Amplifier (4) –Alternative Calculation


The input resistance RIN of the overall amplifier is found directly

from equation (2) on the last slide:

1Rv

i ss =

1Riv

Rs

sIN ==⇒

(2)

Virtual ground: the operational amplifier adjusts its output to whatever voltage is necessary to force v- to be zero. But: a virtual ground is NOT connected directly to ground, so there is no direct dc path for current to reach ground. ( virtual!)

The Inverting Amplifier (5) –Input Resistance & Virtual Ground


x

xOUT i

vR =

1. the input source vs is set to zero

2. all other independent voltage or current sources in the circuit are turned off

3. a test source vx (or a signal current source ix) is applied to the output of the amplifier,

4. and the current (or the voltage) is determined for the calculation of the output resistance

The output resistance ROUT is the Thévenin equivalent resistance looking into the output port.

Calculation of the Output Resistance


x

xOUT i

vR =

( )121

1122

RRiv

RiRiv

x

x

+=+= 0because21 == −iii

0because01 == −vi

Thus, vx=0 independent of the value of ix, and finally

0=OUTR

R2

+

R 1

vx

i1v-

i2

i-

+ix

loop: ( Assumption 2)

( Assumption 1)

loop

The Inverting Amplifier (6) - Output Resistance


The operational amplifier can also be used to construct a noninvertingamplifier. The input signal is applied to the positive (noninverting) input terminal, and a portion of the output signal is fed back to the negative input terminal.

+

R2

R1

vo

v s

vid

+

-

v1

i-

i+

The Noninverting Amplifier (1)


+

R2

R1

vo

v s

vid

+

-

v10=−i

21

11 RR

Rvv o +

=

1vvv ids =−

1

2110

R

RRvvvvv sosid

+=⇒=⇒=

1

21R

R

v

vA

s

oV +==⇒ Note that AV ≥ 1, because R1 and R2

are positive numbers for real resistors.

0=+ivoltage divider:

loop:

assumption 1:

The Noninverting Amplifier (2) - Voltage Gain


0because =∞=

=

+

+

iR

i

vR

IN

sIN

.0because0

0

:slidelast on equation loop see

2

1

==⇒=⇒==

=

−

−

iR

iRv

vv

i

vR

OUT

x

id

x

xOUT

To find the output resistance, a test current is applied to the output terminal and the source vs is set to 0.

+

R2

R1

vxvid+

-

v1i-

i+ix

virtual ground

vx

The Noninverting Amplifier (3) –Input and Output Resistance


+

vo

vs

vid+

-+

-

The unity-gain buffer, or voltage follower (as shown above) is a special case of the noninverting amplifier with R1 = ∞ and R2 = 0.

Writing a loop equation:

we find for the voltage gain: 1

or

0

=⇒=

==−

V

so

idoids

A

vv

vvvv

Unity-Gain Buffer, or Voltage Follower (1)


Why is such an amplifier useful?

The ideal unity-gain buffer provides a gain of 1 with infinite input resistance and zero output resistance and therefore provides a tremendous impedance-level transformation while maintaining the level of the signal voltage.

Many transducers represent high-source impedances and cannot supply any significant current to drive a load.

The ideal unity-gain buffer, however, does not require any input current, yet can drive any desired load resistance without loss of signal voltage. Thus, the unity-gain buffer is found in many sensor and dataacqusition applications.

Unity-Gain Buffer, or Voltage Follower (2)


1

2

R

R−

1R

InvertingAmplifier

Non-InvertingAmplifier

Voltage Gain AV

Input Resistance RIN ∞

Output Resistance ROUT

1

21R

R+

00

Summary of Ideal Inverting andNoninverting Amplifier Characteristics


R3

+

R1

vo

R2

v1

v2

i3

i1

i2

i-

33

2

22

1

11 R

vi

R

vi

R

vi o−===

Two input sources v1 and v2 are connected to the inverting input through resistors R1 and R2.

213:node0 iiii +==−

22

31

1

3 vRR

vRR

vo −−=

summingjunction & virtual ground

Any number of inputs can be put to the summing junction.

Application:Simple D/A-converter

The Summing Amplifier


11 RRIN =

212 RRRIN +=

02 =v

The operational amplifier may itself be used in a difference amplifier configuration, which amplifies the difference between two input signals.

R2

+

R1

vo

R1

R2

v1v2

i1

i2

v

v+

i-i+

RIN2

RIN1

i3

io

for

21

2

1

2

11

1RR

Rvv

RRIN

+−

=

else more complicated:

0=OUTR (remember the inverting opamp)

The Difference Amplifier (1) – Input and Output Resistances


221

2 vRR

Rv

+=+

1

11

2122

R

vvi

RivRivvo

−

−−

−=

−=−=

( )211

2

11

22

21

2

1

21

vvR

Rv

vR

Rv

RR

R

R

RRv

o

o

−⎟⎟⎠

⎞⎜⎜⎝

⎛−=

−⎟⎟⎠

⎞⎜⎜⎝

⎛+⎟⎟

⎠

⎞⎜⎜⎝

⎛ +=

( ) 11

2

1

211

1

2 vR

Rv

R

RRvv

R

Rvvo −+=−−= −−−

The output loop

and

give where

Finally, with the voltage divider

.+− = vv

we obtain

If R2=R1, then the circuit is sometimes called differential subtractor.

The Difference Amplifier (2) – Output Voltage


We often need to amplify the difference in two signals but cannot use the difference amplifier presented on the last slide, because its input resistance is too low.

In such a case, we can combine two noninverting amplifiers with a difference amplifier to form the high-performance composite instrumentation amplifier.

As we will see, the instrumentation amplifier has a voltage gainthat is equivalent to the product of the gains of the noninvertingand difference amplifiers.

The Instrumentation-Amplifier Configuration (1)


+

R2

2 R 1

vav1

+v2

R2

v1

v2

+vo

vb

1

2

R3

R4

R4

R3

i

i

i

Difference Amplifier

3

i = 0-

i = 0-

loop



( )bao vvRR

v −⎟⎟⎠

⎞⎜⎜⎝

⎛−=3

4

( ) 212 2 iRRiiRvv ab −−−=

( )212 RRivv ba +=−or

1

21

2Rvv

i−=

( )211

2

3

4 1 vvR

R

R

Rvo −⎟⎟

⎠

⎞⎜⎜⎝

⎛+−=

The input resistance presented to both input sources is infinite because the input current to op- amps is zero, and the output resistance is forced to zero by the difference

From the differential amplifier we use the relation for the output voltage:

and using the loop equation

where we get

from the difference amplifier from the noninverting amplifier



+vs

vo

Z (s)2

Z (s)1

The general case of the inverting configuration with passive feedbackis shown on this slide. Resistors R1 and R2 have been replaced by general impedances Z1(s) and Z2(s), which may now be a function of frequency.

( ) ( )( )

( )( )sZsZ

sVsV

sAs

oV

1

2−==

Generalized inverting-amplifier configuration

General Feedback Network


R2

+

R1

vs

vo

sCZ (s)2

1

( )

( )

CRf

sRR

sA

sCRRR

sA

HH

H

V

V

2

1

2

21

2

12where

1

1

11

==

+−=

+−=

πω

ω

( )

( )11

1

and

2

2

2

2

2

11

+=

+=

=

sCRR

sCR

sCR

sZ

RsZ

Inverting amplifier with frequency-dependent feedback

yield

Single-Pole, Low-Pass Filter (1) – Voltage Gain


Frequency

fH

dBA

log f

20 logR2

R1

-20 dB/dec

Single-Pole, Low-Pass Filter (2) – Bode Plot


+ vo

ic

i -

R

vs

is

C

(a) (b)vo

vs

v(t)

t

This circuit provides an opportunity to explore op amp circuit analysis in the time domain.

Input loop with virtual ground:

and integration yields:

dtdv

CiRv

i oc

ss −== and

sc iii =⇒=− 0

∫ ∫−= τdvRC

dv so

1 ( ) ( ) ( )01

0 o

t

so vdvRC

tv +−= ∫ ττ

virtual ground

with initial capacitor value

( ) ( )00 co Vv =

Output voltage for a step-function input with VC(0)=0

Integrator


Amplifier Terminology Review (1)

Open-loop parameters describe the operational amplifier as a two-port itself with no external elements connected.

Closed-loop parameters describe the overall amplifier as well as composite amplifiers.

Summary:

ROUTRINAVClosed-loop amplifier

RORIDAOpen-loop amplifier

Output Resistance

Input Resistance

Voltage Gain


Closed-Loop Feedback Amplifier

A , R , R V IN OUT

R2

+

R1

+v2

A, R , RID O+

v1

(a)

RINv

id

ROUT

A vV id

+

-

Closed-Loop Feedback Amplifier

+

v1

+v2

(b)

(a) Inverting amplifier using an operational amplifier(b) Two-port representation of the overall amplifier

Amplifier Terminology Review (2)


The Comparator and Schmitt Trigger (I)

+ vO

vS

VREF

V CC

-VEE

It is often useful to compare a voltage to a known reference level. This can be done electronically using the comparator circuit shown above.


The Comparator and Schmitt Trigger (II)

vO

VREF

vS

-VEE

V CCFor input signals exceeding the reference voltage VREF, the output saturates at VCC; for input signals less than VREF, the output saturates a -VEE, as indicated in the voltage transfer characteristic shown on the right.


The Comparator and Schmitt Trigger (II)

t

t

VREF

VCC

-VEE

Noisy Input Signal (Expanded Scale)

vS

vO

Comparator Output

However, a problem occurs when high-speed compa-rators are used with noisy signals.

As the input signal crosses the reference level, multiple transitions may occur due to the noise present on the input.


The Comparator and Schmitt Trigger (III)

+

R1 R2

vO

vS

vREF

VCC

-VEE

In digital systems, we often want to detect this threshold crossing cleanly by generating only a single transition, and the Schmitt-trigger circuit helps solve this problem.

The Schmitt trigger uses a comparator whose reference voltage is derived from a voltage divider across the output (positive feedback). 21

1

RRR+

=β

(β is defined as the fraction of the output voltage that is fed back from the output to the input and called the feedback factor)


The Comparator and Schmitt Trigger (IV)

vO

0vS

VCC

-VEE

βVCC

The reference voltage changes when the output switches state:

⎩⎨⎧

<−>

=0for

0for

oEE

oCCREF vV

vVV

ββ

Consider the case for an input voltage increasing from below VREF, as in the figure on the right hand.

The output is at VCC and VREF=βVCC. As the input voltage crosses through VREF, the output switches state to -VEE.


The Comparator and Schmitt Trigger (V)

vO

0vS

VCC

-VEE

−βVEE

Now consider the case for an input voltage decreasing from a high level, as in the figure on the right hand on this slide.

The output is at -VEE and VREF=-βVEE. As the input voltage crosses through VREF, the output switches state to VCC.

The Schmitt trigger with positive feedback is an example of an circuit with two stable states: a bistable circuit,or bistable multivibrator.


The Comparator and Schmitt Trigger (VI)

vO

0vS

VCC

-VEE

−βVEE βVCC

Hysteresis

The voltage transfer characteristics from the last two slides are combined to yield the overall characteristic for the Schmitt trigger given here.

The Schmitt trigger is said to exhibit hysteresis in its VTC, and will not respond to input noise that has a magnitude VN smaller than the difference between the two threshold voltages:

( )[ ] ( )EECCEECCN VVVVV +=−−< ββ


Bistable Circuits

Ball balanced on top of fence is analogous to a Schmitt trigger with an output voltage of zero


The Astable Multivibrator (I)

+

R1

R2

vO

v+

R

v-+

-

C

V

-V

CC

EE

Another type of multivibratorcircuit employs a combination of positive and negative feedback and is designed to oscillate and generate a rectangular output waveform.

The output of this circuit has no stable state and is referred to as an astable circuit, or astable multivibrator.


The Astable Multivibrator (II)

βVCC

−βVEE

v- To VCC

To -VEE

vO

t

T1

T2

t'

t

VCC

-VEE

The output voltage switches periodically (oscillates) between the two output VCC and -VEE.

Let us assume that the output has just switched to vo=VCC at t=0. The voltage at the inverting-input terminal of the op amp charges exponentially toward a final value of VCC with a time constant τ =RC. The voltage on the capacitor at the time of the output transition is vC=-βVEE. Thus:

RCt

EECCCCC eVVVtv−

+−= )()( β


The Astable Multivibrator (III)

The comparator changes state again at time T1 when vc(t) just reaches βVCC:

RCT

EECCCCCC eVVVV1

)(−

+−= ββSolving for T1 yields:

β

β

−

⎟⎠

⎞⎜⎝

⎛+=

1

1

ln1CC

EE

VV

RCT

The same procedure during time interval T2 yields:

RCt

CCEEEEC eVVVtv'

)()'(−

++−= β


The Astable Multivibrator (IV)

β

β

−

⎟⎠

⎞⎜⎝

⎛+=

1

1

ln2EE

CC

VV

RCT

and

And finally for the common case of symmetrical power supply voltages VCC=VEE:

ββ

−+=

+=

11

ln2

21

RCT

TTT


The Astable Multivibrator (V):Application as an inexpensive function generator

+

R1

R2

C3

R3

+

C4

R4

R5

+

C6

R6

Astable Multivibrator

Integrator Low Pass Filter

Square Wave Output

Sine Wave Output

Triangle Wave Output


The Monostable Multivibrator or One Shot (I)

+

D2

R2

vO

vt

C

R

D

R1

2

3

1V

-VEE

CC

A third type of multivibrator operates with one stable state and is used to generate a single pulse of known duration following application of a trigger signal.

The circuit rests quiescently in its stable state, but can be triggered to generate a single transient pulse of fixed duration T.

This monostable circuit is variously called a monostable multivibrator, a single shot, or a one shot.


The Monostable Multivibrator or One Shot (II)

Diode D1 has been added to the astable multivibratorto couple the triggering signal vT into the circuit, and clamping diode D2 has been added to limit the negative voltage excursion on capacitor C.

+

D2

R2

vO

vt

C

R

D

R1

2

3

1V

-VEE

CC


The Monostable Multivibrator or One Shot (III)

The circuit rests in its quiescent state with vo=-VEE. If the trigger signal voltage vT is less than the voltage at node 2,

diode D1is cut off. Capacitor C discharges through R until diode D2 turns on, clamping the capacitor voltage at one diode-drop VD below ground potential. In this condition, the differential-input voltage vID to the comparator is given by:

As long as the value of the voltage divider is chosen so that

then the output of the circuit will have one stable state.

EEEET VVRR

Rv β−=

+−<

21

1

( ) DEEDEEID VVVVv +−=−−−= ββ

21

1whereor0RR

RVVv DEEID +

=>< ββ


The Monostable Multivibratoror One Shot (IV)

v-

t

VCC

-VEE

vO

T

βVCC

−VD

t

To VCC

To -VEET T

r

vt

t

−βVEE

−VD

The monostable multivibrator can be triggered by applying a positive pulse to the trigger input.

As the trigger pulse level exceeds a voltage of -βVEE, diode D1 turns on and subsequently pulls the voltage at node 2 above that of node 3. At this point, the comparator output changes state, and the voltage at the noninverting-input terminal rises abruptly to a voltage equal to +βVCC. Diode D1 cuts off, isolating the comparator input from any further changes on the trigger input.


The Monostable Multivibrator or One Shot (V)

The voltage on the capacitor now begins to charge from its initial voltage -VD toward a final voltage of VCC and can be expressed mathematically as

( ) RCt

DCCCCc eVVVtv−

+−=)(where the time origin (t=0) coincides with the start of the trigger pulse. However, the comparator changes state when the capacitor voltage reaches +βVCC. Thus, the pulse width T is given by

( ) RCT

DCCCCCC eVVVV−

+−=β

β−

⎟⎠

⎞⎜⎝

⎛+=

1

1

ln CC

D

VV

RCT

or


Ideal Operational Amplifier (Summary)

The ideal operational amplifier actually has quite a number of additional implicit properties:

• Infinite common-mode rejection

• Infinite power supply rejection

• Infinite output voltage range (not limited by -VEE ≤ vO ≤ VCC)

• Infinite output current capability

• Infinite open-loop bandwidth

• Infinite slew-rate

• Zero output resistance

• Zero input-bias currents and offset currents

• Zero input-offset voltage


Nonideal Operational Amplifiers

• We explore the effects of the removal of the various explicit and implicit assumptions mentioned at the beginning.

• Using the two-port model for the operational amplifier, we explore the effects of only one nonideal parameter at a time.

• Method of approach:

Express the nonideal parameter

Analyze the circuit by taking this nonideality into consideration


• Finite Open-Loop Gain A• Gain Error GE• Nonzero Output Resistance ROUT

• Finite Input Resistance RIN• Finite Common-Mode Rejection Ratio CMRR• Finite Power Supply Rejection Ratio PSRR• Common-Mode Input Resistance RIC• DC Error Sources

– Nonzero input-offset voltage VOS

– Nonzero input-bias currents IB1 , IB2

– Nonzero input-offset currents IOS

• Output Voltage and Current Limits vO , iO• Finite open-loop bandwidth B• Large-signal response limitations:

– Finite slew-rate SR– Full-power bandwidth fM

Nonidealities and Limitations of an Operational Amplifier


Finite Open-Loop Gain A (1)

• The finite open-loop gain contributes to deviations of the closed-loop gain AV, input resistance RIN , and output resistance ROUT from those presented for the ideal op amp.

• A -> ∞ means vid = v+ - v- ≠ 0

• Example:noninverting amplifierwith finite open-loopgain A

• We will define thefeedback factor β which representsthe fraction of the output voltage that is fed backfrom the output to the input.

+

R2

R1

vo

i-

vs

vid

is

Avid

v1

Feedback Network

+

- +-


Statement: ( )1vvAAvv sido −==

βA

A

v

vA

s

oV +

==1

1for 11

1

2, >>+==→ β

βA

R

RA idealV

oo vvRR

Rv β=

+=

21

11 because i- = 0

Combining (2) and (1) and solving for vo yields the classic feedback amplifier voltage-gain formula

(2)

(1)

01

1 ≠+

=−=−=β

βA

vvvvvv s

ossid

where T=Aβ is called the loop gain or loop transmission.

Finite Open-Loop Gain A (2)


Gain Error (GE)

• gain error:

• fractional gain error:

• Example: noninverting amplifier

VidealV AA −== , gain) (actual - gain) (idealGE

idealV

VidealV

A

AA

,

,

gain) (ideal

GEFGE

−==

β1

, =idealVAβA

AAV +

=1

and

( )ββββ AA

A

+=

+−=

1

1

1

1GE

ββ AA

1

1

1FGE ≈

+= for 1>>βA

This gain error does not include the effect of resistor tolerances, which are an additional source of gain error.


Nonzero Output Resistance ROUT (1)

x

xOUT i

vR =

2iii ox +=

O

idxo R

Avvi

−=

121

2 iRR

vi x =

+= 0=−i

xx vvRR

Rv β=

+=

21

11

We assume that the op amp has nonzero output resistance RO andfinite open-loop gain A.

Example: noninverting and inverting op amp, which are identical for the calculation of the output resistance

+

-+-

R O

A vid

i o

R1

R2

vx

i xv

id

-

+i2

i1i-

v1

where

,

and because

Voltage divider:


Nonzero Output Resistance ROUT (2)

21

111

RRR

A

v

i

R Ox

x

OUT +++== β

βA

RO

+1

βA

RR O

OUT +≈

1

( )21 RR +

Thus, we obtain the output conductance

( )211RR

A

RR O

OUT ++

=β

For much less than can simplify this equation:

Note that RO would be infinite if A were assumed to be infinite. This

is the reason why we must assume A to be finite.


Finite Input Resistance RIN (1)

ID

xx R

vvi 1−= +

-

RID

vo

A vid

vx

vid

-

+

R2

R1

ix

+-

i -

i 1

i 2v

1

xvA

Av

ββ

+=

11

x

xIN i

vR =

( ) 1212111 RiRiiRiv ≈+== −

1. Example: noninverting amplifier

( ) ( )121

11 vvAAvv

RR

Rv xido −==

+≈ ββ

Finite input resistance means i-= 0, but still i-<<i2, and therefore i1 ≈ i2.

and

(1)

eq. (1) ( ) ββ ARARi

vR IDID

x

xIN ≈+== 1

,


Finite Input Resistance RIN (2)

⎟⎠⎞

⎜⎝⎛

++=+= −

A

RRR

i

vRR ID

xIN 1

211

xx

x

x

xIN i

vR

i

vRi

i

vR −− +=+== 1

1

2

22

R

Avv

R

vi

R

vv

R

viii

IDx

o

IDx

−−−

−−−

++=

−+=+=

2. Example: inverting amplifier

21

11

11

R

A

Rv

iG

ID

++==

input current and input conductance:

and

IDRA

RR largefor

12

1 ++≈

A vid

ix

vxvid

-

+

R1

RID

R2

+-

v-

+

- vo

Inverting amplifier input resistance calculation

RIN

i2


Summary of Nonideal Inverting and Noninverting Amplifiers

Output Resistance

Input Resistance

Voltage Gain

NoninvertingAmplifier

InvertingAmplifier

1

211

1 R

R

A

A +=≈+ ββ

21

1

RR

R

+=β

12

1 1R

A

RRR ID ≈

++INR ( ) ββ ARAR IDID ≈+1

ββ A

R

A

R OO ≈+1

1

2

1

2

1 R

R

A

A

R

R −≈⎟⎟⎠

⎞⎜⎜⎝

⎛+

−β

βVA

OUTR ββ A

R

A

R OO ≈+1


Finite Common-Mode Rejection Ratio (CMRR) (1)

221 vv

vic

+=

( ) ( ) ( )iccmidcmo vAvAvv

AvvAv +=⎟⎠⎞

⎜⎝⎛ ++−=

221

21

A real amplifier also responds to the signal that is common to both inputs, called the common-mode input voltage vic , defined as

which is amplified by the common-mode gain Acm to give an overall output voltage

21id

ic

vvv +=

where A = Adm is the differential-mode gain and vid=(v1 – v2) the differential-mode input voltage.

Solving vid and vic with respect to v1 and v2 , we obtain: 22

idic

vvv −=and


Finite Common-Mode Rejection Ratio (CMRR) (2)

cmA

A=CMRR⎟⎠⎞

⎜⎝⎛ +=⎟

⎠⎞

⎜⎝⎛ +=

CMRRic

idiccm

ido

vvA

A

vAvAv

+

vov1

v2

+

-

A, A cm

An ideal amplifier would amplify vid and totally reject vic (Acm= 0), thus having infinite CMRR. But for an actual amplifier Acm is nonzero:

with

dB log20CMRR dBcmA

A=or Generally, the sign of Acm in unknown ahead of time, and CMRR specifications representa lower bound.

+

vic

v o

+

-

+-

+-

+-

vid

2

vid2


Power Supply Rejection Ratio (PSRR)

When power supply voltages change due to long-term drift of the existence of noise on the supplies, the equivalent input-offset voltage VOS changes slightly.

PSRR is a measure of the ability of the amplifier to reject these power supply variations.

PSRR values are similar to those of CMRR, with typical values in the range of 60 to 120 dB.


Common-Mode Input Resistance RIC (1)

The common-mode input resistance RIC of the op amp is the equivalent resistance presented to the common-mode source and often much greater than the differential-mode input resistance RIC.

vic

vo

+

-

+-

+-

+-

vid

2

vid2

RID

+

-

2 RIC

2 RIC

Op amp with common-mode input resistances added


Common-Mode Input Resistance RIC (2)

Input resistance for a common-mode signal:

Input resistance for a differential-mode signal:

ICIN RR =

ICIDIN RRR 4=

IDIN RR ≈

vid+- RID

2 RIC

2 RIC

Amplifier input for a purely differential-mode input

vic+-

RID

2 RIC

2 RIC

vic+-

2 RIC

2 RIC

Amplifier with only a common-mode input signal present

And for RIC >> RID :


DC Error Sources - Input-Offset Voltage VOS (1)

⎟⎠⎞

⎜⎝⎛ ++= OS

icidO V

vvAv

CMRR A

VV O

OS =

Another class of error sources results from the need to bias the internal circuits that form the operational amplifier and from mismatches between pairs of solid-state devices in these circuits.

When the inputs of the op amp are both zero,the output is not truly zero but is resting atsome dc voltage level VO :

The output voltage has to be modified:

+

v = V O OA

Amplifier with zero input voltage but non-zerooutput voltage

with the equivalent dc input-offset voltage

desired errors that corrupt the signal


Input-Offset Voltage VOS (2)

OSO VR

RV ⎟⎟

⎠

⎞⎜⎜⎝

⎛+=

1

21

OSO VR

RV

1

21+≤

Example: noninverting amplifier

VOS is amplified just as any other input signal source, and the dc output voltage of the op amp is

+v

O

Ideal amplifier with zero offset voltage

VOS

R 2

R1

Offset voltage can be modeled by a voltage source VOS in series with the amplifier input

Because we do not know the sign of VOS, and the VOS specifications represent an upper bound, we have


Input-Bias Currents IB1,2 andInput-Offset Current IOS (1)

For the transistors that form the op amp to operate, a small but nonzero dc input-bias current must be supplied to each input terminal of the amplifier. Thesecurrents produce an undesired voltage at the amplifier output.

These currents represent base currents in an amplifier built with bipolar transistors or gate currents in one designed with MOSFETs or JFETs.

The values of IB1 and IB2 are similar but not identical, and the actual direction depends on the details of the internal amplifier circuit.

We define the offset current:

21 BBOS III −=

vO

+

-

+

-

IB1

IB2

Operational amplifier with input bias currents modeled by current sources IB1 and IB2

The sign of IOS is also not known.


Input-Bias Currents IB1,2 andInput-Offset Current IOS (2)

MAXOS II ≤The offset-current specification is therefore normally expressed as an upper bound on the magnitude of IOS :

Example: inverting op amp analysis by superposition

2,1, OOO VVV +=

⎟⎟⎠

⎞⎜⎜⎝

⎛+−=

1

211, 1

R

RRIV BBO 222, RIV BO =

21

21

RR

RRRB +

=+

VO

IB1

IB2

R1

RB

R2

Inverting amplifier with bias current compensation

resistor RB

Output due to IB1 : Output due to IB2 :

Total voltage:

And if we set:

The expression for the output-voltage error VO reduces to:

( ) 2212 RIRIIV OSBBO −=−=


Output Voltage vO and Current Limits iO (1)

( )21 RRRR LEQ +=

CCOEE VvV ≤≤−

Commercial op amps contain circuits that restrict the magnitude of the current in the output terminal in order to limit power dissipation in the amplifier and to protect the amplifier from accidental short circuits.

The output-current specification affects the size of load resistor and places lower limits on the value of the feedback resistors R1 and R2 .

As we remember, an actual op amp has a limited range of output voltage:

EQ

OO

L

OFLO R

v

RR

v

R

viii =

++=+=

21

which represents the output current constraint and helps us choose the size of the feedback resistors.

+vO

R 2

R 1

i = 0

iL

R L

i F

vS

i O

Output current limit in the non-inverting amplifier

Total output current:

where


Frequency Response and Bandwidth of Operational Amplifiers (1)

( )B

T

B

Bo

ss

AsA

ωω

ωω

+=

+=

Most general-purpose op amps are low-pass amplifiers designed to have high gain at dc and a single-pole frequency response:

( ) ( )dB 0 1=ωjA

• Ao is called open-loop gain at dc

• ωB is called open-loop bandwidth of the op amp

• ωT is called unity-gain frequency at which

dB

0

20

40

60

Radian Frequency (Log Scale)

107

106

105

104

103

20 log |A | o

B

t

A

80

ω

- 3 dB

- 20 dB/decade

ω

ω

Voltage gain vs. frequency for an operational amplifier


Frequency Response and Bandwidth of Operational Amplifiers (2)

( )ωω

ωωω TBoA

jA =≈

( ) ( ) TT ffjAjA ≈⇔≈ ωωωω

Tωω =

At high frequencies, ω >> ωB, the transfer function can be approximated by

This equation states that, for any frequency ω>>ωB, the product of the magnitude of amplifier gain and frequency has a constant value equal to the

unity-gain frequency ωT. For this reason, the parameter ωT or fT is often referred to as gain-bandwidth product (GBW) of the amplifier. This important result is a property of single-pole amplifiers that can be represented by transfer functions given on the last slide.

We see that the magnitude of the gain is indeed unity at ω=ωT :

( ) 1=≈ω

ωjωA T

Rewriting this result:

for


Ta b le 1 2 .5 - In ver t in g & No n - In ver t in g Am p lifier F req u en cy R es p on s e

C o m p a r is o n

β =

R 1

R 1 + R 2

No n - In ver t in g

Am p lifier

In ver t in g Am p lifier

D c G a in A V (0 ) = 1 +

R 2

R 1 A V (0 ) = −

R 2

R 1

F eed ba ck F a ct o r

β =

1

AV (0 ) β =

1

1 + A V (0 )

B a n d wid t h f B = β f t f B = β f t

In p u t R es is t a n ce R IC R ID 1 + Aβ( ) R 1

O u t p u t R es is t a n ce

R O

1 + Aβ

R O

1 + Aβ


Large-Signal Limitations – Slew Rate and Full-Power Bandwidth (1)

Up to this point, we have assumed that the internal circuits that form the op amp can respond instantaneously to changes in the input signal.

However, the internal amplifier nodes all have an equivalent capacitance to ground, and only a finite amount of current is available to charge these capacitances.

Thus, there will be some limit to the rate of change on the various nodes. This limit is described by the slew-rate (SR) specification of the op amp. Typical values are:

For a given frequency, the slew rate limits the maximum amplitude of a signal that can be amplified without distortion.

sV/10SRsV/1.0 µµ ≤≤


Large-Signal Limitations – Slew Rate and Full-Power Bandwidth (2)

tVv Mo ωsin=

SR≤ωMV0s 200us 400us 600us

TimeV(1) V(3)

0V

-15V

15V

Limited Output

Slew Rate

Sine Wave Input

FSM V

SRf

π2≤

ωω MMo VtV

dt

dv ==max

max

cos

An example of slew-rate limited output signal Sinusoidal output signal:

Maximum rate of change of this signal occurs at the zero crossings:

For no signal distortion, this maximum rate of change must be less than the slew rate:

ωSR≤MV

or

The full-power bandwidth fM is the highest frequency at which a full-scale signal amplitude VFS can be developed:


Summary

• Terminology and history

• The Differential Amplifier

• The Ideal Operational Amplifier

• Analysis of Circuits Containing Ideal Operational Amplifiers

- Inverting and Noninverting Amplifier

- Voltage Follower

- Summing Amplifier, Difference Amplifier, Instrumentation-Amplifier Configuration, Low-Pass Filter, Integrator

- Comparator, Schmitt Trigger, Astable Multivribator, Monostable Multivibrator

• Amplifier Terminology Review

• Nonideal Operational Amplifiers

• Frequency Response and Bandwidth of Operational Amplifiers

• Large-Signal Limitations – Slew Rate and Full-Power Bandwidth

OPAM

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