On-Chip Antennas for Multi- Chip RF Data Transmission€¦ · On-Chip Antennas for Multi-Chip RF...

THE UNIVERSITY OF

ARIZONA TUCSON ARIZONA

On-Chip Antennas for Multi-

Chip RF Data Transmission

Dr. Kathleen Melde

Professor, ECE

University of Arizona

Department of Electrical and Computer Engineering

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Agenda

Introduction

System Evaluation of Existing Solutions

Single Antenna Wireless Interconnect

Two-Element Array Wireless Interconnect

Conclusion and Future Concepts

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High Performance Computing

Computing Performance (Data Rate) ∝ Clock Speed (Clock Frequency)

However,

Instead of increasing clock speed,

Data Clusters Weather/Climate Modeling

𝑃𝑜𝑤𝑒𝑟 ∝ 𝑓𝐶𝑙𝑜𝑐𝑘 × 𝐶𝐿𝑜𝑎𝑑 × 𝑉𝑆𝑢𝑝𝑝𝑙𝑦2 Switching Power

The complicated computation problem is

divided into several small tasks

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Multi-Core Computation Enables

Larger and Faster EM Simulation

HFSS on Nanostructured Structures

Structure on 1 core

w/ 24 GB

Structure on 12 core

w/ 256GB

HFSS Simulation of Surface

Roughness On 12 Cores

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Challenges in Interconnects

IBM Power and Z-Enterprise Systems (http://www.ibm.com)

Data Clusters Multi-Core Multi-Chip in Module Multi-Core in Single Chip

Increased parallel processer chips inside the module (Chip Size Reduction)

Physical wire density and I/O numbers will be the package design concerns

High speed data I/O numbers; Reduction on chip sizes; Unchanged

package wired interconnect

From International Technology Roadmap of Semiconductor (ITRS http://www.itrs.net)

20 mm

20 mm

ISSCC 2013 (32nm Process)

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2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 202020

40

60

80

100

120

140

160

180

200

min

imum

glo

ba

l in

terc

onn

ect

pitch (

nm

)

2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 202010

12

14

16

18

20

22

24

26

28

30

32

time (year)

gate

le

ng

th (

nm

)

2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 20200

20

40

60

80

100

120

140

160

180

200

time (year)

I/O

pitch

siz

e (

um

)

Predicted Semiconductor Size [1]

Predicted Size for Chip-Package

Interconnect

32 nm to 22 nm to 14 nm to 10 nm

150 um to 110 um (Pitch Size)

Pin Density Increases Incrementally

1.5

mm

1.27

mm

1.0

mm

THE UNIVERSITY OF


Antenna Point to Point

Interconnects Can Simplify Routing

(a) Dipole on a chip

10% to 15% Efficiency

(b) Folded monopole with ground shielding

Poor Impedance Matching

(c) PIFA

Mainly Radiate Upwards

Physical wires in neighboring cores

Wireless transmission for core aggregations with 60 GHz antennas in

routers

Router

CORE

Router Router

Router

CORE

CORE

CORE

CORE

CORE

CORECORE

CORE

CORE

CORE

CORE

Broad Radiation Pattern

Antenna for Data Transmission

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Recent Solutions (Antenna on Chip) 60 GHz Antenna Design

𝑡𝑎𝑛𝛿𝑇 = 𝜔휀′′ + 𝜎𝑑

𝜔휀′≈

𝜎𝑑𝜔휀′

On-Chip Dipole [1] On-Chip PIFA [2] [3]

On-Chip Yagi-Uda [4] with Directors

Antenna designed at the

top of metal layer

Radiation focused on the

Upward/Downward

Sufficient Bandwidth

Low Radiation Efficiency

Horizontal Radiation


Low Radiation

Efficiency

Dielectric Loss inside Si

𝜎𝑑 = 10 𝑆/𝑚 Conductivity

At 60 GHz, 𝑡𝑎𝑛𝛿𝑇 = 0.2564

In Lossy FR4, 𝑡𝑎𝑛𝛿𝑇 = 0.04

[1] F. Gutierrez Jr. 2009, [2] Y. P. Zhang 2005, [3] [4] H.-R. Chuang 2008

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Recent Solutions (Antenna in Package)

Cavity for Silicon Chip

YagiDirectors

Aperture-Feed AiP Design [5] Bondwire Antenna [6]

LTCC Yagi-Uda with Directors [7]

Radiation focused

Upward/Downward


Horizontal

Radiation

3 GHz

Bandwidth

(Narrow)

Horizontal

Radiation

2 GHz

Bandwidth

(Narrow)

[5] D. Liu 2011, [6] K. K. O 2009, [7] Y. P. Zhang 2008

60 GHz Antenna Design

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Performance Comparison

Referen

ce

Antenna

Type

Frequency

Maximum

Radiation

Gain

-10 dB S11

Bandwidth

Comments

[1]

On-Chip

Dipole

60 GHz -8.5 dBi 12 GHz

Low gain; Low

Efficiency

[2]

On-Chip

PIFA

60 GHz -19 dBi 12 GHz

Low gain; Low

Efficiency

[3]

On-Chip

Meander

PIFA

60 GHz -15.7 dBi 10 GHz

Low gain; Low

Efficiency

[4]

On-Chip

Yagi with

directors

60 GHz -10.6 dBi 10 GHz

Low gain; Low

Efficiency

[5]

Aperture-

Coupled

Patch


Maximum gain at

vertical direction (8

dBi)

[6]

Bondwire

Antenna

60 GHz -3 dBi 3 GHz Narrow bandwidth

[7]

Yagi

Antenna

with

directors

60 GHz +6 dBi 2 GHz

Large packaged area

and complicated

cavity design

THE UNIVERSITY OF


How to quantify the

wireless link performance ?

The power needed in TX/RX to recover path loss in the wireless interconnect

Friis equation d is the transmission distance; G denotes the

antenna gains in TX/RX (Same in TX/RX site)

PRE should be reduced for the high efficient wireless interconnect

Bandwidth should also be considered TX RX

Wireless

Interconnect

𝐵𝑢𝑑𝑔𝑒𝑡 =

−10𝑙𝑜𝑔 1 − 𝑆112 2 𝜆

4𝜋𝑑

2

𝐺2

𝐵𝑊 𝑑𝐵 𝐻𝑧

Budget denotes the power loss required to be

recovered by the circuits in TX/RX at the expense

of operating bandwidth

1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 31

2

3

4

5

6

7

8x 10

-9

transmission distance (cm)

bud

ge

t (d

B/H

z)

on-chip dipole [15]

on-chip PIFA [16]

on-chip meander PIFA [17]

on-chip Yagi with directors [18]

1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3

2

4

6

8

10

12

14

16x 10

-9


bud

ge

t (d

B/H

z)

in-package aperture-coupled patch [19]

in-package bondwire [20]

in-package Yagi with directors [21]

𝑃𝑅𝐸 = −10𝑙𝑜𝑔 1 − 𝑆112 2

𝜆

4𝜋𝑑

2

𝐺2

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Chip to Chip Wireless Interconnect

Design Goals

TX RXWireless

Interconnect To achieve design goal:

1. Horizontal Transmission Gain

2. High Radiation Efficiency

3. Wide Operating Bandwidth


−10𝑙𝑜𝑔 1 − 𝑆112 2 𝜆

4𝜋𝑑

2

𝐺2


1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3

2

4

6

8

10

12

14

16x 10

-9


bud

ge

t (d

B/H

z)



in-package Yagi with directors [21]

Design Goal Area

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Single Antenna Design Stack-Up

Low Loss Silicon Substrate

Ground Shield

Antenna

Dielectric

AMC Layer


Ground Shield

Antenna

Dielectric

Low Loss Silicon Substrate Low Loss Silicon Substrate

Ground Shield

Vertical FeedElectric conductor

Actual

source

Image

θr=180°

θr=0°

Direct

Direct

Reflected

Reflected

I1

I2=-I

1

I2=I

1

I1

Magnetic conductor

Actual

source

Image

Artificial Magnetic Conductor (AMC):

(a) With Vias (EBG Structure) (b) Without Vias

Maintain AMC behavior

Maintain Surface Wave

Additional Vias

Eliminate Surface Wave

𝜎𝑑 = 10 𝑆/𝑚 Conductivity 𝜎𝑑 = 10 𝑆/𝑚 Conductivity

𝜎𝑑 = 10 𝑆/𝑚 Conductivity 𝜎𝑑 = 10 𝑆/𝑚 Conductivity

130 um

260 um

700 um

RO3003

C4 Bumps

D. Sievenpiper. 1999 F. Yang. 2003 𝑍𝑖𝑛 = 𝑍11 + 𝑍12𝑒𝑗𝜃𝑟

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Single Antenna Design

Dielectric

Antenna

Vertical Feed

h2

h1

Ground-Shielded Conductor

AMC Layer


Bump

Silicon Circuitry

YX

Zw

g

ant_w

ant_l X

Y Z

AMC Layer

Antenna


Overview of Designed 60 GHz RF Interconnect

Cross-Section View Top View

w g ant_w ant_l

580 um 120 um 900 um 1100 um

130 um

260 um

700 um

Rogers 3003 Substrate (εr = 3.1;

tanδ = 0.002)

Antenna Layer Metal + Vertical

Conductor Feeding = Folded-

Monopole Design Designed Dimensions

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Perfect E BoundaryPerfect E

Boundary

Perfect H Boundary

Perfect H Boundary

One Unit AMC Patch

Ground Plane

Plane Wave Excitation

How AMC Layer is Determined

Unit cell Determine the size of periodic patch in AMC layer

Waveguide simulation is utilized to model the plane

wave propagation towards the designed AMC

Reflection phase is determined by phase of S11

50 52 54 56 58 60 62 64 66 68 70-80

-60

-40

-20

0

20

40

60

80

Frequency (GHz)

Refl

ecti

on

Ph

ase (

Deg

ree)

w=0.53 mm

w=0.58 mm

w=0.63 mm

θr=0°is generated at 60 GHz

indicating AMC behavior

RO3003

are used

εr =3.1

tanδ = 0.002

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𝑘𝑧2 + 𝑘𝑥

2 = 𝑘𝑑2 = 𝜔2휀𝑑𝜇𝑑 = 𝑘0

2휀𝑑𝜇𝑑휀0𝜇0

Air

Medium

kx

kzx

y

z

k0 and kd are the intrinsic

phase constants inside the

air and the medium.

Dispersion Relation

Designed periodically-patched AMC maintains wave propagation inside

the medium.

Fundamental TM0 surface mode exists inside the medium, according to

the eigenmode calculation and the dispersion relation.

Propagation with AMC Layer

0 500 1000 1500 2000 2500 30000

20

40

60

80

100

Propagation Constant (rad/m)

Fre

qu

en

cy (

GH

z)

TM0 mode Propagation with AMC

TM0 mode Propagation without AMC

Light Propagation

Wave Propagation in Medium

k0 < kx < kd around 60 GHz

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Single Antenna Design (Antenna Design)

ant_want_l

Feeding𝑎𝑛𝑡_𝑙 +

𝑎𝑛𝑡_𝑤

2+ ℎ1 + ℎ2 =

𝜆𝑑2

50 52 54 56 58 60 62 64 66 68 70-35

-15

5

25

45

65

85

105

125

Frequency (GHz)

Imp

ed

an

ce (

Oh

m)

1mm Length

1.1mm Length

1.2mm Length

1mm Length

1.1mm Length

1.2mm Length

Imaginary Part

Real Part

Resonance Region

Tail Region

Antenna Layer Design

Determine the resonant point

Note:

Match at the tail region rather

than the resonance region

The tail region has the flat-

impedance response which is

beneficial to the antenna’s

operating bandwidth

Antenna Impedances with AMC with different antenna lengths

The length of vertical feeding (total

substrate height)

Top antenna

layer

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Single Antenna Design (Simulation)

50 52 54 56 58 60 62 64 66 68 70-100

-50

0

50

100

150

200

Frequency (GHz)

Imp

ed

an

ce (

Oh

m)

Resistance (AMC)

Reactance (AMC)

Resistance (No AMC)

Reactance (No AMC)

50 52 54 56 58 60 62 64 66 68 70-30

-25

-20

-15

-10

-5

0

Frequency (GHz)

Refl

ecti

on

Co

eff

icie

nt

(dB

)

Without AMC Layer

With AMC Layer

Over 10 GHz Bandwidth For Antenna with AMC layer

Y

X

ϕ

With AMC Without AMC

Horizontal

Radiation Gain

0 dBi for x

direction

- 3 dBi for y

directions

• The field is blocked by solid conductor

• 94 % Radiation Efficiency

Si (σ = 10 S/m)

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Antenna Layer

AMC Layer

Ground Layer

Glue-Bonded

LaminatesSemi-Rigid

Cable

1.85 mm

connector

Single Antenna Design (Fabrication)

Procedure:

1. Etching

2. Drilling

3. Glue-Bonding

4. Cable and

Connector

Connecting

PTFE Type Substrate

(Polytetrafluoroethylene)

Note:

Inner conductor of semi-rigid cable as vertical

feeding structure in this prototype fabrication

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(Simulation and Measurement Comparison)

50 52 54 56 58 60 62 64 66 68-70

-60

-50

-40

-30

-20

-10

0

Frequency (GHz)

Scatt

eri

ng

Para

mete

rs (

dB

)

Reflection Coefficient Measurment

Transmission Calculationwith Cable Effects Transmission Measurement

VNA Noise Level

d= 10 mm

50 52 54 56 58 60 62 64 66 68-70

-60

-50

-40

-30

-20

-10

0

Frequency (GHz)

Scatt

eri

ng

Para

mete

rs(d

B)

Reflection Coefficient Measurment

Transmission Calculationwith Cable Effects

Transmission Measurement

VNA Noise Level

d= 10 mm

53 55 57 59 61 63 65 67-40

-35

-30

-25

-20

-15

-10

-5

0

Frequency (GHz)

Refl

ecti

on

Co

eff

icie

nt

(dB

)

Simulation without Cable Effects

Measurement with Cable Effects

Simulation with Cable Effects

(1) Operating (S11) Bandwidth Measurement

(2) Transmission Measurements

The measured bandwidth ranges

from 54 GHz to 67 GHz (13 GHz)

Multiple S11 resonances comes from

the non-ideal transition between the

connector and the cable (Can not be

calibrated out; modeled in ADS)

Horizontal Transmission

Measurement is achieved at different

antenna placements

THE UNIVERSITY OF



(Performance Comparison)

Referen

ce

Antenna

Type

Frequency

Maximum

Radiation

Gain

-10 dB S11

Bandwidth

Comments

[4]

On-Chip

Yagi with

directors

60 GHz -10.6 dBi 10 GHz

Low gain; Low

efficiency

[5]

Aperture-

Coupled

Patch


Maximum gain at

vertical direction (8

dBi)

[6]

Bondwire

Antenna

60 GHz -3 dBi 3 GHz Narrow bandwidth

[7]

Yagi

Antenna

with

directors

60 GHz +6 dBi 2 GHz

Large packaged area

and complicated

cavity design

This

Work

AMC

Antenna

60 GHz -0.5 dBi 13 GHz

Small occupied area,

reasonable

transmission gain;

High efficiency;

Broadband

bandwidth

THE UNIVERSITY OF



(Wireless Link Budget)

Recall the defined budget :


−10𝑙𝑜𝑔 1 − 𝑆112 2 𝜆

4𝜋𝑑

2

𝐺2


TX RXWireless

Interconnect

1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3

2

4

6

8

10

12

14

16x 10

-9


bud

ge

t (d

B/H

z)



in-package Yagi with four directors [19]

This Work

Design Goal Area

Meet the 60 GHz Wireless Interconnect Design Goal

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Two-Element Wireless Interconnect Design

Unit cell

Increased directivity to further reduce wireless link budget

Maintain the Wide Operating Bandwidth

Design Goal:

Single Wireless Interconnect Anticipated high

directive antennas on

the router chip

Two-Element Wireless

Interconnect

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(Proposed Stack-Up)

Cross-Section View Top View

w g ant_w ant_l d

600 um 120 um 700 um 1350 um 2200 um

Dielectric

Antenna Layer

AMC Layer

Ground Layer

Dielectric

Feeding Layer

Plated Through Holey

z

x

h1

h2

h3

Silicon Circuits

C4 Bumps


d

X

Y

Z

AMC

Layer

ant_l

ant_w

gw

200 um

200 um

200 um

Discussion:

Multi-Layer with Plated Through

Hole Process (Ceramic Substrate)

Rogers 4003 Substrate (εr = 3.55;

tanδ = 0.003)

PCB Manufacturing Process (Mass

Production)

Same Concept as single 60 GHz

AMC Antenna

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Package Stack-up:

Four layer metal stack-up design

Plated through hole (PTH) via is

utilized as the vertical feeding of the

RF interconnect in this design

Antenna

Layer

AMC Layer

Ground Layer

Feeding Layer

Dielectric

Antenna Layer

AMC Layer

Ground Layer

Dielectric

Feeding Layer

Plated Through Holey

z

x

h1

h2

h3

Silicon Circuits

C4 Bumps

Cross-Section View Design Procedure:

1. AMC Layer Design

2. Single 60 GHz Antenna Design

on the AMC Layer

3. Two-Element Array (Placement

Considerations)

4. Bottom Layer Feeding Circuit

Design

5. Feeding Consideration for

GSG Probing Measurement


(Proposed Stack-Up)

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𝐸𝑡𝑜𝑡𝑎𝑙 =𝐸𝑠𝑖𝑛𝑔𝑙𝑒 𝑟, 𝜃, 𝜙

𝑟× 𝑒−𝑗𝑘𝑟 × 2 cos

𝜋𝑑

𝜆sin𝜙

Horizontal E-Field distribution

once Identical Antennas are

conducted simultaneously

Y

X

1

2

Antennas 1 and 2 On

x direction(mm)

y d

irectio

n(m

m)

Electric Field (V/m)

-6 -4 -2 0 2 4 6

-6

-4

-2

0

2

4

6

200 400 600 800 1000 1200 1400

Array Factor along y direction with

different antenna’s separated

distance

cos𝜋𝑑

𝜆sin𝜙 = 0

The minimum (null) array factor will be determined:

𝜙 = 90° 𝜙 = 270° or 𝜋𝑑

𝜆= 𝑛 +

1

2𝜋

When n is 0, d should

be wavelength (2.5 mm

in this design)


(Combined-Field)

1 1.5 2 2.5 3 3.5 4 4.50

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

separated distance of two antennas(mm)

ma

gn

itud

e o

f a

rra

y f

acto

r (A

F)

Separated distance isimplemented at 2.2 mmfor this design

THE UNIVERSITY OF


HFSS Simulated radiation pattern in the horizontal XY plane

5 dB gain enhancement

No absolute null along y direction

(The separated distance is 2.3 mm

rather than ideal 2.5 mm)

Maximum 0dBi

gain at -X

direction

Y

X

ϕ

Y

X

ϕ

1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 310

15

20

25

30

35

40


req

uir

ed r

ecove

red P

ow

er

(dB

m)

Single Antenna System

Double-Antenna System

TX/RX Link Budget is reduced

Single Antenna

Operation:


(Transmission Gain Enhance)

THE UNIVERSITY OF


Feeding layer design for two antenna array

The feed design contains:

1. Power combiner

2. Quarter wavelength transformer to have

the impedance transformation

3. Via-less transition from CBCPW to

Microstrip structures for GSG Probing

Measurement

Two-Element RF Interconnect Design

(Feeding Circuit Design)

Microwave Power Divider

Quarter-Wavelength Transformer

CBCPW-MS Transition

𝜆d/4

CBCPW Via

Via

50Ω MS

50Ω MS

35Ω MS

50Ω MS

stub_l

cpw_l

cpw_w

cpw_g

ms50_w ms35_w d

ms35_lms50_l

Open stub can be treated as the

short stub design after the 𝜆/4

impedance transformation.

The short structure can ensure

the complete ground/reference

current flow

Without the transition design, there

will be ground discontinuity between

the CPW and MS structures. Large

insertion loss and reflection loss will

occur

ant_d 2200 um

ms_w 400 um

ms2_w 700 um

cpw_w 115 um

cpw_g 75 um

cpw_l 1580 um

stub_l 768 um

Detailed

Dimensions of

Feeding Layer

Circuit Design

THE UNIVERSITY OF


Probe Station Holder

Feeding Layer

Antenna Layer


(Operating Bandwidth Measurement)

GSG Probe Measurement Setup

50 52 54 56 58 60 62 64 66 68 70-35

-30

-25

-20

-15

-10

-5

0

Frequency (GHz)

Re

flectio

n C

oe

ffic

ien

t (d

B)

Simulation

Measurement

Simulated and Measured Performances

Discussion:

Measured Operating (S11) Bandwidth: 11

GHz (From 56 GHz to 67 GHz)

Transmission Gain is enhanced to 5 dBi

according to the simulated radiation pattern

THE UNIVERSITY OF



(Performance Comparison)

Performance Comparison Table

Reference Antenna

Type Frequency

Maximum

Radiation Gain

-10 dB S11

Bandwidth Comments

[4] On-Chip Yagi

with directors 60 GHz -10.6 dBi 10 GHz Low gain; Low efficiency

[4]

Aperture-

Coupled

Patch

60 GHz -8 dBi 10 GHz Maximum gain at vertical

direction (8 dBi)

[6] Bondwire

Antenna 60 GHz -3 dBi 3 GHz Narrow bandwidth

[7] Yagi Antenna

with directors 60 GHz +6 dBi 2 GHz

Large packaged area and

complicated cavity design

Previous

Work

AMC Antenna

(Single) 60 GHz -0.5 dBi 13 GHz

Small occupied area,

reasonable transmission

gain; High efficiency;

Broadband bandwidth

This Work

AMC Antenna

(Two-

Element)

60 GHz +5 dBi 11 GHz

High transmission gain;

High efficiency;

Broadband bandwidth

THE UNIVERSITY OF



(Wireless Link Budget)

Recall the defined budget :


−10𝑙𝑜𝑔 1 − 𝑆112 2 𝜆

4𝜋𝑑

2

𝐺2

𝐵𝑊 𝑑𝐵𝑚 𝐻𝑧 TX RX

Wireless

Interconnect

1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 331.5

2

2.5

3x 10

-9


bud

ge

t (d

B/H

z)

Single 60GHz RF Interconnect

Two-Element RF Interconnect

Meets the Design Goal:

Keep reducing the budget for

TX/RX Circuits

THE UNIVERSITY OF


Conclusion

Router-Based, Hybrid Interconnects for Multi-Chip Module

System Evaluation; Performance Metrics; Wireless Link

Budget

Single 60 GHz Single AMC type Wireless Interconnect

(Concept, Fabrication, Measurement) (13 GHz Operating

Bandwidth, -0.5dBi horizontal transmission gain)

Two-Element Wireless Interconnect Design (Concept,

Fabrication, Measurement) (5 dBi horizontal

transmission gain, 11 GHz Operating Bandwidth,

Reduced Wireless Link Budget)

THE UNIVERSITY OF


Discussion

The material is based upon work supported by the National Science

Foundation under Grant ECCS-1027703

Dr. Ho-Hsin Yeh Reshmaa Liyakath Basha,

Marcos Vargas, Sungjong Yoo

On-Chip Antennas for Multi- Chip RF Data Transmission€¦ · On-Chip Antennas for Multi-Chip RF...

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