Obtaining S-Parameter Data from Probe Window in PSpice

Obtaining S-Parameter Data from Probe Window in PSpice Product Version SPB 17.4-2019

December 2019

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Obtaining S-Parameter Data from Probe Window in PSpice

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Contents

Purpose ........................................................................................................................4

Audience ......................................................................................................................4

Database ......................................................................................................................4

S-Parameter Theory ......................................................................................................5

Measuring S-Parameter Data from the PSpice Probe ......................................................7

Defining the Sub-Schematics .........................................................................................8

Using the Sub-Schematics ........................................................................................... 12

Support....................................................................................................................... 16

Feedback.................................................................................................................... 16




Purpose

This document explains the steps for measuring S-parameters in PSpice from the probe window. Obtaining S-parameters for a passive circuit (a band pass filter) and an active circuit (transistor circuit) are covered.

Audience

This document is intended for Cadence® PSpice® users who want to measure S- parameter data using PSpice probe.

Database

RAK database and references can be found at ‘Attachments’ and ‘Related Solutions’

sections below the PDF. This RAK pdf can be searched with the document title on

https://support.cadence.com

https://support.cadence.com/




S-Parameter Theory

S-parameters measure the ratio of incident versus reflected signals. The incident signals are defined as a1 and a2, while the reflected signals are defined as b1 and b2. The incident and reflected signals are related to voltages and currents at ports 1 and 2 as:

a1 =

b1 =

a2 =

b2 =

𝑉𝑉1+𝑍𝑍0𝐼𝐼1

2√𝑍𝑍 (1)

𝑉𝑉1−𝑍𝑍𝑍𝑍𝐼𝐼1

2√𝑍𝑍 (2)

𝑉𝑉2+𝑍𝑍𝑍𝑍𝐼𝐼2

2√𝑍𝑍 (3)

𝑉𝑉2−𝑍𝑍𝑍𝑍𝐼𝐼2

2√𝑍𝑍 (4)

The scattered or reflected waves are related to the incident waves by the following set of linear equations:

b1 = S11a1 + S12a2 (5)

b2 = S21a1 + S22a2 (6)

Or, in matrix form as:

�𝑏𝑏1� = �

S11 𝑆𝑆12� �

𝑎𝑎1� (7)

𝑏𝑏2 𝑆𝑆21 𝑆𝑆22 𝑎𝑎2

The Sij coefficients are dimensionless ratios. For most applications, the characteristic

impedance of the system, Z0, is 50 ohms. S11 is the input reflection ratio and is

defined as the ratio of the input port reflected wave to the input port incident wave. If the incident wave at the output, a2, is set to 0, the equations reduce to b1 = S11a1 and

b2 = S21a1. Using the defining equations, this reduces to

𝑏𝑏1 𝑉𝑉1− 𝑍𝑍0𝐼𝐼1 𝑍𝑍

S11 =

Where

𝑎𝑎1 = 𝑉𝑉1+𝑍𝑍𝑍𝑍𝐼𝐼1

= 2 (𝑍𝑍+𝑍𝑍𝑍𝑍

) - 1 (8)

• V1/I1 is the input impedance Z.




• S21 is the forward transmission ratio and is defined as b2/a1.

If the input and output load impedances of the circuit are the same, S21 is the voltage

measured at the output multiplied by 2.

If the incident wave at the input is set to zero, then the equations reduce to:

b1 = S12a2

b2 = S22a2




Measuring S-Parameter Data from the PSpice Probe

Sub-schematics created in Allegro® Design Entry CIS (Capture CIS), shown in Figure 1 and Figure 2, are required to make the necessary measurements.

Figure 1- XMITS circuit

Figure 2 – REFLECTS circuit




Defining the Sub-Schematics

The design (extract_s_parameter.zip) with this note has Parts XMITS (Figure 3), REFLECTS(Figure 5), and the corresponding Model Libraries.

Sub-schematic ‘XMITS’ for Transmission Coefficients Measurement

Figure 3 – XMITS circuit and its hierarchical part

The XMITS circuit shown in Figure 3 is used to measure:

• Forward transmission coefficient - S21

• Reverse transmission coefficient - S12

Transmission coefficients are the output voltages multiplied by 2, since the output load

matches the input load. The E device, E1, has a gain of 2.

The port CKT is used to connect to an external circuit.




The port STR is a hidden pin as shown in Figure 4. Capture CIS will generate a unique net if this pin is left unconnected in a schematic. Alternatively, a specific net can be named for the connection by editing the PSpiceDefaultNet property (Figure 4).STR pin will have a known label S21, when analyzing simulation results in the Probe window.

Figure 4 – Pin Properties for the XMITS part showing hidden STR pin




Sub-Schematic ‘REFLECTS’ for Transmission Coefficients Measurement

Figure 5 - REFLECTS circuit and its hierarchical part

The REFLECTS circuit shown in Figure 5 is used to measure:

• Input reflection coefficient - S11

• Output reflection coefficient - S22

Reflection coefficients are the input voltage multiplied by 2 minus AC unity. The E device, E1, has a gain of 2. As in the transmission coefficients measurement circuit, the interface pin labeled CKT is used to connect to the external circuit.




The pin, SRE, is a hidden pin (Figure 6), like STR described above. The REFLECTS symbol also has a DCbias property.

In active circuits, the DC level can be set to voltage source, V1, by changing the DCbias

property for the REFLECTS part instance in Capture CIS. By default, this property is set to zero.

Figure 6: Pin Properties for the Reflects symbol showing hidden S_RE pin




Using the Sub-Schematics

Sub-schematics can be used for both passive and active circuits. You can also use the XMITS and REFLECTS symbols, available in the sparam.olb library included in the

design for this application note.

Passive Circuit Implementation

The circuit shown in Figure 7 is a fourth-order Butterworth bandpass filter with a center frequency of 250 MHz.

The first circuit measures S11 and S21. The second circuit measures S12 and S22.




AC analysis is performed on the design with Start Frequency of 200 MHz and End

Frequency of 350 MHZ. The Simulation results are shown in Figure 8.

Figure 7 - Bandpass filter example

Figure 8 - S11 and S21 for Filter Example




Active Circuit Implementation

It is also possible to measure the s-parameters of an active circuit.

The design with this note measures the s-parameters of RF transistor MRF5711/MC.

Figure 9 shows the circuit for this example.

Figure 9 - Transistor example

The Transistor is biased for a VCE of 6.0 volts and an IC of 5.0 mA. The current is

set by the current source I2 at the Emitter of the Transistor. DC bias is set by V1 in the circuit that measures S11 and S21.The DCBIAS property specifies the DC bias in reflection measurement sub-circuit that measures S12 and S22.

AC analysis is performed on the Design with Start Frequency of 200 MHz and End

Frequency of 2 GHz.




Figures 10 through 12 show the magnitude and phase measurements after Simulation. This is typically the way most manufacturer’s data sheets show the S-Parameters.

Figure 10 - S11 and S22 magnitude and phase

Figure 11 – S21 Magnitude and Phase




Figure 12 – S12 Magnitude and Phase

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Obtaining S-Parameter Data from Probe Window in PSpice

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