Nvidia Tegra X2Architecture and Design

Jeff BarkerBarry Wu

Rochester Institute of Technology

Spring 2017

Agenda

I Overview

I CPU Complex (4x ARM A57 + 2x Denver 2)

I GPU Complex (Pascal GPU)

I ApplicationsI Nvidia Jetson TX2I Nvidia Drive PX2

I Closing Remarks and Questions

Nvidia Tegra X2 Overview

I Announced in April 2017 as credit cardsized system-on-module

I Improved on previous generation TegraX1 module with:

I Two additional Denver 2 CPU CoresI 8GB 128-bit LPDDR4 RAM

(compared to 4GB 64-bit)I 32GB eMMC storage (compared to

16GB)I Pascal GPU architecture (compared to

Maxwell)I Improved video encoding and decoding

Tegra X2 Block Diagram

ARM CPU Cores

I Quad Core ARM A57 64-bit Processor Cluster

I Multi-thread optimized ARMv8 architecture

I Superscalar, variable-length, out-of-order pipeline

I Dynamic branch prediction with Branch Target Buffer(BTB) and Global History Buffer RAMs, a return stack,and an indirect predictor

I 48KB 3-way set-associative L1 Instruction cache per core

I 32KB 2-way set-associative L1 Data cache per core

I 2MB 16-way set-associative shared L2 cache

Denver 2 CPU Cores

I Dual Core Denver 2 64-bit Processor Cluster

I Single-thread optimized ARMv8 architecture

I 7-wide Superscalar architecture

I Dynamic branch prediction with Branch Target Buffer(BTB) and Global History Buffer RAMs, a return stack,and an indirect predictor

I 128KB 4-way set-associative L1 Instruction cache per core

I 64KB 4-way set-associative L1 Data cache per core

I 2MB 16-way set-associative shared L2 cache

Pascal GPU Micro-architecture

Pascal GPU

I 16-nm FinFET manufacturing process

I 2 Streaming Multiprocessors (SM)

I 4 Streaming Multiprocessor Blocks (SMP) per SM

I 32 CUDA cores per SMP (256 CUDA cores total)

I Simplified data path

I Improved scheduling and overlapping load/store instruction

I Improved addressing and page fault handling

Jetson TX2 System-On-Module Block Diagram

Jetson Carrier Board

Jetson Carrier Board (cont.)

I InterfacesI HDMI 2.0, 2x DSI display portsI CSI2 D-PHY 1.2 camera portI CAN, UART, SPI, I2C, I2S, GPIOI USB 3.0, USB 2.0I Gigabit Ethernet, 802.11ac WLAN, Bluetooth

I ApplicationsI Computer VisionI Deep Learning/Neural NetworksI Autonomous DronesI Robotics

Nvidia Drive PX2

Nvidia Drive PX2 (cont.)

I Fully autonomous driving

I Auto-pilot FunctionalityI PerceptionI ReasoningI MappingI Driving

I Co-pilot FunctionalityI Face detectionI Head trackingI Gaze trackingI Lip reading

I Multimedia Control

Closing Remarks

I Extremely capable embedded platform processorI Two high power single thread optimized coresI Four low power multiple thread optimized coresI Nvidia Pascal GPU

I High performance for low power drawI Claimed 1.5 TFLOPS at 15 WattsI Twice the performance per watt compared to the Tegra X1

I Wide range of applications, especially with Jetson

I Higher cost for increased performance compared to otherembedded platforms

Questions?