NVIDIA CORPORATIONdeveloper.download.nvidia.com/embedded/jetson/TK1/docs/3...PAGE 18: TEMP SENSOR,...

+3.3V VRPAGE 27: DC IN

PAGE 29: +5V VR

PAGE 12: TK1: GND

PAGE 41: BASENET REPORT


PAGE 35: VDD_CPU VR

PAGE 32: PMIC: CNTL, INT SW, LDOS

PAGE 25: SD CONN & FRONT PANEL HDR

PAGE 22: JTAG CONN; I2C TRANSLATER

PAGE 18: TEMP SENSOR, SERIAL, ID

PAGE 16: PEX OPTIONS AND SATA

PAGE 36: REVISION HISTORY

PAGE 31: PMIC: LOGIC AND GPIOS

PAGE 23: EMMC,SPI ROM

PAGE 20: AUDIO CODEC

PAGE 17: USB PORTS

PAGE 14: TK1: SATA, PEX, USB 3.0

PAGE 26: EXP:TOUCH/DISP & GENERAL

PAGE 33: PMIC: DCDCPAGE 34: PMIC: TK1 GPU AND CORE

PAGE 30: LOAD SWITCHES

PAGE 24: SWITCHES & STRAPS

PAGE 21: AUDIO CONNECTORS

PAGE 19: PEX GIGE LAN/PHY

PAGE 15: MINI HALF PCIE

PAGE 13: HDMI TYPE A CONN


PAGE 39: BASENET REPORTPAGE 40: BASENET REPORT

PAGE 42: BASENET REPORTPAGE 43: CREF PART REPORTPAGE 44: CREF PART REPORTPAGE 45: CREF PART REPORTPAGE 46: CREF PART REPORTPAGE 47: CREF PART REPORTPAGE 48: CREF PART REPORTPAGE 49: CREF PART REPORT

PAGE 5: TK1: CH1 MEMORY I/FPAGE 4: TK1: CH0 MEMORY I/FPAGE 3: I2C ADDRESS MAPPAGE 2: SYSTEM POWER TREE

PAGE 6: DDR3 X16 PAGE 1PAGE 7: DDR3 X16 PAGE 2PAGE 8: TK1: SDMMC/ULPI/JTAG/KBPAGE 9: TK1: CSI/DSI/HDMI/USBPAGE 10: TK1: UART/GMI/DAP/SPIPAGE 11: TK1: POWER

PAGE 1: COVER PAGE

BOM REV EFAB REV D

SCH REV 4.04602-7R375-0000-D00TK1 Compact Development Module

04/07/2015

TK1 Compact Development Module

Thu Jul 23 14:36:54 2015

602-7R375-0000-D00

COVER PAGE

PAGE 1 OF 50

PAGE : TITLE

A

C

B

D

124 3

CONFIDENTIALNVIDIA

STATUTORY OR OTHERWISE WITH RESPECT TO THE

MATERIALS) ARE BEING PROVIDED AS IS. NVIDIAMAKES NO WARRANTIES, EXPRESSED, IMPLIED,

MATERIALS, AND EXPRESSLY DISCLAIMS ALL IMPLIEDWARRANTIES OF NONINFRINGEMENT, MERCHANTABILITYAND FITNESS FOR A PARTICULAR PURPOSE.

ALL NVIDIA DESIGN SPECIFICATION, REFERENCEBOARDS, FILTERS, DRAWINGS, DIAGNOSTICS, LISTSAND OTHER DOCUMENTS (TOGETHER AND SEPARATELY,

SANTA CLARA, CA 950502701 SAN TOMAS EXPRESSWAYNVIDIA CORPORATION

DOC NUMBER

TITLE

DATE

567

D

8

A

B

C

4 23 15678

602-7R375-0000-D00 24.04

Thu Jul 23 14:36:54 2015

SYSTEM POWER TREE

+5V_SYS

+1.8V_VDDIO

+3.3V_SYS

+VDDIO_DDR

AUDIO CODECALC5639

DDR3L-1600X4PCS2G BYTE

LOAD SWTPS22908

TMP451+3.3V_RUN TEMP SENSOR

+3.3V_SD_CARD

SD SOCKET

+3.3V_SYS

+1.8V_VDDIO

+5V_SYS

RT9728LOAD SW

LS

EN3LS

LSEN1

EN3

+3.3V_RUN

+3.3V_LP0

VBACKUP

LDOVRTC_OUT

+1.8V_VDDIO_LP0_OFF

+2.5V_AON_RTC

+2.85V_EMMC LDO1 (? MA) 1.8V16GB

+1.8V_VDDIO

+1.8V_VDDIO

EMMC

SPI ROM 4MB

+VDD_MUX

TPS51220

DCIN_12V

DC CONN

LDO 5V

DCDC 5V

DCDC 3.3V

+5V_STBY

+5V_SYS

+3.3V_SYS

+1.8V_VDDIO

VDD_CORE

+VDDIO_DDR

+VDDIO_DDR

+3.3V_SYS

+3.3V_SYS

+3.3V_RUNLDO6 3.3V/1.8V

LDO3 SLEEP 1.0V

LDO3 TRACK 1.0V

LDO4 (150MA) 2.8V

LDO3 SW 1.0V

LDO11 (300MA) 1.8V

+1.8V_RUN_CAM

+1.8V_RUN_VPP_FUSE

+VDDIO_SDMMC3

+2.8V_RUN_CAM

LDO2 (300MA) 1.2V

DCDC5 (1.5A) 1.8V

LDO0 (300MA) 1.05V

DCDC4 (1.5A) 1.05V

+1.2V_GEN_AVDD

+1.05V_RUN_AVDD

+1.8V_VDDIO

+1.05V_RUN

AS3722

MAIN PMU

DCDC2 1.35V

DCDC3 1.35V+VDDIO_DDR @6A

+VDD_MUX

4X16DDR3L

+VDD_MUX

+1.05V_RUN

+5V_SYS

+VDD_RTC_AON

HDMI CONN

+3.3V_LP0

TPS2065LOAD SW

LOAD SWTPS2051

U AB CONNUSB 2.0

CONNUSB 3.0

VDDIO_HV

USB90_VBUS

VDDIO_CAM

+3.3V_RUN

+1.8V_VDDIO_LP0_OFF

VPP_FUSE

VDDIO_SDMMC3

VDD_RTC

AVDD_PLL_UTMIP

AVDD_LVDS0_PLL

+3.3V_RUNBD

LS

+3.3V_LP0

AS3728

DCDC1

LS

X1

AVDD_HDMI_PLL

AVDD_HDMI

VDD_CORE

AVDD_HDMI_PLL

VDDIO_HSIC,AVDD_DSI_CSI

VDDIO_HV, HVDD_PEX_PLL_E, HVDD_PEX

VDDIO_SYS2, VDDIO_AUDIO,VDDIO_GMI

AVDD_PLL_EREFE, AVDD_PLL_X, AVDD_PLL_CGAVDD_PLL_APC2C3,AVDD_PLL_M,AVDD_PLL_MVDDIO_DDR_HS, AVDD_PLL_UD2DPDAVDD_LVDS0_IO, AVDD_PLL_C4

VDDIO_PEX_CTL, HVDD_SATA

AVDD_SATA_PLL, VDDIO_SATAAVDD_PEX_PLL, DVDDIO_PEX, AVDDIO_PEX,

VDDIO_SDMMC4,VDDIO_UART,VDDIO_SYS,AVDD_OSC,VDDIO_BB,VDDIO_SDMMC1,

+VDD_MUX

X2

DCDC6

AS3728

DCDC0

X2

AS3728 VDD_CPU

PROCESSOR

VDD_GPU

TK1 MID

VDDIO_DDR,VDDIO_DDR_MCLK

A

B

C

D

E

F

3 2 1

REV PAGE

DATE

TITLE

DOC NUMBER

CONFIDENTIALNVIDIA

6 4578

E

D

F

C

B

A

456 3 2 18 7

Thu Jul 23 14:36:54 2015

I2C ADDRESS MAP

602-7R375-0000-D00 4.04 3

BUS

GEN2_I2C - 3.3V

GEN1_I2C - 3.3V

PWR_I2C - 1.8V

CAM_I2C - 3.3V

GEN1_I2C - 1.8V

DEVICE

BOARD ID

EXPANSION

TEMPERATURE SENSOR

EXPANSION

PMIC AS3722

EXPANSION

EXPANSION

HALF MINI PCIE

AUDIO CODEC

I2C ADDRESS MAP

UNKNOWN

UNKNOWN

UNKNOWN

UNKNOWN

7'H40, 8'H80

7'H56, 8'HAC

7'H1C, 8'H38

ADDRESS

UNKNOWN

7'H4C, 8'H98

RESET_OUT

GPIO4

GPIO1

LDO0

SD4

CLK32K

SD2 & SD3

GPIO2

ONKEY

VSUP_EN/EN5V

PMIC

V2_5

SD5

SD1

LDO3

(+3.3V_LP0)

+1.35V_LP0

+1.05V_RUN_AVDD

+3.3V_RUN)

CLK_32KHZ_PMU

+1.05V_RUN

EN_AVDD_LCD

PMU_REGEN3

PMU_REGEN1

+1.05V_LP0_VDD_RTC

AS2730_5V_VR_EN

+VDD_CORE

+1.8V_VDDIO

+2.5V_AON_RTC

ONKEY_L

NET NAME

VDD_MUX

(+5V_SYS / +3.3_SYS)

POWER SEQUENCING

(+1.8V_VDDIO_LP0_OFF &

S/W CONTROLLED

0 321 64 5 10987

VALID / RUNNING

1211 20 21

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

C0G0201_R1

C8C1

1

2

2.2PF

7C8<7C8<

6C8<6C8<

7C4<7C4<

6C4<6C4<

DDR1_CLKNDDR1_CLKP

DDR0_CLKPDDR0_CLKN

DDR1_CLK_TERM

45.3

0201_R

1R8C22

1%45.3R8C11

0201_R1%

2

1

10%

.01UF

10VX5R0201_R

C8C121

1

2

44.04602-7R375-0000-D00

TK1: CH0 MEMORY I/F

DDR0_CLK_TERM

0201_R

45.31%

1R8B192

0201_R

45.3R8B21

1%

12

1

.01UF

10%10VX5R0201_R

C8B171

1

27C8<

7C8<

6B8< 6D4<7B4< 7B8<

7D8<

6C8< 7C4<6D4< 6D8<

6C8< 7C4<

7C8<7C4<

7C8<

7B8<

6C8<

6D8<

7C4<

7B4<

7D8<

6C4<

7D4<

6D4<

6C8<

6B8<

4C3>

6C4<

6B4<

6C4<

4B3>

7D4<

6D8<6B4<

6C4<

+/-0.25PF50V

C0G0201_R1

50V+/-0.25PF

DDR_RAS_L

DDR_A0<5..3>

DDR_A<15..0>

DDR_WE_L

C8C161

2

2.2PF

2

1987

6

13

6B8<

DDR_BA<2..0>

DDR_A1<5..3>

DDR_A0<5..3>DDR_CAS_L

DDR_RESET_L

6B4<

01

1415

2

12

3

1110

0

6B8<

6C8<

7B8<7B8<

7C8<

6C8<

7B8<7B8<

6B8<6B8<

7C8<

6B4<

6C4<

7C4<

6B4<6B4<

7B4<7B4<

7B4<7B4<

7C4<

6C4<

Thu Jul 23 14:36:54 2015

DDR0_CS0_LDDR0_CS1_L

DDR0_CKE0

DDR1_CKE1

DDR0_ODT0DDR0_ODT1

DDR1_ODT0DDR1_CS1_L

DDR1_CS0_LDDR1_ODT1

DDR1_CKE0

DDR0_CKE1

1

TK1-MID

U3C1BGA

DDR_DQ<63..0>T4B24T4B18

T4C43

5

T4C31

1

1

1

1

T4C8T4C2

TEE

TEE

TEE

TEE

1

1

TEETEE

4

T4C5T4C1

T4B32

T4C10

T4B33

T4C6

1

1

TEE

TEETEE 1

1

1

1

TEETEE

TEE

G18

D12E12

D14E15

H18

F12

F14C12

D15

G14H14

E14

D18

B12

TEE 3T4C131G17

45

T4C18T4C7T4C14T4C12

1

1

1

1TEE

TEETEE

TEE

TEE T4C91

T4C16T4C15

T4C4

T4C11

T4C3T4C17

1

1

1

1TEE

TEETEE

TEE

1

1

TEE

TEE

E18E17C20

F17E20

D20F18

B14

H15

C15

H17

C14G15

F15

A16

A4A3

C2B5

C3B2B3

A5

C9F9

E9F8G8

A9D9E8

A8B8

G12H12

A6

C6

A7E6

D6F6

A11

F11D11

B11A10E11

C5D5C1

A12

A13

B20

A15B15

C18A18

A19B18

A20

A14

I535

H9G9

B9

C8

B6D8

H11G11C11

T3B8

T3B7T3B5T3B6T3B4

T3B34T3B27T3B24T3B31T3B25T3B28T3B23T3B36



T3B13T3B14T3B1

T3B30T3B29T3B33

T3B20T3B19T3B9

T3B42T3B40T3B39

T3B2

T3B3

T3B121

1

1

1

1

1

1

1

TEE

TEE

TEE

TEE

TEETEE

TEE

TEE

162223

19

2118

1720

3 1

1

1

1

1

1

1

1

1

TEE

TEE

TEETEETEE

TEE

TEE

TEE

TEE

52

06

1

47

2624 TEE 1

1

1

1

1

1

1

1

1

TEETEETEE

TEETEE

TEETEE

TEE

27303125

29

1513

28

9 TEE 1

1

1

1

1

1

1

1

1

TEETEETEE

TEETEETEETEETEE8

12111410

DDR_DM2DDR_DQS2NDDR_DQS2P

6C8<6C8<6C8<

7D5<>5C7<>6D1<>7D1<> 6D4<>

1

1

1

TEETEETEE

1

1

1

TEETEETEE

1

1

1

TEETEETEEDDR_DM1

DDR_DQS1NDDR_DQS1P



6C4<6C4<6C4<

6C4<6C4<6C4<

6C8<6C8<6C8<

PLACE AT "T" BRANCH

PLACE <100 MILS FROM TEGRA

DRAM PIN MULTIPLEXING OPTION #14 (DDR3L,4X16, 2 TOP/2 BOTTOM VERTICAL)

BYTE 0

BYTE 2

BYTE 3

BYTE 1

OUTOUT

OUTOUT

OUT

OUTOUT

OUT

OUT

OUT

OUTOUT

OUT

OUTOUT

OUTOUT

OUTOUT

OUTOUT

OUTOUT

OUTOUT

SEC 5 OF 8

DDR_CLK_NDDR_CLK

DDR_CLKB_NDDR_CLKB

DDR_A4DDR_A3

DDR_A1DDR_A2

DDR_A0

DDR_A5

DDR_A9DDR_A8

DDR_A6DDR_A7

DDR_A13DDR_A12DDR_A11DDR_A10

DDR_A14DDR_A15

DDR_A_B5DDR_A_B4

DDR_BA1DDR_BA0

DDR_BA2

DDR_A_B3

DDR_RESET_N

DDR_RAS_NDDR_CAS_N

DDR_CS_B0_N

DDR_WE_N

DDR_CS0_NDDR_CS1_N

DDR_CS_B1_N

DDR_CKE_B0

DDR_CKE1

DDR_CKE_B1

DDR_CKE0

DDR_ODT0

DDR_ODT_B1DDR_ODT_B0

DDR_ODT1

DDR_DQ0DDR_DQ1DDR_DQ2DDR_DQ3DDR_DQ4DDR_DQ5DDR_DQ6

DDR_DQ8

DDR_DQ10DDR_DQ9

DDR_DQ7

DDR_DQ11

DDR_DQ19

DDR_DQ16

DDR_DQ15

DDR_DQ13

DDR_DQ18DDR_DQ17

DDR_DQ14

DDR_DQ12

DDR_DQ20

DDR_DQ22DDR_DQ23

DDR_DQ28

DDR_DQ24

DDR_DQ27DDR_DQ26DDR_DQ25

DDR_DQ21

DDR_DQ29

DDR_DQS1P


DDR_DQ30DDR_DQ31

DDR_DQS2N

DDR_DM1DDR_DQS1N

DDR_DQS3P

DDR_DQS2P

DDR_DM2

DDR_DQS3NDDR_DM3

BIBI

BI

OUT

BIBI

OUT

BIBI

OUT

BIBI

OUT

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

32D5>14C7<14C1<9C4<9C2<

0402_R

4.7UFC8B281

20%6.3V2X5R

0402_R

4.7UFC8B211

6.3V20%X5R

2

0402_R

4.7UF

EMPTY

C8B141

X5R20%6.3V220%

X5R

4.7UF0402_R6.3V

C8B311

2X5R6.3V20%

4.7UF0402_R

C8C36

+1.05V_RUN_AVDD

1

EMPTY

26.3V20%

4.7UF0402_RX5R

C8B161

2

4.7UF

20%6.3V0402_RX5R

EMPTY

C8C381

2

4.7UF

20%X5R0402_R6.3V

C8C281

2

0402_R

2.2UF

10%

X5R16V

0201_R

0.1UF

2.2UF

0402_R

2.2UF

0402_R

C8C11

C8C7

C8C20

C8C31

X5R6.3V20%2

1

0201_R

0.1UFC8C101

2 10%

X5R16V

X5R6.3V20%2

1

0201_R

0.1UFC8C81

2 10%

X5R16V

6.3VX5R

1

2 20%

0201_R

0.1UFC8C181

16VX5R

2 10%

1

216V

0.1UF

0201_R

10%

X5R

C8B191

2

K16B17

A17

J9J12

J20J18

J14J11J17

ISO8C110MIL

1

2

+1.35V_LP0

54.04602-7R375-0000-D00

TK1: CH1 MEMORY I/F

+1.35V_LP0_VDDIO_DDR_MCLK_AP

5A8<6A8<7A8<32B8<

32D8<

33B2>

0201_RX5R

0.1UFC8B301

16V10%2

K11

J15

K10J21

Thu Jul 23 14:36:55 2015

BGA

1

U3C1

TK1-MID

D24

A25A26

B26

A22E24

D21G20F20E21A21G21

C24E27

B21C21

A24E26

T3C11

T3C2T3C13T3C1T3C12

T3C8T3C7T3C9

1

1

1

1

TEETEETEE

TEETEE 1

1

1

1

TEETEETEE

TEE T3C351

T3C25T3C36

T3C29T3C26T3C31T3C28

T3C20T3C6

T3C22

1

1

1

1

TEETEE

TEETEE

TEE 1

1

1

1

1

TEETEE

TEETEE

5051485452

4953

55

37

3833

35

3236

3439

6362

DDR_DQ<63..0>6D4<> 6D1<> 4D8<>7D1<>7D5<>

A27C31

A23

C17D17

H23

C29

B29B27

B30

D23F23

E23

B24D26C26

F21H20

C30

C27

D27

F24

B23C23

G23

H21

A28

A29

T3C19T3C3T3C17T3C23T3C14T3C21

T3C44T3C34T3C43

1

1

1

1

1

TEETEETEETEETEE

1

1

1

1

TEE

TEETEETEE

T3C37T3C38T3C33T3C41T3C39

T3C5T3C4T3C15

1

1

1

1

1

TEETEETEETEETEE

1

1

1

TEETEETEE

6058

56

6157

59

45

4144

4640434247

DDR_DQS6PDDR_DQS6NDDR_DM6

T3C30T3C27T3C24

T3C16T3C18T3C10

1

1

1

TEETEETEE

1

1

1

TEETEETEE

T3C42T3C40T3C32

DDR_COMP_PDDDR_COMP_PU

1

1

1

TEETEETEE


DDR_DM4

DDR_DQS4PDDR_DQS4N

0201_R

1

DDR_DQS5P

DDR_DM5DDR_DQS5N

R3C2

1%

2

I6812

341%

0201_R

R3C1

1

34

7C8<7C8<7C8<

7C4<7C4<7C4<

7C8<

7C8<7C8<

7C4<

7C4<7C4<

+1.35V_LP033B2>

32D8< 32B8< 7A8< 6A8< 5B3<

ROUTE VDDIO_DDR_MCLK AS 10MIL TRACE W/5X SPACING FROM VREG

PLACE CLOSE TO PIN

DRAM PIN MULTIPLEXING OPTION #14 (DDR3L,4X16, 2 TOP/2 BOTTOM VERTICAL)

IN

IN

BI

(1.05V)

(1.35V)

SEC 6 OF 8

AVDD_PLL_M

VDDIO_DDR 1

VDDIO_DDR_HS

VDDIO_DDR 3VDDIO_DDR 4VDDIO_DDR 5VDDIO_DDR 6

VDDIO_DDR 8VDDIO_DDR 9

VDDIO_DDR 10

VDDIO_DDR 7

VDDIO_DDR 2

VDDIO_DDR_MCLK

AVDD_PLL_APC2C3DDR_DQ35DDR_DQ34DDR_DQ33DDR_DQ32

DDR_DQ44DDR_DQ43

DDR_DQ39DDR_DQ38

DDR_DQ42

DDR_DQ53

DDR_DQ51DDR_DQ52

DDR_DQ41

DDR_DQ36DDR_DQ37

DDR_DQ50DDR_DQ49DDR_DQ48

DDR_DQ45

DDR_DQ47DDR_DQ46

DDR_DQ40

DDR_DQ54

DDR_DQ59

DDR_DQ63

DDR_DQS4P

DDR_DQ56

DDR_DQ58

DDR_DQ62

DDR_DQS4NDDR_DM4

DDR_DQS5PDDR_DQS5NDDR_DM5

DDR_DQ57

DDR_DQ55

DDR_DQ60DDR_DQ61

DDR_DQS6P

DDR_DM6DDR_DQS6N

DDR_DQS7P

DDR_COMP_PUDDR_COMP_PD

DDR_DQS7NDDR_DM7

BIBIOUT

BIBIOUT

BIBIOUT

BIBIOUT

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

7D5<>6D4<>

5C7<>4D8<>DDR_DQ<63..0>

24E31866

256MBIT

1.35VDDR3_X16

7D1<>2826

27

3129

3025

8

H8H3F8F2F7

G2H7

D715C3

10

12

11

13

149

A2A7C2C8

B8

B2

A3

2HYNIX

D9G7K2K8N1N9

R9R1

A1A8C1C9D2E9F1

H9H2

BGA100_2U4B1

N3P7P3

0

21

DDR_A<15..0>

7D5<>7D1<>

6B8<4C3>

6D1<>

7B4< 6D8<6B4<

5C7<>4D8<>N2P8P2R8R2T8R3L7R7N7

3

54

T3T7

M2N8M3

K3J3

L3

678

109

11121314

0

21

J7K7

E7

F3G3C7B7

D3

K9J9

L2L1

K1J1T2

DDR_A0<5..3>

DDR_BA<2..0>

DDR_DM1

DDR_RESET_L

DDR0_ODT0DDR0_ODT1


DDR_DQS1NDDR_DQS1PDDR_DQS3N

DDR_WE_L

DDR0_CLKPDDR0_CLKN

DDR_DQS3P

DDR_DM3

DDR_CAS_LDDR_RAS_L

DDR0_CKE1DDR0_CKE0

4C3>4B3>4C3>

4B3>

4C3>

6C8<6C8<6C8<

6D8< 4C3>

7C4< 6C8<

7C8< 7C4<7C8< 7C4<7C8< 7C4<

4B7<>

4D1>4D1>

4B7<>

4A7>

4A7<>4A7<>

4A7>

4B4>4B4>

4B4>4B4>

4A4>4A4>6B8<

6B8<

6B8<6B8<

6C8<6C8<

6C8<6C8<

7B8< 7B4< 6B8< 4B3>

B1B9

D8D1

E2E8F9G1G9

J8M1

P1M9

P9T1T9

64.04602-7R375-0000-D00

DDR3 X16 PAGE 1

I259

M7Z3Z4

M8H1

L8L9

Z1Z2

A9B3E1G8J2

DDR_ZQ1_U27U2DDR_ZQ0_U27U2

SNN_U27U2_Z3SNN_U27U2_Z4SNN_U27U2_Z1SNN_U27U2_Z2

R4B1

150.5%

2

2400201_R

DDR_A<15..0>

1

R4B22

0.5%240

0201_R

1

VREF_DDR0

1 C7B100.1UF

0201_R

10%

X5R16V2

0.1UFC7B41

16V

0201_R

10%

X5R

2

7D8< 7D4<6B8< 4C3>

Thu Jul 23 14:36:55 2015

7B8<

7C8<

6D4<

7D4<7D8<

DDR_DQ<63..0>

BGA100_2

18661.35V

DDR3_X16

U7B1

16

2117

231922

1820

740

35

6

21

0402_R

R4B32

1%1K

1

H3F8F2F7E3

H8G2H7

D7

A7C2C8C3

A2B8A3

HYNIX256MBIT

1

B2D9G7K2K8N1N9

R9R1

A1A8

C9C1

D2E9F1H2H9

N3P7P3N2P8P2R8R2T8R3L7R7N7T3T7

M2N8M3

K3

J7K7

K9J9

L2L1

E7

F3G3

K1J1

J3

D3

C7B7

L3

T4B13T4B6

1

1

TEETEE1

0

DDR_A<15..0>7D4<

6D4<4C3>

7D8<

7B8< 7B4<6B8< 6B4<

T4B22T4B21T4B19T4B2T4B10T4B7T4C41T4C25T4C38T4B1

1

1

1

1

1

TEETEE

TEE

TEE

TEE

345

1

1

1

1

1

TEETEETEETEETEE

T4B26T4B12T4B4

T4C30T4C36T4B25

T4C34T4C44

1

1

1

1

TEETEETEE

TEETEE 1

1

1

1

TEE

TEETEE

2

67891011121314

012

DDR_RAS_LDDR_CAS_L

TEEDDR_WE_L T4B81

T4B20T4B23

T4B30T4B31

T4B28T4B14

1

1

TEETEE

1

1

1

1

TEETEE

TEETEE


DDR_DQS2P

DDR0_CLKNDDR0_CLKP


DDR_DM2

DDR0_ODT1

DDR0_CKE0DDR0_CKE1

DDR0_ODT0

DDR_DM0

DDR_A0<5..3>

DDR_BA<2..0>

4C3>4B3>

6C4<6C4<

4B3>

7C8<4C3>

7C4<7C4<

6D4< 4C3>

7C4< 6C4<

7C8<7C8<7C8< 7C4< 6C4< 4C3>

4B7<>4B7<>4B7<>

4D1>4D1>

4B7<>

6C4<6C4<

4B7>4B7>

4A4>

4B4>

4B4>4B4>

4B4>

6C4<6C4<

6B4<6B4<

6B4<

DDR_RESET_L6B4< 4A4>

6B8<

7B4< 6D8<7B8<

0402_R

R4B42

1%1K

1

16VX5R

10%

0.1UF

0201_R

C8B5

D1B9B1

D8E2E8F9G1G9

J8

M9M1

P1P9T1T9

I366

10.1UFC7B91

20201_R

2 10%

X5R16V

0.1UF

0201_R

C7B1110.1UF

1 C8B6

16VX5R

10%216VX5R

10%

0201_R

2

1111

16VX5R

10%

0.1UF

0201_R

C7B12

2

0.1UF

0201_R

C4B2

2 10%

X5R16V

0.1UF

0201_R

C7C6

10%

X5R16V2

0.1UF

16VX5R

10%

0201_R

C7C3

2

M7Z3Z4Z1Z2

T2

M8H1

A9B3E1G8J2

L8L9

T4C24

T4B17

1TEE

1TEE


SNN_U27U1_Z2SNN_U27U1_Z1


R7B1

15

20.5%

2400201_R

1

R7B22

0.5%240

C8B44.7UF

1

6.3VX5R20%

0402_R

2

C7B60.1UF

1

0201_R

10%

X5R16V2

0201_R

0.1UF

0201_R

DDR_A<15..0>

VREF_DDR0

1

C7B5

C7B130.1UF

0201_R

16VX5R

10%

1

2

4B3>6B4<

C7B81

0201_R

0.1UF

16VX5R

10%2

7D4<4C3>6D8<

7D8<

7B4<6B4<

7B4<7B8<

6B5>

7B8<6D4<

14.7UFC7B71

2 16VX5R

10%

0402_RX5R20%6.3V2

+1.35V_LP0

33B2>

32D8<

32B8<

7A8<

5B3<5A8<

C7C511C3B11C4B31

6.3V0402_R

4.7UF

20%X5R

216V10%

0.1UF

0201_R

C4B1

X5R

216VX5R

0.1UF

10%

0201_R

2

4.7UF0402_RX5R20%6.3V2

TOP

BYTE 3

BYTE 1

CHANNEL 0RANK 0

A15 USED FOR FUTURE DUAL DIE CONFIG...

BOTTOM

BYTE 2

BYTE 0

MEM_0A VDD

MEM_0B VDDMEM_0B VDDQ

MEM_0A VDDQ

BI

IN

IN

IN

INININ

IN

IN

IN

INININ

ININ

ININ

ININ

ININ

FOOTPRINTDDP

DQ4

DQ0DQ1DQ2DQ3

DQ7

DQ11DQ12

DQ8

DQ5DQ6

DQ9DQ10

DQ13DQ14DQ15

VDD0

VDD3VDD4

VDD2VDD1

VDD5

VDDQ2VDDQ1VDDQ0

VDDQ3

VDD6VDD7VDD8

VDDQ4

VSSQ1

VDDQ8

VDDQ6VDDQ7

VDDQ5

VSSQ0

VSSQ2VSSQ3

VSSQ5VSSQ4

VSS5VSS6

VSSQ7VSSQ8

VSSQ6

VSS7VSS8

VSS11VSS10VSS9

A1A0

A2

A6

A3

A5A4

A10/AP

A14/NC

A12/BC_LA13

A11

BA0

A9

A7A8

BA1BA2

RAS_L

WE_L

CK_L

CAS_L

CK

LDQS

UDMLDM

CKE1CKE0

UDQS_LUDQSLDQS_L

RESET_L

VREFCA

ODT1ODT0

CS1_LCS0_L

VREFDQ

NC8NC7NC6

ZQ0

VSS0

ZQ1

NC4/A15NC5

VSS1

VSS4VSS3VSS2

IN

IN

BI

IN

IN

IN

IN

ININ

ININ

ININININ

ININ

ININ

ININ

IN

OUT

FOOTPRINTDDP

DQ4

DQ0DQ1DQ2DQ3

DQ7

DQ11DQ12

DQ8

DQ5DQ6

DQ9DQ10

DQ13DQ14DQ15

VDD0

VDD3VDD4

VDD2VDD1

VDD5

VDDQ2VDDQ1VDDQ0

VDDQ3

VDD6VDD7VDD8

VDDQ4

VSSQ1

VDDQ8

VDDQ6VDDQ7

VDDQ5

VSSQ0

VSSQ2VSSQ3

VSSQ5VSSQ4

VSS5VSS6

VSSQ7VSSQ8

VSSQ6

VSS7VSS8

VSS11VSS10VSS9

A1A0

A2

A6

A3

A5A4

A10/AP

A14/NC

A12/BC_LA13

A11

BA0

A9

A7A8

BA1BA2

RAS_L

WE_L

CK_L

CAS_L

CK

LDQS

UDMLDM

CKE1CKE0

UDQS_LUDQSLDQS_L

RESET_L

VREFCA

ODT1ODT0

CS1_LCS0_L

VREFDQ

NC8NC7NC6

ZQ0

VSS0

ZQ1

NC4/A15NC5

VSS1

VSS4VSS3VSS2

ININ

IN

IN

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

7D5<>

6D4<>

6D1<>

5C7<>4D8<>DDR_DQ<63..0>

4345414740

4244

46

E3F7F2F8H3H8G2H7

4

1.35V

256MBIT1866

DDR3_X16

HYNIX

BGA100_2U7C1

N3P7

R8P2P8N2P3

R2

R7L7R3T8

01

345

2

6

87

91011

7D1<>

DDR_A<15..0>

DDR_A1<5..3>6D4<>

4C3>

6D1<>

4B3>

5C7<>

5862616056596357

D7C3C8C2A7A2B8A3

B2D9G7K2K8N1N9R1R9

A1A8C1C9D2E9F1H2H9

B1B9D1D8E2E8F9G1

74.04602-7R375-0000-D00

J8M1M9P1P9T1T9

G9

DDR3 X16 PAGE 2

N7T3T7

M2N8

J3K3

M3

L3

K7J7

F3G3C7B7

121314

012

E7

K9J9

D3

K1

L1L2

J1T2

H1M8

M7Z3

L8L9DDR_ZQ1_U28U2

SNN_U28U2_Z3

0.5%

DDR_ZQ0_U28U2

2

R7C4

2400201_R

15

21

2400.5%

DDR_RESET_L

R7C3

DDR_RAS_LDDR_CAS_LDDR_WE_L

DDR_DQS7NDDR_DQS7PDDR_DQS5NDDR_DQS5P

DDR1_CLKNDDR1_CLKP

DDR_BA<2..0>

4C3>4B3>

4C3>

5A7<>5A7<>5A7<>

4C1>4C1>

5A7<>

4C3>

DDR_DM55A7>

DDR1_CKE0

DDR1_ODT0

DDR1_CS1_L

DDR1_CKE1

DDR1_CS0_L

DDR_DM7

DDR1_ODT1

10201_R

0201_RX5R

10%

C4C20.1UF

16V

1

2

0.1UF

VREF_DDR1

4A4>

4A4>

4A4>

4A4>

4B4>

5A7>

4B4>

16V

C4C5

0201_RX5R

10%

1

2

4B3>

7B8<

A9

Z2Z1Z4

B3E1G8J2

I58

SNN_U28U2_Z2


DDR_A<15..0>7D4<4C3>

Thu Jul 23 14:36:56 2015

7D8<6B4<

6B4<

7D8<

6C4<

4D8<>

7C8<

7B8<7B8<6B4<

7B8<

7C8<

7B8<

7C8<7C8<

6C4<

6C4<6C4<

6D4< 6B8<

DDR_DQ<63..0>

6D8<7B8< 7B4<7D8<

3332

34

35

3837

39

36

E3F7F2F8H3H8G2H7

3

256MBIT18661.35V

DDR3_X16

HYNIX

BGA100_2U4C1

T4C27 N3

P2P8N2P3P7

L7R3T8R2R8

T4C23T4C45T4C48T4C32T4C40T4C21T4C19T4B3T4B29T4B15

1

1

1

1

1

1

1

1

1

1

1

TEE0TEETEETEE

TEE

TEE5

34

21

TEETEETEE

TEETEE7

6

8

109

DDR_A<15..0>

DDR_A1<5..3>

7D4< 7B8<

7B4<4C3>6B4<6B8<6D4<

6D8<

4B3>7D4<

6C8<7C8<6C8<7C8<

6C8<7C8<

6C8<7C8<

6B8<7B8<

1%1K

0402_R

0402_R

1K1%

R7C5

R4C1

48

5049

5152

5453

55

D7C3C8C2A7A2B8A3

B2D9G7K2K8N1N9R1R9

2

1

A1A8C1C9D2E9F1H2H9

2

B1B9D1D8E2E8F9

6D8< 6D4< 6B8<7B8<

0.1UF

0201_R

0201_R

0.1UF

C4C7

C7C8

1

J8M1M9P1P9T1T9

G1G9

1C4C81C4C41C4C31

X5R

2 16V10%

0.1UF

0201_RX5R16V10%2

1

2X5R

10%16V

0201_R

0.1UFC7C9

16V10%

X5R

1

2

0.1UF

0.1UF

X5R

10%

0201_R

16V2

0.1UF

0201_RX5R

2 16V10%

0201_R

10%

X5R

C7C1

16V

1

2

0.1UFC8C46

0201_R

1

2X5R

10%16V

I164

R7N7T3T7

J3

M3N8M2

T4C22T4C28T4C39T4C20

T4B16T4B5T4C42

T4B11K3

J7K7

L3

F3G3C7B7

T4B27T4C29

1

1

1

1

1

1

1

1

1

1

TEETEETEETEE

11121314

0 TEETEETEE

TEE

12

TEETEE

K9

E7D3

J9

L1L2

T4C35T4C26

T4C47T4C49

T4C46 K1

H1M8

T2J1

L9L8

M7

T4C37T4B9

TEE1


1

1

1

1

1

1

1

T4C33

TEETEE

TEETEE

TEETEETEE

20.5%

R7C1

2400201_R

15

10.5%

2

240

R7C2

0201_R

DDR_BA<2..0>

DDR_RESET_LDDR1_ODT1

VREF_DDR1


DDR1_CLKPDDR1_CLKN

DDR_DQS4P

DDR_DM4DDR_DM6

DDR1_ODT0


DDR1_CKE1DDR1_CKE0

DDR_WE_LDDR_CAS_LDDR_RAS_L

1

4C3>

4C1>4C1>

4C3>4B3>

5B7<>5B7<>5A7<>

7C4<7C4<

5A7<>

6C4<6C4<6C4<6C8<7C4<

4C3>6C4<6C8<7C4<

6C8<7C4<6C8<7C4<

5A7>

4A4>

5A7>

4A4>

4A4>4B4>

4A4>

0201_R

0.1UF1 C7C4

10%2X5R16V

4B4>4B3>

0.1UF

0201_R

C7C21

16V10%

X5R

2

6B4<7B4<7B4<

7B4<7B4<

7C4<7C4<

6B8<

7B4>

7B4<

Z3Z4Z1Z2

A9B3E1G8J2



C4C11C3C21

0402_R

4.7UF

X5R

20%6.3V2

6.3VX5R0402_R

20%

4.7UFC7C121

2

0201_R

16V10%

X5R

0.1UF

2

10%

0201_R

16V

C7C100.1UF

X5R

2

1

16V

0201_R

10%

X5R

0.1UF

X5R

0.1UF

10%

0201_R

16V

DDR_A<15..0>

C3C1

C7C11

+1.35V_LP0

7D4<

6D8<

6B8<4C3>

7D8<

7B4<

6D4<6B4<

33B2>6A8<5A8<

32D8<

32B8<5B3<

1C4C61

26.3V

0402_R

4.7UF

X5R

20%2

2

14.7UF

0402_R

6.3V

C7C7

20%

X5R

1

2

BYTE 5

BYTE 7

CHANNEL 1

RANK 0

BYTE 4

BYTE 6

MEM_1A VDD

MEM_1B VDD

MEM_1A VDDQ

MEM_1B VDDQ

BI

IN

IN

IN

IN

ININ

ININ

ININININ

ININ

ININ

ININ

INININ

FOOTPRINTDDP

DQ4

DQ0DQ1DQ2DQ3

DQ7

DQ11DQ12

DQ8

DQ5DQ6

DQ9DQ10

DQ13DQ14DQ15

VDD0

VDD3VDD4

VDD2VDD1

VDD5

VDDQ2VDDQ1VDDQ0

VDDQ3

VDD6VDD7VDD8

VDDQ4

VSSQ1

VDDQ8

VDDQ6VDDQ7

VDDQ5

VSSQ0

VSSQ2VSSQ3

VSSQ5VSSQ4

VSS5VSS6

VSSQ7VSSQ8

VSSQ6

VSS7VSS8

VSS11VSS10VSS9

A1A0

A2

A6

A3

A5A4

A10/AP

A14/NC

A12/BC_LA13

A11

BA0

A9

A7A8

BA1BA2

RAS_L

WE_L

CK_L

CAS_L

CK

LDQS

UDMLDM

CKE1CKE0

UDQS_LUDQSLDQS_L

RESET_L

VREFCA

ODT1ODT0

CS1_LCS0_L

VREFDQ

NC8NC7NC6

ZQ0

VSS0

ZQ1

NC4/A15NC5

VSS1

VSS4VSS3VSS2

IN

BI

IN

IN

OUT

IN

IN

ININ

IN

INININ

IN

IN

IN

ININ

IN

ININ

INININ

IN

FOOTPRINTDDP

DQ4

DQ0DQ1DQ2DQ3

DQ7

DQ11DQ12

DQ8

DQ5DQ6

DQ9DQ10

DQ13DQ14DQ15

VDD0

VDD3VDD4

VDD2VDD1

VDD5

VDDQ2VDDQ1VDDQ0

VDDQ3

VDD6VDD7VDD8

VDDQ4

VSSQ1

VDDQ8

VDDQ6VDDQ7

VDDQ5

VSSQ0

VSSQ2VSSQ3

VSSQ5VSSQ4

VSS5VSS6

VSSQ7VSSQ8

VSSQ6

VSS7VSS8

VSS11VSS10VSS9

A1A0

A2

A6

A3

A5A4

A10/AP

A14/NC

A12/BC_LA13

A11

BA0

A9

A7A8

BA1BA2

RAS_L

WE_L

CK_L

CAS_L

CK

LDQS

UDMLDM

CKE1CKE0

UDQS_LUDQSLDQS_L

RESET_L

VREFCA

ODT1ODT0

CS1_LCS0_L

VREFDQ

NC8NC7NC6

ZQ0

VSS0

ZQ1

NC4/A15NC5

VSS1

VSS4VSS3VSS2

IN

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+1.8V_VDDIO

+1.8V_VDDIO25B7<10D2<

26A2<18D2<

33A2> 32D4<22C7< 22B6< 21D2< 20D2<

EMPTYR3C52

100K

31C6<31C6<>

26A7<

33C7<33C7<

26A3<>

0201_R1%

1

100KR8C3

EMPTY0201_R1%

+1.8V_VDDIO

22D2<23A2<24A2<

R3C3100K

2

+1.8V_VDDIO

20%6.3V

0402_RX5R

0402_R

C8C471

C8B2012

4.7UF

2X5R4.7UF

21C7>

24A3>25A7>

24A5>20%6.3V

0201_R1

0201_R

10%16VX5R

C8C33

C8B2412

0.1UF

2

0.1UF X5R

10%16V

SNN_KB_COL6JD_MIC_T124_L

SNN_KB_COL1

BD_ID_STRAP0SDMMC3_WP_L

KB_COL0_AP

SNN_KB_COL7

SNN_KB_COL2

V23L10

AD29AA27

AC28

AD31AF28

AD30

AA25

AD28

0201_R1%

1

R3B62R3B72

26B7>26B4<

21B7>26C3<

20B7<

22C7<>

30B4<

27C4<31C2>

24A3>

22C7<>

1K1K32B5>0201_R1%

1

2

1%0201_R

1

1

31B2>23D7<

31B1>

22A5<

31B5>

31B7>

+1.05V_LP0_VDD_RTC

PWR_I2C_SCL

CPU_PWR_REQCORE_PWR_REQ

PWR_I2C_SDA

HEAD_DET_T124_LLCD_TESNN_GPU_PWR_REQ

SNN_SYS_CLK_REQAUDIO_LDO_EN

FAN_PWMIGPU_PWRGDSNN_NFC_PROGSNN_DGPU_PWRGDSNN_KB_ROW12

BD_ID_STRAP1

SNN_KB_ROW11BR_UART1_RXDBR_UART1_TXDSNN_KB_ROW8

EN_VDD_SD

LID_CLOSED_L

TP_AP_WP_L

Y30AB31Y31

AC31AF30

AA28AA29

W31

Y29

Y26

AA31

AA26Y25

AC30AF29Y27

AC29

V28

AB12

0201_RX5R16V10%

1

0.1UF

CLK_32KHZ_PMU

SYS_RESET_L

TP_RESET_OUT_L

PMU_INT_L

CPU_OC_INT

2C9B19

J4

H3

V25Y28

J3

AA30

J6

V30

Y24

84.04602-7R375-0000-D00

TK1: SDMMC/ULPI/JTAG/KB

22C7>

22C7<22C7>

22C7>

22C7>

+1.8V_VDDIO

1700MA

22A4>

22A4>

22A4>22A4<

22C7<

22A4<

R8B1410K1%

2R8B1

18A7<18A7>

32A4>

R8B2321

1%10K

2

1%0201_R10K

5%

2

0

EMPTY

10402_R

302FB

0201_R

L8B1

10201_R

1

12PFC8B3

25%2M

1

0402_R

2 5%50VC0G

+1.8V_LP0_AVDD_OSC_AP_F

R8B20

0201_RX5R

1

0.1UF

C8B272

16V

10201_R

10%

+1.8V_RUN_VPP_FUSE

THERMD_NTHERMD_P

SNN_OWR

TEST_MODE_EN

JTAG_TCK

JTAG_TMS

JTAG_TDIJTAG_TDO

JTAG_TRST_L

JTAG_RTCK

R10

AA7

U28U29

H7

H6

J5

H5J1

H4

J2

R8B8

10201_R

Y8B11

4

12.000MHZ

SMD4P_R

10PF50PPM

2

3

12PFC8B21

0402_R

5%

C0G

2 50V

XTAL_OUTXTAL_IN

1 C8B9

6.3V

4.7UF

X5R0402_R

2 20%

D1E3E4

Thu Jul 23 14:36:56 2015

1

TK1-MID

U3C1BGA

0201_R

C9C30.1UF

1

X5R16V10%2

AC14

AF15AH15

AH17

AJ15

AK18

AJ18

AD17

C9C6

6.3V

0402_R

4.7UF

X5R

2

1

20%

+1.8V_VDDIO

AL17

AK17AL18AG15AL16

AF17AE17AE15AJ17

AD15AG17

P9

L2016V

0201_R

10%

X5R

1

0.1UF

C8B252

0402_R1

6.3VX5R

20%

1 L3L1

L7J8

L8L5

L6J7

23

L4

E1

K1

H20

SDMMC1_COMP_PD

SNN_WF_RST_L

SDMMC1_COMP_PU2

R8B18

11%

EMPTY33.2

0201_R1

SNN_SDMMC1_DAT<3..0>

0201_R

C8B7

C8B15

TS_SPI_CS_L

SNN_DGPU_VDD_EN

EN_VDD_BLSNN_DGPU_3P3_EN

SNN_DAP3_SCLK

PEX_MINI_PRSNT_L

SNN_ULPI_DATA6SNN_ULPI_DATA7

TS_SPI_MOSITS_SPI_MISOTS_SPI_SCK

GPIO_PV0GPIO_PV1

TP_ULPI_DATA1

SNN_ULPI_DATA5SNN_ULPI_DATA4PEX_GIGE_PRSNT_LTP_ULPI_DATA2

5%

2

0

5%0

2R9C1

R9B12

0402_R

1

10402_R

4.7UF

2

1%

2

10K

R2B9

26D6>

26D3<

26D3>26D3<26D6>

0402_R

11%

2

10K0402_R

R2C11

1%

2

33.2

R8B221

0201_R

EMPTY

210402_R

+VDDIO_SDMMC3C8B8

SNN_CAMERA_SHUTTERSNN_SDMMC1_CMDSNN_SDMMC1_CLK

2

TS_CLK

+1.8V_VDDIO

+1.8V_VDDIO

8A8<

26D6<

32C5>

0.1UF X5R4.7UF X5R

I249

H1F1G1F5F2V24

E5E2

F4F3

21

3

F31

F29F30E28

0201_R1

16VX5R

10%

C8C44

012

0.1UF

2

SDMMC3_COMP_PD

SDMMC3_COMP_PU

SDMMC3_CLK_LB_INSDMMC3_CLK_LB_OUT

1

R8B15

16V10%

21%

1

1%0201_R33.2

0402_R1X5R6.3V20%

3 H31

E29E30D31

F28G31E31

H30H29

4567

SDMMC4_CLKSDMMC4_CMD

SDMMC4_COMP_PUSDMMC4_COMP_PD1

R8C4

21%0201_R

49.9

SDMMC4_DAT<7..0>

33.2

C8C45

R8B13

23D7<23D7<>

20201_R

6.3V20%

24MILISO3A1

1

4.7UF

2

+VDDIO_SDMMC3

SDMMC3_DAT<3..0>

+1.8V_VDDIO

SDMMC3_CLKSDMMC3_CMDSDMMC3_CD_L

23C7<>

1%

1

49.9

R8C62

0201_R

+1.8V_VDDIO

8B8<

25B7<>

25A7>25B7<>25B7<

32C5>

A TRUE PWM, ONLY ON/OFFNOTE: KB_ROW16 IS NOT

LAYOUT: MATCH SDMMC3_CLK

IN

BIOUT

OUTOUT

IN

ININ

IN

OUT

OUT

OUTIN

OUTIN

OUTIN

IN

IN

IN

IN

IN

IN

IN

ININ

OUTININ

ININ

IN

- GND -

OUTINOUTOUT

OUT

OUT

IN

(1.8V)

(0.9-1.1V)

(1.8V)

(1.8V)

SEC 1 OF 8

(1.8V)

(1.8V)

(1.8V-3.3V)

(1.8V)

VDDIO_SYSVDDIO_SYS_2

KB_COL6KB_COL5

KB_COL1

KB_COL3KB_COL4

KB_COL0

KB_COL2

KB_COL7

KB_ROW6KB_ROW5

KB_ROW3KB_ROW2

KB_ROW8

KB_ROW0

KB_ROW4

KB_ROW1

KB_ROW7

KB_ROW9

KB_ROW16KB_ROW15KB_ROW14KB_ROW13KB_ROW12

KB_ROW17

KB_ROW11KB_ROW10

CORE_PWR_REQ

PWR_I2C_SDA

CPU_PWR_REQ

VDD_RTC

PWR_I2C_SCL

CLK_32K_IN

PWR_INT_N

CLK_32K_OUT

SYS_RESET_N

VPP_FUSE

RESET_OUT_N

OWR

THERM_DPTHERM_DN

TEST_MODE_EN

JTAG_TCK

JTAG_TMS

JTAG_TDIJTAG_TDO

JTAG_TRST_N

JTAG_RTCK

XTAL_OUTXTAL_IN

AVDD_OSC

SDMMC3_CLK_LB_INSDMMC3_CLK_LB_OUT

VDDIO_BB

ULPI_DATA0

ULPI_DATA2

ULPI_DATA5

ULPI_DATA3

ULPI_DATA1

ULPI_DATA4

ULPI_STP

DAP3_DINDAP3_DOUTDAP3_FSDAP3_SCLK

ULPI_DATA6ULPI_DATA7

ULPI_CLKULPI_DIRULPI_NXT

GPIO_PV0GPIO_PV1

VDDIO_SDMMC1

SDMMC1_DAT0

SDMMC1_WP_N

SDMMC1_DAT1

SDMMC1_CMD

SDMMC1_DAT3SDMMC1_CLK

SDMMC1_DAT2

SDMMC1_COMP_PD

CLK2_OUT

VDDIO_SDMMC3

SDMMC1_COMP_PU

CLK2_REQ

SDMMC3_COMP_PD

VDDIO_SDMMC4

SDMMC4_DAT0SDMMC4_DAT1

SDMMC3_COMP_PU

SDMMC3_CD_NSDMMC3_CMDSDMMC3_CLK

SDMMC3_DAT3SDMMC3_DAT2SDMMC3_DAT1SDMMC3_DAT0

SDMMC4_DAT2SDMMC4_DAT3

SDMMC4_DAT7SDMMC4_CLK

SDMMC4_CMD

SDMMC4_COMP_PUSDMMC4_COMP_PD

SDMMC4_DAT4SDMMC4_DAT5SDMMC4_DAT6

OUTOUT

BI

BIOUTOUT

IN

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

13A8<

13A8<

10A7<>33A2>19B8<

14D2<

14C8<

14C1<

9C1<

9D2<

19B8<14D2<

EN_VDD_HDMI

+1.05V_RUN

14C8<14C1<9D1<

2

2

05%

05%

EMPTY

R2A9

R2A101

1

0402_R

0402_R

EN_AVDD_HDMI

+1.05V_RUN

+3.3V_RUNSI2305CDSS23_R

Q9A2

31

2

2

S23_R

DMN2005KQ9A4

R2A6

1

3

2

1

32C4>26B4<

10C3<>

10A7<>9D1<

14D1<9D8<

33A2>

32D5>14C7<

+1.2V_GEN_AVDD

GPIO_PH7

EN_VDD_HDMI

14C1<

2R2A12

1

05%

EMPTY

0402_REMPTY

5%

2

05%

00402_R

R2A71

0402_R

5%

2

0

R2A111

0402_R

9C4<5D2<

X5R6.3V

0402_R1

20%

4.7UF

C9B92

1.05V_RUN_AVDD_HDMI_PLL_AP_EN_L

3.3V_RUN_AVDD_HDMI_AP_EN_L

+1.05V_RUN_AVDD_HDMI_PLL_AP

EN_AVDD_HDMI_PLL

+1.05V_RUN_AVDD

5%0402_R

1MR2A5

5%1M

0402_R

R2A82

1

05%

20402_R

R2A41

C8B2212

EMPTY

0402_R

6.3V4.7UF X5R

20%

1

+1.05V_RUN_AVDD_HDMI_PLL_AP_GATE

+3.3V_AVDD_HDMI_AP_GATED

C9B3

C8B2612

2

10%16V

0201_RX5R0.1UF

1C9B2

2

2

1

SI2329DS

2

S23_R

Q9A1

31

DMN2005K

S23_R

Q9A3

1

3

2

13D8<13D8<

0402_RX5R6.3V20%

EMPTY

R9B82

1%1K

0201_RX5R16V

1

10%

0.1UF

C9B12

26C6<

26C3<26D3<

26C6<

26C3<26C3<26C6<26C6<

+3.3V_RUN

14C1<

FB

L9B12

32D5>9C2<

14C7<5D2<

0402_R

301

LVDS_TXD2_NLVDS_TXD2_PLVDS_TXD3_N

LVDS_TXD0_P

LVDS_TXD3_P

LVDS_TXD0_N

LVDS_TXD1_PLVDS_TXD1_N

LVDS_TXD4_N

HDMI_TXD_N<2..0>HDMI_TXD_P<2..0>

2.2UF

0201_R

1700MA

0402_R

1

13C7<>

13B7<>

16VX5R

10%

0201_R

13C8<

13D5>

13C8<

13B7<

0.1UF

HDMI_DDC_SCLHDMI_DDC_SDA

0

1

2

0

1

2

HDMI_TXC_N

HDMI_CECHDMI_INTHDMI_RSETSNN_HDMI_PROBE

HDMI_TXC_P

0402_R1X5R

20%6.3V

C9B6

4.7UF

C9B52

12

20%6.3VX5R4.7UF

+AVDD_LVDS0_PLL_AP_F

+1.05V_RUN_AVDD

0201_R

1

C9B4

0201_R

16V10%

X5R0.1UF

C9B72

12

10%16VX5R0.1UF

26C3<

9

+3.3V_LP0

+3.3V_RUN

+3.3V_RUN

4.04

+3.3V_LP0

+1.8V_VDDIO_LP0_OFF

+1.8V_VDDIO_LP0_OFF

602-7R375-0000-D00

TK1: CSI/DSI/HDMI/USB

30A3>10D2<

18D2<23A2< 22D8<25D2>

26C6>

1

2

30C5> 26D6<

13D1<

30A6>

14D1<15D1<17D2<

0201_R

10V10%

X5R

.01UFC2B1

18D2<

30D1<

26C3<

32D3<+3.3V_LP0

+1.8V_VDDIO_LP0_OFF

26D6<>26D6<>

LVDS_TXD4_P

FB

L9B22

0402_R

301

10402_R R9C62

EMPTY

19D2<22D2<

C2C1

0402_RX5R16V10%

1

1UF

0402_R5%0

1

6.3VX5R

20%

217B1>

1700MA

X5R6.3V20%

0402_R

4.7UF

C9B23

R9B7

USB0_VBUS

17C8<17B8<

17C5<17C5<

15C3<>15C3<>17B7<>17B7<>

1%

2

1K0201_R

1EDP_HPD

1C9B18

4.7UF

2

21

+1.8V_RUN_AVDD_PLL_UTMIP_AP_F

0201_R

C9B20

DP_AUX_PDP_AUX_N

SNN_LVDS0_PROBE

LVDS_RSET

X5R

1C9C1

16V

2

10%

0.1UF

2

0201_R

10%

X5R16V

1K1%

2

R9C4

10201_R

0.1UF

USB_VBUS_EN0USB_VBUS_EN1

USB0_ID

USB1D_NUSB1D_P

USB2D_NUSB2D_P

USB0D_NUSB0D_P

USB_REXT

Thu Jul 23 14:36:56 2015

AA9

AL19AK20

AB15

AC5

AD1

AD3

AF1

AA10

AF6AF5

AD2

AC7

AJ3AJ2

AL4

AJ1

AC6

AL3

AC2

AC8

AC12

AG2AF3AF4

AK3

AD20AE20AG20AF20

AH20AJ20

AH1

AD4AD6AD5

AG1

AL20

AC1AB1

AG6AG5AG4AG3

AE1AF2AC3AD7

1

TK1-MID

U3C1BGA

AK14AL13AL14

AK9AL9AE9

0201_R

16VX5R

10%

1

AD9AE11

AK8

AJ9

AD14

AL15

AL8

AK11

AE14

AG9AF9AH8AJ8

AH9

AL11

AK15

AD11

AG14

AF12AG12

AK12AL12

AF14

AH14AJ14

AJ11AH11

AE12AD12

AG11AF11AL10

AJ12AH12

0.1UF

C9B21

2

TP_CSI_DSI_TEST_OUT

SNN_DSI_B_D1_PSNN_DSI_B_D1_N

SNN_DSI_A_CLK_P

SNN_DSI_A_D0_P


SNN_DSI_A_D3_P

DSI_CSI_RUP

SNN_DSI_A_D1_PSNN_DSI_A_D2_NSNN_DSI_A_D2_P

DSI_CSI_RDN

SNN_DSI_B_CLK_P

SNN_DSI_A_D3_N

SNN_DSI_B_D2_N

SNN_DSI_A_CLK_N

SNN_DSI_A_D0_N

SNN_DSI_A_D1_N

SNN_DSI_B_D3_PSNN_DSI_B_CLK_N


6.3V

0402_R2 1

C9B17

4.7UF X5R

CSI_A_D1_N

CSI_A_D0_NCSI_A_D0_P

20%

26B7>

26B7>26B7>

+1.2V_GEN_AVDD9C1<32C4>

26B4<14D1<

CSI_A_D1_P

CSI_E_D0_NCSI_E_D0_P

CSI_B_D0_PCSI_B_D1_N

CSI_B_D0_N

CSI_A_CLK_PCSI_A_CLK_N

CSI_E_CLK_NCSI_E_CLK_P

CSI_B_D1_P

26B7>

26A7>

26B7<26B7<

26B7>26B7>

26B4<

26B7>

26B4>26B7>

26B4<

C9B141

0201_R

2

1

453

R9B13

1%

2

0201_R

1

49.9

R9B11

1%

2

AC15

AL5

AG8

AH6AK6AK5AL7

AF8

AJ5

AJ6

AC11

AH5AL6

0201_RX5R

10%

1

16V0.1UF

C9B13

2

C9C5

12

I279

AF18AE18AH18

AG18AD18

10%16VX5R0201_R

0.1UF

SNN_HSIC2_STROBE

SNN_HSIC2_DATA

HSIC_REXTHSIC1_STROBE_R2

1%

HSIC1_DATA_R

0402_R

1K

+1.2V_GEN_AVDD

CAM2_PWDNCAM1_PWDN

CAM1_GPIO

CAM1_AF_PWDN

CAM_RST_LCAM_FLASH

CAM1_MCLK

CAM2_GPIOCAM2_MCLK

6.3V

0402_RX5R

20%

4.7UF

C9B1512

+1.8V_RUN_CAM

CAM_I2C_SCLCAM_I2C_SDA

26B7<26A7<

26A7<

26B4<26A7<

26A7<

26A7<>26B3<>26B4<

R9B92

1K1%0201_R

1

6.3V4.7UF X5R

20%

1

R9C50201_R

0

5%

5%

2

2

0201_R

R9C2

R9C3

1

1

00201_R

HSIC1_DATA

HSIC1_STROBE

1

2R9B101K1%

0201_R

26B4<

32C5>26B4<

26B7<>

26B3<>

26B4<

P-MOSFET TO POWER GATE AVDD_HDMI_PLL

VGTH(MAX)=0.9V

VGTH(MAX)=0.9V

3.3V FOR DP MODE

P-MOSFET TO PREVENT BACKDRIVE ON AVDD_HDMI

EXTERNAL DEBUG PORT MICRO AB

EXTERNAL TYPE A, SUPER SPEED PAIRED

USAGE

USB 2.0 PORTS

MINI PCIE

PLACE NEAR TEGRACAD NOTE:

PORT

0

21

IN

IN

DS

G

D

S

G

IN

IN

IN

IN

IN

SD

G

D

S

G

OUTOUT

OUTOUTOUT

OUTOUT

OUT

OUTOUT

BI

OUTOUT

IN

OUT

IN

BI

IN

IN

IN

IN

OUTOUT

BIBI

BIBIBIBIBIBI

BIBI

IN

ININ

IN

ININOUTOUT

ININININ

OUTOUTININ

(3.3V)

(1.05V-1.2V)

(1.05V)

(1.05V)

(1.8V)

(3.3V)

(1.8V)

SEC 2 OF 8(1.2V)

(1.8V)

(1.2V)

AVDD_HDMIAVDD_HDMI

HDMI_CECHDMI_INTHDMI_RSET

HDMI_PROBE

HDMI_TXD0NHDMI_TXD0PHDMI_TXD1N

AVDD_HDMI_PLL

HDMI_TXD2N

HDMI_TXCNHDMI_TXCP

HDMI_TXD2P

HDMI_TXD1P

DDC_SCL

LVDS0_TXD1NLVDS0_TXD1PLVDS0_TXD2NLVDS0_TXD2PLVDS0_TXD3N

DDC_SDA

AVDD_LVDS0_IO

AVDD_PLL_UD2DPD

LVDS0_TXD0N

AVDD_LVDS0_PLL

LVDS0_TXD0P

LVDS0_RSET

LVDS0_TXD4PLVDS0_TXD4NLVDS0_TXD3P

AVDD_USB

DP_HPD

LVDS0_PROBE

DP_AUX_CH0_PDP_AUX_CH0_N

AVDD_PLL_UTMIP

USB_VBUS_EN0USB_VBUS_EN1

USB0_VBUS

USB0_DPUSB0_DN

USB1_DNUSB1_DPUSB2_DNUSB2_DP

USB0_IDUSB_REXT

CSI_DSI_TEST_OUT

AVDD_DSI_CSI 1AVDD_DSI_CSI 2AVDD_DSI_CSI 3

CSI_A_D0_N

CSI_A_CLK_P

DSI_A_D0_P

CSI_B_D1_P

CSI_E_CLK_NCSI_E_CLK_PCSI_E_D0_NCSI_E_D0_P

DSI_A_D1_P

DSI_A_D0_N

CSI_B_D0_P

DSI_A_D1_N

CSI_B_D1_N

CSI_B_D0_N

CSI_A_CLK_NCSI_A_D1_PCSI_A_D1_NCSI_A_D0_P

DSI_A_D2_N

DSI_B_D0_NDSI_B_D0_P

CSI_DSI_RUPCSI_DSI_RDN

DSI_B_D1_PDSI_B_D1_N

DSI_B_CLK_PDSI_B_CLK_N

DSI_A_CLK_NDSI_A_CLK_P

DSI_A_D2_P

DSI_A_D3_PDSI_A_D3_N

DSI_B_D2_NDSI_B_D2_P

DSI_B_D3_PDSI_B_D3_N

GPIO_PBB6GPIO_PBB5

VDDIO_CAM

GPIO_PCC1

GPIO_PBB7

CAM_I2C_SCL

GPIO_PCC2GPIO_PBB0GPIO_PBB3GPIO_PBB4

CAM_I2C_SDA

CAM_MCLK

VDDIO_HSIC

HSIC2_STROBEHSIC2_DATA

HSIC_REXT

HSIC1_DATAHSIC_STROBE

OUT

OUTOUT

OUTOUTOUT

OUT

BIBI

IN

OUTBI

OUT

OUT

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+1.8V_VDDIO

+3.3V_LP0

+1.8V_VDDIO

+3.3V_LP09A2<

8D1<

26D6<>26D6<

+1.8V_VDDIO

EMPTY

0201_R

R9B61K

2R9B41K

2

1%

1

EMPTY

0201_R1%

1

33A2>

22D2<18D2<

19D2<13D1<

+3.3V_LP0

24A2< 23A2<21D2< 20D2<

30A3> 22D2<15D1< 14D1<

25B7<22B6<

17D2<18D2<

+1.8V_VDDIO

0402_R

6.3VX5R

1

20%

26A2<22C7<

32D4<

22D7<22D7<

0402_R1X5R6.3V20%

18B8>

24D1>

18B8>

4.7UF

4.7UF

C8B12

C9B242

2

0201_RX5R16V10%

0201_R

10%

X5R16V

1

0.1UF

C9B222

1

0.1UF

C8B102

UART4_RXDUART4_CTS_LTP_KBC_IRQ_LLCD_LR

24B2>24B2>

24D1>

24B2>

24D1>

23A4<24B2>

24D1>

23A4<23A7>

26C6<26C6<

20B7>

9C1<24C5>24D5>

23B7<

R2B81K

+3.3V_LP0

2

1KR2B6

1%0201_R

1

1%0201_R

1%

1

2

2

10K0402_R

R3B31

24C5>

18A3>

18C7<22D7>

26D3<26D3<

26D3<

+1.8V_VDDIO

22D7>24D5>18C7<

1%

2

49.9

R8B16

0201_R

1

AP_FORCE_RECOVERY_LTP_GPIO_PI2

SPI4_SCK

MODEM_SAR0LCD_UD

LCD_BL_ENLCD_BL_PWMTP_KBL_PWMSPI4_MISO

SPI4_CS3_LGPIO_PG3

SPI4_MOSI

SNN_GPIO_PH3

SPI4_CS0_LSNN_GPIO_PI4

GPIO_PI0GPIO_PH7TP_GPIO_PH6TP_GPIO_PH5CODEC_IRQ_L

SNN_GPIO_PI5

21%

EMPTYR8B17

10201_R

GEN2_I2C_SDA_3.3VGEN2_I2C_SCL_3.3V

SDMMC2_COMP_PU

SNN_GPIO_PI7

SDMMC2_COMP_PD

AC_OK_AP_L

UART4_TXD

GPIO_PK2TS_SHDN_L

TS_RESET_LTP_GPIO_PK3

UART4_RTS_L

TEMP_ALERT_L

TP_GPIO_PK0

SNN_PG_OC_L

EMPTY

104.04602-7R375-0000-D00

TK1: UART/GMI/DAP/SPI

24A3>

24A3>

15C1<

33C7<33C7<

49.9

TP_TOUCH_IRQ_L

SNN_COMPASS_DRDYSNN_GPS_IRQ_L

BD_ID_STRAP2TP_ALS_IRQ_LBD_ID_STRAP3

SNN_NFC_IRQ_LWF_EN

DVFS_PWMDVFS_CLK

Thu Jul 23 14:36:57 2015

V7

U7

W1

AA1

R29P30

P28M28

N31

R28M30P29

R6

Y2AA2

R1

V5

R2T1

R3Y1

V4

Y4U6

V1

V8

Y7V6V2U1V9U4

Y10

V10U9

J30

Y9

U5

AA6Y5U2U8R4R5

AA4U3Y6V3

Y3AA5

R31

Y8AA3

TK1-MID

1

BGAU3C1

P4

M8M1

L9

U10

X5R0201_R

10%16V

0.1UF

2 1C8B18

R7

M7

M9P8M10

P3

N1P1

R8

P5

P7

P2

M3M2

R9

CLK3_OUT_R2

05%

M4

P6M6

L28H28

M5

K31

J28

M31

L30J29

L29

P31

0201_R1

C8C41

2X5R0.1UF

DAP_MCLK1_R

16V10%

R8B12

GPIO_PU5

UART2_CTS_L

GPIO_PU1

UART2_RTS_L

GPIO_PU2GPIO_PU3GPIO_PU4

GPIO_PU6

GPIO_PU0

X5R

20%6.3V

0402_R1

C8B23

+1.8V_VDDIO

4.7UF

UART2_RXDUART2_TXD

2

26A4>

26A4>26A7<

26A7<

0201_R

1CLK3_OUT

SNN_UART3_RTS_L

SNN_UART3_TXDSNN_UART3_RXD

TP_DAP4_DOUT

SNN_UART3_CTS_L

TP_DAP4_FSTP_DAP4_SCLK

TP_DAP4_DIN

SNN_CLK3_REQ

26B3<>26B3<>26A3<>26A3<>

26B3<>

26A3<>

6.3V

0402_R

+1.8V_VDDIO

1X5R

C8C43

4.7UF

2

20%

R3C6

5%22

20201_R

1

GEN1_I2C_SDA

TP_DAP1_SCLK

DAP2_DOUTDAP2_DIN

SATA_PWR_EN_T124

TP_DAP1_FS

TP_DAP1_DINSATA_LED

GEN1_I2C_SCL

26A3<>

26A4<

20C8>

25D7<

2R8B112

+1.8V_VDDIO

R8B101K1K

1

1%0201_R

1

1%

16A5<

DAP_MCLK1

0201_R

26A3<>18A6<>

26D3<18A6<

26D3<>18D3<>

18D3<22C4< 20B7<

20B7<

20B7<>22C4<>

26A7<

20C8<

I208

AC4AA8

M29R30

DAP2_SCLK_R

SNN_EN_BAT_SMB

5%22

2

R3C4

0201_R

1

EN_VDD_HDMI

DAP2_FS20C8<>

9C1<13A8< 9D1<

DAP2_SCLK20C8<>

STRAPS

SET E_OD PAD = 1 WHEN PU VALUE DIFFERS FROM VDD SOURCE FOR GEN2 I2C

IN

IN

BIOUT

ININ

OUT

BIOUT

OUTBI

OUTOUTIN

OUTOUT

IN

BI

INOUT

OUT

IN

OUTOUT

OUT

OUTOUT

IN

IN

OUT

OUTBI

OUT

INOUTIN

BIBIBI

BI

OUT

BI

BIBI

OUT

IN

OUT

OUT

BI

OUT

(2.8V-3.3V)

(1.8V)

SEC 3 OF 8(1.8V)

(1.8V)

GPIO_PB0

VDDIO_HV

VDDIO_GMI 2VDDIO_GMI 1

GPIO_PG5GPIO_PG6

GPIO_PG3GPIO_PG4

GPIO_PG7GPIO_PH0GPIO_PH1GPIO_PH2

GPIO_PH4GPIO_PH5GPIO_PH6GPIO_PH7GPIO_PI0GPIO_PI1

GPIO_PB1GPIO_PC7GPIO_PG0GPIO_PG1GPIO_PG2

GPIO_PH3

GPIO_PI2

GPIO_PI4

GPIO_PJ0GPIO_PI7

GPIO_PJ7

GPIO_PK2GPIO_PK1

GPIO_PK4GPIO_PK3

GPIO_PK7

GPIO_PI6

GEN2_I2C_SDAGEN2_I2C_SCL

GPIO_PK0

GPIO_PJ2

GPIO_PI5

GPIO_PI3

GPIO_X5_AUD

SDMMC2_COMP_PU

GPIO_W3_AUD

SDMMC2_COMP_PD

GPIO_X1_AUDGPIO_X3_AUDGPIO_X4_AUD

GPIO_X6_AUD

GPIO_W2_AUDGPIO_X7_AUD

DVFS_CLKDVFS_PWM

UART2_TXDUART2_CTS_N

UART2_RXD

VDDIO_UART

UART3_RTS_N

UART3_TXDUART3_RXD

GPIO_PU1

CLK3_OUT

DAP4_DOUT

UART2_RTS_N

UART3_CTS_N

DAP4_FSDAP4_SCLK

DAP4_DIN

CLK3_REQ

GPIO_PU0

GPIO_PU2

GPIO_PU5

DAP1_SCLK

DAP_MCLK1

GPIO_PU3

DAP_MCLK1_REQ

DAP1_FS

GPIO_PU4

VDDIO_AUDIO

GPIO_PU6

DAP1_DINDAP1_DOUT


DAP2_FSDAP2_DOUT

SPDIF_OUTSPDIF_IN

DAP2_SCLK

DAP2_DINOUTOUT

BI

OUT

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

11D4< 34D2>

34A2>

35C2>11C8<

32B8<11D8<+VDD_CORE

+VDD_CPU_AP

+VDD_GPU_APEMPTY

2R5E7

1

EMPTY

34D2>11B1<

C8C414.7UF

0402_RX5R

20%6.3V

4.7UFC8C15

2

1

6.3V20%

X5R0402_R

2

33C3<

33C3<

33C3<

1%0402_R1K

2

EMPTYR5E8

11%

1K0402_R

33C3<

33B3<

33B3<

1%

20402_R

1K

R6E31

EMPTY

VDD_GPU_SENSE_N

VDD_CORE_SENSE_N

VDD_CPU_SENSE_N

VDD_CORE_SENSE_P

VDD_GPU_SENSE_P

VDD_CPU_SENSE_PEMPTY

1%

20402_R

1K

R5E61

EMPTY1%

2

1K0402_R

R5E91

2R6E2

1

114.04602-7R375-0000-D00

TK1: POWEREMPTY

1%1K

0402_R

Thu Jul 23 14:36:57 2015

EMPTY

EMPTY

6.3V20%

X5R0402_R

4.7UF

EMPTY

20%6.3VX5R0402_R

4.7UFC8C17

R8C5

C8C3

R8C8

R8C7

TK1-MID

U3C1BGA

+VDD_CORE

1C8C2710.1UF

2

14.7UF

10%

0201_R

16VX5R

C8B35

2

1

+VDD_GPU_AP

4.7UF

0201_RX5R

10%16V

0.1UFC9C9

C8B34

1C8C3010.1UF

2

14.7UF

0201_R

10%

X5R16V

C8C22

2

1

26.3VX5R

20%

0402_R

220%

0402_RX5R6.3V2

0402_RX5R6.3V20%2

U18

U20

U17AA23

U19

V13V14V15

V20V19V18V17V16

W16

W13W14W15

1

W17W18W19W20W21Y19

Y23Y20

U21V21

12

0201_R+0.05R0

1

12

0

0201_R+0.05R

1

+0.05R0

12

0201_R

1

VVDD_GPU_PROBE

VVDD_CPU_PROBE

VVDD_CORE_PROBE

U25U26

U27

R27R25R26

P25

P26P27

AA19AA18

AA16

AA22

AA17

AA15

AA13AA14

4.7UFC8B29

0402_R

20%6.3VX5R

K12

K15K14

K17K18

N12

K20K21M12

C9B16

6.3VX5R

20%

0402_R

4.7UF

P12

V12

T12R12

U12

W12Y12Y22

R23

L24L23

M13

M17M18

M16M15M14

2

1

+VDD_CPU_AP

16V

0201_R

0.1UF

X5R

10%

1

2

1

2

C8C29

4.7UF

20%

0402_R

6.3V

C8C2

X5R

1

2

0201_R

0.1UFC9C2

10%

X5R16V

1

2

20%

0402_R

6.3VX5R

C9B84.7UF

1

2

0402_R

4.7UFC9B12

X5R6.3V20%

1

2

0402_R

4.7UF

6.3V20%

X5R

16V10%

0201_RX5R

0.1UFC9C4

C8C24

1

210%

0201_R

0.1UF

16VX5R

C8C91

2

0201_R

0.1UFC9B101

2X5R16V10%

2

1

X5R0402_R

4.7UF

20%6.3V

C9B111

26.3V

0402_R

4.7UFC8C19

20%

X5R

1

2

1

2X5R

0201_R

10%

0.1UF

16V

C8C391

2X5R

0201_R

10%16V

0.1UFC8C261

210%

0201_R

0.1UF

16VX5R

C8C32

11B1<35C2>

1

2

M24M23

M19M20M22

N16N15

M25

N14N13

1

2

N17

N21

N18

N20N19

N22

P13P14P15

N251

2

P16

P20

P18P19

P17

P21P22

R19R18R17

C8C424.7UF

0402_R

20%

X5R6.3V

R20

L25L26

R22R21

M26L27

P23M27

EMPTY

0201_R

10%16VX5R

0.1UF

0201_R

0.1UF

EMPTY

X5R

10%16V

C8C34

C8C35

1

2

1

2

0201_R

0.1UF

10%

X5R16V

C8C231

2

EMPTY

10%

EMPTY

0.1UF

0201_RX5R16V

C8C401

2

0.1UF

0201_RX5R

10%16V

C8C37

EMPTY

1

26.3V

0402_R

20%

X5R

4.7UFC8B321

2

C8C5

0402_R

4.7UF

X5R6.3V20%

1

2

1 C8C6

0402_R

4.7UF

X5R6.3V20%2

1 C8C214.7UF

0402_RX5R

20%6.3V2

1 C8C144.7UF

6.3V

0402_RX5R

20%2

0402_R

4.7UF

6.3VX5R

20%

0201_R

0.1UF

10%16VX5R

C8C25

C8B33

11A1<34A2>

32B8<

1

2

4.7UF

20%6.3VX5R

0402_R

C8C13

C8C501

0805_R

22UF

6.3VX5R

20%2EMPTY

I120

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

SEC 7 OF 8

VDD_GPU 4

VDD_GPU 1VDD_GPU 2

VDD_GPU 5

VDD_GPU 3

VDD_GPU 10VDD_GPU 9VDD_GPU 8

VDD_GPU 6VDD_GPU 7

VDD_GPU 14VDD_GPU 15


VDD_GPU 16

VDD_GPU 19

VDD_GPU 17

VDD_GPU 20

VDD_GPU 18




VDD_GPU_SENSE

GND_GPU_SENSE

VDD_CPU_SENSE

GND_CPU_SENSE

VVDD_GPU_PROBE

VDD_CORE_SENSE

GND_CORE_SENSE

VVDD_CPU_PROBE

VVDD_CORE_PROBE

VDD_CORE 4

VDD_CORE 2VDD_CORE 1

VDD_CORE 3

VDD_CORE 5

VDD_CORE 25

VDD_CORE 9


VDD_CORE 24

VDD_CORE 12

VDD_CORE 10

VDD_CORE 8


VDD_CORE 11

VDD_CORE 21

VDD_CORE 19

VDD_CORE 17

VDD_CORE 20

VDD_CORE 18

VDD_CORE 16VDD_CORE 15VDD_CORE 14VDD_CORE 13

VDD_CPU 16VDD_CPU 17


VDD_CPU 13VDD_CPU 12VDD_CPU 11

VDD_CPU 8VDD_CPU 9VDD_CPU 10

VDD_CPU 7VDD_CPU 6

VDD_CPU 4

VDD_CPU 2

VDD_CPU 5

VDD_CPU 3

VDD_CPU 1



VDD_CPU 31


VDD_CPU 30




VDD_CPU 21


VDD_CPU 18


VDD_CPU 38

VDD_CPU 40

VDD_CPU 47

VDD_CPU 45

VDD_CPU 43

VDD_CPU 39


VDD_CPU 48

VDD_CPU 46

VDD_CPU 44

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

AH2

AH19AH16AH13AB2

AH10AH7AH4

AE30AE28AE22

AH22AH25AH28

AE19AE16

AL30

AK31AK28

B7B4

AB7

AL2

AK22AK19AK16AK13AK10

B10

B1

AK25

AB4

AH30AK1AK4AK7

B13

D28

B16

D13

G2D30

AB13D25D22D19D16

D10D7

B31AB10B28B25B22B19

D4D2

TK1-MID

U3C1BGA

1

L16L17L18

N11

AB25N28

L19

N10

N30P11R11

AB21A2

N7N4N2

T13

T17

T14T15T16

T10

R14

T18T19T20AB30T21

R13

R15R16

AB28

T11

T2

T7T4

T22

U16

W10W11W22W25AD8

V11

U14U15

U22

V22

T25T28T30U11U13

AC9

W4W2

W7

124.04602-7R375-0000-D00

TK1: GND

G7

G13

K13AB19K7

G25G24

AB16G22G19G16

G10

G4

H8

K4K2J23H24

G28G30

AE24

K22AE25

K19

K28

R24

V27

Y13W30W28

AE8

Y18Y17

Y14

P24

AK2

AB14AB11

Y15Y16

AE2AE4

L22AE23

T31

AE7

I358

AE10

AE13A30

L14

K30L13

L15

Thu Jul 23 14:36:57 2015

50MMX67MM_ELLIPTIC_12VHEATSINK

FANSINK

HS3C1

5678

I345

BRD_MOUNTBRDMNT2

M5E1

I344

1234

BRD_MOUNTM1A1

5678

I346

BRDMNT21234

M5A1M1E1

5678

I350

BRD_MOUNTBRDMNT2

1234

BRD_MOUNT

5678

I355

BRDMNT212

43

SEC 8 OF 8GND 21

GND 23GND 22

GND 24

GND 26

GND 32GND 31GND 30GND 3

GND 29GND 28GND 27

GND 25

GND 33

GND 4

GND 34GND 35GND 36GND 37GND 38GND 39

GND 40GND 41GND 42

GND 51

GND 5

GND 48

GND 44GND 43

GND 50

GND 45GND 46GND 47

GND 49

GND 52

GND 55GND 54

GND 60GND 6


GND 53

GND 61

GND 65

GND 7GND 69GND 68GND 67GND 66

GND 64GND 63GND 62

GND 70


GND 75

GND 73GND 72GND 71

GND 76

GND 74

GND 89

GND 81GND 80

GND 84


GND 82GND 83

GND 9

GND 93GND 94

GND 91GND 90

GND 92

GND 95

GND 100GND 10GND 1

GND 101

GND 108

GND 11GND 109

GND 103

GND 105GND 106GND 107

GND 104

GND 102

GND 110

GND 114



GND 119GND 12

GND 118

GND 124GND 125

GND 120


GND 121

GND 123

GND 126

GND 122

GND 13

GND 137GND 138

GND 130GND 131GND 132GND 133GND 134GND 135GND 136

GND 139

GND 147

GND 144

GND 141GND 140

GND 142

GND 14

GND 146GND 145

GND 143



GND 157GND 156


GND 162

GND 158

GND 161GND 160

GND 167GND 166

GND 164

GND 159

GND 165

GND 163

GND 16

GND 18GND 17

GND 19

GND 20GND 2

GND 98

GND 96GND 97

GND 99

MECH

65

78

12

43

65

78

12

43

65

78

12

43

65

78

12

43

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+3.3V_LP0

+5V_SYS

+3.3V_LP0

+5V_SYS32D4<33B7<

9A2<10D2<

15B7<16D2<26A2<27A2<

14D1<

34D2<

29C1>17D2<

17D2< 15D1<

35D2>

30D1< 29D2<25D2> 20D2<

18D2<

31D5<

CON_HDMI_AJ1C1

22D2< 19D2<

SMT_G_R

7

4

65

1

32

30A3>HDMI_HPD

I198

18

13

10

1211

98

17

20212223

19

141516

10PFC10B7

0402_R

1

5%50VC0G

2

134.04602-7R375-0000-D00

HDMI TYPE A CONN

C1B11

0402_R

.1UF

10%16VX7R

2

Thu Jul 23 14:36:57 2015

EMPTY

RCLAMP_0524P

330PF

C0G0402_R

+/-0.25PF

EMPTY

4.7PF

50V

EMPTY

50VC0G

+/-0.25PF

0402_R

4.7PF

+5V_HDMI_CON

HDMI_CEC_CON

C10B6

C1B2

C1B3

21%

0402_R

50VC0G

11K

R10B21

0402_R

5%20402_R5%

R1C122K

2

1EMPTY

HDMI_INT9C4<

SLP2510P8_R

CR1B1

29

I1893

1105

EMPTY

+3.3V_LP0

6

I187

Q10B1

FB

20402_R

120

L10B3

1200MA

1

1

HDMI_CEC_L

HDMI_DDC_SCL_CON

3S23_RFDV301N1

2

I80

BAS70W

S323_R

CR10C1

3

RCLAMP_0524PSLP2510P8_R

CR1B1

74

3+3.3V_LP0

162K1%

R10B32

RCLAMP_0524P

EMPTY

SLP2510P8_R

CR1C1

7 56

I184

4

3

1+3.3V_LP0

0402_R

1

2

32.4K

0402_R1%

R10C1

21HDMI_CEC_A_PU

2L10B2

FB0402_R

2

1

0

2

1

HDMI_TXD_P<2..0>HDMI_TXD_N<2..0>

9C3>9C3>

2

EMPTY

9

I183

SLP2510P8_RRCLAMP_0524PCR1C1

0

101

3

120

0402_R

1.8KR1B92

5%

11

1200MA

HDMI_CEC

HDMI_DDC_SCL

HDMI_TXC_N

HDMI_TXC_P

9C4>

9C4>

9C4>

9C4<>

2

1

2

FB

20402_R

HDMI_DDC_SDA_CON

L1B1

1200MA

1201+5V_HDMI

2L10B1

FB

1

HDMI_FAULT_L3

60.4K

0402_R1%

R10B12

1

HDMI_ILIM2

0402_R

RT9728AHGQW

1.8K

0402_R

R1B82

5%

1 1201

1200MA

SON7_RU1B4

6

+5V_SYS

C10B510UF

0603_RX5R

1

6.3V20%

R1B7

2

42

I97

57

1005%0402_R

HDMI_DDC_SDA

1

9C4<>

EN_VDD_HDMI9C1<9D1<10A7<>

MINIMUM 400MAFOR HDMI TO VGA DONGLE

VIH MIN 1.1VVIL MAX 0.66V

EN

IN

IN

GND

D1+

D1-

GND

CK+

RSVD

CK-

SDA

+5V

GND

TYPE A

D2+

D2-

GND

D0+

D0-

GND

CEC

SCL

GND

HPD

OUT

D

G

S

ININ

IN

IN

BI

IN

VOUT

ILIM

FAULT#

GNDPAD

VIN

EN

GND

BI

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+3.3V_LP0

33A2>

32D5>

33A2>19B8<14C8<

32C4>

26B4<

9D8<9C1<

19B8<14C8<

+3.3V_LP0

9D2<14D2<9D1<

+1.2V_GEN_AVDD

14C1<9D2<

9A2<

9D1<

10D2<

1700MA

+1.05V_RUN

13D1<15D1<

301

0402_RFB2

1700MA1

30

0402_R

EMPTYL9C2

L9C1

FB2

+3.3V_LP0

+1.05V_RUN

17D2<18D2<

0402_R1

19D2<

C9C82

4.7UF X5R

X5R0402_R

6.3VX5R0402_R

6.3V20%

1

1

20%

C9C122

4.7UF

C9C112

4.7UF

14C7<9C4<9C2<5D2<+1.05V_RUN_AVDD

X5R0402_R

20%6.3VX5R0402_R

6.3V20%

1

2C9C21

1

4.7UF

C8C49

4.7UF

2

6.3V20%

+1.05V_RUN_AVDD_PEX_PLL_AP_F

22D2<

16B8<

16B8>16B8>16C8<16C8<

19C7<

15D7<15D7<

15C7>15C7>15C7<15C7<

16A8>16A8>16B8<

30A3>

0201_R1

C9C72

0.1UF X5R

0201_R

0201_R1

10%16V

C9C132

0.1UF X5R

X5R

10%

1

16V

C9C102

AC18AC17AB17

AC20AB20

AL28

AB18

AL29

1

TK1-MID

0.1UF

0201_R

0201_RX5R

1

16V10%

C9C202

0.1UF

X5R

1

16V10%

0.1UF

C8C482

16V10%

SNN_PEX_TX1_NSNN_PEX_TX1_PSNN_PEX_RX1_NSNN_PEX_RX1_P

USBSS_RX0_PUSBSS_RX0_NUSBSS_TX0_PUSBSS_TX0_N

PEX_TX2_C_N

PEX_CLK2_PPEX_CLK2_N

PEX_CLK1_NPEX_CLK1_P

PEX_RX4_PPEX_RX4_NPEX_TX4_PPEX_TX4_N

SNN_PEX_RX3_PSNN_PEX_RX3_N

SNN_PEX_TX3_PSNN_PEX_TX3_N

PEX_RX2_PPEX_RX2_NPEX_TX2_C_P

J31L31

AG31

AC21

AL21AH21AJ21

AK21

AK23AL23AF21AG21

AJ23

AD21AE21AH23

AG23

AL24AK24AF23

AH26

AK26AL26AJ26

AC26AC27

AG26AF26

19C7<

14

C9C16

0402_R

6.3VX5R4.7UF20%

12

4.04602-7R375-0000-D00

+3.3V_LP0

TK1: SATA, PEX, USB 3.0

15D7>19C7>

0201_R

1

2.49K

R9C7

1%

2

19B7>15D7>

15C3<19C7<

1%

2R2C4

0402_R

1

TP_PEX_TESTCLK_P

PEX_L0_RST_LPEX_L1_RST_LPEX_L0_CLKREQ_L

PEX_TERMP

TP_PEX_TESTCLK_N

SNN_PEX_REFCLKNSNN_PEX_REFCLKP

PEX_L1_CLKREQ_L

PEX_WAKE_L

100KSNN_GPIO_PFF2TP_USB_VBUS_EN2

AF24

AJ24AH24

AL22AG24

AE31

AJ29AJ31AK29AJ30

AG28

AG30AG29

Thu Jul 23 14:36:58 2015

U3C1BGA

AH31

AF31

AK30

0201_R1

10%16VX5R

C9C14

16VX5R

10%

0.1UF

10%16VX5R0402_R

0201_R

2

+1.05V_RUN_AVDD_SATA_PLL_F

1

0.1UF

2C9C18

C9C15

1UF

12

1

6.3V

0402_R

20%

X5R4.7UF

0402_R

+3.3V_LP0

C9C19

6.3VX5R

C9C171

4.7UF

2

20%

2

30

1700MA1

SATA_L0_TX_P AL27

AG27

AH27

AL25AF27

AJ27AK27

P10

10201_RX5R16V10%

U24

AD27

AD25

AD24

AB22

U31V31

U23

V26V29

J25H27

H25U30J24

J27

F27

F26

0.1UF

C8B13

SNN_DIRECTDC_OUT2

SNN_DIRECTDC_CLKSNN_DIRECTDC_IN

SNN_DIRECTDC_OUT1

SNN_DIRECTDC_OUT3

SNN_DIRECTDC_OUT0

SATA_TERMPR9C81%

2

2.49K

1

2X5R0402_R

20%6.3V

0201_R

+1.05V_RUN_AVDD

SATA_L0_TX_NSATA_L0_RX_P

SATA_TESTCLKN

SATA_L0_RX_N

SATA_TESTCLKP

C8B112 1

4.7UF

L9C3

0402_R

5D2<

16D3<

16D3<

16D3<

FB2+1.05V_RUN

19B8<9D1<

33A2>14D2< 14C1< 9D2<

16C3<

9C2<9C4<14C1<

R9C9 2

1

5%0201_R

100

EMPTY

32D5>

AA24

AD23AD26AC23AC24AC25

K25J26H26

I445

MPCIE SLOTPEX CONTROLLER 0

IN

IN

IN

IN

IN

OUTOUTININ

ININ

OUTOUT

OUTOUTININ

OUTOUT

OUT

ININ

OUT

OUTOUT

IN

OUTOUT

IN

ININ

IN

(1.05V)

(3.3V)

(1.05V)

(3.3V)

(1.05V)

(1.05V)

(1.05V)

(1.8V - 3.3V)

SEC 4 OF 8(3.3V)

(1.05V)

(1.05V)

(1.05V)

DVDDIO_PEX

DVDDIO_PEXDVDDIO_PEX

AVDDIO_PEXAVDDIO_PEXAVDDIO_PEX

AVDD_PEX_PLL

HVDD_PEX

USB3_TX0NUSB3_TX0PUSB3_RX0N

AVDD_PLL_XAVDD_PLL_CG

USB3_RX0P

PEX_TX2PPEX_RX2NPEX_RX2P

PEX_TX3N

PEX_TX2NPEX_USB3_RX1PPEX_USB3_RX1NPEX_USB3_TX1PPEX_USB3_TX1N

PEX_RX3NPEX_TX3P

PEX_RX3P

PEX_TX4NPEX_TX4PPEX_RX4NPEX_RX4P

PEX_CLK1PPEX_CLK1N

PEX_CLK2N

PEX_REFCLKPPEX_REFCLKN

PEX_TESTCLKN

PEX_CLK2P

PEX_TESTCLKPPEX_TERMP

PEX_L1_RST_NPEX_L0_RST_N

VDDIO_PEX_CTL

USB_VBUS_EN2GPIO_PFF2

PEX_WAKE_N

AVDD_PLL_EREFE

HVDD_PEX_PLL_E

PEX_L0_CLKREQ_NPEX_L1_CLKREQ_N

VDDIO_SATA

HVDD_SATA

SATA_L0_TXNSATA_L0_RXP

SATA_L0_TXP

SATA_L0_RXN

AVDD_SATA_PLL

SATA_TESTCLKP

DIRECTDC_OUT2

AVDD_PLL_C4

DIRECTDC_CLKDIRECTDC_IN

DIRECTDC_OUT1

SATA_TERMPSATA_TESTCLKN

DIRECTDC_OUT0

DIRECTDC_OUT3

NC 5

NC 7NC 6

NC 4NC 3NC 2NC 1

NC 8

NC 12NC 11NC 10NC 9

NC 13

NC 16NC 15

NC 17

NC 14

NC 18

NC 21

NC 19NC 20

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

30A3>22D2<

18D2<17D2<13D1<10D2<

10A3>

19D2<

14D1<9A2<+3.3V_LP0

WF_EN

8.87K

SC70S_R

RJU003N03

WF_DISABLE

Q9D2

1%

R9D92

0402_R

1

2

3

1

SC70S_R

RJU003N03

W_DISABLE_L

Q9D3

2

3

11

2

5%

2

0

R9D10

0402_R

1

CR1E2

2.2V25MA

0603_RGRN

WLAN_LED

14A3>

22C1<>

9A4<>9A4<>

22C1>

I22

10UF

0603_R

20%6.3VX5R

C9E11

2

215%

2

0805_RX5R6.3V20%

22UF

0402_R

PEX_L0_RST_L

USB1D_NUSB1D_P

C9E4

R9D11

1

2

1

5%

2

330R9D13

0402_R

0402_R 5%330

330 1

R9D12

SMT_R0.0622-56

M3E1PEM

I23

1

C9E210UF

1

0603_R

20%6.3VX5R

2

PEM2-560.062SMT_R

1%8.87K

0402_R

0402_R

10K

+VDD_1V5_MPCIE

SNN_MPCIE_8

GEN1_I2C_SDA_3.3V

WWAN_L

SNN_1P5V_POK

WPAN_L

W_DISABLE_R_L

SNN_MPCIE_14SNN_MPCIE_16


GEN1_I2C_SCL_3.3V

WLAN_L

M2E1

R9E2

R9E3

1

24

SMT_HALF_STND_RMINI_PCIE_HALF

J2D2

6

12108

1416

18

2220

24

2826

34

3032

40

4442

3638

3941

7

35

9

15

21

2729

3537

43

53

2325

3133

1113

1917

1SNN_MPCIE_3SNN_MPCIE_5


PE_TX4_C_NPE_TX4_C_P

0402_R

10%

X7R16V

C2D12

12

.1UF

48

5250

46

2

I43

APL5910

5

1

6

1

2

1%

1

FB_1PV57

SOP8P_R

I56

54

45474951

U9E1



3

4

21P5V_EN5%

0

2R9E4

10402_R

1

X5R0402_R

1UFC9E5

16V 2

98

10K

0402_R

R9E1

1%

2

1EMPTY

10UFC9E3

X5R6.3V20%

0603_R

2

110%

154.04602-7R375-0000-D00

MINI HALF PCIE

Thu Jul 23 14:36:58 2015

0402_R

PEX_WAKE_L

1C2D13

2X7R16V

.1UF 10%

PEX_CLK1_P

PEX_RX4_NPEX_RX4_P

PEX_TX4_PPEX_TX4_N

PEX_L0_CLKREQ_L

PEX_CLK1_N14B3>

14B3<14B3<

14B3>14B3>

14A3<

14A2<

14B3>

19B7>

+5V_SYS31D5<13D1<

32D4<16D2<

34D2< 33B7<20D2< 17D2<

35D2>29C1> 27A2< 26A2< 25D2>29D2<30D1<

W_DISABLE# PULLUP REQUIRED ON CARD PER SPEC

WIRELESS CARDS CAN WAKE FROM LP0 BUT NOT OFF

IN

IN

D

S

G

D

S

G

AN

CAT

MECH

IN

INBI

BIBI

MECH

3.3VAUXGND

1.5VUIM_PWR

UIM_DATA

UIM_CLK

UIM_RESET

GND

UIM_VPP

PERST*

GND3.3VAUX

1.5VSMB_CLK

GND

GND

LED_WWAN*

USB_DpUSB_Dn

GND

LED_WLAN*

1.5V

3.3VAUX

LED_WPAN*

SMB_DATA

W_DISABLE*

WAKE*

GND

GNDREFCLKn

CLKREQ*COEX2

COEX1

REFCLKpGND

RESERVED/UIM_C4

RESERVED/UIM_C8

GND

GNDGND

PERp0PERn0

PETN0

GNDGND

3.3VAUX3.3VAUX

PETP0

GND

RESERVED

RESERVED

RESERVED

RESERVED

GND

POK

FB

VOUTNC

GNDPAD

VCNTL

EN

VIN

GND

OUT

ININ

OUT

OUT

IN

OUT

IN

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+5V_SYS

SKT_PWR_IDE

+5V_SYS31D5<13D1<

35D2> 34D2< 33B7< 32D4<26A2< 25D2> 20D2< 17D2< 15B7<

J2D1

1234

65

7

I85

VERTJ4E2

THR_SHRD_R

SATA

BLACK

THR_R

I23

4

1

2

3

SATA_TX_P

SATA_RX_NSATA_RX_P

SATA_TX_N

+5V_SATA

+12V_SATA

0402_R

C9D616V10%

X7R

1

1

C9D4

0402_RX7R16V10%

.01UF

.01UF

2

20402_RX7R

16V10%

0402_RX7R

1

1

.01UF

C9D5

2

2

16V.01UF10%

C9D7

16V

C3E101UF

0402_RX5R

1

+5V_SYS 10%2

C3E8.1UF

1

10%

0402_R

16VX7R

2

8

S

1

I106

SLG5NV1430VTDFN-6_R

SATA_L0_RX_P

SATA_L0_TX_PSATA_L0_TX_N

SATA_L0_RX_N

U3E1

27A2<30D1< 29D2< 29C1>

14C7<

14C7>14C7>

14C7<

7+5V_SYS

D

72

2200PFC3E11

0402_R

50VX7R

10%

10%

X5R

10UF

0805_R

16V

CAP_SLG_5V_SAT

C3E9

1

2

1

2

17A7<17A7<

16

16V10%

X5R0402_R

1UFC3E71

MDV3605URH

1R3E5

20402_R

D

G

DFN3X3_R

100K

Q3E2

1%

S

2

RJU003N03SC70S_R

Q3E1

R3E175K

2

5%0402_R

1

EN_VDD_12V_DRAIN

3

2

1

PEX OPTIONS AND SATA

4.04602-7R375-0000-D00

1%100K

0402_R

+VDD_MUX

EN_VDD_12V_GATE

R3E221UF

0603_RX7R

C3E61

LV_SATA_EN1R3E6

2

26D3<

0402_R10K

27C7<

1%

16V 12 10%

10K

0402_R1%

R3E42

1

SATA_PWR_ENR3E31 2

5%0

0402_R

SATA_PWR_EN_T124

27D2>29C4< 28C4<

19C7<

31D2>

17A7>17A7>

19C7<

35D8< 34D8<

19C7>19C7>

10B7>

Thu Jul 23 14:36:58 2015

PEX_RX2_C_NPEX_RX2_C_P

PEX_TX2_P

USBSS_RX0R_NUSBSS_RX0R_P

PEX_TX2_N

USBSS_TX0C_NUSBSS_TX0C_P

10201_R

R9D5

0+0.05R

20201_R

1R9D6

2

0+0.05RPEX_TX20_C_N

PEX_TX20_C_P

X7R

10402_R

X7R0402_R

C2C5

1

C2C412

.1UF10%16V2

C9C25

10%

.1UF

216V

0402_RX7R

0402_R

16V10%

.1UF

1X7R

C9C24

.1UF

16V210%

USBSS_TX0_NUSBSS_TX0_P14C3>

14C3>

EMPTY

X7R16V10%

1

EMPTY

0402_R

.1UF

C2D10

21X7R

10%16V

10201_R

EMPTY

R9D2

0+0.05R

20201_R

1

0402_R

10%16VX7R

1

.1UF

C2D7

2

EMPTY

.1UF

0402_R

EMPTY

0402_R

10%

X7R16V

C2D9

R9D4

1

2

0

2+0.05RPEX_RX20_N

PEX_RX20_P

1

.1UF

C2D82

EMPTY

0201_R

0402_R

EMPTY

X7R

R2C6

1

21

0201_R

R2C5

5%

2

00

5%

C9C23

10%

.1UF

16V2

0402_R

EMPTYC9C22

1X7R

.1UF

16V210%

PEX_RX2_NPEX_RX2_P

USBSS_RX0_NUSBSS_RX0_P

PEX_TX2_C_NPEX_TX2_C_P

14B3>14B3>

14C3<14C3<

14B3<14B3<

VTH 1.5V MAXID 300MA

PLACE NEAR RTL8111

PLACE NEAR USB CONN

IN

1

+5V

GND

GND

+12V

ININ

ININ

S

VDDGND

D

ONCAP

OUTOUT

D

G

S

D

S

G

IN

OUTOUT

ININ

ININ

IN

ININ

ININ

OUTOUT

OUTOUT

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+3.3V_LP0

+5V_SYS

+5V_SYS

+3.3V_LP0

6789

1110

33B7<

27A2<13D1<

9A2<19D2<10D2<

CON_USB_MICRO_ABTH_UAB_11P

22D2<13D1<

34D2<

29C1>15B7<

J1E1

1

30A3>14D1<

35D2>

30D1< 29D2<20D2< 16D2<

3

SNN_TVS_USB_VBUS0I189

4

2

5

15D1<

31D5<25D2>26A2<

32D4<

0402_R

100K1%

R1E42

18D2<1

USB0DL_N4CM_CHOKE

EMPTY

USB0DL_P

67

EMPTY

0402_R

5%

100PF

C0G50V

C1E121

2

XSOP7_R

TVS_USB

I194

28.0V

USB0_ID_C

CR1E1

23

1

L1E3

2012_R

90OHM

.2A1USB0D_N

+USB0_VBUS_SW

USB0D_P 2 3CM_CHOKE

L1E32012_R.2A

90OHM

9A4<

EMPTY

USB0_ID

33D7<

5%0402_R

1MR9E72

1

Thu Jul 23 14:36:59 2015

1%

EMPTY

USB0_ID_PMU

2

5%0402_R

1MR9E62

1

R9E8

1K0402_R

1USB0_ID_AP_R

3

2

Q9E3

S23_R

Q9E1

1

BSS138LT1 3

2

1

S23_REMPTY

174.04602-7R375-0000-D00

USB PORTS

BSS138LT1USB0_ID_GATE_L

100KR9E5

+5V_SYS

2

1%0402_R

1

3

1

2S23_R

BSS138LT1Q9E2

2R10E1

1%1K

0402_R

1

131

12

47

1011

J1C2

USBX1_V3RA_FLAG_TH_R

I273

67

EMPTY

I120

TVS_USB

XSOP7_R28.0V

CR2C1

9A4<>9A4<>

USB0_ID_PWR

0402_R

10%16VX7R

.1UFC2D111

2

0402_R

100KR9D8

1%

2

1

I202S23_R

4.7UF

10V10%

0805_RX5R

3

C1E7

CR2D1BAV70

1

2

1

2

1206_R

100UFC1E6

6.3V20%

X5R

1

2

0402_RX7R

1

16V10%

1

3

EMPTY

2

SC70S_R

RHU002N06Q2D33

1

.1UF

TPS2051BSOT23_5B_R

SON8_RU1C1

C9D82

+5V_SYS

U2D3

5

4

100K

0402_R

+3.3V_LP0

R9D72

1%

1

2

I220

+5V_SYS

USB_VBUS_EN09A4<>

470PF

X7R16V10%

0402_R

C10C51C10C4.1UF

2

0402_RX7R16V10%

32

89

56

USB2DL_P

USB2DL_N

+5V_USB_HS

1

2

C1C1220UF

1

6.3V

B2_RPOSCAP

20%2

C2C322UF

1

0805_R

6.3V20%

X5R

2

3

12

RCLAMP_0524PSLP2510P8_R

56

CR2C21

74

I1763EMPTY

C10C3.1UF

1

16V10%

X7R0402_R

2

CM_CHOKE3

CM_CHOKE4

90OHM

2012_R

2012_R

90OHM

L9C4

L9C4

2.2A

1.2A

USBSS_TX0C_P

USB2D_N

USB2D_P

1

678

9

USBSS_TX0C_N

29

SLP2510P8_RRCLAMP_0524P

USBSS_RX0R_NUSBSS_RX0R_P

1CR2C2

101

I1783EMPTY

I59

TPS2065DGNRG4

16B4<

16C4>16C4>

16B4<

9A4<>

9A4<>

23

4

5

100KR1C22

1%0402_R

1

+3.3V_LP0

16VX7R

.1UF

10%

0402_R

C10C1

2

1

6.3V

0603_RX5R

10%

4.7UF

USB_VBUS_EN1

C10C21

2

9A4<>

POWER PROVIDER

NOYES

NOTRUE

ID PIN

FALSETRUE

AB

TYPE

EMPTY

DEVICE NEEDED FOR RECOVERY MODEPORT 0 IS OTG NORMALLY

IN

IN

SH2SH3

SH1

SH4MT1MT2

D_P

VBUS

D_N

ID

GNDV

GNDD#DID

OUT

OUT

D

S

G

D

S

G

D

S

G

ININ

D

S

G

OUT

OC*

IN

EN

GND

IN

GROUND

TX+ TX- GND RX+ RX-

VCC D0- D0+ GND

VCC

D0+

D0-

TX+

TX-

RX-

RX+

VGND

D#DID

BI

BI

OUTOUT

OUTOUT

OUT

GNDTP

ININ

OC*

EN

ININ

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+3.3V_RUN

+3.3V_LP0

+1.8V_VDDIO

+1.8V_VDDIO

+3.3V_LP0

+3.3V_RUN

BLACK

DSUB9_RJ1A2

10

8D1<25B7<10D2<

9A2<

9A2<

10D2<

22D8<23A2<

13D1<

26A2<20D2<

26D3<>

25D2>

15D1< 14D1<

32D4<21D2<

26D3<26A7<26A3<>22C4<>

27

61

DSRSNN_DCD

5%

2

0

1

EMPTY

0402_R

R1A8

26D6<

17D2<

33A2>22B6<

22C4<20B7<>

30D1< 30C5>

22D2< 19D2<

22D2< 22C7<

20B7<18A6<18A6<>

32D3<

30A3>

23A2<

10B8>10B8<>

24A2<C9A2.1UF

X7R0402_R

1

10%16V

2

C1A3

10402_R

10%

X7R16V

.1UF

10402_R 2X7R16V10%.1UF

RS232_RTS

C1A4VPVN

2

+1.8V_VDDIO

GEN1_I2C_SCLGEN1_I2C_SDA

8

65

94

14

62

TSSOP16_R

SERIAL_RS232_3V3

U1B1

TRS3232E

13

4

11

5C2N

C1N

C2P

C1P

RS232_TXD_L

31C8<

SERIAL_DSUBI22311

3

95

48

SNN_RIDTR

AP_OVERHEAT_L

EMPTY3

1

2

5%

0

2R2D1

1

184.04602-7R375-0000-D00

TEMP SENSOR, SERIAL, ID

SC70S_R

RJU003N03

0402_R

AP_OVRHT_G

Q2D1

RS232_RXD_L

C10A1

RS232_CTS

1.1UF

0402_RX7R16V10%2

EMPTY2

1%

1

3

2

EMPTY1

0402_R

100K

RJU003N03

SC70S_R

AP_OVERHEAT_R_L

R2D3

Q2D2

EMPTY2

1%

R2D2100K

0402_R

1

138

7

16

I232

129

10

15

+3.3V_RUN

1%10K

0402_R

R9D12

1

+1.8V_VDDIO

1 C2C6

0402_R

16VX7R

.1UF

10%2

64

1

10B3<TEMP_ALERT_L5

Thu Jul 23 14:36:59 2015

EEPROM_2WIRE_8PIN

CAT24C02HU4DFN08_R

I247

U2A1

3

7

21

BOARD_ID_A1

BOARD_ID_A2

BOARD_ID_WP

BOARD_ID_A0

10K1%

R2A3

R2A210K

2

1%

2

1%

R9A110K

0402_R

1

2

10402_R

16VX7R

C1A2

10%

10%16VX7R0402_R1

.1UF

.1UF

2

2C1A1

0402_R

UART4_RTS_3V3_L

1

0402_R

C10B2

1

1 2

.1UF16VX7R

10%

0402_R

0402_R

+3.3V_LP0

R2A110K

2

1%

1

U1B2

SSOP8_R

2

3

1

5

SN74AVC2T45LEVEL_SHIFTER_2BIT

8

7

4

6

+1.8V_VDDIO

UART4_RTS_L

10402_R

C10B32

X7R.1UF16V10%

UART4_TXD10B3>

10B3>

22D7>

22D7>

24C5>

24D5>

UART4_TXD_3V3

UART4_CTS_3V3_L

UART4_RXD_3V3

2

.1UF

C10B1

X7R16V

0402_R

10%

1

U2C2DFN08

TEMP_SENSOR

32THERMD_R_P

THERMD_R_N

8

7

6

I253

4

SN74AVC2T45LEVEL_SHIFTER_2BIT

SSOP8_R

U1B3

1

3

2

5

I254

0402_R

1000PFC2C7

2

1

10%50VX7R

22

5%

R9C10

R9C11

1

0402_R

100

100

1

TMP451I222

87

GEN1_I2C_SDAGEN1_I2C_SCL10B8>

5%

10B8<>18D3<

0402_R

18D3<>

UART4_CTS_R_L

20B7<>20B7<

10%

X7R16V

0402_R1

UART4_RXD_R

C10B4

.1UF

2

2

2

5%

0

5%

0402_R

0402_R

R1B111

1

0R1B10

THERMD_PTHERMD_N

8B3<8B3<

UART4_RXD

UART4_CTS_L

10C3<

10C3<

22D7<

22D7<

26D3<> 26A3<> 22C4<>26D3< 26A7< 22C4<

SERIAL PORT

UART DEBUG PORT SHOULD BE UART4 ONLY

BOARD ID ROMI2C ADDR 7H'56

I2C ADDR 7'H4C

TEMP SENSOR

IN

IN

IN

INBI

1

5

6

9

10

11

GND

DCD

RXD

TXD

DTR

GND

GND

CTS

DSR

RI

RTS

OUT

D

S

GD

S

G

V+V-

VCC

R2IN

T1OUTT2OUT

R1IN

C1+C1-

T1IN

R2OUTR1OUT

T2IN

C2-C2+

GND

OUT

SERIAL EEPROM

2-WIRE

SCL

VCC

SDA

GNDTHERMPAD

A0

WP

A1A2

IN

IN

1| A->B(tx)0| B->A(rx)

DIR

VCCB

B1

GND

B2

A1

VCCA

A2

DIR

1| A->B(tx)0| B->A(rx)

DIR

VCCB

B1

GND

B2

A1

VCCA

A2

DIR

THERM*

VCC

GND

ALERT*/THERM2*D-D+

SCLKSDATA

INBI

INOUT

OUT

OUT

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+3.3V_LP0

+3.3V_LP09A2<10D2<13D1<15D1< 14D1<17D2<30A3> 22D2< 18D2<

2C1C2

.01UF

25%

0

0402_RX7R16V10%

0402_R

1

R1D21

+3.3V_LP0

PEX GIGE LAN/PHY

LAN_TRCT1

LAN_CH_GND

0603_R

4.7UFC2D1

EMPTY

C1D5 C1D314.7UF

0603_R

6.3V10%

X5R

2

4.7UF

10%

0603_R

6.3VX5R

1.1UF

EMPTY

C2D2

L2D1

SMD2

1SMD2

0402_R

10%6.3VX5R

2X7R16V2 10%

2016_R

SMD_R

+1.05V_LAN_REGOUT

L2D2

14.7UH

550MA

4.7UH

10.7A

12

1112

1416 1315

EMPTY

C1D7.1UF

0402_RX7R

10%16V

1

2

RJ45_2_RRJ45_1X1GBIT_MAG_LED

I382

LAN_LED_100

LAN_LED_1000

LAN_LED0_ACT_L

J1D1

910

7

43

65

8

2

1%

2R2D4

240

25%

510

R2D6

0402_R

0402_R

1

1

R2D5

1%

1 21%

240

194.04602-7R375-0000-D00

10%

.1UF

0402_RX7R16V

.1UF

0402_R

10%

X7R16V

2.49K

0402_R

EMPTY

+1.05V_LAN_REGOUT_L

C10D1

C2D5

R1D1

1

2

+3.3V_LP0

C1D21C1D4

0402_R

.1UF

10%

X7R16V

C9D2

2

1

.1UF

0402_R

10%

X7R16V

C9D3

1

2

1

1132

23

4.7UF.1UF

0603_RX5R6.3V10%2

0402_R

16VX7R

10%

1

2

1

0402_R

10%

.1UF

X7R16V

C2D6

C10D31

2

1

0402_RX7R16V10%

.1UF

2

C10D2

C2D4

24

38

1

2

30

1

22

RTL8111GSQFN-33_RU2D2

1516

EMPTY

1314

12

19

1718

20

21

1UF.1UF

2

0402_RX5R16V10%2

1

X7R16V10%

0402_R

LAN_MDI2_P

LAN_MDI1_N

LAN_MDI0_P

LAN_MDI3_P

LAN_MDI1_P

LAN_MDI2_N

LAN_MDI3_N

LAN_MDI0_N

LAN_RSET

2

21

67

45

31

910

0402_R

LAN_LED1LAN_LED0

LAN_LED2252627

28

29

I404

33

0402_R

10K1%

XTAL_LAN_P

PEX0_WAKE_R_L

LAN_ISOLATE_L

XTAL_LAN_N

R9D32

1

2

1

1%

EMPTY

3

5

4

MMBT3904

S363_R

100K

0402_R

EMPTY

Q9D1

R2D10R2D9100K1%0402_R

2

1

6Q9D1

2

1

EMPTY

S363_R

MMBT3904

PEX_L1_CLKREQ_L

PEX_RX2_C_NPEX_RX2_C_P

LAN_ISOLATE

LAN_ISO_BASE

PEX_L1_RST_L

PEX_CLK2_PPEX_CLK2_N

PEX_TX2_NPEX_TX2_P

14A3>14B3>

16B4>

14A2<

16A4<16A4<

16B4>

14A3>

21%

21%

EMPTY

10K

10K

EMPTY

R2D11

R9D141

0402_R

10402_R

C1D11

1

Y2C118PF30_30PPM

5%

I359HC49_R

2R2D8

00402_R

1

2

C2D3120PF25.000MHZ20PF

0402_R

5%

C0G50V2

0402_RC0G50V5%2

PEX_WAKE_L15D7> 14A3<

+1.05V_RUN

PMU_REGEN327C4<

9D1<

31C2>

33A2>

14C8<9D2<

30A8<

14D2<14C1<

30C8<

Thu Jul 23 14:36:59 2015

LINK ACT = BLINK YELLOW

LINK 100 = SOLID ORANGELINK 1000 = SOLID GREEN

LINK 10 = OFF

TWO INDUCTOR FOOTPRINTSFOR AVAILABILITY REASONS

RISE TIME ON 3.3V RAIL MUST BE > 0.5MS

BIOS PULL HIGH/LOW ON PINTO ISOLATE LEAVE/ENTER DSM

IN

(4)TD2+

(3)TD1+

(5)TD2-

(8)TD3-

(7)TD3+

(6)TD1-

(2)TD0-

(1)TD0+

YLWORNGGRN

CH_GND

VCC

GND

GND

MX0+

MX1+

MX0-

MX1-

MX3+

MX2+

MX2-

MX3-

AVDD33AVDD33

VDDREG

REGOUT

AVDD10AVDD10

AVDD10

DVDD10

MDIP0

MDIN3MDIP3

MDIN2MDIP2

MDIN1MDIP1

MDIN0

RSET

LED0LED1/GPO

LED2

HSONHSOP

HSINHSIP

REFCLK_P

CLKREQB

REFCLK_N

PERSTB

LANWAKEB

ISOLATEB

CKXTAL1

CKXTAL2

GND

ININ

OUT

ININ

OUTOUT

IN

OUT

IN

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+1.8V_VDDIO

+5V_SYS

+1.8V_VDDIO

+5V_SYS

8D1<

31D5<13D1<

26A2<10D2<

32D4<18D2<

32D4<15B7<

33A2>21D2<

34D2< 33B7<17D2< 16D2<

+1.8V_VDDIO

21A7<

21A7<

HP1_LT

HP1_RTR10E4

5%

5%

2

2

33R1E10

33

21C5<

2.2UF

X5R

20%6.3V

0402_R

C10E21

216VX7R

.1UF

10%

0402_R

C10E1

MIC1_BIAS

1

2

C1E54.7UF

0603_RX5R

10%6.3V

0402_R

0402_R

1

2

22B6<

35D2>25D2>

25B7< 24A2< 23A2< 22D2< 22C7<

30D1< 29D2< 29C1> 27A2< 26A2<

1

1

225%

X7R

.1UF

10%

0402_R

16V

C1E21

R10E5

1

2

HEADSET1RC_L

2

.1UF

0402_R

R1E9

C1E191

10%16VX7R

2

HEADSET1RC_R

5%

22

2

0402_R

1

4.7UFC10E3

6.3VX5R

10%

0603_R

1

2

4.7UFC1E11

6.3VX5R0603_R

10%

5%

0402_R

1

1

2

1

00402_R

R1E62

6.3V

0402_R

2.2UFC1E151

X5R

2 20%

0402_R

2.2UFC1E16

21A7>

HEADSET1R_L

HEADSET1R_R

HP1_SENSE

1

X5R6.3V20%2

SNN_SPKL_PSNN_SPKL_N

SNN_SPKR_PSNN_SPKR_N

R1E5

5%

1

47

2

10UF

0402_R

C1E8

FB2

1

6.3V

0603_R

20%

X5R

2

.1UF

0402_R

1200402_R

L1E4

C1E9

1200MA1

110UFC1E131

10%16VX7R

220%6.3VX5R0603_R

210%

X7R16V

.1UF

0402_R

C1E141+1.8V_VDDIO

22FB

AUDIO CODEC

204.04602-7R375-0000-D00

1200402_R

L1E51

1200MA

C1E18

0603_R

10UF

6.3V20%2

1

X5R0402_R

10%

C1E17

16VX7R

.1UF1

2

C1E202.2UF

6.3V20%

X5R0402_R

1

2

2.2UF

0402_R

C10E10

X5R

20%6.3V

1

2

2.2UFC10E8

0402_R

1

X5R6.3V2 20%

.1UFC10E9

0402_R

1

X7R

10%2 16V

2.2UF

6.3V20%

X5R0402_R

C10E6

+1.8V_VDDIO

1

2

.1UF

0402_R

C10E71

2X7R16V10%

+5V_SYS

10UF

0603_RX5R

20%6.3V

C10E4110UFC1E101

0603_R

2X5R6.3V20%2

Thu Jul 23 14:37:00 2015

CHGPUMP_N2

SNN_IN3N

SNN_IN3P

CHGPUMP_P1

AUDIO_AVDD

AUDIO_DACREF

MIC1_BIAS_R

AUD1_VREF1

CHGPUMP_N1

AUD1_VREF2

CPVDD

AUD_DCVDD

CPVPPCPVEE

+VDD_MIC

CHGPUMP_P2

X7R16V10%

.1UF

0402_R

C10E5

ALC5639 2826

25

481

45

1413

47

4

1112

21

1820

QFN48U1E1

3433

3635

32

30

31

29

37

3839

DACDAT2

SNN_ADCDAT2

BCLK2

LRCK2


DAP2_DIN_R

DAP_MCLK1

1%10K

0402_R

R10E3

2

R1E7

1

2

1%10KR1E82

0402_R

1

10B8>

1

10B8>10B8<>

1%10K

0402_R

5%

R10E2

18A6<>18A6<

00402_R

2

1

18D3<18D3<>

22C4<

DAP2_SCLK

DAP2_DINDAP2_DOUT

22C4<>26A7<

10B7>10B7<

DAP2_FS

26D3<> 26A3<>26D3<

10A7>10A8>

15

19

3

232724

10

43

42

462

1

2

4041

44

87

1617

65

922

49

SNN_LOUTR

SNN_LOUTL

2L10E1

11700MA FB0402_R I20430

JD_MIC_L

HEADSET_MIC_C

TP_DMIC_DATA

HEAD_DET_L

CODEC_IRQ_LTP_DMIC_CLK

AUDIO_LDO_EN

21C8>21B7>

10C3<

8C3>

21C7>

ON HP1_SENSE AT CODECNEXT FAB ADD 0 OHM PD

I2C ADDR 7'H38

ON DAP2_DOUT & DAP2_FSNEXT FAB ADD 0 OHM OPTION

IN

IN

OUT

OUT

OUT

IN

BI

IN

IN

INOUT

BIBI

IN3NIN3P

SPO_RP

SPO_LN

HPO_R

MICBIAS1

HPO_LHPOFB

SPO_LP

SPO_RN

VREF2

CPP2CPN2CPP1CPN1

AVDD

DACREF

CPVDD

CPVPPCPVEE

DCVDD

VREF1

MICVDD

SPKVDDLSPKVDDR

DBVDDIN1N_DMIC2_DAT_JD1

ADCDAT1DAC1DAT1

BCLK1LRCK1

LRCK2BCLK2

ADCDAT2DACDAT2

LDO1_EN

IN2N_JD2IN2P

LOUTLLOUTR

GPIO2_DMIC_SCLGPIO1_IRQ

MCLK

SCLSDA

CPGND

GNDPADAGND

IN1P_DMIC1_DAT

OUT

IN

ININ

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+1.8V_VDDIO

+1.8V_VDDIO33A2> 32D4< 26A2<

22B6< 20D2< 18D2< 10D2< 8D1<22C7<25B7< 24A2< 23A2< 22D2<

THR_R

I203

AUDIO_JACK_2PORT_LIMEPINKJ1D2

222324

251

JD_MIC_R_L

100K

0402_R

R1D92

1%

1

214.04602-7R375-0000-D00

AUDIO CONNECTORS

10

12

11

13

AUDIO_JACK_2PORT_LIMEPINK

THR_R

I202

J1D2

HEAD_DET_JACK_L

EMPTY

+1.8V_VDDIO

R1E12

100K

0402_R

10PFC1E2

1%

1

C0G50V5%

0402_R

2

1

234

514MIL

1 2

ISO10D1

Thu Jul 23 14:37:00 2015

+1.8V_VDDIO

HP1_MIC_R

HP1_LT_L

HP1_RT_L

0402_R5%2.2KR1D82

1

0402_R

2.2K5%

R1D62

1

MIC1_BIAS20B2>

R1D71

0402_R0

5%

HP1_MIC_L

2

FB

2L1D2

C1E112

16VX5R

10%

0402_R

0402_R

30

1700MA

1

1UF

JD_MIC_T124_L

JD_MIC_L

HEADSET_MIC_C

8D3<

20A7<

20B7<

R1E2

0402_R

15%0

2

RJU003N03

SC70S_R

1

2

+1.8V_VDDIO

1%0402_R

100KR1E3

Q1E1

2

3

1

10PF

0402_R

C1E31

C0G50V5%2

0402_R

10PFC1D91

5%

C0G50V

2

FB

L1E22

0402_R

301

FB

L1D12

0402_R

301

1700MA

1700MA

0402_R1

C9D1A2

EMPTY

FB

L1E12

0402_R

301

1700MA

HP1_SENSE

HP1_RT

HP1_LT

X7R.1UF

X7R16V10%

0402_R

10%16V

1

.1UF

C1E42

HEAD_DET_T124_L

HEAD_DET_L

8C3<

20B7<

20C2>

20C2>

20C4<

3/4 OPEN W/O JACK3/4 SHORTED W JACK

IN

INSULATOR

MIC IN (PINK)TIP

RING

JDET2

JDET

LT

RT

SLEEVE

INSULATOR

FNT OUT (GREEN)TIP

RING

JDET2

LT

JDET

SLEEVE

RT

IN

OUT

OUT

OUT

D

S

G

OUT

OUT

IN

IN

OUT

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+1.8V_VDDIO

+3.3V_SYS

+1.8V_VDDIO

+3.3V_SYS

8D1<10D2<

26D6<28C1>

26A2<32D4<18D2<

28D2<

33A2>21D2< 20D2<

32B8< 30D1<

30A3>15D1<14D1<

15C3<>15C3<

19D2<13D1<

18D2<17D2<10D2<9A2<

GEN1_I2C_SDA_3.3VGEN1_I2C_SCL_3.3V

0402_R

2.7KR1D5

5%

1

2

5%0402_R

2.7KR1D4

EMPTY

+3.3V_LP0

2

1

205K1%0402_R

R1D32

1

7

PCA9306_VREF216

0402_RX7R16V10%

.1UFC1D8

58

1

2

EMPTY

22B6<25B7< 24A2< 23A2< 22C7<

U1D1

PCA9306QFN8_R

I201 EMPTY

1

34

2

+1.8V_VDDIO

1

X7R

.1UF

0402_R

C1D6

16V 210%

EMPTY


10B8<>10B8>

18D3<> 18A6<>18D3< 18A6<

22

C4A1

0402_R

10%

X7R16V

1

.1UF

2

THR_RA_SHR22.54MM

J4A1

4

2

6

8

10

16

14

12

18

20

11

13

15

17

19

1

3

5

7

9

I164HDR2X10

JTAG CONN; I2C TRANSLATER

JTAG_PD1JTAG_PD0

R4A310K

2

1%0402_R

1

JTAG_SRST_B_L

10KR4A22

1%0402_R

1

R4A110K

2

1%0402_R

1

R4A132R4A42

10K10K

R5A110K

0402_R1%

1

2

0402_R

10KR5A2

1%

1

20402_R1%

10402_R1%

1

4.04602-7R375-0000-D00

R5A410K

2

1%0402_R

1

U5A1

4I176

SC70_R74LVC1G07

5

2

3

0402_RX7R16V10%

.1UF

JTAG_SRST_L

JTAG_TDOJTAG_RTCKJTAG_TCKJTAG_TMSJTAG_TDI

C5A1

Y_JTAG_TRST_L

8A3>8A3<8A3<8A3<8A3<

22C7<22C7>22C7>22C7>22C7>

1

2

25%

R2C31

0402_R0

Thu Jul 23 14:37:00 2015

SYS_RESET_L

20B7<>20B7<

EMPTY

25

SMT2_RHDR_24_FPC_RA

1J7B1

0R8B5

+3.3V_SYS

2

0402_R5%

21

1

26A7<26D3<26A3<>26D3<>

EMPTY

1

+1.8V_VDDIO

RT9818B15GVSOT23_3_R

RST_MON

U4A3

3

34567891011121314151617181920212223 26

26A2<10D2< 8D1<

I217

32D4<18D2<

24

C7B3.1UF

1

0402_R

16V10%

X7R

2

33A2>21D2< 20D2<

EMPTY

+3.3V_342

UART4_TXD

JTAG_TMSJTAG_TDI

JTAG_TCKJTAG_RTCK

JTAG_TRST_L

SNN_PM_I2C_SDA_3.3V

+1.8V_VDDIO

UART4_CTS_L

PMU_RESET_IN_L

UART4_RXD

DEBUGGER_RESET_LUART4_RTS_L

FORCE_RECOVERY_L

SNN_PM_I2C_SCL_3.3V

22C7<

R8B62

0

C8B1

0402_R5%

1

1.1UF

0402_RX7R16V2 10%

+3.3V_RUN9A2<30C5>18D2<

32D3< 30D1<26D6< 25D2> 23A2<

JTAG_TDO

BR_UART1_RXDBR_UART1_TXD

10B3>

8A3<

8A3>

8A3<

8A3<8A3<

8A3<

10C3<10C3<

10B3>18C7<

18B8>18B8>

22A4>

22A4>22A4>

18C7<

22A4<

8C3<

22A4<

24D5<>

8C3>26B7>

32D4<

26B4<

10D2< 8D1<

22D2<23A2<24A2<25B7<

22D2<

0402_R

R8B4

24C5>

33A2>

23A2<18D2<

24D5>

26A3<>

2

05%

1

31B2<

26A3<>24B6>25C5>

22B6< 21D2< 20D2<26A2< 25B7< 24A2<

2

1

5

2

SOT23_6PIN_R

RST_MON

TPS3103

I254

U4A1

6

3

4

I188

PFO_JTAG_TRST_L

8B3<31B2> 23D7<

16VX7R

10%

0402_R1

.1UF

C4A22

I2C LEVEL TRANSLATOR

JTAG

STUFF THIS DEBUG CONNOR JTAG & DSUB, NOT BOTH

RESET SUPERVISOR ALLOWS EXTERNAL ARM JTAG DEBUGGER TO DETECT POWER CYCLEDEPOPULATE SUPERVISOR FOR PRODUCTION VERSIONS?

080-0665-000NVPN

IN

IN

OUTBI

IN

SCL2VREF2

SDA2EN

SCL1VREF1

SDA1GND

INBI

OUT

OUTOUT

ININ

IN

25

26

123

54

678

1112

910

13

17161514

18192021222324

IN

OUTININOUT

OUTOUT

OUTOUTININ

BI

INBI

IN

IN

RST*

GND

VCC

RST*

GND

PFO*

MR*

VDD

PFI

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+3.3V_RUN

+1.8V_VDDIO

4.7UF

0402_R

0402_R

4.7UF

C4D3

C4D5

1

20%6.3VX5R

2

.1UF

0402_R

C4D41

X7R16V10%2

X5R

1.1UF

0402_R

C4D21

X7R16V 6.3V+EMMC_VDDI 2 2 20%10%

.1UF

0402_R

C4D11

10%16VX7R

2

+3.3V_RUN

+1.8V_VDDIO

+3.3V_RUN

+1.8V_VDDIO

9A2<18D2<

8D1<10D2<26A2<

22D8<

32D4<18D2<

26D6< 25D2>

33A2>21D2< 20D2<

234.04602-7R375-0000-D00

EMMC,SPI ROM

30C5>

22B6<

32D3< 30D1<

25B7< 24A2< 22D2< 22C7<

24B2>24B2>

1%

100K

0402_R

R3A2

+1.8V_VDDIO

X7R

10%16V

.1UFC3A1

20402_R

1

1

2

SPI_HOLD_L10C3>10C3>

SPI4_SCKSPI4_MOSI

Thu Jul 23 14:37:00 2015

5

76

8

M6N5T10U9

K6W4Y4AA3AA5

K2

P5M7R10U8

K4Y2Y5AA4AA6

+1.8V_VDDIO

SDIN8DE4-16GBGA169_1

EMMC

U7D1

W6

W5

U5

H4

H3

H5

I123

J2

J5

J4

J3

J6

4.7K

0201_R

R4D12

5%

1

0

1

SDMMC4_DAT<7..0>

SDMMC4_CLK

SDMMC4_CMD

SYS_RESET_L

2

3

4

6

5

7

8A7>

8B3<

8A8<>

8A7>

22A5<31B2>

SOIC_RW25Q32DWU3A1

2

1

1

2

I5832MBIT

43

SPI_ROM_WP_L

0402_R1%

10KR3A1

SPI4_CS0_LSPI4_MISO10C3<

10B3>24B2>

EMMC 4.51

174-0136-000

SPI BOOT ROM

IN

IN

ININ

VCCQ

VCC

VCCQ

VCC

VCCVCC

VCCQ

VSSQVSSQVSSQ

VDDI

VCCQVCCQ

VSSQ

VSS

VSSQ

VSSVSSVSS

CLK

RST*

CMD

DAT0

DAT4

DAT3

DAT2

DAT1

DAT5

DAT7

DAT6

IN

BI

IN

BI

SPI

SERIAL EEPROM

VCCHOLD*

SKDI

CS*DOWP*GND

OUTIN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

10C3>

10C3<>

10C3<>

10C3>

LCD_UD

MODEM_SAR0

GPIO_PG3

LCD_LR

100K

0201_R

EMPTY

100K

0201_R

R2B5

R9B3

+1.8V_VDDIO

1%

2

1

EMPTY

1%100K

0201_R

R9B52

1

2

1%

1

R2B72

100K1%0201_R

1

EMPTY

100K

0402_R

R8B9

1%

1

2

100K

0402_R1%

R8B7

R3B5100K

0201_R1%

EMPTY

1

2R3B4100K

0201_R1%

EMPTY100KR8B22

100KR9B1EMPTY

2

100KR9B2

2

1

2

1

2

100K

+1.8V_VDDIO

R8B32

+1.8V_VDDIO

+1.8V_VDDIO

23A4<

23A7>

23A4<

10C3>

10C3>

10C3<

10C3>

33A2> 32D4< 26A2<21D2< 20D2< 18D2< 10D2< 8D1<

244.04602-7R375-0000-D00

SWITCHES & STRAPS

SPI4_CS3_L

SPI4_SCK

SPI4_MISO

SPI4_MOSI

22B6<

10A3<10A3<

0201_R1%

1

2

1%100K

0201_R

R3B2

1

0201_R1%

1

1%0201_R

2

0201_R

100KR2B2

1%

EMPTY 1

1%100K

0201_R

R2B1

8C3<

22C7<22D2<

BD_ID_STRAP3BD_ID_STRAP2BD_ID_STRAP1BD_ID_STRAP0

23A2<25B7<

EMPTY

1

1%0201_R

1

2 2

1

1%100K

0201_R

EMPTY

R3B1

1

1%100K

0402_R

R2C92

1

EMPTY

1%100K

0402_R

R2C82

1

EMPTY

1%100K

0402_R

R3C72

1

EMPTY

1%100K

0402_R

R3C82

1

8D3<

R2C10

1%100K

0402_R

2

1

1%100K

0402_R

R2C72

1

R3C10

1%100K

0402_R

2

1

1%100K

0402_R

R3C92

1

Thu Jul 23 14:37:01 2015

+1.8V_VDDIO

26A3<>

18C7<

18C7<

10C3<

22C7<

22D7>10B3>

22D7>10B3>

10C3>

FORCE_RECOVERY_L

UART4_RTS_L

UART4_TXD

GPIO_PI0

AP_FORCE_RECOVERY_L5%

2

2.2K

R7A1

0201_R

1

1%100K

0201_R

R1B52

1

EMPTY1%100K

0201_R

R1B62

1

EMPTY100K

0201_R

R1B42

1%100K

0201_R

EMPTYR1B1

1%

11

2

1%0201_R

100KR5E11

+1.8V_VDDIO

2

1

100K

0201_R

R1B22

1%

1

1%0201_R

100KR1B3

SOD882_RAOZ8231A

1

2

CR5E2

1

I249

2

BUTTON_6PTHICK_UNIV

6

SW5E2

1 3

4

5

2

I83

EMPTYJ5E1

1

I85

THR

31B2<

8D3<KB_COL0_AP

26A3<>25C5>22C8<

3

2S23_R

Q4E1

1BSS138LT1

KB_COL0_GATE

RTU002P02SC70S_R

Q4E2

R4E31M

0402_R5%

12

3

2

1

31C6<26A3<>25D2>ONKEY_L

PMU_RESET_IN_L

AOZ8231ASOD882_RI248

CR5E3

1

2

1%100K

1000PF

0402_R

R4E52

1

C5E11

X7R50V10%

0402_R

2

3

4

6

5

200K

0402_R1%

R4E4

+2.5V_AON_RTC

1

2

I105

BUTTON_6P

EMPTY

+2.5V_AON_RTC

THICK_UNIVSW5E1

31C6<24B8<

31C8<24A8<

2

1

31B7>31C6<

J5E2

1THR

I81

31B7>31C8<

3

4

6

BUTTON_6PTHICK_UNIVSW4E1

1

2

0402_R

1000PFC4E71

X7R

10%250V

THR

EMPTY

I103

AOZ8231ASOD882_R

J4E1

1

I250

CR4E1

1

2

5

I107

1011: EMMC BOOT X8 - BOOT MODE OFFNOTE:

1000: SPI BOOT

EMMC BOOT = DEFAULT

BOOT_SEL0

BOOT_SEL1

BOOT_SEL2

BOOT_SEL3

ISOLATE FOR

GPIO_PG0

GPIO_PG1

GPIO_PG2

GPIO_PG3

REWORK EASE

RAM CODE

RAM_CODE[1:0]:SELECTS SDRAM CONFIGURATION FROM BCTRAM_CODE[3:2]:SELECTS SECONDARY BOOT DEVICE FROM BCT

RAM_CODE3

RAM_CODE0

RAM_CODE1

RAM_CODE2

BOARD ID STRAPS

GPIO_PG5

GPIO_PG7

GPIO_PG6

GPIO_PG4

NOTE:

GPIO_PI1

GPIO_PI0

GPIO_PJ7

GPIO_PK7

NOR_BOOT:1 = IROM --> UART0 = NOR

2'B10 = COP2'B11 = SERIAL_ALT

2'B00 = SERIAL JTAG CHAIN CPU AND COP 2'B01 = CPU

ARM_JTAG[1:0]

NOTE:

J LEAD

FORCE RECOVERYBUTTON

PHIDGET

J LEAD

PHIDGET

BUTTONRESET

BUTTONPOWER

J LEAD

PHIDGET

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUTOUT

OUT

OUT

BI

OUT

OUT

OUTGND

GND

OUT

OUT

D

S

G

S

DG

OUT

IN

IN

GND

GND

GND

GND

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+3.3V_RUN

+5V_SYS

+3.3V_RUN

+5V_SYS

32B3<31C2>31A8<30B8<30A5<

31C6<26A3<>24A6>

9A2<

30D1<13D1<

30C5> 26D6< 23A2< 22D8< 18D2<

34D2< 33B7< 32D4< 31D5<20D2< 17D2< 16D2< 15B7<

PMU_REGEN1

+5V_SYS

ONKEY_L

100K

RJU003N03

R1A4

Q1A3

0402_R1%

2

1

2

3

2

30D1<

35D2>26A2<

32D3<

29C1> 27A2<

R1A3

0603_R

29D2<

+3.3V_RUN

2

3305%

1

5%33

0402_R

R1A5

1

YLW_STBYLED_LRHU002N06

SC70S_R

2

Q1A13

1

GRN_PWRLEDYLW_STBYLEDPWRBTN_R_L

330

0603_R

R1A1

+5V_SYS

2

5%

12

THR_RJ1A1

EMPTYR1A72

0

1

0603_R

1

5%

3 4

31B2<26A3<>

86

I144

579FP_9

24B6>22C8<

SC70S_R

254.04

SD CONN & FRONT PANEL HDR

1

602-7R375-0000-D00

WP

J5B1

CON_SDSM1_R

10

9

2

1

3

5

4

7

6

8

CD

SC

EMPTY10K

0402_R

R6B12

1%

1

I87

11

1 C7B1.1UF

0402_RX7R

10%16V2

Thu Jul 23 17:09:29 2015

1 C7B2

0603_R

4.7UF

X5R6.3V10%2

XSOP7_RI93

TVS504PACR7B164315

EMPTY7

HDLED_PWR

FRONT_PANEL2

HDR2X5KEY10

HDLED_L

+5V_SYS

R1A2

5%330

0603_R

+5V_SYS

1

23

2

1

PMU_RESET_IN_L

RST_SWR_L

2

335%

SC70S_R

RJU003N03Q1A2

R1A6

SATA_LED10B7>

0402_R

1

R6B22

4.7K

0402_R5%

1

EMPTY

2

3

0

1

+1.8V_VDDIO

SDMMC3_CLK

+3.3V_SD_CARD

SDMMC3_CD_L

SDMMC3_CMD

SDMMC3_DAT<3..0>

8D1<24A2<10D2<

8B8<>

8B8>

30B1>

8B8>

8A8<

4 6CR7B2

XSOP7_RI95

TVS504PA

5 1 3

7EMPTY

SDMMC3_WP_L

SNN_SDMMC3_CLMP

8D3<

26A2<18D2<

33A2> 32D4<23A2< 22D2< 22C7< 22B6< 21D2< 20D2<

YELLOW STANDBY LED LOGIC IS INVERTED.FIX IN NEXT REV.

FRONT PANEL

OUT

OUT

OUT

IN

D

S

G

21

9

D

S

G

C_WR_PROTECT

GND_EMI2

GND_EMI1DATA2

CLK

VDD

CD_DATA3

CMD

VSS1

VSS2

DATA0

COMMON

DATA1

C_DETECT

D

S

G

OUT

IN

IN

BI

BI

IN

IN

OUT

OUT

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

26D3< 20B7<22C4< 18D3<

10C7>

10C7>

31C6<

18A6<

9A7>

9A7>

9A7>

9A7>

8B2>

10B8>9B7<>

9C8<

22C7<>9C8<8C3<

9C8<

9C8<

9D8<9D8<

+1.8V_VDDIO

9D8<9C8<9D8<

9A8<>

9D8>9C8>

UART2_TXDCAM1_MCLK

PWR_I2C_SCL

CAM_FLASH

CAM1_PWDN

UART2_RTS_L

CAM1_AF_PWDNGEN1_I2C_SCLCAM1_GPIO

CSI_B_D0_NCSI_B_D0_PBR_UART1_RXD

CSI_B_D1_P

CSI_B_D1_N

CSI_A_D0_PCSI_A_D0_N

CSI_A_D1_PCSI_E_D0_PCSI_A_D1_N

CAM_I2C_SDA

CSI_A_CLK_NCSI_A_CLK_P

I145

75

74

72

68

66

69

62

63

60

56

57

50

54

SKT3X25FEMALE_VERT

73

70

71

67

65

64

61

58

59

55

53

52

51 49

44

48

38

42

45

39

36

32

30

33

27

26

24

20

21

18

14

15

8

12

46

47

43

41

40

34

37

35

31

28

29

25

22

19

23

17

16

13

11

10

32D3<

32B4>9A7>

32C4>

30D1< 28D2<32B8<

22D8<23A2<25D2>30C5>30D1<

28C1>

18D2<

10C3>10C3>

LCD_BL_PWMLCD_BL_EN

+1.05V_RUN_CAM_REARCAM2_PWDN

+2.8V_RUN_CAM

9B2< EDP_HPD

9B3>

9B3>9B3>

9B3<>

9B3>

9B3<>

10B1<>9A2<

8B8>

8C7>

32B5>

22D2<10B1>

31C2>

LVDS_TXD2_N

TS_SPI_CS_L

+3.3V_SYS

EN_AVDD_LCD

DP_AUX_N

LVDS_TXD1_P

LVDS_TXD2_P

LVDS_TXD1_N

DP_AUX_P

+3.3V_RUN

TS_CLK+3.3V_RUN_TOUCH

GEN2_I2C_SCL_3.3VGEN2_I2C_SDA_3.3V

9

6

3

2

J3A2

0201_R1%

1

100K

2R2B3

0201_R1%

1

100K

2R2B4

THR_R1

4

5

7

+5V_SYS

5048

I1082_X_2MM

4947

46 45444240383634323028

4341393735

3133

2927

26 25242220181614121086

2123

191715

1113

975

8C7> TS_SPI_SCK 42

J3A1SKT2X25THR_R

13

+5V_SYS

Thu Jul 23 14:37:01 2015

PWR_I2C_SDA

UART2_RXD

GPIO_PU4GPIO_PU5

CLK3_OUT

GEN1_I2C_SDAGPIO_PU6

UART2_CTS_L

ONKEY_L

PMU_RESET_IN_LFORCE_RECOVERY_L

GPIO_PU3GPIO_PU2

GPIO_PU1

HSIC1_DATA

BR_UART1_TXDGPIO_PU0

HSIC1_STROBE

CAM_I2C_SCL

CSI_E_CLK_NCSI_E_D0_NCSI_E_CLK_P

+1.2V_GEN_AVDD+1.8V_RUN_CAM+2.8V_RUN_CAM_AF+1.2V_RUN_CAM_FRONT

8B2<>10B6<>10B6<>

10C6<>

9A8>

8C3>

10C7<22C8<22C7<

10C6<>

10B6<>10B6<>

10C7>

9A8>9C1<9B8<32A5>32C4>

9A8>

9C8>9C8<9C8>

10B8<>10B6<>

10C7<

24A6>

30D1< 29D2<

24A2<

25D2>

31C6<>

24B6>24D5<>

18A6<>

29C1>

23A2<

31C6<

25C5>

18D3<>

27A2< 25D2>

22D2< 22C7<

20B7<>

31B2<

14D1<9D8<

22C7<>

32C5>32C4>

+1.8V_VDDIO

22C4<>

22B6<

20D2<35D2>

EXP:TOUCH/DISP & GENERAL

602-7R375-0000-D00 4.04 26

26D3<>

20D2<21D2<33A2>

16D2<17D2<33B7<34D2<

18D2<32D4<

15B7<32D4<

10D2<25B7<

13D1<31D5<

8D1< +1.8V_VDDIO

+5V_SYS

+1.8V_VDDIO

+5V_SYS

9B7<>

CAM_RST_LCAM2_MCLKCAM2_GPIO

LCD_TE

TS_SPI_MOSITS_SPI_MISO

EN_VDD_BL+VDD_MUX


TS_SHDN_L

GPIO_PK2

TS_RESET_L

9B7>9B7>

LVDS_TXD3_P

LVDS_TXD0_PLVDS_TXD0_N

LVDS_TXD3_N

LVDS_TXD4_NLVDS_TXD4_P

8C3>

9B3>

9B3>

16A3<

9B3>9B3>

9B3>

9B3>

8C7>

8C7>8C7<

10B8<>10B8>

10B3>

10B3>

10B3>

18A6<>27C7<

18A6<18D3<>

27D2> 28C4<

18D3< 20B7<

+1.8V_VDDIO

20B7<>29C4<

22C4< 26A7<

31D2>22C4<>

34D8<26A3<>

35D8<

LDO5

TOUCH SPI

LDO4

LDO7

LDO10LDO 1

NOTES:

OR +3.3V_RUN GATED BY EN_AVDD_LCD (PMIC GPIO4)LVDS / EDP MODULES MAY USE +3.3V RUN

CH0

CH3CH2

CH4

CH1CH2

CH3---CH0CH1

LVDS

LVDS TO EDP MUX

EDP

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

IN

IN

IN

ININ

ININBI

INOUTOUTOUT

OUT

OUT

OUTOUT

OUT

OUTOUT

BIININ

INININ

ININOUT

ININ

ININ

BIBI

IN

BIIN

ININ

ININ

OUTOUT

INOUT

BIBI

OUTBIBI

BI

BIBI

BIBI

BI

INBIBI

ININBI

IN

ININ

IN

IN

INOUT

BI

IN

IN

ININ

INOUT

IN

ININ

ININ

ININ

ININBIIN

IN

ININ

34D8<29C4< 31D2>28C4<27C7<26D3<

EMPTY

+5V_SYS

4PIN_FAN_R

I501

POWER_FAN_SRC

SNN_FAN_TACHJ4A2

35D8<16A3<

25%

0

EMPTYR4A10

R4A5

1

0603_R5%0

0603_R

1

2

2.49K

0402_R1%

R4A112

10%25VX5R1206_R

10UF

+VDD_MUXC5D41

2

1206_R

10UF

X5R

10%25V

C5D11

210%25V

10UF

X5R1206_R

C5D5

2R5C11

11206_R 1%

1

2

0.005

FAN_EN_L

2 2

0603_R5%

R4A70

1

4

A03415S23_R

Q4A2

1

2

3POWER_FAN

3

1

1

2

1

R4A12

1%

Q4A1

0402_R

2.49K

3

1

2RJU003N03

SC70S_R

FAN_EN_GATE

FAN_EN_DR

5%

2

2

0

05%

EMPTY

R4A8

R4A9

1

1

0402_R

0402_R

29B7<

28C8<

27

+5V_SYS

4.04

+5V_SYS31D5<13D1<

602-7R375-0000-D00

32D4<15B7<

DC IN

35D2>26A2< 25D2> 20D2< 17D2< 16D2<

33B7<34D2<29C1>

28C8<27B8<

29D2<30D1<

Thu Jul 23 14:37:02 2015

PMU_REGEN3

FAN_PWM

27A8<

27A7<

28B7<

1%20K

0402_R

R5C102

1

20K1%0402_R

R5C92

1

3.9

0603_R5%

R5C82

1

1206_R

10UFC5C111

+VDD_ACIN

VDD_AC_SNUB

SNN_JACK_RING

1

2

45

3

X5R

+2V_STBY

19B8<

8C3>

25V10%2

30A8<30C8<

C5B21

+5V_STBY

0402_R

.22UF

X5R10V10%

AGND0

2

C6C510UF

0805_RX5R16V10%

1

2

13

29

31C2>U5C1U_SWREG_TPS51220

QFN32

23C5C31UF

10%25VX7R0805_R

3

PWR_JACK_5P

TPS51220A_RF

J5C1THR_R

I480

+VDD_MUX16A3<

1

2

0402_R

200KR5C4

1%

2

1

AGND0R5B1

26D3<31D2> 29C4< 28C4< 27D2>

05%

2

+3.3V_AON27A8<27B4>

34D8<

28C8<

35D8<

0402_R

+3.3V_AONC6C32.2UF

0603_R

10%10VX5R

1

2

AGND0

AGND0

210MILISO6C1

1

AGND0

28

33

2211

14

12

2

0402_RX7R

10%16V

C6C4.1UF

+5V_SYS

TPS51220A_REG_EN

TPS51220A_TRIP

R6B40

2

5%

R5B2

0402_R

1

2

0

1

2

EMPTY0402_R5%

1

AGND0

25%

5%

2

0

EMPTY

0

0402_R

EMPTY

TPS51220A_FUNC

+5V_STBY

R6B7

R5B5

R6B30

1

2

5%

1

AGND027B4>28C8<

10402_R

10402_R

+3.3V_AON

AS3720_5V_VR_EN28B8<29B8<31B6>

27B4>27B8<28C8<

FAN HEADER

VREF5 W/V5SW=5V IOUT(MAX)=400MAVREF5 W/V5SW=5V IOUT(MIN)=200MA

VREF3 IOUT(MIN)=10MAVREF3 IOUT(MAX)=20MA

VREF2 IOUT=100UA

A TRUE PWM, ONLY ON/OFFNOTE: KB_ROW16 IS NOT

BLEED RESISTORS

030-0364-000 FOR AC POWER CORD750-0147-000 FOR 12V BRICK

AC JACK

OVP ENABLED

FSW~500[KHZ]RF[KOHM]=(1X10E+5)/FSW[KHZ]

D-CAP MODE

VOCL ULTRA LOW VOLTAGE

OVP ENABLEDCURRENT MODE

DISCHARGE ENABLEVOCL LOW VOLTAGE

DISCHARGE ENABLE

+VRTC_LDO_OUT EN PU OPTION??

OUT

S

DG

D

S

G

IN

IN

OUT

IN

OUT

POWER

RING

TIP

SHIELD2SHIELD1

IN

IN

OUT

2/2

VREF2

VREG5

VREG3

GND

GND_PAD

VIN

RF

FUNC

TRIP

V5SW

REG_EN

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

IN

IN

30D1<28D2<

284.04

+3.3V_SYS

26D6<

+3.3V_SYS22D2<

.1UF

0402_R

C6C13

26D6<32B8< 30D1< 28C1>

1

X5R

20%25V220%

.1UF

25VX5R0402_R

C6C6110UF

1206_R

C5C71

X5R

22 10%25V

C5C6

1206_R

10UF1

X5R25V10%2

P2503HEANV

+VDD_MUX

DFN3X3

Q6C2

5

43.3V_MAIN_DRVH

16A3<26D3<27C7<

05%

2R5C6

10603_R

27D2>

32B8<22D2<+3.3V_SYS

3.3V_MAIN_ISO

23.2K

4MIL

R5B7

ISO5C2

1%0402_R

0402_R

10K1%

R6B8

POSCAPDPOS_R

330UFC5C101

6.3V20%2

0805_R

10UF

EMPTYC6C101

X5R16V10%2

R6C111

5%0402_R

0

2

1

1

2

2

1

2

1

602-7R375-0000-D00

AGND0

+3.3V VR

SMD

0402_R

10%

X7R16V

L5C22

2

1

SMD_R7.3A1

1

3.3UH

0402_R1%3.48KR6C92

11

1%0402_R

R6C1

1.43K

1

.1UF

1C5C1

2

EMPTY

EMPTY

1000PF

3.3V_MAIN_SNUB

R6C122

15%0805_R

1

I873

6

C6C111

0402_RX7R

10%50V2

1

20402_R

C6C7

.1UF

1

20%

X5R25V

23.3V_MAIN_VBST_RC

R6C7

05%

20402_R

1

Thu Jul 23 14:37:02 2015

3.3V_MAIN_VFB

3.3V_MAIN_CS_P

3.3V_MAIN_SW

3.3V_MAIN_DRVL

3.3V_MAIN_CS_N

3.3V_MAIN_DRVH_R

3.3V_MAIN_VBST

29C4<

1

34D8< 31D2>

QFN32

35D8<

U_SWREG_TPS51220

6

U5C1

+3.3V_SYS

10K

0402_R

R5C32

1%

1

29C8<

TPS_SKIPSEL5%

2

0

R5C1

0402_R

1+5V_STBY27A7<27B4>

+3.3V_AON R6C6

7

30

31

32

4

5

8

93.3V_MAIN_COMP_RC

10

.1UF

0402_R

EMPTY

C6C21

X7R16V10%2

3.3V_MAIN_PGOOD_R

3.3V_MAIN_RST

25%0

5%0

2

EMPTYR5B61K

2

5%0402_R

EMPTY

3.3V_MAIN_COMP

C6B2.1UF

1

1

0402_R

16VX7R

10%2

EMPTY

50V5%

150PF

C0G

C5B3

0402_R

1

20402_R1%10KR6B92

1

0402_R

0402_R

+2V_STBY

R6C5

31A8<

1

EMPTY

1AS3720_5V_VR_EN

27C4>29B7<

31B6>27A8<

27B8<27A8<

29B8<

27B4>

SPM6530T-3R3M

WITH THE LS FET GNDSO THAT THEIR GNDS HAVE A COMMON SHAPEPLACE DCDC INPUT AND OUTPUT CAPS

DCR 27 MOHM TYP

CAD NOTE:

ESR = 25MOHMIRMS = 2.4A6TPE330MAP

RX

RC

CX

LAYOUT NOTE:

VOCL~60MV

SO THAT THEIR GNDS HAVE A COMMON SHAPEWITH THE LS FET GND

PLACE DCDC INPUT AND OUTPUT CAPS

CX*(RX*RC/(RX+RC))=LX/DCR

IOCL(PEAK)=VOCL*(1/DCR)*(RX+RC)/RC

IOCL(PEAK)~7.0A, IOCL(AVG) = 6.3A

FLOAT EN PIN TO TURN ON

RGV[KOHM]=200XIOUT(MAX)*IOUTMAX*VOUT/IOCL(PEAK*VDROOPMV

IN

IN

OUT

D2

D1

S1

S2G2

G1

OUT

IN

OUT

1/2

DRVH

SW

VBST

DRVL

CSP

CSN

VFB

SKIPSEL

PGOOD

EN

COMP

IN

IN

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+5V_SYS

34D2<

32D4<

30D1<

27A2<

25D2>

17D2<15B7<

35D2>

33B7<

31D5<

29D2<

26A2<

20D2<

16D2<13D1<

+5V_SYS31D5<13D1<

32D4<15B7<

34D2< 33B7<17D2< 16D2<

35D2>20D2<29C1> 27A2< 26A2< 25D2>

+5V_SYS

DPOS_R

330UF

EMPTY

POSCAP6.3V20%

C5C9

20%25VX5R0402_R

.1UFC6C121

0402_R

.1UFC6C81

X5R25V 22 20%

1

2

10UF

0805_R

C6C91

2 16VX5R

10%

R6C100

0402_R5%

2

1

SMD

L5C12

SMD_R1

0402_R1%3.48K

7.3A

3.3UH

R6C82

1

2R6C2

10402_R 1%

1.43K

C5C212

5V_MAIN_SNUB

30D1<

C5C5

1206_R

10UF

X5R

1

25V10%2

10UF

1206_R

C5C41

X5R25V10%2

Q6C1

+VDD_MUX

5

P2503HEANV4

1K

EMPTY

0805_R

R6C32

5%

1

0402_R

.1UF

EMPTY

C6C11

X7R16V10%2

I227DFN3X3

3

6

220%

0402_R1X5R25V

1

.1UF

5V_MAIN_DRVH

C5C8

2

16A3<

R5C5

26D3<

15V_MAIN_DRVH_R

27C7<

24

28C4< 27D2>

2

5%

5V_MAIN_VBST_RC

0603_R0

25%

00402_R

5V_MAIN_DRVL

5V_MAIN_CS_P

5V_MAIN_SW

R5C75V_MAIN_VBST

18

27

25

26 1

294.04602-7R375-0000-D00

5V_MAIN_ISO

4MILISO5C1

R5B3

2

1

2

40.2K

10K

0402_R1%

0402_R1%

R6B6

1

2

1

AGND0

+5V VR

10%

X7R16V

.1UF0402_R

Thu Jul 23 14:37:02 2015

16

17 5V_MAIN_CS_N

5V_MAIN_VFB

31D2>34D8<35D8<

19

U5C1U_SWREG_TPS51220

QFN3220

215V_MAIN_RST

5V_MAIN_PGOOD_R

100K

0402_R

EMPTYR5C22

+5V_SYS

1%

1

25%

R6C41

00402_R

AS3720_5V_VR_EN

TPS_SKIPSEL28C7>

31B6>28B8< 27A8<

15

EMPTY

EMPTY

5V_MAIN_COMP_RC

2 R5B4

EMPTY

1K

0402_R5%

1

C6B11

0402_R

.1UF

X7R16V10%2

150PF

0402_R

C5B1

C0G

1

50V5%2

0402_R

10K

+2V_STBY

5V_MAIN_COMP

R6B5

1%

2

1

27C4>28B7<

SO THAT THEIR GNDS HAVE A COMMON SHAPEPLACE DCDC INPUT AND OUTPUT CAPS

ESR = 25MOHMIRMS = 2.4A6TPE330MAP

WITH THE LS FET GND

CAD NOTE:

SPM6530T-3R3MDCR 27MOHM TYP

RX

RC

CX

WITH THE LS FET GND

PLACE DCDC INPUT AND OUTPUT CAPSLAYOUT NOTE:



SO THAT THEIR GNDS HAVE A COMMON SHAPE

VOCL~60MV

IOCL(PEAK)~7.0A, IOCL(AVG) = 6.2A

IOCL(PEAK)~9.8A

WITH THE LS FET GND


VOCL~60MV

LAYOUT NOTE:


PLACE DCDC INPUT AND OUTPUT CAPSSO THAT THEIR GNDS HAVE A COMMON SHAPE

FLOAT EN PIN TO TURN ON

RGV[KOHM]=200XIOUT(MAX)*IOUTMAX*VOUT/IOCL(PEAK*VDROOPMV

OUT

IN

D2

D1

S1

S2G2

G1

IN

IN

IN

1/2

DRVH

SW

VBST

DRVL

CSP

CSN

VFB

SKIPSEL

PGOOD

EN

COMP

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+5V_SYS

+5V_SYS31D5<13D1<

33B7< 32D4<16D2< 15B7<

+3.3V_SYS

+3.3V_RUN

25B7<

+3.3V_SYS

+3.3V_RUN

22D2<

9A2<

28C1> 26D6<

22D8< 18D2<

+3.3V_SD_CARD

28D2<

23A2<

34D2<17D2<

35D2>29D2< 29C1> 27A2< 26A2< 25D2> 20D2<

25D2>26D6<30C5>32D3<

32B8<

A1

U4B2

TPS22908BGA04_R

A2

C4B5.1UF

1

10%

0402_RX7R16V2

22UF

0805_R

+3.3V_SYS

C4B4

30D1<26D6<

1

20%

X5R6.3V2

16VX7R

.1UF

10%

0402_R

C4B6

2

1

19D2<18D2< 22D2<

304.04602-7R375-0000-D00

LOAD SWITCHES

17D2<

B1

I490

15D1<9A2< 10D2< 13D1< 14D1<

B2EN_VDD_SD

+5V_SYS

+3.3V_LP0

8

S

1

0402_R

.1UFC2C81

X7R

10%16V

2

Thu Jul 23 14:37:02 2015

SLG5NV1430V

25D2>23A2<22D8<18D2<32D3<9A2<

LED_5V_RUN

CR5E1

0402_R

330R5E10

5%

+3.3V_RUN

2

GRN0603_R2.1V14MA

1

2

1

+3.3V_RUN

C5D2.1UF

0402_R

1

+5V_SYS

S

81

TDFN-6_RSLG5NV1430V

EMPTY

5%0

2R5D2

1

U5D1

0402_R

D

I321

72

2200PFC5D3

3.3V_LP0_CAP

1

+3.3V_SYS

EN_RUN_VREG

2R4D2

15%0

5%0

2R5D1

1

0402_R

0402_R

PMU_REGEN3

PMU_REGEN1

30A8<19B8<

32B3<

31A8<25C2<

31C2>27C4<

31C2>30A5<

X7REMPTY

8C3>

25%

0

EMPTYR2D7

10402_R

U2D17

TDFN-6_R+3.3V_SYS

7

D

2+VCAP_SLUGO3

PMU_REGEN1

16V10%2

25C2<30B8<

9A2<

31A8<31C2>

I4663300PF

0402_R

C9D11

X7R

10%250V

+1.8V_VDDIO_LP0_OFF

32B3<

50VX7R0402_R

10%2

5%

2

A1

B1

0

TPS22908BGA04_R

R2C21

U2C1

0402_R

I489

B2

A2

+1.8V_VDDIO

PMU_REGEN3

1

2

C2C2.1UF

16VX7R

0402_REMPTY10%

EMPTY

30C8<19B8<

31C2>27C4<

+3.3V VDD GATINGFOR RAILS ON IN LP0

TEGRA +3.3V SEQUENCING"ENABLE AFTER RTC RAIL IS UP"

DE-POP WHEN INSTALLED IN CHASSIS

FOR RAILS OFF IN LP0BASED ON PM359

"ENABLE AFTER RTC RAIL IS UP"

FOR RAILS OFF IN LP0+1.8V VDDIO GATING

TEGRA +1.8V VDDIO SEQUENCING

IN

IN

IN

OUT

LOAD SWTICH

VOUT

GND

VIN

ON

OUT

OUT

AN

CAT

S

VDDGND

D

ONCAP

IN

IN

IN

IN

OUT S

VDDGND

D

ONCAP

LOAD SWTICH

VOUT

GND

VIN

ONIN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+VDD_MUX

+VDD_MUX16A3<27C7< 26D3<

8B3<

32B3<

CLK_32KHZ_PMU

30C8<31A8<

EMPTY

EMPTY

30A8<27C4<30B8<30A5<

1%

2R6D9

100402_R

1

33D8<

12.5PF20PPM

Y6D1

19B8<

33C7<

31A1>31B1<

26D6<

25C2<

8C3<

1I320

232.768KHZ

CER_2P_R

AP_THERMISTOR

TP_CLK_32K_WIFI

CLK_32KHZ_PMU_R

2

2

27D2>35D8< 34D8< 29C4< 28C4<

1%100K

0402_R

R6D81

1%100K

0402_R

R4A61

PMU_REGEN3PMU_REGEN1

IGPU_PWRGD

AS3720_XIN32KAS3720_XOUT32K

EN_AVDD_LCD

+1.6V_LP0SKIN_TEMP

D6G6D5E4

D2B4C2B3

D1

G1G2

AS3722

U6D1BCTT-09

BGA

F2

H1L9

C6D5.1UF

0402_R

10%16VX7R

F4

H6

G4

E2

D7

B10

D8

C1

33D8<31C2>

4.7PFC6D1

0402_R

+/-0.25PF50VC0G

31C2<

+1.6V_LP0

SKIN_TEMP

1

2

24B6> 25C5>22A5< 23D7<

R5D42EMPTY

8B3<

26A3<>22C8<

100K

0201_R1%

EMPTY10KRT5D1

1

1

0402_R10V

2

0402_R

56PF

C0G50V

C5D7EMPTY

1

2 5%

314.04602-7R375-0000-D00

PMIC: LOGIC AND GPIOS

SYS_RESET_LPMU_RESET_IN_L

+/-0.25PF

4.7PFC6D21

50VC0G0402_R

2

J8L5

P1J7F7

A1A14

P14K4F1

I305

L7

E1

L6

L8

H2H4

J2J4

AS3720_CREF

.1UF

16VX7R

10%

0402_R

C5D131

2

Thu Jul 23 17:08:43 2015

0402_R

221K

X7R

.1UF

0402_R

16V10%

16VX7R0402_R

.1UF

10%

+1.8V_VDDIO

AS3720_EN5V

AS3720_RBIAS

+VBACKUP

LID_CLOSE_PMU_L

SNN_AS3720_SDO

TEMP_THERM_PMU

R5D6

1

2

C5D16

C6D6

+VDD_MUX_AS3720_VBAT

ONKEY_PMU_LPMU_INT_L

+5V_SYS13D1<25D2> 20D2< 17D2< 16D2< 15B7<

1

2

1

2

0

5%

PWR_I2C_SDAPWR_I2C_SCL

2

8B3<

EMPTY

1%

2

100K

R6D11

R5E1

0201_R

1

5%

2

0

R6D12

0402_R

0402_R

1

1

30D1<35D2> 34D2< 33B7< 32D4<

8B2<>8B2>26A7<

+2.5V_AON_RTC

ONKEY_L

26A3<>

24A6>

31C8<24A8<

26A3<>25D2>

26A2<29D2< 29C1> 27A2<

1%100KR4E22

31B7> 24B8<

+1.8V_VDDIO

2

10402_R

10K1%

EMPTY

10%

X7R16V

0402_R

.01UF

0402_R

R6D10

C4E1

1

1

25%

2

00402_R

R4E11AP_OVERHEAT_L

+2.5V_AON_RTC31C6<24A8<24B8<31B7>

18A1>

CPU_OC_INT

5%

2

0

R6D2

AC_OK_PMU_L

10402_R

1%

2

1UNKNOWN

0.014F

SMD_3225POLYACENE

C6D41

2.6V2

.022UF

0402_R

C5D14

05%

2R6D5

10402_R

X7R

1

16V10%2

0402_R

1UFC5D81

X5R16V10%2

EMPTY1%200K

0402_R

R6D62

1

0402_R

200K

0402_R

.1UF

R5D8

C6D3

AS3720_5V_VR_EN

+VDD_MUX

27A8<

1%

2

1

EMPTY

+2.5V_AON_RTC

28B8<29B8<

1

X7R16V2 10%

4

5

2

SC70_6D_FLIP_FLOP_6PIN

3

1

U5D2

I400

6

AC_OK_CLK

AC_OK_CLR_L

24B8< 24A8<31C6<

8B3<

31C8<

1%200K

0402_R

R5D32

1

.022UF

16VX7R

10%

0402_R

C5D61

2

EMPTY

2

25%0

R6D31

10402_R

0402_R 5%0

R6D4

3.3V_MAIN_PGOOD_R

PMU_REGEN1

28C7>

32B3<

31C2> 30B8<30A5< 25C2<

PMU_REGEN3 AND PMU_REGEN1 MUST BE AT 1.8V LEVELSFOR SEQUENCE/DISCHARGING

I2C ADDR: 7'H40

A QUIET CONNECTION TO GNDGNDSENSE NEEDS TO HAVELAYOUT NOTE:

OUT

OUT

OUTOUTOUT

OUTIN

INOUT

IN

OUT

INOUT

THERM

SEC 1 OF 3GPIO0GPIO1GPIO2

CLK32K

GPIO3GPIO4GPIO5GPIO6GPIO7

XIN32KXOUT32K

XRES_INXRES_OUT

VSSAVSSAVSSA

VSSAVSSA

GNDSENSEVSSA

VSS_GPIO

VSUP_ANAVSUP_GPIOVDD_GPIO_LV

ONKEY

SDA_SDIENABLE3_SDO

SCL_SCLK

XINT

SCSB

LID

OC_PWRGD

VBATEN5V

AC_OK

THERM

VBAT_BKUPV2_5

RBIASCREF

IN

OUT

INBI

IN

IN

IN

IN

OUT

VCC

Q

GNDCLR*

D

CLK

OUT

OUT

IN

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

0603_R

+1.8V_VDDIO

R6D12

5%36

1

3

1

2S23_R

Q5D1BSS138LT1

+3.3V_RUN

0402_R

10K

PMU_REGEN1_L

R6D7

+5V_SYS

1%

2

1

3

1BSS138LT1

Q5D2

+3.3V_RUN

PMU_REGEN1

+5V_SYS

+5V_SYS30D1<13D1<

9A2<25D2>18D2<

26D6<22D8<

30C5>23A2<

31C2>

30B8<25C2<

31A8<30A5<

+1.8V_VDDIO

30D1<+1.8V_VDDIO

14C7<14C1<

8D1<25B7<10D2<

26B4<

9C4<9C2<

8B8<

26B4<26B4<14D1<9D8<9C1<

26B7<

S23_R 2

324.04602-7R375-0000-D00

PMIC: CNTL, INT SW, LDOS

26B7<

8A3<

Thu Jul 23 14:37:03 2015

+1.8V_RUN_VPP_FUSE

31D5<15B7<

26A2<18D2<

8A8<9B8<

26D6<26B4<

5D2<

8C3<

35D2> 34D2< 33B7<29D2< 29C1> 27A2< 26A2< 25D2> 20D2< 17D2< 16D2<

33A2>21D2< 20D2<

+1.8V_RUN_CAM

+1.05V_RUN_AVDD

22B6<22C7<

C6E7

0402_R

2.2UF

X5R6.3V20%

+VDDIO_SDMMC3

2.2UF

0402_R

C6E3

X5R

20%6.3V

1

2

0402_R

2.2UF

+1.2V_RUN_CAM_FRONT+1.05V_RUN_CAM_REAR

C6E1

20%

2.2UF

6.3VX5R0402_R

+1.2V_GEN_AVDD

C7D912.2UF

0402_R

C6D20

6.3VX5R

220%

1

X5R

20%2 6.3V20%

X5R0402_R

6.3V

2.2UFC6E21

2

1

2

1

2

22D2<23A2<24A2<

B9

A13

AS3722BGA

BCTT-09U6D1

A7

A11A10A9

B14

A12

C6E6

0402_R

4.7UF

X5R6.3V

A8

20%

1

2

+3.3V_RUN

+1.35V_LP0

6.3V

0603_RX5R

10%

4.7UFC6D231

2

C6E4

0402_R

2.2UF

20%6.3VX5R

A3

C6D111

1

2

+1.8V_VDDIO

+3.3V_SYS

33B2>32B8< 7A8< 6A8< 5B3< 5A8<

28D2<22D2<

30D1<26D6<28C1>

2.2UF

2.2UF

0402_RX5R6.3V20%

C6D101

2

+3.3V_RUN_TOUCH+2.8V_RUN_CAM_AF

+1.05V_LP0_VDD_RTC

+2.8V_RUN_CAM

6.3VX5R

20%

2.2UF

0402_R

C6D19

0402_R

2.2UFC6D21

2

1

20%6.3VX5R

2

05%0402_R

R5D71+1.8V_RUN_VPP_FUSE_R

C6D16

0402_R

2.2UF

20%

X5R6.3V

1

2

C6D13

0402_R

2.2UF

X5R6.3V20%

1

2

1

2

B7

A2

A5B8

I128

B5

0402_RX5R6.3V20%

B6

2

20%

0402_R

6.3V

1X5R

C6D17

A4

A6

1C6D12

0402_RX5R6.3V20%

2.2UF

2.2UF

+VDD_CORE

+1.35V_LP0

2

2

+5V_SYS

C6D181

0402_R

2.2UF

X5R

20%6.3V

B1

C6D91

2

2.2UF

0402_RX5R6.3V20%2

+3.3V_RUN

5A8<

34A2> 11D8< 11A1<

33B2> 32D8< 7A8< 6A8< 5B3<

RAIL DISCHARGE

D

S

G

IN

IN

IN

IN

D

S

G

OUT

OUT

OUT

OUTOUT

OUTOUT

IN

IN

OUT

OUT

OUTOUT

IN

MUXPWR

SEC 2 OF 3

PMOSLDO

SW

NMOSLDO

LDO0

LDO6LDO1

LDO7LDO5LDO2

LDO4

LDO3

LDO10

LDO11

LDO9

VIN_LDO2_5_7

VIN_LDO3_LV

VIN_LDO3_SW

VIN_LDO9_10

VIN_LDO0

VIN_LDO1_6

VIN_LDO3_4

VIN_LDO11

IN

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

22UFC5D11

0805_R

1

X5R

20%6.3V2

0805_R

22UF

+1.35V_LP0

C5D12

11B2>

34C7>34B7>

34B7<>

11B2>

35A7>35B7>35C7>

35A7<>

35C7<>

34A7>

11A2>11B2>

34A7<>34A7<>

11A2>11A2>

35D7<>

35A7<>35B7<>35B7<>

34C7<>

1

X5R6.3V2 20%

0805_R

22UFC6D81

X5R6.3V20%2

0.47UH L6D11 2

SMDSMD_R

24MILISO5D1

5.5A

1

32D8<32B8<7A8<6A8<5B3<5A8<

22B6<26A2<

33

25B7<21D2<20D2<18D2<

19B8<

10D2<

14D2<14C8<

32D4<8D1<

24A2<23A2<22D2<22C7<

4.04602-7R375-0000-D00

PMIC: DCDC

14C1<9D2<9D1<

+1.8V_VDDIO

EMPTY

0603_R

22UF

0603_R

22UF

0805_R

22UF

+1.05V_RUN

C5D9

C6E8

C6D22

20%

X5R4V2

1

24MIL

0603_R

22UF

ISO5E1

C5D10

X5R

20%4V2

1

1

20%

X5R4V2

1

0603_R

EMPTY

22UFC6E9

4VX5R

20%

1

2

1L6E2

21.0UH1

3.7A SMDSMDA_R

1L6E1

21.0UH1

0402_R

EMPTY

1X5R

10%16V

SMD3.7A SMDA_R 4MIL

20%

X5R6.3V

1

2

0805_R

22UFC5D15

6.3V20%

X5R

1

2

2ISO5D2

1

Thu Jul 23 14:37:03 2015

.01UF

VDD_GPU_SENSE_P

AS3722_TEMP1_SD6AS3722_TEMP2_SD6

AS3722_CTRL2_SD6

VDD_GPU_SENSE_N

AS3722_TEMP3_SD0AS3722_TEMP2_SD0AS3722_TEMP1_SD0

AS3722_CTRL6_SD0

AS3722_CTRL2_SD0

1.8V_LP0_LX

1.05V_RUN_LX

AS3722_TEMP_SD1

VDD_CPU_SENSE_NVDD_CPU_SENSE_P

AS3722_CTRL2_SD1AS3722_CTRL1_SD1

VDD_CORE_SENSE_PVDD_CORE_SENSE_N

AS3722_CTRL1_SD0

AS3722_CTRL5_SD0AS3722_CTRL4_SD0AS3722_CTRL3_SD0

SNN_AS3722_TEMP4_SD0

SNN_AS3722_CTRL8_SD0

SNN_AS3722_CTRL7_SD0

1.35V_LP0_FB

1.8V_LP0_FB

1.05V_RUN_FB

1.35V_LP0_LX

AS3722_CTRL1_SD6

C5D17

BGA

BCTT-09U6D1

1%

2

100K

R6E11

C14L14L13

K11

F11G11C13

K13J13J14H14H13G14G13F14F13E14E13

K14

H11J11

D14

G9H9D13

N5

K1

N7

P5P7

N4

M1

N8

P8P4

AS3722

E11

B11

D10

B12

F8

D9DVFS_CLK_ASM

25%

0

R5E3

DVFS_PWM_ASM

05%

20402_R

1

N6P6

2.2UFC6D14

0603_R

10VX5R

10%

L1

1C6D1510UF

0805_R

16VX5R

10% 2

0402_R

USB0_ID_PMU

R5D5

BATT_TS

17B1>

R5E5100K

0402_R1%

R5E469.8K

2

1

2

+1.6V_LP0

0402_R

1

2R5E2

15%0402_R

0

DVFS_CLK

CPU_PWR_REQ

DVFS_PWM

CORE_PWR_REQ

AP_THERMISTOR

10A3>

8B2>

31C2<

8B2>

10A3<>

1

2

+5V_SYS

EMPTY

29D2<13D1<

0402_R1%

1

35D2> 34D2< 32D4< 31D5< 30D1<15B7<16D2<17D2<20D2<25D2>26A2<

31B1<

29C1> 27A2<

31C2>

K2

M2N1

N3P2P3

N14P13

2

M13M14

L10

N10P10

P9N9J1

N12P12

N11

L2C6D7

16V

0805_R

10%

10UF

X5R

1

2

C6D24

X5R

10UF

10%16V

0805_R

1

2

P11

I381

0805_R

16V10%

10UF

X5R

C6E51

2

REMOTE SENSE

IOUT = 1AIOUT+RIPPLE = 1.2A

IOUT = 4.5A

IOUT = 1AIOUT+RIPPLE = 1.3A

PLACE DCDC INPUT AND OUTPUT CAPSSO THAT THEIR GNDS HAVE A COMMON SHAPEONE PAIR IS SHOWN HERE, PLEASE REPEAT

IOUT+RIPPLE = 5A

(2A)

LAYOUT NOTE:

FOR SD2, SD3, SD4

(1A)

(1A)

(1A)

ININBI

INBI

IN

INININ

BIBIBIBIBIBIININ

INBIBIININ

OUT

OUT

OUT

IN

IN

IN

IN

ININ

IN

IN

SEC 3 OF 3

TEMP1_SD6TEMP2_SD6

CTRL2_SD6CTRL1_SD6FB_SD6_N

CTRL6_SD0CTRL7_SD0

TEMP2_SD0TEMP1_SD0

TEMP4_SD0TEMP3_SD0

FB_SD6_P

CTRL5_SD0

CTRL8_SD0

CTRL4_SD0

FB_SD0_P

CTRL1_SD1CTRL2_SD1

FB_SD0_N

CTRL2_SD0CTRL1_SD0

CTRL3_SD0

TEMP_SD1

FB_SD1_N

FB_SD2LX_SD2LX_SD2LX_SD2LX_SD2

VSS_SD2VSS_SD2

FB_SD1_P

VSS_SD2

FB_SD3LX_SD3LX_SD3LX_SD3

VSS_SD3VSS_SD3VSS_SD3

VSS_SD2

LX_SD4LX_SD4

VSS_SD4

FB_SD4VSS_SD4

VSS_SD5VSS_SD5

FB_SD5LX_SD5LX_SD5

PWM_CLK2PWM_DAT2

CORE_PWRREQ

PWM_CLK1PWM_DAT1

CPU_PWRREQ

VSUP_SD3

VSUP_SD2

VSUP_SD3

VSUP_SD2

VSUP_SD5VSUP_SD5

VSUP_SD4VSUP_SD4

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

+5V_SYS

+5V_SYS31D5< 30D1<15B7< 13D1<

32D4<16D2<

35D2> 33B7<20D2< 17D2<

11D4<11B1<+VDD_GPU_AP

25D2>29D2< 29C1> 27A2< 26A2<

EMPTY

C3D747UF

1

20%

1206_RX5R6.3V2

C3D91

1206_RX5R

20%6.3V

47UFC3D6

C3D8

1

2

6.3V20%

X5R0805_R

47UF

47UF

6.3VX5R0805_R

20%

C8D3

C8D41SMD

L8D22

SMD_R4.7A1

2

2

1SMD

L8D121

SMD_R4.7A

1C8D61SMD

L8D32

SMD_R4.7A1

47UF 47UF47UF

PMIC: TK1 GPU AND CORE

32B8<11D8<11A1<

4.04 34

Thu Jul 23 14:37:03 2015

602-7R375-0000-D00

EMPTY

6.3V

1206_RX5R

20%2

+VDD_CORE

EMPTYC9A5

X5R6.3V

0805_R

47UF1

20%2

6.3V20%

X5R1206_R

2

0805_R

6.3V20%

X5R

0805_R

47UF

6.3V20%

X5R

C8D5

2

1SMD

L8D42

SMD_R4.7A1

2

0805_R

47UF

6.3V20%

X5R

C9A61

2

2

0805_R

47UF

C2A6

C2A5

X5R6.3V

1SMD

20%2

1

2SMD

47UF

0805_RX5R6.3V20%2

0.68UH

10UF

10%

X5R1206_R

25V

0.68UH

0.68UH

0.68UH

25VX5R1206_R

10%

10UF

SMD_R

SMD_R

10UF

1206_R

25VX5R

10%

C3D5

L2A1

L2A2

C2A4

C8D8

1C8D210UF

2

1206_R

25VX5R

10%

1

2

A2AS3728

CSPU8D1

D2

25VX5R1206_R

10%

10UFC3D41C8D1

10UF

2X5R25V

1206_R

10%

10402_RX5R

C3D1

1

25V20%

C3D3

.1UF

2

2

0402_R.1UF

20%25VX5R

VDD_GPU_LX1

VDD_GPU_BOOST1

VDD_GPU_BOOST0

VDD_GPU_LX0

B2C2

A1A3B3C3

F1

D3

F3E3

A4

C4B4

1

2

1 C3E1

10%

X5R1206_R

25V

10UF

2

C3E51

25VX5R

20%

0402_R.1UF

2

VDD_GPU_LX2

VDD_GPU_BOOST2

B2A2

C2

A1

B3A3

C3

AS3728

F2E2

C1

B1

E1

D1

F4E4D4

0402_R

C3D2

+5V_SYS

11UF

10%16VX5R

2

U8E1

I19

CSP

F2E2D2

C1

1206_R

10UFC8D71

25VX5R

10%2

10UF

10%

X5R25V

1206_R

C3E2

0402_R

C3E4

+5V_SYS

1UF

16VX5R

1

AS3722_TEMP1_SD6

AS3722_CTRL1_SD6

1

2

+VDD_MUX31D2>

28C4<

27C7<16A3<

35D8<

29C4<

27D2>26D3<

33C3<

33C3<>

1

2

10%2 C3E310402_RX5R25V20%

.1UF

2

110UF

1206_R

C9A3

X5R

1

VDD_GPU_BOOST3

VDD_GPU_LX3

F1

D3E3F3

A4B4C4

25V2 210%

0.68UH

0402_R

25VX5R

1

20%

C2A1

.1UF

2

14.7A

4.7A

0.68UH1

0402_R

25VX5R

1

.1UF

C2A22

20%

VDD_CORE_LX1

VDD_CORE_LX0

B2A2

C2

VDD_CORE_BOOST0A1A3B3C3

F1VDD_CORE_BOOST1

D3E3F3

AS3728

E1

B1

D1

E4D4

F4

I126

1206_R

10UFC2A3

X5R

1

X5R1206_R

C9A410UF

25V 25V U2A22CSP

E2D2

F2

C1

B1

E1

D1

10% 10%

B4A4

C4

I64

D4E4F4

AS3722_TEMP2_SD6

AS3722_TEMP_SD1

AS3722_CTRL2_SD1

AS3722_CTRL1_SD1

AS3722_CTRL2_SD6

1

33C3<

33C3<>

2

0402_R

C9A11UF

1

16VX5R

10%2

+5V_SYS

33B3<

33B3<>

33B3<>

PLACE DCDC INPUT AND OUTPUT CAPSLAYOUT NOTE:

IF REMOVING PMIC BLOCKSCTRL2_SD6 MUST ALWAY BE USED!IE, REMOVE THE OTHER BLOCK FIRST

WITH THE AS37P018 GND PINSSO THAT THEIR GNDS HAVE A COMMON SHAPE

WITH THE AS37P018 GND PINSSO THAT THEIR GNDS HAVE A COMMON SHAPEPLACE DCDC INPUT AND OUTPUT CAPSLAYOUT NOTE:

1.6MMX2.4MMX0.6MM

1.6MMX2.4MMX0.6MM

1.6MMX2.4MMX0.6MMSD1 CORE (8 MAX)

IN

OUT

OUT

LX12LX11

LX13

LX21

LX23LX22

PVSS1PVSS2PVSS3

BOOST2

BOOST1

HVSUP1HVSUP2HVSUP3

5VSUP

HVSUP4HVSUP5HVSUP6

CTRL1

TEMP

CTRL2

PVSS6PVSS5PVSS4

IN

BI

OUT

LX12LX11

LX13

LX21

LX23LX22

PVSS1PVSS2PVSS3

BOOST2

BOOST1

HVSUP1HVSUP2HVSUP3

5VSUP

HVSUP4HVSUP5HVSUP6

CTRL1

TEMP

CTRL2

PVSS6PVSS5PVSS4

LX12LX11

LX13

LX21

LX23LX22

PVSS1PVSS2PVSS3

BOOST2

BOOST1

HVSUP1HVSUP2HVSUP3

5VSUP

HVSUP4HVSUP5HVSUP6

CTRL1

TEMP

CTRL2

PVSS6PVSS5PVSS4

BI

OUT

BI

BI

OUT

C

B

A

D

2 14 3

DATE

REV PAGE

TITLE

DOC NUMBER

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

4 3 2 158 7 6

+5V_SYS

+5V_SYS

11C8<

27A2<13D1<

31D5< 30D1< 29D2< 29C1>20D2< 17D2< 16D2< 15B7<

11B1<

47UFC4D181

47UFC4D101

1206_R

EMPTYX5R6.3V20%22

X5R6.3V20%

1206_R

32D4<25D2>26A2<

33B7<34D2<

C4D1947UF

1C4D11

+VDD_CPU_AP

47UF1

6.3V

0805_R

47UF

EMPTY

C7D5

C4D8

1206_R

10UF1

X5R25V

SMD2

10%2

SMD_R4.7A

0.68UHL7D2

1

1

X5R

20%220%

47UF

1206_R

6.3VX5R

C4D71C7E11

2

47UF

0805_RX5R

2 20%6.3VSMD

2SMD_R4.7A

0.68UHL7D3

1

10UFC7E4

20%6.3VX5R1206_R

22X5R6.3V20%

1206_R

47UF

0805_R

6.3V

EMPTY

C7D11

20%

X5R

220%

47UF

1206_R

6.3VX5R

C4D61

2

47UF

0805_R

C7D61

2X5R6.3V20%

25VX5R

10%

1206_R

L7E12SMD

2SMD

L7E2

SMD_R4.7A1

SMD_R4.7A1

354.04

Thu Jul 23 17:11:40 2015

602-7R375-0000-D00

VDD_CPU VR6.3V

47UF

1206_R

EMPTY

C7E31

X5R

47UF

X5R0805_R

C7D2147UF

0805_R

C7E21

X5R

20%220%6.3V22 6.3V

20%

2SMD

2

L7D4

L7D1

SMD_R4.7A1

1SMD4.7A SMD_R

0402_R

0402_R

0402_R

0.68UH

0.68UH

0.68UH

0.68UH

0402_R

0402_R

1

2

0402_R

C7D3

X5R1206_R

10UF1

25V10%2

1X5R

20%25V

C4D13

.1UF

2VDD_CPU_BOOST1

VDD_CPU_LX1

C2B2A2

C3B3A3A1

25V

1X5R

20%

.1UF

C4D172

VDD_CPU_LX2

VDD_CPU_BOOST2

C4E310UF

1

F1

D3

F3E3

A4B4C4

AS3728

I144

U7D2CSP

F2E2D2

C1

10UF

1206_R

C7D71

X5R

C4D21

X5R1206_R

10UF1

25V 25V10%2

0402_R

10%2

16V

1X5R

C4D15

1UF

B1

E1

D1

D4E4F4

10%

10UFC4E21

10UFC7E51

U7E1

25V20%

1X5R

C4E6

.1UF

2

25VX5R

10%

1206_R

VDD_CPU_BOOST3

2

X5R

1

.1UF

C4E42

25V20%

VDD_CPU_LX4

VDD_CPU_LX3

VDD_CPU_BOOST4

B2A2

B3A3

C2

A1

C3

F1

F3E3D3

1 C4D91 C7D4

1206_R

10UF

X5R25V10%2

1C4D16

2

25V

10UF

X5R

10%

1206_R

2

VDD_CPU_BOOST5

A4

C4B4

A2

A3

C2B2

A1

AS3728

I153

AS3728

U7D3

CSP

F2E2D2

C1

E1

D1

B1

25VX5R

10%

1206_R

225VX5R

10%

1206_R

2

C4E510402_RX5R16V10%

1UF

D4E4F4

CSP

F2E2D2

C1

1 C7D8C4D201

1206_R

10UF

X5R25V2 10%

10UF

10%

1206_RX5R25V2

AS3722_TEMP2_SD0

AS3722_CTRL3_SD0

AS3722_TEMP1_SD0

AS3722_CTRL2_SD0

AS3722_CTRL4_SD0

2

2

AS3722_CTRL1_SD0

+5V_SYS

+VDD_MUX

33C3<

33C3<>

33C3<>

28C4<16A3<

34D8< 31D2> 29C4<27D2> 27C7< 26D3<

+5V_SYS

33C3<

33C3<>

33C3<>

+5V_SYS

.1UF X5RC4D14

1

25V20%

C4D122

.1UF20%

X5R25V

VDD_CPU_LX6

VDD_CPU_LX5

VDD_CPU_BOOST6

C3B3

F1

F3E3D3

C4B4A4

I190

B1

E1

D1

D4E4F4

0402_R

16VX5R

10%

1UF

1

AS3722_CTRL5_SD0

AS3722_CTRL6_SD0

AS3722_TEMP3_SD0

2

33C3<>

33C3<>

33C3<

CAN EMPTY TWO PHASES FOR COST SAVINGS

SO THAT THEIR GNDS HAVE A COMMON SHAPEPLACE DCDC INPUT AND OUTPUT CAPSLAYOUT NOTE:

WITH THE AS3728 GND PINS OUT

OUT

LX12LX11

LX13

LX21

LX23LX22

PVSS1PVSS2PVSS3

BOOST2

BOOST1

HVSUP1HVSUP2HVSUP3

5VSUP

HVSUP4HVSUP5HVSUP6

CTRL1

TEMP

CTRL2

PVSS6PVSS5PVSS4

LX12LX11

LX13

LX21

LX23LX22

PVSS1PVSS2PVSS3

BOOST2

BOOST1

HVSUP1HVSUP2HVSUP3

5VSUP

HVSUP4HVSUP5HVSUP6

CTRL1

TEMP

CTRL2

PVSS6PVSS5PVSS4

IN

BI

BI

OUT

BI

BI

OUT

LX12LX11

LX13

LX21

LX23LX22

PVSS1PVSS2PVSS3

BOOST2

BOOST1

HVSUP1HVSUP2HVSUP3

5VSUP

HVSUP4HVSUP5HVSUP6

CTRL1

TEMP

CTRL2

PVSS6PVSS5PVSS4

BI

BI

OUT

C

B

A

D

2 14 3

DATE

REV PAGE

TITLE

DOC NUMBER

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

4 3 2 158 7 6

Thu Jul 23 14:37:04 2015

REVISION HISTORY

602-7R375-0000-D00 4.04 36

REVISION 4.03

REVISION 4.01

REVISION 4.02

REVISION 4.04

- RELEASED FAB C

BOM REVISION A

REVISION 3.00

- RELEASED FAB B

REVISION 4.00

- RELEASED FAB D

UPDATE TK1 SYMBOL

- REWIRE ISOLATEB ON LAN (P19)

- REPLACE POWER FETS ON 3.3V SWITCHER (P28)

- TUNE +5V_SYS & +3V3_SYS FOR 3.3UH INDUCTORS (P27-29)

- ADDED NOTE OF DDR3L PIN MUXING TABLES (P4,5)

- REPLACE Q9A1, Q9A2 - AVAILABILITY (P9)

- REPLACE Q4E2 (P24)- RELEASE BOM B FAB D

- ADJUST SEQUENCE ON SD5 (P2)

- RELEASE BOM E FAB D- REPLACE J1A1 - AVAILABILITY (P25)

- CHANGE GEN2 I2C PULLUPS TO +3.3V_LP0 (P10)- RESIZE FAN RESISTORS (P27)

- DIRECT WIRE VDD_GPIO_LV TO +1.8V_VDDIO (P31)

- EMPTY USB ESD PROTECTION (P17)

- ADD BLEED RESISTORS ON DC INPUT (P27)- EMPTY SD ESD PROTECTION (P25)

- STUFF FRONT PANEL HEADER (P25)

- SIMPLIFY FEEDBACK, DROP BLEED RESISTORS (P11)

- ADD DEBUG CONNECTOR (P22)

- MODIFY EXPANSION HEADER (P11,P26)

- ADD FRONT PANEL NOTE - YELLOW STDBY LED (P25)

THAT KB_ROW16 IS NOT A TRUE PWM (P4, 5, 8, AND 27)

- CHANGE AUDIO HEADER TO LIME/PINK (P21)

- ADD TEMP SENSOR BUFFERING OPTIONS (P18)

- REPLACE SD CARD SWITCH (P30)

- REWIRE ONKEY TO KB_COL0 FET (P24)- REMOVE LED DIODE (P25)- UART4 INPUTS STUFFING OPTIONS (P24)- ADD EMI CAP (P21)- ADD EMI CAP ON VDD_MUX (P29)

VDDIO_GMI TO SUPPORT 1.8V ONLY,VDDIO_DDR 1.35V SUPPORT ONLY

- COSMETIC COMMENT CLEANUP (MULTIPLE PAGES)

- ADD PMU_REGEN3 OPTION FOR LAN (P21)- REPLACE EOL SNUBBERS (P24)

- RESIZE 0 OHM BYPASS RESISTORS TO 0402 (P30)

BOM REVISION E

BOM REVISION D

BOM REVISION B

REVISION 2.00

- RELEASED FAB A

REVISION 1.01

- RELEASED FAB A

REVISION 1.00

- CHANGE SLEW RATE CAP C9D1 TO 3.3NF (P30)

- WIRE +5V_SYS TO R2A5 (P25)

- CHANGE R3E5 -> 100K OHM; SATA POWER DIVIDER (P16)

- EMPTY C4B2, EXCESS BYPASS FOR 3.3V SD CARD (P30)

- EMPTY R2D6 & R2D8, ADD R2D7 FOR LAN ISOLATEB (P19)

- WIRE GPIO_PK2 TO EXPANSION HDR (P10, P26)

- CHANGE DFF CLEAR (P31)

- STUFF USB_VBUS_EN(0:1) PULLUPS (P17)- STUFF USB0_VBUS RESISTOR TO 3.3V (P9)

- CHANGE R5C10 TO 5 MOHM FOR COST SAVINGS (P27)

- BYPASS & EMPTY LOAD SWITCH U2C1 (P30)

- CHANGE RC ON DFF W/ CLOCK OPTIONS (P28,31)

- EMPTY 3.3V RESISTORS ON GEN2_I2C, STUFF 1.8V (P10)

- CHANGE PMIC TO OTP TYPE 9 (P31-33)

- UPDATE EOL HDMI CONN (P13)

- UPDATE I2C MAP (P3)

REVISION HISTORY

- UPDATE TK1 SYMBOL AVDD_OSC,VDDIO_SYS,VDDIO_BB,VDDIO_SDMMC1&4,VDDIO_AUDIO,VDDIO_UART,VDDIO_CAM AND

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

<->

?

602-7R375-0000-D00 4.04 37

+2V_STBY 27C4> 28B7< 29B7<

+3.3V_342 22D7

+3.3V_AON 27A8< 27B4> 27B8< 28C8<

+3.3V_AVDD_HDMI_AP_G 9D5

ATED

+3.3V_LP0 9A3 10B2 10D3 13B5 13C5 13C5 14A2

14D2 14D6 17B7 17D7 18C6 19A2 19D6

9A2< 10D2< 13D1< 14D1< 15D1< 17D2<

18D2< 19D2< 22D2< 30A3>

9A3 10B2 10D3 13B5 13C5 13C5 14A2

+2.8V_RUN_CAM_AF 26B4< 32A5>

+2.8V_RUN_CAM 26B7< 32B4>

+2.5V_AON_RTC 24A8< 24B8< 31B7> 31C6< 31C8<

_MCLK_AP

+1.35V_LP0_VDDIO_DDR 5B3

33B2>

+1.35V_LP0 5A8< 5B3< 6A8< 7A8< 32B8< 32D8<

+1.8V_VDDIO_LP0_OFF 9A2< 30A6>

32D4< 33A2>

22C7< 22D2< 23A2< 24A2< 25B7< 26A2<

+1.8V_VDDIO 8D1< 10D2< 18D2< 20D2< 21D2< 22B6<

+1.8V_RUN_VPP_FUSE_R 32A5

+1.8V_RUN_VPP_FUSE 8A3< 32A4>

+1.8V_RUN_CAM 9B8< 26B4< 32C5>

TMIP_AP_F

+1.8V_RUN_AVDD_PLL_U 9A5

P_F

+1.8V_LP0_AVDD_OSC_A 8A4

+1.6V_LP0 31B1< 31C2> 33D8<

+1.05V_RUN_CAM_REAR 26B7< 32C4>

_PLL_F

+1.05V_RUN_AVDD_SATA 14C7

PLL_AP_F

+1.05V_RUN_AVDD_PEX_ 14C3

_PLL_AP_GATE

+1.05V_RUN_AVDD_HDMI 9D5

_PLL_AP

+1.05V_RUN_AVDD_HDMI 9C3

+1.05V_RUN_AVDD 5D2< 9C2< 9C4< 14C1< 14C7< 32D5>

33A2>

+1.05V_RUN 9D1< 9D2< 14C1< 14C8< 14D2< 19B8<

+1.05V_LP0_VDD_RTC 8C3< 32B5>

+1.05V_LAN_REGOUT_L 19C4

+1.05V_LAN_REGOUT 19B3

+1.2V_RUN_CAM_FRONT 26B4< 32C4>

+1.2V_GEN_AVDD 9C1< 9D8< 14D1< 26B4< 32C4>

Title: Basenet Report

Design: beaver_t124_fabd

Date: Jul 23 17:18:06 2015

Base nets and synonyms for

beaver_t124_lib.BEAVER_T124_FABD(@beaver_t124_lib.beaver

_t124_fabd(sch_1))

Base Signal Location([Zone][dir])

29C4< 31D2> 34D8< 35D8<

31B5 16A3< 26D3< 27C7< 27D2> 28C4<

29C4< 31D2> 34D8< 35D8<

+VDD_MUX 31B5 16A3< 26D3< 27C7< 27D2> 28C4<

29C4< 31D2> 34D8< 35D8<

31B5 16A3< 26D3< 27C7< 27D2> 28C4<

29C4< 31D2> 34D8< 35D8<

+VDD_MUX 31B5 16A3< 26D3< 27C7< 27D2> 28C4<

+VDD_MIC 20B4

+VDD_GPU_AP 11B1< 11D4< 34D2>

+VDD_CPU_AP 11B1< 11C8< 35C2>

+VDD_CORE 11A1< 11D8< 32B8< 34A2>

+VDD_ACIN 27D5

+VDD_1V5_MPCIE 15B4

+VDDIO_SDMMC3 8A8< 8B8< 32C5>

+VCAP_SLUGO3 30A5

+VBACKUP 31B5

+USB0_VBUS_SW 17C4

+EMMC_VDDI 23C4

+AVDD_LVDS0_PLL_AP_F 9B4

+12V_SATA 16B2

+5V_USB_HS 17B5

32D4< 33B7< 34D2< 35D2>

26A2< 27A2< 29C1> 29D2< 30D1< 31D5<

+5V_SYS 13D1< 15B7< 16D2< 17D2< 20D2< 25D2>

+5V_STBY 27A7< 27B4> 28C8<

+5V_SATA 16C2

+5V_HDMI_CON 13A4

+5V_HDMI 13A5

+3.3V_SYS 22D2< 26D6< 28C1> 28D2< 30D1< 32B8<

+3.3V_SD_CARD 25B7< 30B1>

+3.3V_RUN_TOUCH 26D6< 32B5>

25D4 30D5 32A7 32C7

30C5> 30D1< 32D3< 9B3 9D2 18B4 23D4

9A2< 18D2< 22D8< 23A2< 25D2> 26D6<

25D4 30D5 32A7 32C7

30C5> 30D1< 32D3< 9B3 9D2 18B4 23D4

+3.3V_RUN 9A2< 18D2< 22D8< 23A2< 25D2> 26D6<

25D4 30D5 32A7 32C7

30C5> 30D1< 32D3< 9B3 9D2 18B4 23D4

9A2< 18D2< 22D8< 23A2< 25D2> 26D6<

25D4 30D5 32A7 32C7

30C5> 30D1< 32D3< 9B3 9D2 18B4 23D4

+3.3V_RUN 9A2< 18D2< 22D8< 23A2< 25D2> 26D6<

18D2< 19D2< 22D2< 30A3>

9A2< 10D2< 13D1< 14D1< 15D1< 17D2<

14D2 14D6 17B7 17D7 18C6 19A2 19D6

9A3 10B2 10D3 13B5 13C5 13C5 14A2

18D2< 19D2< 22D2< 30A3>

9A2< 10D2< 13D1< 14D1< 15D1< 17D2<

14D2 14D6 17B7 17D7 18C6 19A2 19D6

+3.3V_LP0 9A3 10B2 10D3 13B5 13C5 13C5 14A2

18D2< 19D2< 22D2< 30A3>

9A2< 10D2< 13D1< 14D1< 15D1< 17D2<

14D2 14D6 17B7 17D7 18C6 19A2 19D6

AP_OVERHEAT_L 18A1> 31C8<

AP_FORCE_RECOVERY_L 10C3< 24D5>

AC_OK_PMU_L 31B5

AC_OK_CLR_L 31A7

AC_OK_CLK 31A7

AC_OK_AP_L 10B4

5V_MAIN_VFB 29A5

5V_MAIN_VBST_RC 29B5

5V_MAIN_VBST 29B5

5V_MAIN_SW 29C5

5V_MAIN_SNUB 29B4

5V_MAIN_RST 29B7

5V_MAIN_PGOOD_R 29C7

5V_MAIN_ISO 29B2

5V_MAIN_DRVL 29B5

5V_MAIN_DRVH_R 29C5

5V_MAIN_DRVH 29C5

5V_MAIN_CS_P 29B5

5V_MAIN_CS_N 29B5

5V_MAIN_COMP_RC 29A7

5V_MAIN_COMP 29A7

P_EN_L

3.3V_RUN_AVDD_HDMI_A 9D3

3.3V_MAIN_VFB 28B5

3.3V_MAIN_VBST_RC 28C5

3.3V_MAIN_VBST 28C5

3.3V_MAIN_SW 28C5

3.3V_MAIN_SNUB 28C4

3.3V_MAIN_RST 28B7

3.3V_MAIN_PGOOD_R 28C7> 31A8<

3.3V_MAIN_ISO 28B2

3.3V_MAIN_DRVL 28C5

3.3V_MAIN_DRVH_R 28C5

3.3V_MAIN_DRVH 28C5

3.3V_MAIN_CS_P 28B5

3.3V_MAIN_CS_N 28B5

3.3V_MAIN_COMP_RC 28B7

3.3V_MAIN_COMP 28A7

3.3V_LP0_CAP 30B7

1P5V_EN 15B5

1.05V_RUN_AVDD_HDMI_ 9C3

PLL_AP_EN_L

1.05V_RUN_FB 33A4

1.05V_RUN_LX 33A4

1.8V_LP0_FB 33A4

1.8V_LP0_LX 33A4

1.35V_LP0_FB 33B4

1.35V_LP0_LX 33B4

+VDD_MUX_AS3720_VBAT 31B5

C

B

A

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CONFIDENTIALNVIDIA

6 5

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78

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24 3 18 7 6 5

<->

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602-7R375-0000-D00 4.04 38

BR_UART1_RXD 8C3< 22C7<> 26B7>

BR_UART1_TXD 8C3> 22C7<> 26B4<

C1N 18C4

C1P 18C4

C2N 18C4

C2P 18C4

CAM1_AF_PWDN 9A7> 26A7<

CAM1_GPIO 9B7<> 26A7<>

CAM1_MCLK 9A7> 26A7<

CAM1_PWDN 9A7> 26A7<

BOARD_ID_WP 18D5

BOARD_ID_A2 18D5

BOARD_ID_A1 18D5

BOARD_ID_A0 18D5

BD_ID_STRAP3 10A3< 24A3>

BD_ID_STRAP2 10A3< 24A3>

BD_ID_STRAP1 8C3< 24A3>

BD_ID_STRAP0 8D3< 24A3>

BCLK2 20B6

BATT_TS 33D7

AUD_DCVDD 20A4

AUDIO_LDO_EN 8C3> 20B7<

21B5 21C4

20C3 20C3 21A4 21A5 21A5 21A5 21B4

20A3 20A6 20B2 20B2 20B2 20B3 20B3

AUDIO_GND 20A1 20A1 20A2 20A2 20A3 20A3 20A3

AUDIO_DACREF 20B4

AUDIO_AVDD 20B4

AUD1_VREF2 20B4

AUD1_VREF1 20B4

AS3722_TEMP_SD1 33B3< 34A7>

AS3722_TEMP3_SD0 33C3< 35A7>

AS3722_TEMP2_SD6 33C3< 34B7>

AS3722_TEMP2_SD0 33C3< 35B7>

AS3722_TEMP1_SD6 33C3< 34C7>

AS3722_TEMP1_SD0 33C3< 35C7>

AS3722_CTRL6_SD0 33C3<> 35A7<>

AS3722_CTRL5_SD0 33C3<> 35A7<>

AS3722_CTRL4_SD0 33C3<> 35B7<>

AS3722_CTRL3_SD0 33C3<> 35B7<>

AS3722_CTRL2_SD6 33C3<> 34B7<>

AS3722_CTRL2_SD1 33B3<> 34A7<>

AS3722_CTRL2_SD0 33C3<> 35C7<>

AS3722_CTRL1_SD6 33C3<> 34C7<>

AS3722_CTRL1_SD1 33B3<> 34A7<>

AS3722_CTRL1_SD0 33C3<> 35D7<>

AP_OVRHT_G 18A3

AP_THERMISTOR 31C2< 33C7<

AS3720_5V_VR_EN 27A8< 28B8< 29B8< 31B6>

AS3720_CREF 31A4

AS3720_EN5V 31B5

AS3720_RBIAS 31B5

AS3720_XIN32K 31B3

AS3720_XOUT32K 31B3

AP_OVERHEAT_R_L 18A3

DDR0_ODT1 4A4> 6B4< 6B8<

DDR0_ODT0 4A4> 6B4< 6B8<

DDR0_CS1_L 4B4> 6B4< 6B8<

DDR0_CS0_L 4B4> 6B4< 6B8<

DDR0_CLK_TERM 4C3

DDR0_CLKP 4D1> 6C4< 6C8<

DDR0_CLKN 4D1> 6C4< 6C8<

DDR0_CKE1 4B4> 6C4< 6C8<

DDR0_CKE0 4B4> 6C4< 6C8<

DAP_MCLK1_R 10B6

DAP_MCLK1 10B8> 20B7<

DAP2_SCLK_R 10A6

DAP2_SCLK 10A8> 20C8<>

DAP2_FS 10A7> 20C8<>

DAP2_DOUT 10B7> 20C8<

DAP2_DIN_R 20C7

DAP2_DIN 10B7< 20C8>

DACDAT2 20C6

CSI_E_D0_P 9C8< 26B7>

CSI_E_D0_N 9C8< 26B4>

CSI_E_CLK_P 9C8> 26B4<

CSI_E_CLK_N 9C8> 26B4<

CSI_B_D1_P 9C8< 26B7>

CSI_B_D1_N 9C8< 26B7>

CSI_B_D0_P 9C8< 26B7>

CSI_B_D0_N 9C8< 26A7>

CSI_A_D1_P 9D8< 26B7>

CSI_A_D1_N 9D8< 26B7>

CSI_A_D0_P 9D8< 26B7>

CSI_A_D0_N 9D8< 26B7>

CSI_A_CLK_P 9C8> 26B7<

CSI_A_CLK_N 9D8> 26B7<

CPVPP 20B4

CPVEE 20B4

CPVDD 20B4

CPU_PWR_REQ 8B2> 33C7<

CPU_OC_INT 8B3< 31B7>

CORE_PWR_REQ 8B2> 33C7<

CODEC_IRQ_L 10C3< 20B7>

CLK_32KHZ_PMU_R 31B3

CLK_32KHZ_PMU 8B3< 31B1>

CLK3_OUT_R 10C6

CLK3_OUT 10C7> 26A4<

CHGPUMP_P2 20B4

CHGPUMP_P1 20B4

CHGPUMP_N2 20B4

CHGPUMP_N1 20B4

CAP_SLG_5V_SAT 16B3

CAM_RST_L 9B7> 26B4<

CAM_I2C_SDA 9A8<> 26B7<>

CAM_I2C_SCL 9A8> 26B4<

CAM_FLASH 9A7> 26A7<

CAM2_PWDN 9A7> 26B7<

CAM2_MCLK 9B7> 26B4<

CAM2_GPIO 9B7<> 26B3<>

DDR_ZQ0_U28U2 7B3

DDR_ZQ0_U28U1 7B7

DDR_ZQ0_U27U2 6B3

DDR_ZQ0_U27U1 6B7

DDR_WE_L 4C3> 6C4< 6C8< 7C4< 7C8<

DDR_RESET_L 4B3> 6B4< 6B8< 7B4< 7B8<

DDR_RAS_L 4C3> 6C4< 6C8< 7C4< 7C8<

DDR_DQS7P 5A7<> 7C4<

DDR_DQS7N 5A7<> 7C4<

DDR_DQS6P 5B7<> 7C8<

DDR_DQS6N 5B7<> 7C8<













DDR_DQ<63..0> 4D8<> 5C7<> 6D1<> 6D4<> 7D1<> 7D5<>

DDR_DM7 5A7> 7C4<

DDR_DM6 5A7> 7C8<

DDR_DM5 5A7> 7C4<

DDR_DM4 5A7> 7C8<

DDR_DM3 4A7> 6C4<

DDR_DM2 4B7> 6C8<

DDR_DM1 4A7> 6C4<

DDR_DM0 4B7> 6C8<

DDR_COMP_PU 5A6

DDR_COMP_PD 5A6

DDR_CAS_L 4B3> 6C4< 6C8< 7C4< 7C8<

DDR_BA<2..0> 4C3> 6C4< 6C8< 7C4< 7C8<

7D4< 7D8<

DDR_A<15..0> 4C3> 6B4< 6B8< 6D4< 6D8< 7B4< 7B8<

DDR_A1<5..3> 4B3> 7D4< 7D8<

DDR_A0<5..3> 4B3> 4C3> 6D4< 6D8<

DDR1_CKE1 4A4> 7C4< 7C8<

DDR1_CLKN 4C1> 7C4< 7C8<

DDR1_CLKP 4C1> 7C4< 7C8<

DDR1_CLK_TERM 4C2

DDR1_CS0_L 4B4> 7B4< 7B8<

DDR1_CS1_L 4A4> 7B4< 7B8<

DDR1_ODT0 4A4> 7B4< 7B8<

DDR1_ODT1 4B4> 7B4< 7B8<

DDR1_CKE0 4A4> 7C4< 7C8<

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

<->

?

602-7R375-0000-D00 4.04 39

8B7 8B7 8B7 8C4 8C6 8C7 8D3 8D3 8D4

8D4 8D6 8D6 8D8 9A3 9A3 9A4 9A4 9A4

9A4 9A4 9A7 9A7 9A7 9B4 9B4 9B4 9B4

9B7 9B7 9B8 9C2 9C3 9C3 9C3 9C4 9D3

9D3 9D4 9D4 9D4 9D7 9D7 10B2 10B3

10B6 10B7 10D3 10D3 10D3 10D3 10D6

10D7 11A4 11A4 11A8 11A8 11B4 11B8

11B8 11C4 11C4 11C8 11D8 12A3 12A4

12A6 12A6 12A6 12A7 12B6 12B6 12B6

12B7 13A4 13A4 13A5 13A7 13A7 13B4

8A4 8A4 8A4 8A4 8A6 8A7 8A7 8A7 8B3

7A8 7A8 7B4 7B4 7B6 7B8 7B8 8A3 8A3

6B5 6B8 6B8 7A2 7A3 7A6 7A7 7A7 7A7

6A3 6A6 6A7 6A7 6A7 6A8 6A8 6B4 6B4

GND 4C2 4C3 5A6 5B4 5B4 5C4 5C4 5D4 6A2

GEN2_I2C_SDA_3.3V 10B1<> 26D6<>

GEN2_I2C_SCL_3.3V 10B1> 26D6<

GEN1_I2C_SDA_3.3V 15C3<> 22C1<>

26A3<> 26D3<>

GEN1_I2C_SDA 10B8<> 18A6<> 18D3<> 20B7<> 22C4<>

GEN1_I2C_SCL_3.3V 15C3< 22C1>

26D3<

GEN1_I2C_SCL 10B8> 18A6< 18D3< 20B7< 22C4< 26A7<

FP_9 25D5

FORCE_RECOVERY_L 22C7< 24D5<> 26A3<>

FB_1PV5 15B5

FAN_PWM 8C3> 27C4<

FAN_EN_L 27D3

FAN_EN_GATE 27C3

FAN_EN_DR 27C3

EN_VDD_SD 8C3> 30B4<

EN_VDD_HDMI 9C1< 9D1< 10A7<> 13A8<

EN_VDD_BL 8C7> 26D3<

EN_VDD_12V_GATE 16A3

EN_VDD_12V_DRAIN 16A2

EN_RUN_VREG 30C7

EN_AVDD_LCD 26D6< 31C2>

EN_AVDD_HDMI_PLL 9C3

EN_AVDD_HDMI 9D2

EDP_HPD 9B2< 26C6>

DVFS_PWM_ASM 33C6

DVFS_PWM 10A3<> 33C7<

DVFS_CLK_ASM 33C6

DVFS_CLK 10A3> 33C7<

DTR 18B2

DSR 18C2

DDR_ZQ1_U27U2 6B3

DDR_ZQ1_U28U1 7B7

DDR_ZQ1_U28U2 7B3

DEBUGGER_RESET_L 22C7

DP_AUX_N 9B3<> 26D6<>

DP_AUX_P 9B3<> 26D6<>

DSI_CSI_RDN 9B7

DSI_CSI_RUP 9B7

DDR_ZQ1_U27U1 6B7

GPIO_PU4 10B6<> 26A3<>

GPIO_PU3 10B6<> 26A3<>

GPIO_PU2 10B6<> 26B3<>

GPIO_PU1 10C6<> 26B3<>

GPIO_PU0 10C6<> 26B3<>

GPIO_PK2 10B3> 26D3<

GPIO_PI0 10C3> 24C5>

GPIO_PH7 9C1< 10C3<>

GPIO_PG3 10C3<> 24D1>

35C7 35D5 35D7 35D7

35B5 35B6 35B7 35C4 35C5 35C5 35C6

35A5 35A5 35A6 35A7 35A7 35B2 35B4

34C5 34C6 34C7 34D5 34D6 34D7 35A4

34B4 34B5 34B6 34B6 34C3 34C4 34C5

34A4 34A5 34A5 34A6 34A7 34A7 34B3

33B3 33B3 33B6 33B6 33B6 33C7 34A3

32C7 32C7 33A3 33A3 33A4 33A6 33A6

32B7 32B7 32B7 32C5 32C6 32C6 32C7

32B1 32B2 32B5 32B5 32B5 32B5 32B6

31C7 31D5 32A5 32A5 32A6 32A7 32A7

31B5 31B5 31C3 31C4 31C4 31C5 31C6

31A5 31A6 31A6 31A7 31B1 31B3 31B3

30B6 30B7 30C5 31A2 31A4 31A5 31A5

30A5 30A7 30A8 30B2 30B2 30B4 30B6

28C2 29B2 29B4 29B4 29C3 30A4 30A4

27D4 27D4 27D6 28B4 28B4 28B7 28C2

27C2 27C3 27C5 27C6 27D3 27D3 27D3

26C5 26C5 26C5 27A4 27A5 27A6 27B5

25C4 25C5 25D5 25D6 26A5 26A5 26C5

24C8 25A4 25A4 25A4 25A5 25A6 25C3

24B4 24B7 24B7 24B8 24C4 24C7 24C7

24A4 24A4 24A6 24A6 24A7 24A8 24A8

23C4 23C4 23C4 23D4 23D4 24A4 24A4

22C3 22C6 22C6 22D7 23A5 23B4 23C4

22A4 22A5 22B5 22B6 22B7 22C2 22C3

22A1 22A1 22A2 22A2 22A2 22A3 22A3

20A6 20B7 20B7 20B7 21A3 21A6 21B5

20A4 20A4 20A4 20A4 20A4 20A4 20A5

19B6 19C3 19C4 19C4 19C4 19C4 19C4

19B4 19B4 19B4 19B4 19B4 19B4 19B6

19A2 19A3 19A5 19A6 19A6 19B3 19B3

18C5 18C5 18C5 18C7 18D3 19A1 19A2

18B4 18B5 18B6 18B6 18B7 18C3 18C4

17D6 18A2 18A3 18A4 18A4 18B2 18B3

17C3 17C5 17C6 17C6 17C6 17C7 17D3

17B5 17B5 17B6 17B6 17B7 17B8 17C1

17A6 17B2 17B2 17B3 17B3 17B5 17B5

16C1 16C3 17A1 17A2 17A4 17A4 17A5

16A3 16B1 16B2 16B2 16B2 16B3 16B4

15B6 15C2 15C2 15C3 15C4 16A2 16A2

15B4 15B4 15B4 15B5 15B5 15B5 15B6

14C6 14C7 14D2 14D3 14D6 14D6 14D7

14C3 14C3 14C3 14C3 14C6 14C6 14C6

13D5 14A1 14A2 14C2 14C2 14C2 14C2

13B4 13C3 13C4 13C5 13C6 13C7 13D4

JTAG_PD0 22A2

JD_MIC_T124_L 8D3< 21C7>

JD_MIC_R_L 21C4

JD_MIC_L 20A7< 21C7>

IGPU_PWRGD 8C3< 31C2>

HSIC_REXT 9A7

HSIC1_STROBE_R 9A7

HSIC1_STROBE 9A8> 26B4<

HSIC1_DATA_R 9A7

HSIC1_DATA 9A8> 26B3<>

HP1_SENSE 20C4< 21A7>

HP1_RT_L 21A5

HP1_RT 20C2> 21A7<

HP1_MIC_R 21C5

HP1_MIC_L 21C6

HP1_LT_L 21A5

HP1_LT 20C2> 21A7<

HEAD_DET_T124_L 8C3< 21B7>

HEAD_DET_L 20B7< 21B7>

HEAD_DET_JACK_L 21B4

HEADSET_MIC_C 20B7< 21C8>

HEADSET1R_R 20C4

HEADSET1R_L 20C4

HEADSET1RC_R 20C3

HEADSET1RC_L 20C3

HDMI_TXD_P<2..0> 9C3> 13D8<

HDMI_TXD_N<2..0> 9C3> 13D8<

HDMI_TXC_P 9C4> 13C8<

HDMI_TXC_N 9C4> 13C8<

HDMI_RSET 9C5

HDMI_INT 9C4< 13D5>

HDMI_ILIM 13A6

HDMI_HPD 13D4

HDMI_FAULT_L 13A6

HDMI_DDC_SDA_CON 13B5

HDMI_DDC_SDA 9C4<> 13B7<>

HDMI_DDC_SCL_CON 13B5

HDMI_DDC_SCL 9C4> 13B7<

HDMI_CEC_L 13C5

HDMI_CEC_CON 13C4

GPIO_PU6 10B6<> 26A3<>

GPIO_PV0 8C7

GPIO_PV1 8C7

GRN_PWRLED 25D4

HDLED_L 25D5

HDLED_PWR 25D5

HDMI_CEC 9C4<> 13C7<>

HDMI_CEC_A_PU 13B5

GPIO_PU5 10B6<> 26A3<>

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

<->

?

602-7R375-0000-D00 4.04 40

LVDS_TXD2_N 9B3> 26C6<

LVDS_TXD2_P 9B3> 26C6<





LV_SATA_EN 16B3

MIC1_BIAS 20B2> 21C5<

MIC1_BIAS_R 20B4

MODEM_SAR0 10C3<> 24D1>



LVDS_TXD0_P 9B3> 26D3<


LVDS_RSET 9B5

LRCK2 20B6

LID_CLOSE_PMU_L 31B5

LID_CLOSED_L 8C4

LED_5V_RUN 30D5

LCD_UD 10C3> 24D1>

LCD_TE 8C3> 26C3<

LCD_LR 10C3> 24D1>

LCD_BL_PWM 10C3> 26C6<

LCD_BL_EN 10C3> 26C6<

LAN_TRCT1 19B1

LAN_RSET 19A4

LAN_MDI3_P 19A4

LAN_MDI3_N 19A4

LAN_MDI2_P 19A4

LAN_MDI2_N 19A4

LAN_MDI1_P 19A4

LAN_MDI1_N 19A4

LAN_MDI0_P 19B4

LAN_MDI0_N 19B4

LAN_LED_1000 19A3

LAN_LED_100 19A3

LAN_LED2 19A4

LAN_LED1 19A4

LAN_LED0_ACT_L 19A3

LAN_LED0 19A4

LAN_ISO_BASE 19B7

LAN_ISOLATE_L 19B6

LAN_ISOLATE 19B7

LAN_CH_GND 19A1

KB_COL0_GATE 24A6

KB_COL0_AP 8D3< 24A5>

JTAG_RTCK 8A3< 22A4< 22C7>

JTAG_SRST_B_L 22A2

JTAG_SRST_L 22A4

JTAG_TCK 8A3< 22A4> 22C7>

JTAG_TDI 8A3< 22A4> 22C7>

JTAG_TDO 8A3> 22A4< 22C7<

JTAG_TMS 8A3< 22A4> 22C7>

JTAG_TRST_L 8A3< 22C7<

JTAG_PD1 22A2

SATA_LED 10B7> 25D7<

SATA_L0_TX_P 14C7> 16D3<

SATA_L0_TX_N 14C7> 16D3<

SATA_L0_RX_P 14C7< 16C3<

SATA_L0_RX_N 14C7< 16D3<

RST_SWR_L 25D6

RS232_TXD_L 18C3

RS232_RXD_L 18B3

RS232_RTS 18C3

RS232_CTS 18B3

PWR_I2C_SDA 8B2<> 26A3<> 31C6<>

PWR_I2C_SCL 8B2> 26A7< 31C6<

PWRBTN_R_L 25D4

POWER_FAN_SRC 27D2

POWER_FAN 27C2

PMU_RESET_IN_L 22C8< 24B6> 25C5> 26A3<> 31B2<

PMU_REGEN3 19B8< 27C4< 30A8< 30C8< 31C2>

PMU_REGEN1_L 32B2

PMU_REGEN1 25C2< 30A5< 30B8< 31A8< 31C2> 32B3<

PMU_INT_L 8B3< 31B5>

PFO_JTAG_TRST_L 22A6

PE_TX4_C_P 15C6

PE_TX4_C_N 15C6

PEX_WAKE_L 14A3< 15D7> 19B7>

PEX_TX20_C_P 16B7

PEX_TX20_C_N 16B7

PEX_TX4_P 14B3> 15C7<

PEX_TX4_N 14B3> 15C7<

PEX_TX2_P 16B4> 19C7<

PEX_TX2_N 16B4> 19C7<

PEX_TX2_C_P 14B3> 16B8<

PEX_TX2_C_N 14B3> 16B8<

PEX_TERMP 14A3

PEX_RX20_P 16A7

PEX_RX20_N 16A7

PEX_RX4_P 14B3< 15C7>

PEX_RX4_N 14B3< 15C7>

PEX_RX2_P 14B3< 16A8>

PEX_RX2_N 14B3< 16A8>

PEX_RX2_C_P 16A4< 19C7>

PEX_RX2_C_N 16A4< 19C7>

PEX_MINI_PRSNT_L 8D7

PEX_L1_RST_L 14A3> 19C7<

PEX_L1_CLKREQ_L 14A2< 19C7>

PEX_L0_RST_L 14A3> 15C3<

PEX_L0_CLKREQ_L 14A2< 15D7>

PEX_GIGE_PRSNT_L 8D7

PEX_CLK2_P 14B3> 19C7<

PEX_CLK2_N 14A3> 19C7<

PEX_CLK1_P 14B3> 15D7<

PEX_CLK1_N 14B3> 15D7<

PEX0_WAKE_R_L 19B6

PCA9306_VREF21 22C2

ONKEY_PMU_L 31B5

ONKEY_L 24A6> 25D2> 26A3<> 31C6<

SNN_DSI_A_CLK_N 9C7

SNN_DIRECTDC_OUT3 14B6




SNN_DIRECTDC_IN 14B6

SNN_DIRECTDC_CLK 14B6

SNN_DGPU_VDD_EN 8C7

SNN_DGPU_PWRGD 8C4

SNN_DGPU_3P3_EN 8C7

SNN_DCD 18C2

SNN_DAP3_SCLK 8C7

SNN_COMPASS_DRDY 10A4

SNN_CLK3_REQ 10C6

SNN_CAMERA_SHUTTER 8B7

SNN_AS3722_TEMP4_SD0 33C4

SNN_AS3722_CTRL8_SD0 33C4

SNN_AS3722_CTRL7_SD0 33C4

SNN_AS3720_SDO 31C5

SNN_ADCDAT2 20C6

SNN_1P5V_POK 15B4

SKIN_TEMP 31A1> 31C2<

SDMMC4_DAT<7..0> 8A8<> 23C7<>

SDMMC4_COMP_PU 8A6

SDMMC4_COMP_PD 8A6

SDMMC4_CMD 8A7> 23D7<>

SDMMC4_CLK 8A7> 23D7<

SDMMC3_WP_L 8D3< 25A7>

SDMMC3_DAT<3..0> 8B8<> 25B7<>

SDMMC3_COMP_PU 8A6

SDMMC3_COMP_PD 8A6

SDMMC3_CMD 8B8> 25B7<>

SDMMC3_CLK_LB_OUT 8A7

SDMMC3_CLK_LB_IN 8A7

SDMMC3_CLK 8B8> 25B7<

SDMMC3_CD_L 8A8< 25A7>

SDMMC2_COMP_PU 10B4

SDMMC2_COMP_PD 10B4

SDMMC1_COMP_PU 8B6

SDMMC1_COMP_PD 8B6

SATA_PWR_EN_T124 10B7> 16A5<

SATA_RX_N 16D2

SATA_RX_P 16C2

SATA_TERMP 14C6

SATA_TESTCLKN 14C7

SATA_TESTCLKP 14C7

SATA_TX_N 16D2

SATA_TX_P 16D2

SATA_PWR_EN 16A3

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

<->

?

602-7R375-0000-D00 4.04 41

SNN_MPCIE_5 15D6

SNN_MPCIE_8 15D4

SNN_MPCIE_10 15D4

SNN_MPCIE_12 15D4

SNN_MPCIE_14 15D4

SNN_MPCIE_16 15C4

SNN_MPCIE_17 15C6

SNN_MPCIE_19 15C6

SNN_MPCIE_45 15C6

SNN_MPCIE_47 15C6

SNN_MPCIE_3 15D6

SNN_LVDS0_PROBE 9B5

SNN_LOUTR 20B6

SNN_LOUTL 20B6

SNN_KB_ROW12 8C4

SNN_KB_ROW11 8C4

SNN_KB_ROW8 8C4

SNN_KB_COL7 8D4

SNN_KB_COL6 8D4

SNN_KB_COL2 8D4

SNN_KB_COL1 8D4

SNN_JACK_RING 27D6

SNN_IN3P 20B4

SNN_IN3N 20B4

SNN_HSIC2_STROBE 9A7

SNN_HSIC2_DATA 9A7

SNN_HDMI_PROBE 9C5

SNN_GPU_PWR_REQ 8C4

SNN_GPS_IRQ_L 10A4

SNN_GPIO_PI7 10B4

SNN_GPIO_PI5 10B4

SNN_GPIO_PI4 10B4

SNN_GPIO_PH3 10C4

SNN_GPIO_PFF2 14A4

SNN_FAN_TACH 27C2

SNN_EN_BAT_SMB 10A6

SNN_DSI_B_D3_P 9B7

SNN_DSI_B_D3_N 9B7

SNN_DSI_B_D2_P 9B7

SNN_DSI_B_D2_N 9B7

SNN_DSI_B_D1_P 9B7

SNN_DSI_B_D1_N 9B7

SNN_DSI_B_D0_P 9B7

SNN_DSI_B_D0_N 9B7

SNN_DSI_B_CLK_P 9B7

SNN_DSI_B_CLK_N 9B7

SNN_DSI_A_D0_N 9C7

SNN_DSI_A_D0_P 9C7

SNN_DSI_A_D1_N 9C7

SNN_DSI_A_D1_P 9C7

SNN_DSI_A_D2_N 9C7

SNN_DSI_A_D2_P 9C7

SNN_DSI_A_D3_N 9C7

SNN_DSI_A_D3_P 9C7

SNN_DSI_A_CLK_P 9C7

SPI4_CS0_L 10B3> 23B7<

SNN_WF_RST_L 8B6

SNN_ULPI_DATA7 8C7

SNN_ULPI_DATA6 8C7

SNN_ULPI_DATA5 8D7

SNN_ULPI_DATA4 8D7

SNN_UART3_TXD 10C7

SNN_UART3_RXD 10C7

SNN_UART3_RTS_L 10C7

SNN_UART3_CTS_L 10C7

SNN_U28U2_Z4 7B3

SNN_U28U2_Z3 7B3

SNN_U28U2_Z2 7B3

SNN_U28U2_Z1 7B3

SNN_U28U1_Z4 7B7

SNN_U28U1_Z3 7B7

SNN_U28U1_Z2 7B7

SNN_U28U1_Z1 7B7

SNN_U27U2_Z4 6B3

SNN_U27U2_Z3 6B3

SNN_U27U2_Z2 6B3

SNN_U27U2_Z1 6B3

SNN_U27U1_Z4 6B7

SNN_U27U1_Z3 6B7

SNN_U27U1_Z2 6B7

SNN_U27U1_Z1 6B7

SNN_TVS_USB_VBUS0 17C2

SNN_SYS_CLK_REQ 8C4

SNN_SPKR_P 20C4

SNN_SPKR_N 20C4

SNN_SPKL_P 20C4

SNN_SPKL_N 20C4

SNN_SDMMC3_CLMP 25A7

SNN_SDMMC1_DAT<3..0> 8B7

SNN_SDMMC1_CMD 8B7

SNN_SDMMC1_CLK 8B7

SNN_RI 18B2

SNN_PM_I2C_SDA_3.3V 22C7

SNN_PM_I2C_SCL_3.3V 22C7

SNN_PG_OC_L 10B4

SNN_PEX_TX3_P 14B4

SNN_PEX_TX3_N 14B4

SNN_PEX_TX1_P 14B3

SNN_PEX_TX1_N 14B3

SNN_PEX_RX3_P 14B3

SNN_PEX_RX3_N 14B3

SNN_PEX_RX1_P 14B3

SNN_PEX_RX1_N 14B3

SNN_PEX_REFCLKP 14A4

SNN_PEX_REFCLKN 14A4

SNN_OWR 8B4

SNN_NFC_PROG 8C4

SNN_NFC_IRQ_L 10A4

SNN_MPCIE_51 15C6

SNN_MPCIE_49 15C6

TS_SHDN_L 10B3> 26D3<

TS_RESET_L 10B3> 26D3<

TS_CLK 8B8> 26D6<

TP_USB_VBUS_EN2 14A4

TP_ULPI_DATA2 8D7

TP_ULPI_DATA1 8D7

TP_TOUCH_IRQ_L 10A4

TP_RESET_OUT_L 8B4

TP_PEX_TESTCLK_P 14A4

TP_PEX_TESTCLK_N 14A4

TP_KBL_PWM 10C4

TP_KBC_IRQ_L 10C4

TP_GPIO_PK3 10B4

TP_GPIO_PK0 10B4

TP_GPIO_PI2 10B3

TP_GPIO_PH6 10C4

TP_GPIO_PH5 10C4

TP_DMIC_DATA 20A6

TP_DMIC_CLK 20B6

TP_DAP4_SCLK 10C7

TP_DAP4_FS 10C7

TP_DAP4_DOUT 10C7

TP_DAP4_DIN 10C7

TP_DAP1_SCLK 10B7

TP_DAP1_FS 10B7

TP_DAP1_DIN 10B7

TP_CSI_DSI_TEST_OUT 9B7

TP_CLK_32K_WIFI 31C3

TP_AP_WP_L 8C4

TP_ALS_IRQ_L 10A4

TPS_SKIPSEL 28C7> 29C8<

TPS51220A_TRIP 27A7

TPS51220A_RF 27B6

TPS51220A_REG_EN 27A6

TPS51220A_FUNC 27B7

THERMD_R_P 18A6

THERMD_R_N 18A6

THERMD_P 8B3< 18A7<

THERMD_N 8B3< 18A7>

TEST_MODE_EN 8A4

SPI4_MISO 10C3< 23A7> 24B2>

SPI4_MOSI 10C3> 23A4< 24B2>

SPI4_SCK 10C3> 23A4< 24B2>

SPI_HOLD_L 23A4

SPI_ROM_WP_L 23A6

SYS_RESET_L 8B3< 22A5< 23D7< 31B2>

TEMP_ALERT_L 10B3< 18A3>

TEMP_THERM_PMU 31B5

SPI4_CS3_L 10C3> 24B2>

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

<->

?

602-7R375-0000-D00 4.04 42

USB_VBUS_EN1 9A4<> 17B8<

VDD_AC_SNUB 27D5

VDD_CORE_BOOST0 34A5

VDD_CORE_BOOST1 34A5

VDD_CORE_LX0 34A5

VDD_CORE_LX1 34A5

VDD_CORE_SENSE_N 11A2> 33B3<

VDD_CORE_SENSE_P 11A2> 33B3<

VDD_CPU_BOOST1 35D5

VDD_CPU_BOOST2 35D5

USB_VBUS_EN0 9A4<> 17C8<

USB_REXT 9A5

USBSS_TX0_P 14C3> 16C8<

USBSS_TX0_N 14C3> 16C8<

USBSS_TX0C_P 16C4> 17A7<

USBSS_TX0C_N 16C4> 17A7<

USBSS_RX0_P 14C3< 16B8>

USBSS_RX0_N 14C3< 16B8>

USBSS_RX0R_P 16B4< 17A7>

USBSS_RX0R_N 16B4< 17A7>

USB2D_P 9A4<> 17B7<>

USB2D_N 9A4<> 17B7<>

USB2DL_P 17B5

USB2DL_N 17B5

USB1D_P 9A4<> 15C3<>

USB1D_N 9A4<> 15C3<>

USB0_VBUS 9A4

USB0_ID_PWR 17D5

USB0_ID_PMU 17B1> 33D7<

USB0_ID_GATE_L 17B3

USB0_ID_C 17C3

USB0_ID_AP_R 17B2

USB0_ID 9A4< 17B1>

USB0D_P 9A4<> 17C5<

USB0D_N 9A4<> 17C5<

USB0DL_P 17C3

USB0DL_N 17C3

UART4_TXD_3V3 18C5

UART4_TXD 10B3> 18C7< 22D7> 24C5>

UART4_RXD_R 18B7

UART4_RXD_3V3 18B5

UART4_RXD 10C3< 18B8> 22D7<

UART4_RTS_L 10B3> 18C7< 22D7> 24D5>

UART4_RTS_3V3_L 18C5

UART4_CTS_R_L 18B7

UART4_CTS_L 10C3< 18B8> 22D7<

TS_SPI_MISO 8C7< 26D3<

TS_SPI_MOSI 8C7> 26D3>

TS_SPI_SCK 8C7> 26D6>

UART2_CTS_L 10C7< 26A4>

UART2_RTS_L 10C7> 26A7<

UART2_RXD 10C7< 26A4>

UART2_TXD 10C7> 26A7<

UART4_CTS_3V3_L 18B5

TS_SPI_CS_L 8C7> 26D6>

Y_JTAG_TRST_L 22A5

YLW_STBYLED_L 25C4

YLW_STBYLED 25D4

XTAL_OUT 8A4

XTAL_LAN_P 19A6

XTAL_LAN_N 19A6

XTAL_IN 8A4

W_DISABLE_R_L 15C4

W_DISABLE_L 15C2

WWAN_L 15C4

WPAN_L 15C4

WLAN_LED 15C3

WLAN_L 15C4

WF_EN 10A3> 15C1<

WF_DISABLE 15C2

VVDD_GPU_PROBE 11B5

VVDD_CPU_PROBE 11A5

VVDD_CORE_PROBE 11A5

VREF_DDR1 7B4> 7B8<

VREF_DDR0 6B5> 6B8<

VP 18C3

VN 18C3

VDD_GPU_SENSE_P 11B2> 33C3<

VDD_GPU_SENSE_N 11B2> 33C3<

VDD_GPU_LX3 34B5

VDD_GPU_LX2 34B5

VDD_GPU_LX1 34C5

VDD_GPU_LX0 34D5

VDD_GPU_BOOST3 34B5

VDD_GPU_BOOST2 34B5

VDD_GPU_BOOST1 34D5

VDD_GPU_BOOST0 34D5

VDD_CPU_SENSE_P 11B2> 33C3<

VDD_CPU_SENSE_N 11A2> 33C3<

VDD_CPU_LX6 35A5

VDD_CPU_LX5 35A5

VDD_CPU_LX4 35B5

VDD_CPU_LX3 35B5

VDD_CPU_LX2 35C5

VDD_CPU_LX1 35D5

VDD_CPU_BOOST6 35A5

VDD_CPU_BOOST5 35A5

VDD_CPU_BOOST4 35B5

VDD_CPU_BOOST3 35B5

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

<->

?

602-7R375-0000-D00 4.04 43

C2A2 CAP_0402_R [34A5]

C2A3 CAP_1206_R [34A6]

C2A4 CAP_1206_R [34A5]

C2A5 CAP_0805_R [34A4]

C2A6 CAP_0805_R [34A4]

C2B1 CAP_0201_R [9B3]

C2C1 CAP_0402_R [9A3]

C2C2 CAP_0402_R [30A8]

C2C3 CAP_0805_R [17B5]

C2C4 CAP_0402_R [16C7]

C2A1 CAP_0402_R [34A5]

C1E21 CAP_0402_R [20C3]

C1E20 CAP_0402_R [20A3]

C1E19 CAP_0402_R [20C3]

C1E18 CAP_0603_R [20A3]

C1E17 CAP_0402_R [20A3]

C1E16 CAP_0402_R [20B4]

C1E15 CAP_0402_R [20B3]

C1E14 CAP_0402_R [20B2]

C1E13 CAP_0603_R [20B2]

C1E12 CAP_0402_R [17B3]

C1E11 CAP_0603_R [20B3]

C1E10 CAP_0603_R [20A4]

C1E9 CAP_0402_R [20B1]

C1E8 CAP_0603_R [20B1]

C1E7 CAP_0805_R [17C6]

C1E6 CAP_1206_R [17C6]

C1E5 CAP_0603_R [20B2]

C1E4 CAP_0402_R [21A5]

C1E3 CAP_0402_R [21A5]

C1E2 CAP_0402_R [21B4]

C1E1 CAP_0402_R [21C6]

C1D9 CAP_0402_R [21A5]

C1D8 CAP_0402_R [22C2]

C1D7 CAP_0402_R [19A2]

C1D6 CAP_0402_R [22C3]

C1D5 CAP_0603_R [19C4]

C1D4 CAP_0402_R [19C4]

C1D3 CAP_0603_R [19C3]

C1D2 CAP_0402_R [19C4]

C1D1 CAP_0402_R [19A6]

C1C2 CAP_0402_R [19B1]

C1C1 CAPP_B2_R [17B5]

C1B3 CAP_0402_R [13B4]

C1B2 CAP_0402_R [13A4]

C1B1 CAP_0402_R [13A4]

Title: Cref Part Report

Design: beaver_t124_fabd

Date: Jul 23 17:18:06 2015

C1A1 CAP_0402_R [18C5]

C1A2 CAP_0402_R [18C5]

C1A3 CAP_0402_R [18C3]

C1A4 CAP_0402_R [18C3]

C4B6 CAP_0402_R [30B2]

C4B5 CAP_0402_R [30C3]

C4B4 CAP_0805_R [30C4]

C4B3 CAP_0402_R [6A8]

C4B2 CAP_0201_R [6A6]

C4B1 CAP_0201_R [6A7]

C4A2 CAP_0402_R [22B6]

C4A1 CAP_0402_R [22B1]

C3E11 CAP_0402_R [16B3]

C3E10 CAP_0402_R [16C2]

C3E9 CAP_0805_R [16C3]

C3E8 CAP_0402_R [16B2]

C3E7 CAP_0402_R [16A2]

C3E6 CAP_0603_R [16A3]

C3E5 CAP_0402_R [34B5]

C3E4 CAP_0402_R [34B6]

C3E3 CAP_0402_R [34B5]

C3E2 CAP_1206_R [34C7]

C3E1 CAP_1206_R [34C5]

C3D9 CAP_1206_R [34B3]

C3D8 CAP_1206_R [34B4]

C3D7 CAP_1206_R [34D3]

C3D6 CAP_1206_R [34D4]

C3D5 CAP_1206_R [34D5]

C3D4 CAP_1206_R [34D6]

C3D3 CAP_0402_R [34D5]

C3D2 CAP_0402_R [34D6]

C3D1 CAP_0402_R [34D5]

C3C2 CAP_0201_R [7A7]

C3C1 CAP_0201_R [7A8]

C3B1 CAP_0201_R [6A8]

C3A1 CAP_0402_R [23B4]

C2D13 CAP_0402_R [15C6]

C2D12 CAP_0402_R [15C6]

C2D11 CAP_0402_R [17C5]

C2D10 CAP_0402_R [16B6]

C2D9 CAP_0402_R [16B6]

C2D8 CAP_0402_R [16A6]

C2D7 CAP_0402_R [16A6]

C2D6 CAP_0402_R [19B4]

C2D5 CAP_0402_R [19B4]

C2D4 CAP_0402_R [19B4]

C2D3 CAP_0402_R [19A6]

C2D2 CAP_0402_R [19B3]

C2D1 CAP_0603_R [19B3]

C2C8 CAP_0402_R [30A4]

C2C7 CAP_0402_R [18A6]

C2C6 CAP_0402_R [18A4]

C2C5 CAP_0402_R [16C7]

C5C9 CAPP_DPOS_R [29B2]

C5C8 CAP_0402_R [29B4]

C5C7 CAP_1206_R [28C3]

C5C6 CAP_1206_R [28C3]

C5C5 CAP_1206_R [29C3]

C5C4 CAP_1206_R [29C4]

C5C3 CAP_0805_R [27C6]

C5C2 CAP_0402_R [29B3]

C5C1 CAP_0402_R [28B3]

C5B3 CAP_0402_R [28B7]

C5B2 CAP_0402_R [27C5]

C5B1 CAP_0402_R [29A7]

C5A1 CAP_0402_R [22A4]

C4E7 CAP_0402_R [24A7]

C4E6 CAP_0402_R [35B5]

C4E5 CAP_0402_R [35B7]

C4E4 CAP_0402_R [35B5]

C4E3 CAP_1206_R [35C5]

C4E2 CAP_1206_R [35C7]

C4E1 CAP_0402_R [31C7]

C4D21 CAP_1206_R [35D7]

C4D20 CAP_1206_R [35A7]

C4D19 CAP_1206_R [35C3]

C4D18 CAP_1206_R [35C2]

C4D17 CAP_0402_R [35D5]

C4D16 CAP_0402_R [35A5]

C4D15 CAP_0402_R [35D7]

C4D14 CAP_0402_R [35A7]

C4D13 CAP_0402_R [35D5]

C4D12 CAP_0402_R [35A5]

C4D11 CAP_1206_R [35C3]

C4D10 CAP_1206_R [35C3]

C4D9 CAP_1206_R [35A5]

C4D8 CAP_1206_R [35D5]

C4D7 CAP_1206_R [35C4]

C4D6 CAP_1206_R [35B4]

C4D5 CAP_0402_R [23C4]

C4D4 CAP_0402_R [23D4]

C4D3 CAP_0402_R [23D4]

C4D2 CAP_0402_R [23C4]

C4C2 CAP_0201_R [7B4]

C4C3 CAP_0201_R [7A6]

C4C4 CAP_0201_R [7A6]

C4C5 CAP_0201_R [7B4]

C4C6 CAP_0402_R [7A8]

C4C7 CAP_0201_R [7A6]

C4C8 CAP_0201_R [7A6]

C4D1 CAP_0402_R [23C4]

C4C1 CAP_0402_R [7A7]

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

<->

?

602-7R375-0000-D00 4.04 44

C6D11 CAP_0402_R [32B7]

C6D12 CAP_0402_R [32B7]

C6D13 CAP_0402_R [32A6]

C6D14 CAP_0603_R [33B6]

C6D15 CAP_0805_R [33B6]

C6D16 CAP_0402_R [32A5]

C6D17 CAP_0402_R [32B7]

C6D18 CAP_0402_R [32A7]

C6D19 CAP_0402_R [32B6]

C6D20 CAP_0402_R [32C6]

C6D10 CAP_0402_R [32B5]

C6D9 CAP_0402_R [32A7]

C6D8 CAP_0805_R [33B3]

C6D7 CAP_0805_R [33B6]

C6D6 CAP_0402_R [31D5]

C6D5 CAP_0402_R [31C4]

C6D4 CAPP_SMD_3225 [31B5]

C6D3 CAP_0402_R [31A6]

C6D2 CAP_0402_R [31B3]

C6D1 CAP_0402_R [31B1]

C6C13 CAP_0402_R [28C2]

C6C12 CAP_0402_R [29C3]

C6C11 CAP_0402_R [28B4]

C6C10 CAP_0805_R [28C3]

C6C9 CAP_0805_R [29B3]

C6C8 CAP_0402_R [29C3]

C6C7 CAP_0402_R [28C5]

C6C6 CAP_0402_R [28C2]

C6C5 CAP_0805_R [27B5]

C6C4 CAP_0402_R [27A6]

C6C3 CAP_0603_R [27B5]

C6C2 CAP_0402_R [28B7]

C6C1 CAP_0402_R [29B4]

C6B2 CAP_0402_R [28A7]

C6B1 CAP_0402_R [29A7]

C5E1 CAP_0402_R [24B7]

C5D17 CAP_0402_R [33A4]

C5D16 CAP_0402_R [31D5]

C5D15 CAP_0805_R [33A3]

C5D14 CAP_0402_R [31B5]

C5D13 CAP_0402_R [31A4]

C5D12 CAP_0805_R [33B3]

C5D11 CAP_0805_R [33B3]

C5D10 CAP_0603_R [33B3]

C5D9 CAP_0603_R [33B3]

C5D8 CAP_0402_R [31B5]

C5C11 CAP_1206_R [27D5]

C5D1 CAP_1206_R [27D3]

C5D2 CAP_0402_R [30B6]

C5D3 CAP_0402_R [30B7]

C5D4 CAP_1206_R [27D3]

C5D5 CAP_1206_R [27D3]

C5D6 CAP_0402_R [31A7]

C5D7 CAP_0402_R [31A2]

C5C10 CAPP_DPOS_R [28C2]

C7E2 CAP_0805_R [35A4]

C7E1 CAP_0805_R [35C4]

C7D9 CAP_0402_R [32C5]

C7D8 CAP_1206_R [35A7]

C7D7 CAP_1206_R [35D7]

C7D6 CAP_0805_R [35B4]

C7D5 CAP_0805_R [35C4]

C7D4 CAP_1206_R [35A5]

C7D3 CAP_1206_R [35D5]

C7D2 CAP_0805_R [35A4]

C7D1 CAP_0805_R [35B4]

C7C12 CAP_0402_R [7A7]

C7C11 CAP_0201_R [7A8]

C7C10 CAP_0201_R [7A7]

C7C9 CAP_0201_R [7A6]

C7C8 CAP_0201_R [7A6]

C7C7 CAP_0402_R [7A8]

C7C6 CAP_0201_R [6A6]

C7C5 CAP_0402_R [6A7]

C7C4 CAP_0201_R [7B8]

C7C3 CAP_0201_R [6A6]

C7C2 CAP_0201_R [7B8]

C7C1 CAP_0201_R [7A6]

C7B13 CAP_0201_R [6B8]

C7B12 CAP_0201_R [6A6]

C7B11 CAP_0201_R [6A6]

C7B10 CAP_0201_R [6B4]

C7B9 CAP_0201_R [6A6]

C7B8 CAP_0201_R [6B8]

C7B7 CAP_0402_R [6A8]

C7B6 CAP_0201_R [6A7]

C7B5 CAP_0201_R [6A8]

C7B4 CAP_0201_R [6B4]

C7B3 CAP_0402_R [22C7]

C7B2 CAP_0603_R [25A4]

C7B1 CAP_0402_R [25A4]

C6E9 CAP_0603_R [33A3]

C6E8 CAP_0603_R [33A3]

C6E7 CAP_0402_R [32C6]

C6E6 CAP_0402_R [32C7]

C6E5 CAP_0805_R [33A6]

C6E4 CAP_0402_R [32C7]

C6E3 CAP_0402_R [32C5]

C6E2 CAP_0402_R [32C5]

C6E1 CAP_0402_R [32C5]

C6D24 CAP_0805_R [33A6]

C6D23 CAP_0603_R [32C7]

C6D22 CAP_0805_R [33A3]

C6D21 CAP_0402_R [32A5]

C8C11 CAP_0402_R [5D4]

C8C10 CAP_0201_R [5D4]

C8C9 CAP_0201_R [11D8]

C8C8 CAP_0201_R [5D4]

C8C7 CAP_0402_R [5D4]

C8C6 CAP_0402_R [11A7]

C8C5 CAP_0402_R [11A7]

C8C4 CAP_0402_R [11D4]

C8C3 CAP_0402_R [11D4]

C8C2 CAP_0402_R [11D7]

C8C1 CAP_0201_R [4D4]

C8B35 CAP_0402_R [11C4]

C8B34 CAP_0402_R [11C4]

C8B33 CAP_0402_R [11B8]

C8B32 CAP_0402_R [11B8]

C8B31 CAP_0402_R [5C2]

C8B30 CAP_0201_R [5B4]

C8B29 CAP_0402_R [11D7]

C8B28 CAP_0402_R [5C2]

C8B27 CAP_0201_R [8A4]

C8B26 CAP_0201_R [9D4]

C8B25 CAP_0201_R [8C6]

C8B24 CAP_0201_R [8D4]

C8B23 CAP_0402_R [10D6]

C8B22 CAP_0402_R [9D4]

C8B21 CAP_0402_R [5C2]

C8B20 CAP_0402_R [8D4]

C8B19 CAP_0201_R [5C4]

C8B18 CAP_0201_R [10D6]

C8B17 CAP_0201_R [4C3]

C8B16 CAP_0402_R [5C3]

C8B15 CAP_0402_R [8C7]

C8B14 CAP_0402_R [5C2]

C8B13 CAP_0201_R [14C6]

C8B12 CAP_0402_R [10D3]

C8B11 CAP_0402_R [14C6]

C8B10 CAP_0201_R [10D3]

C8B9 CAP_0402_R [8A4]

C8B8 CAP_0402_R [8B7]

C8B7 CAP_0201_R [8B7]

C7E4 CAP_1206_R [35C5]

C7E5 CAP_1206_R [35C7]

C8B1 CAP_0402_R [22D7]

C8B2 CAP_0402_R [8A4]

C8B3 CAP_0402_R [8A4]

C8B4 CAP_0402_R [6A7]

C8B5 CAP_0201_R [6A6]

C8B6 CAP_0201_R [6A6]

C7E3 CAP_1206_R [35A4]

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

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CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

<->

?

602-7R375-0000-D00 4.04 45

C8D7 CAP_1206_R [34C6]

C8D8 CAP_1206_R [34C5]

C9A1 CAP_0402_R [34A7]

C9A2 CAP_0402_R [18D3]

C9A3 CAP_1206_R [34A5]

C9A4 CAP_1206_R [34A7]

C9A5 CAP_0805_R [34A3]

C9A6 CAP_0805_R [34A4]

C9B1 CAP_0201_R [9C3]

C9B2 CAP_0201_R [9D4]

C8D6 CAP_0805_R [34B4]

C8D5 CAP_0805_R [34B4]

C8D4 CAP_0805_R [34D4]

C8D3 CAP_0805_R [34C4]

C8D2 CAP_1206_R [34D5]

C8D1 CAP_1206_R [34D7]

C8C50 CAP_0805_R [11A8]

C8C49 CAP_0402_R [14C3]

C8C48 CAP_0201_R [14C3]

C8C47 CAP_0402_R [8D4]

C8C46 CAP_0201_R [7A6]

C8C45 CAP_0402_R [8A7]

C8C44 CAP_0201_R [8A6]

C8C43 CAP_0402_R [10B6]

C8C42 CAP_0402_R [11A7]

C8C41 CAP_0201_R [10B6]

C8C40 CAP_0201_R [11B7]

C8C39 CAP_0201_R [11B7]

C8C38 CAP_0402_R [5C3]

C8C37 CAP_0201_R [11B8]

C8C36 CAP_0402_R [5C3]

C8C35 CAP_0201_R [11B7]

C8C34 CAP_0201_R [11B7]

C8C33 CAP_0201_R [8D4]

C8C32 CAP_0201_R [11B8]

C8C31 CAP_0201_R [5C4]

C8C30 CAP_0201_R [11D5]

C8C29 CAP_0201_R [11B7]

C8C28 CAP_0402_R [5C3]

C8C27 CAP_0201_R [11D4]

C8C26 CAP_0201_R [11B7]

C8C25 CAP_0201_R [11B8]

C8C24 CAP_0402_R [11C8]

C8C23 CAP_0201_R [11B7]

C8C22 CAP_0402_R [11C5]

C8C21 CAP_0402_R [11A8]

C8C13 CAP_0402_R [11B8]

C8C14 CAP_0402_R [11A8]

C8C15 CAP_0402_R [11C4]

C8C16 CAP_0201_R [4C4]

C8C17 CAP_0402_R [11C4]

C8C18 CAP_0201_R [5C4]

C8C19 CAP_0402_R [11C8]

C8C20 CAP_0402_R [5C4]

C8C12 CAP_0201_R [4C2]

C9D1A CAP_0402_R [21A5]

C9D1 CAP_0402_R [30A5]

C9C25 CAP_0402_R [16B7]

C9C24 CAP_0402_R [16B7]

C9C23 CAP_0402_R [16A7]

C9C22 CAP_0402_R [16A7]

C9C21 CAP_0402_R [14C3]

C9C20 CAP_0201_R [14C3]

C9C19 CAP_0402_R [14C6]

C9C18 CAP_0201_R [14D6]

C9C17 CAP_0402_R [14D7]

C9C16 CAP_0402_R [14A2]

C9C15 CAP_0402_R [14D6]

C9C14 CAP_0201_R [14C6]

C9C13 CAP_0201_R [14C3]

C9C12 CAP_0402_R [14C3]

C9C11 CAP_0402_R [14C3]

C9C10 CAP_0201_R [14C3]

C9C9 CAP_0201_R [11D4]

C9C8 CAP_0402_R [14D3]

C9C7 CAP_0201_R [14D3]

C9C6 CAP_0402_R [8D6]

C9C5 CAP_0201_R [9A7]

C9C4 CAP_0201_R [11D8]

C9C3 CAP_0201_R [8D6]

C9C2 CAP_0201_R [11D7]

C9C1 CAP_0201_R [9A4]

C9B24 CAP_0402_R [10D3]

C9B23 CAP_0402_R [9A4]

C9B22 CAP_0201_R [10D3]

C9B21 CAP_0201_R [9D7]

C9B20 CAP_0201_R [9A4]

C9B19 CAP_0201_R [8C4]

C9B18 CAP_0402_R [9A4]

C9B17 CAP_0402_R [9D7]

C9B16 CAP_0402_R [11C7]

C9B15 CAP_0402_R [9A7]

C9B14 CAP_0402_R [9B7]

C9B13 CAP_0201_R [9B7]

C9B12 CAP_0402_R [11C7]

C9B11 CAP_0402_R [11C8]

C9B10 CAP_0201_R [11D8]

C9B9 CAP_0402_R [9C2]

C9B8 CAP_0402_R [11C7]

C9B7 CAP_0201_R [9B4]

C9B6 CAP_0402_R [9B4]

C9B5 CAP_0402_R [9C4]

C9B4 CAP_0201_R [9B4]

C9B3 CAP_0402_R [9D4]

CR4E1 TVS_BIDIR2_SOD882_R [24A8]

CR2D1 DIODECC_S23_R [17D6]

0P8_R

CR2C2 TVS_DUAL_DIFF_PAIR_SLP251 [17A5 17A6]

CR2C1 TVS_USB_XSOP7_R [17A4]

CR1E2 LED_0603_R [15C3]

CR1E1 TVS_USB_XSOP7_R [17C3]

0P8_R

CR1C1 TVS_DUAL_DIFF_PAIR_SLP251 [13C6 13C6]

0P8_R

CR1B1 TVS_DUAL_DIFF_PAIR_SLP251 [13C5 13C4]

C10E10 CAP_0402_R [20A3]

C10E9 CAP_0402_R [20A4]

C10E8 CAP_0402_R [20A4]

C10E7 CAP_0402_R [20A4]

C10E6 CAP_0402_R [20A4]

C10E5 CAP_0402_R [20A5]

C10E4 CAP_0603_R [20A4]

C10E3 CAP_0603_R [20B3]

C10E2 CAP_0402_R [20B2]

C10E1 CAP_0402_R [20B2]

C10D3 CAP_0402_R [19B4]

C10D2 CAP_0402_R [19B4]

C10D1 CAP_0402_R [19B4]

C10C5 CAP_0402_R [17B5]

C10C4 CAP_0402_R [17B5]

C10C3 CAP_0402_R [17B6]

C10C2 CAP_0603_R [17B8]

C10C1 CAP_0402_R [17B7]

C10B7 CAP_0402_R [13B4]

C10B6 CAP_0402_R [13D4]

C10B5 CAP_0603_R [13A7]

C10B4 CAP_0402_R [18C7]

C10B3 CAP_0402_R [18C7]

C10B2 CAP_0402_R [18C5]

C10B1 CAP_0402_R [18B5]

C10A1 CAP_0402_R [18B3]

C9E5 CAP_0402_R [15B6]

C9E4 CAP_0805_R [15D4]

C9E3 CAP_0603_R [15B6]

C9D3 CAP_0402_R [19C4]

C9D4 CAP_0402_R [16D2]

C9D5 CAP_0402_R [16D2]

C9D6 CAP_0402_R [16C2]

C9D7 CAP_0402_R [16D2]

C9D8 CAP_0402_R [17D7]

C9E1 CAP_0603_R [15D3]

C9E2 CAP_0603_R [15B4]

C9D2 CAP_0603_R [19C4]

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

<->

?

602-7R375-0000-D00 4.04 46

L1E2 INDUCTOR_0402_R [21A5]

L1E3 CHOKE_2012_R [17C4 17C4]

L1E4 INDUCTOR_0402_R [20B1]


L2A1 INDUCTOR_SMD_R [34A5]

L2A2 INDUCTOR_SMD_R [34A5]

L2D1 INDUCTOR_2016_R [19C3]

L2D2 INDUCTOR_SMD_R [19C3]

L5C1 INDUCTOR_SMD_R [29C3]

L5C2 INDUCTOR_SMD_R [28C3]

L1E1 INDUCTOR_0402_R [21B6]

L1D2 INDUCTOR_0402_R [21C6]

L1D1 INDUCTOR_0402_R [21A5]

L1B1 INDUCTOR_0402_R [13A4]

J7B1 HDR_24_FPC_RA_SMT2_R [22C6]

J5E2 HDR1X1_THR [24A8]

J5E1 HDR1X1_THR [24C8]

J5C1 PWR_JACK_5P_THR_R [27D6]

J5B1 CON_SD_SM1_R [25B3]

J4E2 SKT_PWR_IDE_THR_R [16B1]

J4E1 HDR1X1_THR [24A8]

J4A2 FAN1X4_4PIN_FAN_R [27C2]

J4A1 HDR2X10_THR_RA_SHR2 [22A1]

J3A2 SKT3X25_THR_R [26B5]

J3A1 SKT2X25_THR_R [26D5]

_STND_R

J2D2 MINI_PCI_EXPRESS_SMT_HALF [15C5]

J2D1 SATA_THR_SHRD_R [16D1]

1P

J1E1 CON_USB_MICRO_AB_TH_UAB_1 [17C2]

_THR_R

J1D2 AUDIO_JACK_2PORT_LIMEPINK [21C4 21A4]

_2_R

J1D1 RJ45_1X1GBIT_MAG_LED_RJ45 [19A2]

J1C2 USBX1_V3_RA_FLAG_TH_R [17B4]

J1C1 CON_HDMI_A_SMT_G_R [13C3]

J1A2 SERIAL_DSUB_DSUB9_R [18C1]

J1A1 HDR2X5KEY10_THR_R [25D5]

ISO10D1 GNDISO_4MIL [21A4]

ISO8C1 GNDISO_10MIL [5B1]

ISO6C1 GNDISO_10MIL [27A5]

ISO5E1 GNDISO_4MIL [33A3]

ISO5D2 GNDISO_4MIL [33A3]

ISO5D1 GNDISO_4MIL [33B4]



CR5E2 TVS_BIDIR2_SOD882_R [24C7]

CR5E3 TVS_BIDIR2_SOD882_R [24B7]

CR7B1 DIODESER_QUAD_XSOP7_R [25A5]

CR7B2 DIODESER_QUAD_XSOP7_R [25A6]

CR10C1 DIODECC_S323_R [13B5]

HS3C1 HEATSINK_50MMX67MM_ELLIPT [12C6]

IC_12V

ISO3A1 GNDISO_4MIL [8A7]

CR5E1 LED_0603_R [30D5]

Q9A2 MOSFETPSOT23_S23_R [9D3]

Q9A1 MOSFETPSOT23_S23_R [9C3]

Q6C2 MOSFETN_DFN_DUAL_DFN3X3 [28C4]

Q6C1 MOSFETN_DFN_DUAL_DFN3X3 [29C4]

Q5D2 MOSFETNSOT23_S23_R [32B2]

Q5D1 MOSFETNSOT23_S23_R [32B1]

Q4E2 MOSFETP_SC70S_SC70S_R [24A6]

Q4E1 MOSFETNSOT23_S23_R [24A6]

Q4A2 MOSFETPSOT23_S23_R [27D2]

Q4A1 MOSFETN_SC70S_SC70S_R [27C3]

Q3E2 MOSFETP_DFN3X3_DFN3X3_R [16A2]

Q3E1 MOSFETN_SC70S_SC70S_R [16A2]

Q2D3 MOSFETN_SC70S_SC70S_R [17C6]

Q2D2 MOSFETN_SC70S_SC70S_R [18A3]

Q2D1 MOSFETN_SC70S_SC70S_R [18A2]

Q1E1 MOSFETN_SC70S_SC70S_R [21B5]


Q1A2 MOSFETN_SC70S_SC70S_R [25D6]


M5E1 BRD_MOUNT_BRDMNT2 [12B6]

M5A1 BRD_MOUNT_BRDMNT2 [12A6]

M3E1 PEM_SMT_R [15C4]

M2E1 PEM_SMT_R [15D4]

M1E1 BRD_MOUNT_BRDMNT2 [12A7]

M1A1 BRD_MOUNT_BRDMNT2 [12B7]


L10B3 INDUCTOR_0402_R [13C4]

L10B2 INDUCTOR_0402_R [13B6]


L9C4 CHOKE_2012_R [17B6 17B6]

L9C3 INDUCTOR_0402_R [14C7]

L9C2 INDUCTOR_0402_R [14D2]

L9C1 INDUCTOR_0402_R [14C2]



L8D4 INDUCTOR_SMD_R [34B4]


L8D2 INDUCTOR_SMD_R [34D4]



L7E2 INDUCTOR_SMD_R [35B5]

L7E1 INDUCTOR_SMD_R [35B5]

L7D4 INDUCTOR_SMD_R [35A5]


L7D2 INDUCTOR_SMD_R [35D5]

L7D1 INDUCTOR_SMD_R [35A5]

L6E2 PWR_INDUCTOR_SMDA_R [33A4]

L6E1 PWR_INDUCTOR_SMDA_R [33A4]


R1E10 RES_0402_R [20C2]

R1E9 RES_0402_R [20C3]

R1E8 RES_0402_R [20B7]

R1E7 RES_0402_R [20C7]

R1E6 RES_0402_R [20B3]

R1E5 RES_0402_R [20B1]

R1E4 RES_0402_R [17D3]

R1E3 RES_0402_R [21B5]

R1E2 RES_0402_R [21B5]

R1E1 RES_0402_R [21B4]

R1D9 RES_0402_R [21C4]

R1D8 RES_0402_R [21C5]

R1D7 RES_0402_R [21C5]

R1D6 RES_0402_R [21C5]

R1D5 RES_0402_R [22D2]

R1D4 RES_0402_R [22D2]

R1D3 RES_0402_R [22D2]

R1D2 RES_0402_R [19A1]

R1D1 RES_0402_R [19A4]

R1C2 RES_0402_R [17B7]

R1C1 RES_0402_R [13D4]

R1B11 RES_0402_R [18B7]

R1B10 RES_0402_R [18B7]

R1B9 RES_0402_R [13B6]

R1B8 RES_0402_R [13B6]

R1B7 RES_0402_R [13A7]

R1B6 RES_0201_R [24C6]

R1B5 RES_0201_R [24D6]

R1B4 RES_0201_R [24D7]

R1B3 RES_0201_R [24C7]

R1B2 RES_0201_R [24C7]

R1B1 RES_0201_R [24D7]

R1A8 RES_0402_R [18C2]

R1A7 RES_0603_R [25D5]

R1A6 RES_0402_R [25C6]

R1A5 RES_0402_R [25D3]

R1A4 RES_0402_R [25C3]

R1A3 RES_0603_R [25D4]

R1A2 RES_0603_R [25D5]

R1A1 RES_0603_R [25D4]

Q9A4 MOSFETNSOT23_S23_R [9D3]

Q9D1 NPN_S363_R [19B6 19B6]



Q9E1 MOSFETNSOT23_S23_R [17B2]

Q9E2 MOSFETNSOT23_S23_R [17B3]

Q9E3 MOSFETNSOT23_S23_R [17A2]

Q10B1 MOSFETNSOT23_S23_R [13C5]

Q9A3 MOSFETNSOT23_S23_R [9C3]

C

B

A

D

2 14 3

PAGEREVDOC NUMBER

TITLE

CONFIDENTIALNVIDIA

6 5

D

78

A

C

B

24 3 18 7 6 5

<->

?

602-7R375-0000-D00 4.04 47

R3B2 RES_0201_R [24B3]

R3B3 RES_0402_R [10B2]

R3B4 RES_0201_R [24D3]

R3B5 RES_0201_R [24D3]

R3B6 RES_0201_R [8C3]

R3B7 RES_0201_R [8C3]

R3C1 RES_0201_R [5A6]

R3C2 RES_0201_R [5A6]

R3C3 RES_0201_R [8C3]

R3C4 RES_0201_R [10A6]

R3B1 RES_0201_R [24B4]

R3A2 RES_0402_R [23B4]

R3A1 RES_0402_R [23B6]

R2D11 RES_0402_R [19B7]

R2D10 RES_0402_R [19C6]

R2D9 RES_0402_R [19C6]

R2D8 RES_0402_R [19B6]

R2D7 RES_0402_R [30A4]

R2D6 RES_0402_R [19A3]

R2D5 RES_0402_R [19A3]

R2D4 RES_0402_R [19A3]

R2D3 RES_0402_R [18B3]

R2D2 RES_0402_R [18B3]

R2D1 RES_0402_R [18A2]

R2C10 RES_0402_R [24A4]

R2C9 RES_0402_R [24A4]

R2C8 RES_0402_R [24A4]

R2C7 RES_0402_R [24A4]

R2C6 RES_0201_R [16B7]

R2C5 RES_0201_R [16B7]

R2C4 RES_0402_R [14A3]

R2C3 RES_0402_R [22A4]

R2C2 RES_0402_R [30A7]

R2C1 RES_0402_R [8C8]

R2B9 RES_0402_R [8C7]

R2B8 RES_0201_R [10B2]

R2B7 RES_0201_R [24D3]

R2B6 RES_0201_R [10B2]

R2B5 RES_0201_R [24D2]

R2B4 RES_0201_R [26C5]

R2B3 RES_0201_R [26C6]

R2B2 RES_0201_R [24B3]

R2B1 RES_0201_R [24B3]

R2A12 RES_0402_R [9C2]

R2A11 RES_0402_R [9C2]

R2A10 RES_0402_R [9D2]

R2A2 RES_0402_R [18D5]

R2A3 RES_0402_R [18D5]

R2A4 RES_0402_R [9D3]

R2A5 RES_0402_R [9C3]

R2A6 RES_0402_R [9D2]

R2A7 RES_0402_R [9C2]

R2A8 RES_0402_R [9D3]

R2A9 RES_0402_R [9D2]

R2A1 RES_0402_R [18D6]

R5C2 RES_0402_R [29C7]

R5C1 RES_0402_R [28C7]

R5B7 RES_0402_R [28B2]

R5B6 RES_0402_R [28B6]

R5B5 RES_0402_R [27A7]

R5B4 RES_0402_R [29A6]

R5B3 RES_0402_R [29A1]

R5B2 RES_0402_R [27A7]

R5B1 RES_0402_R [27B7]

R5A4 RES_0402_R [22B3]

R5A2 RES_0402_R [22A2]

R5A1 RES_0402_R [22A2]

R4E5 RES_0402_R [24B7]

R4E4 RES_0402_R [24A7]

R4E3 RES_0402_R [24A6]

R4E2 RES_0402_R [31C7]

R4E1 RES_0402_R [31C7]

R4D2 RES_0402_R [30C7]

R4D1 RES_0201_R [23D6]

R4C1 RES_0402_R [7B5]

R4B4 RES_0402_R [6B5]

R4B3 RES_0402_R [6B5]

R4B2 RES_0201_R [6B4]

R4B1 RES_0201_R [6B3]

R4A13 RES_0402_R [22A2]

R4A12 RES_0402_R [27C3]

R4A11 RES_0402_R [27D3]

R4A10 RES_0603_R [27D2]

R4A9 RES_0402_R [27C3]

R4A8 RES_0402_R [27C3]

R4A7 RES_0603_R [27D2]

R4A6 RES_0402_R [31C3]

R4A5 RES_0603_R [27D2]

R4A4 RES_0402_R [22A2]

R4A3 RES_0402_R [22B2]

R4A2 RES_0402_R [22B2]

R4A1 RES_0402_R [22B2]

R3E6 RES_0402_R [16B4]

R3E5 RES_0402_R [16B2]

R3E4 RES_0402_R [16A3]

R3E3 RES_0402_R [16A3]

R3E2 RES_0402_R [16A3]

R3E1 RES_0402_R [16A2]

R3C10 RES_0402_R [24A4]

R3C9 RES_0402_R [24A4]

R3C8 RES_0402_R [24A4]

R3C7 RES_0402_R [24A4]

R3C6 RES_0201_R [10B6]

R3C5 RES_0201_R [8C2]

R6C12 RES_0805_R [28C4]

R6C11 RES_0402_R [28C3]

R6C10 RES_0402_R [29B3]

R6C9 RES_0402_R [28C3]

R6C8 RES_0402_R [29B3]

R6C7 RES_0402_R [28C5]

R6C6 RES_0402_R [28C7]

R6C5 RES_0402_R [28B7]

R6C4 RES_0402_R [29B7]

R6C3 RES_0805_R [29B4]

R6C2 RES_0402_R [29B3]

R6C1 RES_0402_R [28B3]

R6B9 RES_0402_R [28B7]

R6B8 RES_0402_R [28A2]

R6B7 RES_0402_R [27A7]

R6B6 RES_0402_R [29A1]

R6B5 RES_0402_R [29A7]

R6B4 RES_0402_R [27A7]

R6B3 RES_0402_R [27B7]

R6B2 RES_0402_R [25B5]

R6B1 RES_0402_R [25B4]

R5E11 RES_0201_R [24D7]

R5E10 RES_0402_R [30D5]

R5E9 RES_0402_R [11A4]

R5E8 RES_0402_R [11B2]

R5E7 RES_0402_R [11B2]

R5E6 RES_0402_R [11B4]

R5E5 RES_0402_R [33D7]

R5E4 RES_0402_R [33D7]

R5E3 RES_0402_R [33C6]

R5E2 RES_0402_R [33C6]

R5E1 RES_0201_R [31C5]

R5D8 RES_0402_R [31B5]

R5D7 RES_0402_R [32A5]

R5D6 RES_0402_R [31B4]

R5D5 RES_0402_R [33C6]

R5D4 RES_0201_R [31A2]

R5D3 RES_0402_R [31A7]

R5D2 RES_0402_R [30C6]

R5D1 RES_0402_R [30B7]

R5C4 RES_0402_R [27B6]

R5C5 RES_0603_R [29C5]

R5C6 RES_0603_R [28C5]

R5C7 RES_0402_R [29B5]

R5C8 RES_0603_R [27D4]

R5C9 RES_0402_R [27D4]

R5C10 RES_0402_R [27D4]

R5C11 RES_1206_R [27D4]

R5C3 RES_0402_R [28C6]

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602-7R375-0000-D00 4.04 48

R8B23 RES_0201_R [8A4]

R8C1 RES_0201_R [4C2]

R8C2 RES_0201_R [4C2]

R8C3 RES_0201_R [8B3]

R8C4 RES_0201_R [8A7]

R8C5 RES_0201_R [11B4]

R8C6 RES_0201_R [8A7]

R8C7 RES_0201_R [11A4]

R8C8 RES_0201_R [11A4]

R9A1 RES_0402_R [18D5]

R8B22 RES_0201_R [8B7]

R8B21 RES_0201_R [4C3]

R8B20 RES_0201_R [8A4]

R8B19 RES_0201_R [4C2]

R8B18 RES_0201_R [8B7]

R8B17 RES_0201_R [10B3]

R8B16 RES_0201_R [10B3]

R8B15 RES_0201_R [8A6]

R8B14 RES_0201_R [8A3]

R8B13 RES_0201_R [8A7]

R8B12 RES_0201_R [10C6]

R8B11 RES_0201_R [10B7]

R8B10 RES_0201_R [10B8]

R8B9 RES_0402_R [24D3]

R8B8 RES_0201_R [8A4]

R8B7 RES_0402_R [24D3]

R8B6 RES_0402_R [22D7]

R8B5 RES_0402_R [22D6]

R8B4 RES_0402_R [22C8]

R8B3 RES_0201_R [24B4]

R8B2 RES_0201_R [24B3]

R8B1 RES_0201_R [8A3]

R7C5 RES_0402_R [7B5]

R7C4 RES_0201_R [7B3]

R7C3 RES_0201_R [7B3]

R7C2 RES_0201_R [7B7]

R7C1 RES_0201_R [7B7]

R7B2 RES_0201_R [6B8]

R7B1 RES_0201_R [6B7]

R7A1 RES_0201_R [24D6]

R6E3 RES_0402_R [11A2]

R6E2 RES_0402_R [11A4]

R6E1 RES_0402_R [33D6]

R6D12 RES_0402_R [31C5]

R6D11 RES_0402_R [31C5]

R6D10 RES_0402_R [31B7]

R6D2 RES_0402_R [31B5]

R6D3 RES_0402_R [31A7]

R6D4 RES_0402_R [31A7]

R6D5 RES_0402_R [31B5]

R6D6 RES_0402_R [31A5]

R6D7 RES_0402_R [32C2]

R6D8 RES_0402_R [31C3]

R6D9 RES_0402_R [31B2]

R6D1 RES_0603_R [32C1]

R10B3 RES_0402_R [13C5]

R10B2 RES_0402_R [13D4]

R10B1 RES_0402_R [13A5]

R9E8 RES_0402_R [17B2]

R9E7 RES_0402_R [17B1]

R9E6 RES_0402_R [17B2]

R9E5 RES_0402_R [17B3]

R9E4 RES_0402_R [15B6]

R9E3 RES_0402_R [15B4]

R9E2 RES_0402_R [15B4]

R9E1 RES_0402_R [15B5]

R9D14 RES_0402_R [19B7]

R9D13 RES_0402_R [15C3]

R9D12 RES_0402_R [15C3]

R9D11 RES_0402_R [15C4]

R9D10 RES_0402_R [15C3]

R9D9 RES_0402_R [15D2]

R9D8 RES_0402_R [17C5]

R9D7 RES_0402_R [17C7]

R9D6 RES_0201_R [16B6]

R9D5 RES_0201_R [16B6]

R9D4 RES_0201_R [16A6]

R9D3 RES_0402_R [19C5]

R9D2 RES_0201_R [16A6]

R9D1 RES_0402_R [18A4]

R9C11 RES_0402_R [18A6]

R9C10 RES_0402_R [18A6]

R9C9 RES_0201_R [14C8]

R9C8 RES_0201_R [14C6]

R9C7 RES_0201_R [14A3]

R9C6 RES_0402_R [9A3]

R9C5 RES_0201_R [9A7]

R9C4 RES_0201_R [9A4]

R9C3 RES_0201_R [9A7]

R9C2 RES_0201_R [9A7]

R9C1 RES_0402_R [8D8]

R9B13 RES_0201_R [9B7]

R9B12 RES_0402_R [8D8]

R9B11 RES_0201_R [9B7]

R9B10 RES_0201_R [9B8]

R9B9 RES_0201_R [9B8]

R9B8 RES_0201_R [9C4]

R9B7 RES_0201_R [9B4]

R9B6 RES_0201_R [10B1]

R9B5 RES_0201_R [24D3]

R9B4 RES_0201_R [10B2]

R9B3 RES_0201_R [24D2]

R9B2 RES_0201_R [24B3]

R9B1 RES_0201_R [24B3]

T3B39 TEE_TEE [4A7]

T3B38 TEE_TEE [4B7]

T3B37 TEE_TEE [4B7]

T3B36 TEE_TEE [4C7]

T3B35 TEE_TEE [4B7]

T3B34 TEE_TEE [4C7]

T3B33 TEE_TEE [4B7]

T3B32 TEE_TEE [4B7]

T3B31 TEE_TEE [4C7]

T3B30 TEE_TEE [4B7]

T3B29 TEE_TEE [4B7]

T3B28 TEE_TEE [4C7]

T3B27 TEE_TEE [4C7]

T3B26 TEE_TEE [4B7]

T3B25 TEE_TEE [4C7]

T3B24 TEE_TEE [4C7]

T3B23 TEE_TEE [4C7]

T3B22 TEE_TEE [4C7]

T3B21 TEE_TEE [4C7]

T3B20 TEE_TEE [4B7]

T3B19 TEE_TEE [4B7]

T3B18 TEE_TEE [4C7]

T3B17 TEE_TEE [4C7]

T3B16 TEE_TEE [4C7]

T3B15 TEE_TEE [4C7]

T3B14 TEE_TEE [4B7]

T3B13 TEE_TEE [4B7]

T3B12 TEE_TEE [4D7]

T3B11 TEE_TEE [4B7]

T3B10 TEE_TEE [4C7]

T3B9 TEE_TEE [4A7]

T3B8 TEE_TEE [4C7]

T3B7 TEE_TEE [4C7]

T3B6 TEE_TEE [4C7]

T3B5 TEE_TEE [4C7]

T3B4 TEE_TEE [4C7]

T3B3 TEE_TEE [4C7]

T3B2 TEE_TEE [4D7]

T3B1 TEE_TEE [4B7]

SW5E2 BUTTON_6P_THICK_UNIV [24C8]

R10E1 RES_0402_R [17A3]

R10E2 RES_0402_R [20B7]

R10E3 RES_0402_R [20B6]

R10E4 RES_0402_R [20C2]

R10E5 RES_0402_R [20C3]

RT5D1 THERMISTOR_0402_R [31A2]

SW4E1 BUTTON_6P_THICK_UNIV [24A8]

SW5E1 BUTTON_6P_THICK_UNIV [24B8]

R10C1 RES_0402_R [13B5]

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T3C41 TEE_TEE [5B6]

T3C42 TEE_TEE [5A6]

T3C43 TEE_TEE [5B6]

T3C44 TEE_TEE [5B6]

T4B1 TEE_TEE [6D7]

T4B2 TEE_TEE [6D7]

T4B3 TEE_TEE [7D7]

T4B4 TEE_TEE [6C7]

T4B5 TEE_TEE [7C7]

T4B6 TEE_TEE [6D7]

T3C40 TEE_TEE [5A6]

T3C39 TEE_TEE [5B6]

T3C38 TEE_TEE [5B6]

T3C37 TEE_TEE [5B6]

T3C36 TEE_TEE [5C6]

T3C35 TEE_TEE [5C6]

T3C34 TEE_TEE [5B6]

T3C33 TEE_TEE [5B6]

T3C32 TEE_TEE [5A6]

T3C31 TEE_TEE [5B6]

T3C30 TEE_TEE [5A6]

T3C29 TEE_TEE [5C6]

T3C28 TEE_TEE [5B6]

T3C27 TEE_TEE [5A6]

T3C26 TEE_TEE [5C6]

T3C25 TEE_TEE [5C6]

T3C24 TEE_TEE [5A6]

T3C23 TEE_TEE [5B6]

T3C22 TEE_TEE [5C6]

T3C21 TEE_TEE [5B6]

T3C20 TEE_TEE [5B6]

T3C19 TEE_TEE [5B6]

T3C18 TEE_TEE [5A6]

T3C17 TEE_TEE [5B6]

T3C16 TEE_TEE [5A6]

T3C15 TEE_TEE [5A6]

T3C14 TEE_TEE [5B6]

T3C13 TEE_TEE [5C6]

T3C12 TEE_TEE [5C6]

T3C11 TEE_TEE [5C6]

T3C10 TEE_TEE [5A6]

T3C9 TEE_TEE [5C6]

T3C8 TEE_TEE [5C6]

T3C7 TEE_TEE [5C6]

T3C6 TEE_TEE [5B6]

T3C5 TEE_TEE [5B6]

T3B41 TEE_TEE [4B7]

T3B42 TEE_TEE [4A7]

T3B43 TEE_TEE [4B7]

T3B44 TEE_TEE [4B7]

T3C1 TEE_TEE [5C6]

T3C2 TEE_TEE [5C6]

T3C3 TEE_TEE [5B6]

T3C4 TEE_TEE [5B6]

T3B40 TEE_TEE [4A7]

T4C22 TEE_TEE [7D7]

T4C21 TEE_TEE [7D7]

T4C20 TEE_TEE [7C7]

T4C19 TEE_TEE [7D7]

T4C18 TEE_TEE [4C5]

T4C17 TEE_TEE [4B5]

T4C16 TEE_TEE [4B5]

T4C15 TEE_TEE [4B5]

T4C14 TEE_TEE [4C5]

T4C13 TEE_TEE [4C5]

T4C12 TEE_TEE [4C5]

T4C11 TEE_TEE [4B5]

T4C10 TEE_TEE [4C5]

T4C9 TEE_TEE [4B5]

T4C8 TEE_TEE [4C5]

T4C7 TEE_TEE [4C5]

T4C6 TEE_TEE [4C5]

T4C5 TEE_TEE [4C5]

T4C4 TEE_TEE [4B5]

T4C3 TEE_TEE [4B5]

T4C2 TEE_TEE [4C5]

T4C1 TEE_TEE [4C5]

T4B33 TEE_TEE [4C5]

T4B32 TEE_TEE [4C5]

T4B31 TEE_TEE [6B7]

T4B30 TEE_TEE [6B7]

T4B29 TEE_TEE [7D7]

T4B28 TEE_TEE [6B7]

T4B27 TEE_TEE [7C7]

T4B26 TEE_TEE [6D7]

T4B25 TEE_TEE [6C7]

T4B24 TEE_TEE [4D5]

T4B23 TEE_TEE [6C7]

T4B22 TEE_TEE [6D7]

T4B21 TEE_TEE [6D7]

T4B20 TEE_TEE [6C7]

T4B19 TEE_TEE [6D7]

T4B18 TEE_TEE [4D5]

T4B17 TEE_TEE [6B7]

T4B16 TEE_TEE [7C7]

T4B15 TEE_TEE [7D7]

T4B14 TEE_TEE [6B7]

T4B13 TEE_TEE [6D7]

T4B12 TEE_TEE [6D7]

T4B11 TEE_TEE [7C7]

T4B10 TEE_TEE [6D7]

T4B9 TEE_TEE [7B7]

T4B8 TEE_TEE [6C7]

T4B7 TEE_TEE [6D7]

U3C1 T124MID_PM375_BGA [9C5]


U3C1 T124MID_PM375_BGA [5B5]


U3A1 EEPROM_SPI_8PIN_SOIC_R [23A5]

U2D3 POWER_SW_SOT23_5B_R [17C7]

U2D2 RTL8111GS_QFN-33_R [19B5]

U2D1 SLG5NV1430V_TDFN-6_R [30A4]

U2C2 TEMP_SENSOR_DFN08 [18A5]

U2C1 POWER_SW_BGA04_R [30A7]

U2A2 AS3728_CSP [34A6]

U2A1 EEPROM_2WIRE_8PIN_DFN08_R [18D4]

U1E1 ALC5639_QFN48 [20B5]

U1D1 PCA9306_QFN8_R [22C3]

U1C1 POWER_SW_SON8_R [17B6]

U1B4 POWER_SW_SON7_R [13A6]

R

U1B3 LEVEL_SHIFTER_2BIT_SSOP8_ [18B6]

R

U1B2 LEVEL_SHIFTER_2BIT_SSOP8_ [18C6]

R

U1B1 SERIAL_RS232_3V3_TSSOP16_ [18C4]

T4C49 TEE_TEE [7B7]

T4C48 TEE_TEE [7D7]

T4C47 TEE_TEE [7B7]

T4C46 TEE_TEE [7B7]

T4C45 TEE_TEE [7D7]

T4C44 TEE_TEE [6C7]

T4C43 TEE_TEE [4C5]

T4C42 TEE_TEE [7C7]

T4C41 TEE_TEE [6D7]

T4C40 TEE_TEE [7D7]

T4C39 TEE_TEE [7D7]

T4C38 TEE_TEE [6D7]

T4C37 TEE_TEE [7B7]

T4C36 TEE_TEE [6C7]

T4C35 TEE_TEE [7C7]

T4C34 TEE_TEE [6C7]

T4C33 TEE_TEE [7B7]

T4C32 TEE_TEE [7D7]

T4C24 TEE_TEE [6B7]

T4C25 TEE_TEE [6D7]

T4C26 TEE_TEE [7C7]

T4C27 TEE_TEE [7D7]

T4C28 TEE_TEE [7D7]

T4C29 TEE_TEE [7C7]

T4C30 TEE_TEE [6C7]

T4C31 TEE_TEE [4C5]

T4C23 TEE_TEE [7D7]

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U7D1 EMMC_BGA169_1 [23C5]

U7D2 AS3728_CSP [35D6]

U7D3 AS3728_CSP [35A6]

U7E1 AS3728_CSP [35B6]

U8D1 AS3728_CSP [34D6]

U8E1 AS3728_CSP [34B6]

U9E1 APL5910_SOP8P_R [15B5]

Y2C1 XTAL_HC49_R [19A6]

Y6D1 XTAL_CER_2P_R [31B2]

Y8B1 XTAL_SMD4P_R [8A4]

U7C1 DDR3_X16_BGA100_2 [7C2]

U7B1 DDR3_X16_BGA100_2 [6C6]

U6D1 AS3722_BGA [33B5]

U6D1 AS3722_BGA [32C6]

U6D1 AS3722_BGA [31B4]

U5D2 D_FLIP_FLOP_6PIN_SC70_6 [31A6]

U5D1 SLG5NV1430V_TDFN-6_R [30C6]

U5C1 U_SWREG_TPS51220_QFN32 [29B6]



U5A1 BUFFER_5PIN_SC70_R [22A3]

U4C1 DDR3_X16_BGA100_2 [7C6]




U3E1 SLG5NV1430V_TDFN-6_R [16B2]

U4A1 RST_MON_SOT23_6PIN_R [22A5]

U4A3 RST_MON_SOT23_3_R [22B5]

U4B1 DDR3_X16_BGA100_2 [6C2]

U4B2 POWER_SW_BGA04_R [30B3]


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NVIDIA CORPORATIONdeveloper.download.nvidia.com/embedded/jetson/TK1/docs/3...PAGE 18: TEMP SENSOR,...

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