NIWeek 2016 - "Breaking Data Silos"

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Breaking Data Silos Michael Schuldenfrei, CTO NI Week 2016 - Test Leadership Forum

Transcript of NIWeek 2016 - "Breaking Data Silos"

Page 1: NIWeek 2016 - "Breaking Data Silos"

Breaking Data Silos

Michael Schuldenfrei, CTO

NI Week 2016 - Test Leadership Forum

Page 2: NIWeek 2016 - "Breaking Data Silos"

© Optimal+ 2016, All Rights Reserved

Optimal+ in the Semiconductor Industry

Over 90%Foundry &

OSAT coverage

YieldUp to 2%

Quality50% less escapes

Efficiency Up to 20%

35B+Chips (in 2015)

TTRUp to 30%

And others ….

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Optimal+ Solution Architecture (Semi)

FinanceInventory

Billing Supply

Procurement

Manage-ment

CLIENT APPLICATIONS• Analytics•Queries• Rules• Simulations

APPLICATIONSERVERS

PROXY SERVER

E-TEST DATA LOG

OPERATIONS CLIENT

Test Floors Fabless / IDM Headquarters

Factory A

Factory BFactory C

Alerts & Linked Reports

Guidance & Requests

WAFER SORT TESTER

FINAL TESTTESTER

SLT TESTER

MES

OPTIMAL+ DATABASE(Cloud or On-Premise)

One Point of Truth between Engineering, Operations, Planners, Finance and Management

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Data – Dramatically Enhances Yield, Efficiency & Quality

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Yield Reclamation

Site-to-site variances, equipment issues, etc.

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Efficiency

In this example the tester is retesting 97% of bad dice (blind retest) with only 1 die gain

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Quality – Escape Prevention

Other examples:Good die/device with“out of spec” test resultsFailing tests in good partsIncorrect number of testsFreeze detectionParametric trendsProcess capability (CPk)

Example: Probe mark trackingThe algorithm tracks probe marks per each die at wafer sort and compares with a specified value

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Quality – Outlier Detection

Wafer Geography – die near the edge of the wafer are generally less reliable than those in the center of the wafer

Die Neighborhood – die that are surrounded by large numbers of failing die on the wafer

Parametric Outliers – die with individual test results that are statistically significantly different than the rest of the population

Multivariate Outliers – die where combinations of test results are statistically different than others

Geographic Outliers (colored blue)

Parametric Outliers

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Data Silos and Why they Matter

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Data Silos in Semiconductor Test

E-Test WS FT 1Burn-

inFT 2

Manufacturing Flow

Devices typically go through multiple test steps…

SLT

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Subcon 2SubconFoundry

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Data Silos in Semiconductor Test

E-Test WS FT 1Burn-

inFT 2

Manufacturing Flow

At multiple locations…

SLT

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Subcon 2Subcon 1Foundry

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Data Silos in Semiconductor Test

E-Test WS FT 1Burn-

inFT 2

Manufacturing Flow

No data is typically shared between the testing locations…

SLT

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Subcon 2Subcon 1Foundry

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Data Silos in Semiconductor Test

E-Test WS FT 1Burn-

inFT 2

Manufacturing Flow

Or even within a location

SLT

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Subcon 2Subcon 1Foundry

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Data Silos in Semiconductor Test

E-Test WS FT 1Burn-

inFT 2

Manufacturing Flow

But what if we can BREAK DOWN THE SILOS?

SLT

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Connect data from across multiple operations for:

• Offline analysis

• Wafer map reconstruction

• RMA investigation

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Cross Operation Analysis

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DB WAT WS1 WS2 Assy. FT1 Burn-in FT2 SLT

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Implementations:Within the same test area (e.g. WS, FT, etc.)Between test areas (e.g. from WAT to WS to FT)Within a single subconBetween multiple subcons (hub and spoke)Real-time (test program integration)Offline bin-switching

Example scenarios:Outlier Detection – drift analysisPairing – cherry-picking for power & speed combinationsTest program tuningSLT / Burn-in reduction

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Data Feed Forward – Make it Actionable

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DB WAT WS1 WS2 Assy. FT1 Burn-in FT2 SLT

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Detect Drift between Two Operations

Tester

1. ECID Data

2. FT1 Measurements

Test Program running

FT2 operationReal-time data!

No test time impact!

Database

DB WAT WS1 WS2 Assy. FT1 Burn-in FT2 SLT

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The Challenge:

Burn-in is very expensive – runs for up to 120 hours on large numbers of chips

Burn-in is traditionally a required step for critical components (e.g. medical, automotive)

So by confidently predicting which parts WON’T fail burn-in,

we can reduce the number of tested parts and significantly cut

costs!

Example: Reducing Burn-in

DB WAT WS1 WS2 Assy. FT1 Burn-in FT2 SLT

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Wafer Geography – die near the edge of the wafer are generally less reliable than those in the center of the wafer

Die Neighborhood – die that are surrounded by large numbers of failing die on the wafer

Parametric Outliers – die with individual test results that are statistically significantly different than the rest of the population

Multivariate Outliers – die where combinations of test results are statistically different than others

Low Yielding Wafers – die on wafers with unusually poor yield

How to distill these into a single criteria for burn-in? Quality Index!

Determining Quality – Multiple Factors

Geographic Outliers (colored blue)

Parametric Outliers

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A numeric value representing the perceived quality of a part based on:

• Wafer geography (e.g. edge vs. center)

• Outlier detection rule inputs (e.g. GDBN, Z-PAT, D-PAT, etc.)

• Number of iterations to PASS

• Overall lot/wafer yield

• Equipment health during test

• Parametric test results from multiple operations

• Etc…

Quality Index can be used in many applications

• Burn-in reduction

• Smart binning and pairing

• Outlier detection

• “Virtual Operations” to re-bin parts

• And many more…

Quality Index

Quality Index

Lot/Wafer Yield etc.

Quality Rule

Inputs

Wafer Geography

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Going Beyond Semiconductors

TestReworkGenealogy

IC & Multi Chip

1

N

3

2

Boards Systems In Use ReturnsRework

Test & Process data

Use Data

Performance data

Reliability Data

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Strong trends are driving the need for:

Stretching the Performance EnvelopeSystem complexity, Performance margins

Superior Quality No-Fail, DPPB, Mission-critical

In-use ConfigurabilityFunctionality-on-demand,..

Brand Protection

Connected & Autonomous

Cars

Smart Wearables

Internet of Things

Security

Electronic Systems-in-

Package (3D IC’s)

Industry 4.0

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“The New World”

Requires new collaboration paradigm across Product-Life-Cycle

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Today OEMs and OCMs work in silos without sharing data• Main reasons: no convenient way to share data, concerns about

conflict of interests

• Minimal sharing that does occur is typically in reaction to significant quality issues

At the same time there is significant pressure on both OEM and OCM to:• Shorten time to market

• Shorten time to quality

• Improve quality

• Lower cost (e.g. improve yield, reduce test cost)

• Improve productivity (e.g. shorten issue resolution time)

Lacking end-to-end data sharing mechanisms

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What Problems need to be Solved?

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Distributed Supply Chain

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DFF/DFB between Industries

Electronics OEM

Chip Supplier 1

Chip Supplier 2

Chip Supplier 3

Is this possible???

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Lower RMA Costs• Board-to-Chip correlations• Fast Root Cause analysis• On-line RMA Prevention Rules• Reduced NTF rates

Improved Quality and Time-to-Quality• Reduced time to reach board level DPPM goals• On-line Quality link between chips and boards• Escape Prevention and Outlier Detection Rules• Enhanced Functional Safety (ISO 26262)

More Efficient Test Processes – Adaptive Test• Test “suspect” parts more• Test “perfect” parts less

Better System Performance• Avoid in-Spec Chips with marginal performance at Board• Smart Pairing – Select the right chips to the right system board

What Data Sharing can Achieve

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Advanced Applications

Genealogy Information (raw data) Reconstructed

wafer map of Board Yield

Board Bin Analysis by

ComponentsRelationships between

component tests(colored by board pass/fail)

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The chart here shows correlation between 2 tests from different components, grouped by Board Performance

The left graphs are grouped by Board Performance Group, while the right graph shows per Board Performance Test value

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Pairing between Devices

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Distributed Supply Chain

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DFF/DFB between Industries

Other Supplier

The simple case – an OEM which also makes chips

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Distributed Supply Chain

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DFF/DFB across the Supply Chain

Electronics OEM

Chip Supplier 1

Chip Supplier 1

Chip Supplier 1

But what about between an electronics OEM and its suppliers?

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Cisco & Optimal+

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Distributed Supply Chain

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Data Feed Backwards – Possible Today!

OEM

OCM 1

OCM 2

OCM 3

By enabling just board level data to chip suppliers quality levels can be dramatically enhanced

Boarddata

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Breaking down test silos has tremendous benefits for• Quality, Efficiency, Yield

Data Feed Forward, Quality Index already a reality for major chip manufacturers within their supply chain

Data Feed Backwards from electronics to semi is coming soon…

How are YOU breaking down data silos?

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Summary

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Thank You!

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