[NATO Science Series II: Mathematics, Physics and Chemistry] Defects in High-k Gate Dielectric...

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INTERDIFFUSION STUDIES OF HIGH-K GATE DIELECTRIC STACK CONSTITUENTS University of Texas at Dallas, Richardson, TX 75083 stability of various high-k gate dielectric materials. The role of film morphology and the resultant interdiffusion are also discussed. Keywords: high-k dielectrics, metal gate, gate stack, interdiffusion, thermal stability 1. Introduction High-k dielectric materials have been under intense investigation for the scaling of planar CMOS integrated circuits. 1 Unlike the relatively mature state of understanding of the physical and electrical properties of benchmark dielectric materials such as SiO 2 and SiO x N y , 2 high-k dielectric materials require further substantial materials research and development to enable their successful integration into device structures. 3,4,5 Several requirements must be met from these materials to enable successful integration, and these include permittivity and the associated band gap/alignment to silicon, thermodynamic stability, film morphology, interface quality, process compatibility, as well as the resultant ______ * Current address: Texas Instruments assignee at SEMATECH 2706 Montopolis Drive, Austin, TX 78741, U.S.A., To whom correspondence should be addressed. Robert M. Wallace, Depts. of Electrical Engineering and Physics, University of Texas at Dallas, P.O.Box 830688, EC 33, Richardson, TX 75083; email: [email protected] 135 E. Gusev (ed.), Defects in High-k Gate Dielectric Stacks, 135–146. © 2006 Springer. Printed in the Netherlands. Abstract. This paper presents a summary of recent studies of the thermal M.J. KIM, B.E. GNADE, AND R. M.WALLACE P. SIVASUBRAMIANI, M.A. QUEVEDO-LOPEZ*, T.H. LEE,

Transcript of [NATO Science Series II: Mathematics, Physics and Chemistry] Defects in High-k Gate Dielectric...

Page 1: [NATO Science Series II: Mathematics, Physics and Chemistry] Defects in High-k Gate Dielectric Stacks Volume 220 || INTERDIFFUSION STUDIES OF HIGH-K GATE DIELECTRIC STACK CONSTITUENTS

INTERDIFFUSION STUDIES OF HIGH-K GATE DIELECTRIC

STACK CONSTITUENTS

University of Texas at Dallas, Richardson, TX 75083

stability of various high-k gate dielectric materials. The role of film morphology and the resultant interdiffusion are also discussed.

Keywords: high-k dielectrics, metal gate, gate stack, interdiffusion, thermal stability

1. Introduction

High-k dielectric materials have been under intense investigation for the scaling of planar CMOS integrated circuits.1 Unlike the relatively mature state of understanding of the physical and electrical properties of benchmark dielectric materials such as SiO2 and SiOxNy,

2 high-k dielectric materials require further substantial materials research and development to enable their successful integration into device structures.3,4,5 Several requirements must be met from these materials to enable successful integration, and these include permittivity and the associated band gap/alignment to silicon, thermodynamic stability, film morphology, interface quality, process compatibility, as well as the resultant

______* Current address: Texas Instruments assignee at SEMATECH 2706 Montopolis Drive,

Austin, TX 78741, U.S.A., † To whom correspondence should be addressed. Robert M. Wallace, Depts. of Electrical

Engineering and Physics, University of Texas at Dallas, P.O.Box 830688, EC 33, Richardson, TX 75083; email: [email protected]

135

E. Gusev (ed.), Defects in High-k Gate Dielectric Stacks, 135–146.

© 2006 Springer. Printed in the Netherlands.

Abstract. This paper presents a summary of recent studies of the thermal

M.J. KIM, B.E. GNADE, AND R. M.WALLACEP. SIVASUBRAMIANI, M.A. QUEVEDO-LOPEZ*, T.H. LEE,

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transistor mobility and reliability. An underlying requirement is the desire for a stable material – stable in both materials properties and resultant electrical performance – to enable integration into CMOS device process flows in a cost-effective manner.

Given the extensive thermal processing required, thermal stability is a highly desirable property. Thermal stability in regard to uncontrolled interfacial reactions, as well as the prospect of uncontrolled interdiffusion between the various components of the gate stack is a concern. The thermal processing required in the fabrication of CMOS transistors results in annealing temperatures often exceeding 1000 C for several seconds to activate dopants in the source, drain and gate regions. The diffusion of gate dielectric constituents into the transistor channel from such thermal treatments is expected to result in impurities which can serve as scattering centers that deleteriously impact carrier mobility.

As shown in Figure 1, substantial mass transport is anticipated for a number of atomic species in single crystal Si.6,7 The solid lines indicate species which

Figure 1. The temperature dependence of the diffusion coefficient for species in Si. See text for further discussion. Recent Hf (x) and Zr (*) measured diffusivities are included. After refs. 6, 14, 15.

x*

*

x

x

*

x*

*

x

x

*

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diffuse by vacancy or interstitialcy (indirect) defect mechanisms, where such species are dissolved mainly at substitutional lattice sites. Those with short-dashed lines correspond to species that diffuse through a direct interstitialcy mechanism, where point defects are not involved.‡ Those species with long-dashed lines behave as hybrids that are mainly dissolved as substitutional lattice species which diffuse through interstitial-substitutional exchange mechanisms. From the data in Figure 1, it can be seen that facile diffusion of many transition metals is expected upon the annealing conditions employed for CMOS transistor fabrication. As the majority of device carrier transport in the channel occurs within a few nanometers of the gate dielectric/substrate interface, such diffusion may certainly result in enhanced scattering mechanisms and therefore mobility degradation. Such degradation effects on transistor mobility have been reported for Al interdiffusion with Si from Al2O3 gate dielectrics.8 Indeed, the appearance of significant ( 1016/cm3) impurity scattering centers from the interdiffusion of gate stack constituents may well be the primary cause for the observed mobility degradation in many transistor studies incorporating high-k dielectrics (and metal gate electrodes) with mobile constituents.

Moreover, such ionized impurities may exhibit levels in the band gap of Si, resulting in the presence of defect traps for electrons or holes. As shown in Figure 2, various elements that are constituents of compounds under investigation for gate stack materials (dielectrics and metal gates) exhibit deep levels within the Si band gap.9 Such levels are therefore available for electron or hole tunneling mechanisms, resulting in significant issues for device electrical

______‡ The slower diffusion behavior for oxygen is attributed to the requirement of additional Si-O

bond scission mechanisms. See ref. 6.

Figure 2. Energy levels of selected impurities in the band gap of Si. The dashed line indicates the midgap energy for Si. After refs. 9, 13, 14.

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characteristic control and reliability. Recent work examining Hf and Zr interdiffusion (discussed below) is also summarized in Figure 1.

An underlying requirement is the desire for a stable material – stable in both materials properties and resultant electrical performance – to enable integration into CMOS device process flows in a cost-effective manner. This paper will review our recent thermal stability studies of several high-k dielectric candidates and the role of film morphology for interdiffusion of gate stack constituents.

2. Results and Discussion

2.1. Hf AND Zr SILICATE DIELECTRICS

Both Hf-silicate10 and Zr-silicate11 have been investigated for high-k gate dielectric applications.12 The investigation of the thermal stability of these materials has resulted in an apparent substantial difference in the interdiffusion behavior of the respective transition metal, viz. Hf and Zr. The presence of Hf and Zr in Si has been shown to lead to deep levels like many of the transition metals shown in Figure 2,13,14 and spreading resistance measurements of surface-diffused species indicated acceptor behavior for Hf and Zr.14

Surface sensitive Time-of-flight secondary ion mass spectrometry (ToFSIMS) was previously employed to examine the interdiffusion of Zr and Hf from their respective silicate thin films.15,16,17 Figure 3 presents the

Figure 4. ToFSIMS profiles of Zr interdiffusion with the Si substrate after annealing. Filled (open) symbols correspond to furnace (RTA) treatments, unless noted. After Refs. 15, 17.

Figure 3. ToFSIMS profiles of Hf interdiffusion with the Si substrate before and after annealing in N2. After Refs 16, 17.

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ToFSIMS depth profiles obtained from a Zr-silicate thin film before and after furnace anneals to 1100 C in N2 for 6 min as well as rapid thermal annealing (RTA) in N2 to 1050 C. It is seen that as-deposited or samples furnace-annealed to 1000 C results in no detectible near-surface diffusion. It is also seen that furnace anneals at 1100 C (reproducibility if the depth profile after the 1100 C treatment is also shown in Fig. 3) or RTA in N2 to 1050 C results in the incorporation of Zr into the Si substrate. Modeling the observed depth profiles assuming a semi-infinite Zr source15,17 (viz., the Zr-silicate layer), results in an estimated diffusivity of D0~2 10-15 cm2/s in this high temperature regime, and appears to be consistent with independent measurements by Vyvenko, et al. for Zr diffusivity in Si (~5 10-14 cm2/s at 1100 C).14 Extrapolation of the near surface concentration of Zr with relevant process thermal budgets leads to concentrations [Zr] 1016/cm3. In contrast, the profiles shown in Figure 4 for Hf from Hf silicate thin films before and after the same annealing treatments indicate that any detectible Hf diffusion is limited to a depth of 1nm, due to the SIMS detection limit. The reason for the difference in the apparent diffusion behavior remains to be understood, given the comparable size of the Hf or Zr atoms. Recent work on diffusion studies of implanted Hf and Zr has indicated the presence of fast and slow diffusion mechanisms for both of these

Figure 5. Dynamic SIMS profiles for B in Si from diffusion through Hf-silicate from a p+ poly-Si overlayer. Ref. 24.

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species.14 Other experimental evidence from spreading resistance profiles suggests comparable diffusivities (~10-12 cm2/s) for either species for long anneals at 1100 C, and a hybrid diffusion mechanism is proposed.14 Further work is required to clarify this point. Nevertheless, it appears that an enhanced thermal stability is observed for Hf-based oxides and silicates compared to their Zr-based analogs. It is also noted that mobility measurements of transistors incorporating Hf-based dielectrics, and in particular Hf-silicate dielectrics, suggest a smaller mobility degradation relative to that obtained for benchmark dielectrics (SiO2 and SiON) is observed in contrast to other high-k dielectric materials.4 These observations could be consistent with a dearth of Hf impurities for scattering in the channel region, as well as additional mobility degradation mechanisms.18,19,20

The penetration of impurities through such silicate films from an overlying, doped polycrystalline Si layer has also been investigated.21,22,23,24 In the case of B diffusion through Hf-silicate thin films, a correlation of enhanced penetration and the formation of grain boundaries upon annealing was observed. As seen in

Figure 6. HRTEM results for B-doped poly-Si/HfSiO/Si films after 60s RTA at (a) 900 C , (b)1000 C , (c) and (d) 950 C showing different regions in the sample. Ref. 24.

Crystalline regions (c)

(a)

5nm 5nm

5nm 5nm

(b)

(d)

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Figure 5, dynamic SIMS profiles of B exhibit penetration into the Si substrate upon RTA treatment at 950 C for 60s. The corresponding microstructure of the film is also observed to change significantly in the annealing temperature range of 900-1000 C, as seen in Figure 6. Nanocrystalline regions are detected using high-resolution transmission electron microscopy (HRTEM) upon 60 s RTA annealing at 950 C, and are clearly evident after annealing to 1000 C. In contrast, samples annealed at 900 C appear to present an amorphous structure for the Hf composition employed (10–12 at. % Hf, corresponding to a stoichiometry of (HfO2)1-x(SiO2)x, x=0.52). The concomitant increase in B concentration in the n-type Si substrate taken with the observed changes in Hf-silicate morphology suggest that the formation of nanocrystalline regions and their grain boundaries results in an enhanced diffusion “conduit” for B. Similar results were also obtained for P and As dopant species in poly-Si as well.24

The suppression of such dielectric crystallization and dopant penetration through the incorporation of N has also been considered,25 and more recently examined where a significant reduction of B penetration and the elimination of P and As penetration is observed.23,24 Promising device performance results have also been reported for “HfSiON” films as well.26 The combination of the thermal stability with respect to Hf interdiffusion and the suppression of crystallization appear to be important considerations for gate dielectrics that must withstand conventional “front end” process flows.

2.2. HAFNIUM ALUMINATE DIELECTRICS

The suppression of crystallization for HfO2 films through the incorporation of Al to result in the formation of Hf-aluminate has been reported using atomic

Figure 7. Backside SIMS analysis of Hf and Al diffusion from a 6nm HfAl2O5 film deposited on Si.

Hafnium

Depth (microns)

1.4 1.5 1.6 1.7 1.8 1.9 2.0

Co

ncen

trati

on

(ato

ms/c

c)

1015

1016

1017

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1019

1020

1021

control

1000C, 10s Ar RTA

Interface Aluminum

Depth (microns)

1.4 1.5 1.6 1.7 1.8 1.9 2.0

Co

nc

en

tra

tio

n (

ato

ms

/cc

)

1013

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1016

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1021

control

1000C, 10s Ar RTA

Interface

Si substrate

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layer deposition (ALD) methods.27 An amorphous film structure was reported for “spike” (<1s) anneals up to 1050 C for films with 75 at.% Al content. We have recently examined the thermal stability of uncapped (HfO2)x(Al2O3)1-x

(x=0.57) thin films prepared by ALD using SIMS methods where the analysis is performed from the substrate side (“backside”) of the substrate/dielectric interface. Such SIMS analysis methods attempt to minimize the ion-beam mixing (“knock-on”) distortions of depth profiles in order to obtain a relatively unperturbed depth profile.

As can be seen in Figure 7, comparison of the Hf backside SIMS depth profiles for the unannealed (“control”) and annealed Hf-aluminate films (RTA 1000 C, 10s in Ar) indicates that Hf diffusion appears to be at or below detectible limits, while some Al diffusion into the Si substrate is evident. HRTEM (Fig. 8) and XRD analysis (not shown) of the Hf-aluminate film indicates that crystallization is observed in these films upon the RTA treatment, and appears to be consistent with recent reports.28 Additional growth of the interfacial layer (IL) is also noted. Again, the SIMS depth profiles are consistent with the previous evaluations of both Hf and Al thermal stability in other high-k dielectrics as far as interdiffusion is concerned. The correlation between the presence of a crystallized phase and the detection of impurities in the Si substrate (channel) is consistent with the results discussed above.

Figure 8. HRTEM image of (HfO2)x(Al2O3)1-x; x=0.57 deposited by ALD. (a) As-deposited and (b) annealed films.

HfAlO

IL

Glue

HfAlO

IL

Glue(a) (b)

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2.3. LANTHANUM ALUMINATE DIELECTRICS

The oxides, silicates and aluminates of La have been considered as high-k dielectric candidates.1,29,30 Amorphous La aluminates have recently been the subject of considerable attention for high-k gate dielectric applications.31,32,33,34

The thermal stability of La-aluminate films deposited by molecular beam deposition has been investigated by HRTEM, with sharp interfaces and a lack of interfacial oxide formation reported.35 However, recent work using sputtered La-aluminate films has suggested that there exists considerable Si interdiffusion with the aluminate,36 a prospect not predicted from bulk equilibrium thermodynamic considerations37 and sometimes attributed to the deposition technique.30

We have recently examined the thermal stability of amorphous LaAlO3

deposited on Si using molecular beam deposition methods.38 As seen in Figure 9, backside SIMS analysis of annealed LaAlO3 appears to result in the

Figure 9. Backside SIMS analysis of LaAlO3 with annealing treatments showing the depth profile for (a) Al and (b) La species. X-ray diffraction analysis of films annealed for 20 s at (c) 935 C and (d) 950 C. Ref. 38.

Aluminum

Depth (microns)

0.1 0.2 0.3 0.4

Co

nc

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n (

ato

ms

/ c

c)

1013

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1021

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Unannealed

850C, 20s

900C, 20s

910C, 20s

935C, 20s

950C, 20s

1000C, 10s

1026C, 20s

Lanthanum

Depth (microns)

0.1 0.2 0.3 0.4

Co

ncen

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c)

1013

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unannealed

850C, 20s

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1000C, 10s

1026C, 20s

(a)

(b)

(c)

(d)

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interdiffusion of both Al and La with the Si substrate after RTA treatments of 950 C for 20 s in N2. The interdiffusion of Al is consistent with the previous measurements for HfAl2O5 and Al2O3 described above. As can be seen in the 2-D x-ray diffraction image, annealing the Al2O3/LaAlO3/Si structure at 935 Cfor 20 s results in the detection of diffraction spots attributed to the Si substrate only. However, annealing at 950 C for 20 s in N2 clearly results in the detection of diffraction rings which are consistent with the formation of poly-crystalline LaAlO3 in the film. Again, the concomitant observation of interdiffusion and the associated grain boundary formation indicate that the suppression of crystallization is a desirable avenue to pursue as far as impurity control in the substrate.

3. Conclusions

This paper summarizes recent work examining the thermal stability of gate dielectrics in view of conventional CMOS process constraints. We find that the film morphology evolution appears to play a significant role for the interdiffusion of gate stack species into the channel region of the Si substrate. Assuming that thermal budgets will continue to require RTA treatments as high as 1000 C, these results indicate that amorphous dielectric films are preferable to control the diffusion of species into the Si channel. Of course, amorphous films would be expected to exhibit a somewhat lower permittivity than their crystalline counterparts. However, this tradeoff between film morphology and permittivity must be considered for a manufacturable solution applicable to conventional CMOS fabrication.

Acknowledgements

The authors acknowledge the support of the Texas Advanced Technology Program, Texas Instruments, Inc., and the Semiconductor Research Corporation/SEMATECH through the Front End Processing Transition Center.

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