MX29GL640E T/B, MX29GL640E H/L DATASHEET · MX29GL640E T/B MX29GL640E H/L FEATURES GENERAL FEATURES...

1P/N:PM1494 REV. 1.0, AUG. 28, 2009

MX29GL640E T/BMX29GL640E H/L

MX29GL640E T/B, MX29GL640E H/L

DATASHEET

2P/N:PM1494 REV. 1.0, AUG. 28, 2009


FEATURES

GENERAL FEATURES• PowerSupplyOperation -2.7to3.6voltforread,erase,andprogramoperations -VI/OvoltagemusttightwithVCC -VI/O=VCC=2.7V~3.6V• Byte/Wordmodeswitchable -8,388,608x8/4,194,304x16• Sectorarchitecture -MX29GL640ET/B:127x32Kword(64KB)+8x4Kword(8KB)bootsector -MX29GL640EH/L:128x32Kword(64KB)Uniformsector• 16-byte/8-wordpagereadbuffer• 32-byte/16-wordwritebuffer• Extra128-wordsectorforsecurity -Featuresfactorylockedandidentifiable,andcustomerlockable• Advancedsectorprotectionfunction(SolidandPasswordProtect)• Latch-upprotectedto100mAfrom-1Vto1.5xVcc• LowVccwriteinhibit:Vcc≤VLKO• CompatiblewithJEDECstandard -PinoutandsoftwarecompatibletosinglepowersupplyFlash• Deeppowerdownmode

PERFORMANCE• HighPerformance -Fastaccesstime:90ns -Pageaccesstime:25ns -Fastprogramtime:11us/word -Fasterasetime:0.6s/sector• LowPowerConsumption -Lowactivereadcurrent:30mA(typical)at5MHz -Lowstandbycurrent:30uA(typical)• Typical100,000erase/programcycle• 20yearsdataretention

SOFTWARE FEATURES• Program/EraseSuspend&Program/EraseResume -Suspendssectoreraseoperationtoreaddatafromorprogramdatatoanothersectorwhichisnotbeingerased -Suspendssectorprogramoperationtoreaddatafromanothersectorwhichisnotbeingprogram• StatusReply -Data#Polling&Togglebitsprovidedetectionofprogramanderaseoperationcompletion• SupportCommonFlashInterface(CFI)

HARDWARE FEATURES• Ready/Busy#(RY/BY#)Output -Providesahardwaremethodofdetectingprogramanderaseoperationcompletion• HardwareReset(RESET#)Input -Providesahardwaremethodtoresettheinternalstatemachinetoreadmode• WP#/ACCinputpin -Hardwarewriteprotectpin/Providesacceleratedprogramcapability

PACKAGE• MX29GL640ET/B -48-pinTSOP -48-ballLFBGA(6x8mm)• MX29GL640EH/L -56-pinTSOP -64-ballLFBGA(11x13mm)

SINGLE VOLTAGE 3V ONLY FLASH MEMORY

3P/N:PM1494 REV. 1.0, AUG. 28, 2009


PIN CONFIGURATION for MX29GL640E T/B

48 TSOPA15A14A13A12A11A10A9A8

A19A20

WE#RESET#

A21WP#/ACC

RY/BY#A18A17A7A6A5A4A3A2A1

123456789101112131415161718192021222324

A16BYTE#GNDQ15/A-1Q7Q14Q6Q13Q5Q12Q4VCCQ11Q3Q10Q2Q9Q1Q8Q0OE#GNDCE#A0

484746454443424140393837363534333231302928272625

48 LFBGA

A136

5

4

3

2

1

A B C D E F G H

A9

A7

A3

WE#

RY/BY#

A12

A8

WP#/ACC

A17

A4

A14

A10

A21

A18

A6

A2

A15

A11

RE-SET# A19

A20

A5

A1

A16

Q7

Q5

Q2

Q0

A0

BYTE# Q15/A-1

Q14

Q12

Q10

Q8

Q13

VCC

Q11

Q9

GND

Q6

Q4

Q3

Q1

GNDCE# OE#

8.0 mm

6.0 mm

4P/N:PM1494 REV. 1.0, AUG. 28, 2009


56 TSOP

NCNC

A15A14A13A12A11A10

A9A8

A19A20

WE#RESET#

A21WP#/ACC

RY/BY#A18A17

A7A6A5A4A3A2A1NCNC

12345678910111213141516171819202122232425262728

NCNCA16BYTE#GNDQ15/A-1Q7Q14Q6Q13Q5Q12Q4VCCQ11Q3Q10Q2Q9Q1Q8Q0OE#GNDCE#A0NCVI/O

56555453525150494847464544434241403938373635343332313029

PIN CONFIGURATION for MX29GL640E H/L

64 LFBGA

A B C D E F G H

NC NC NC8

7

6

5

4

3

2

1

VIO NCNC NC

A13 A12 A14 A15 A16 BYTE# Q15/A-1

A9 A8 A10 A11 Q7 Q14 Q13 Q6

WE# A21 A19RES-ET#

Q5 Q12 VCC Q4

WP#/ACC

A18 A20 Q2 Q10 Q11RY/BY#

A7 A17 A6 A5 Q0 Q8 Q9 Q1

Q3

A3 A4 A2 A1 A0 CE# OE# GND

GND

GND

NC NC NC NC NC VIO NC NC

5P/N:PM1494 REV. 1.0, AUG. 28, 2009


PIN DESCRIPTIONSYMBOL PIN NAMEA0~A21 AddressInputQ0~Q14 DataInputs/OutputsQ15/A-1 Q15(WordMode)/LSBaddr(ByteMode)CE# ChipEnableInputWE# WriteEnableInputOE# OutputEnableInput

RESET# HardwareResetPin,ActiveLow

WP#/ACC* HardwareWriteProtect/ProgrammingAccelerationinput

RY/BY# Read/BusyOutputBYTE# Selects8bitsor16bitsmodeVCC +3.0VsinglepowersupplyGND DeviceGroundNC PinNotConnectedInternallyVI/O PowerSupplyforInput/Output

LOGIC SYMBOL

Notes:1.WP#/ACChasinternalpullup.2.VI/OvoltagemusttightwithVCC.VI/O=VCC=2.7V~3.6V.

16 or 8Q0-Q15

(A-1)

RY/BY#

A0-A21

CE#

OE#

WE#

RESET#

WP#/ACC

BYTE#

VI/O

22

6P/N:PM1494 REV. 1.0, AUG. 28, 2009


BLOCK DIAGRAM

CONTROLINPUTLOGIC

PROGRAM/ERASE

HIGH VOLTAGE

WRITE

STATE

MACHINE

(WSM)

STATE

REGISTERFLASHARRAY

X-D

EC

OD

ER

ADDRESS

LATCH

AND

BUFFER Y-PASS GATE

Y-DE

CO

DE

R

ARRAYSOURCE

HVCOMMANDDATA

DECODER

COMMAND

DATA LATCH

I/O BUFFER

PGMDATA

HV

PROGRAMDATA LATCH

SENSEAMPLIFIER

Q0-Q15/A-1

A0-AM

AM: MSB address

CE#OE#WE#

RESET#BYTE#

WP#/ACC

7P/N:PM1494 REV. 1.0, AUG. 28, 2009


BLOCK DIAGRAM DESCRIPTION TheblockdiagramonPage5illustratesasimplifiedarchitectureofthisdevice.Eachblockintheblockdiagramrepresentsoneormorecircuitmodulesintherealchipusedtoaccess,erase,program,andreadthememoryarray.

The"CONTROLINPUTLOGIC"blockreceives inputpinsCE#,OE#,WE#,RESET#,BYTE#,andWP#/ACC.Itcreatesinternaltimingcontrolsignalsaccordingtotheinputpinsandoutputstothe"ADDRESSLATCHANDBUFFER" to latch theexternal addresspinsA0-AM.The internal addressesareoutput from thisblock to themainarrayanddecoderscomposedof"X-DECODER","Y-DECODER","Y-PASSGATE",AND"FLASHARRAY".TheX-DECODERdecodestheword-linesoftheflasharray,whiletheY-DECODERdecodesthebit-linesoftheflasharray.Thebitlinesareelectricallyconnectedtothe"SENSEAMPLIFIER"and"PGMDATAHV"selectivelythroughtheY-PASSGATES.SENSEAMPLIFIERSareusedtoreadoutthecontentsoftheflashmemory,whilethe "PGMDATAHV"block isused toselectivelydeliverhighpower tobit-linesduringprogramming.The "I/OBUFFER"controls the inputandoutputon theQ0-Q15/A-1pads.During readoperation, the I/OBUFFERre-ceivesdatafromSENSEAMPLIFIERSanddrivestheoutputpadsaccordingly.Inthelastcycleofprogramcom-mand,theI/OBUFFERtransmitsthedataonQ0-Q15/A-1to"PROGRAMDATALATCH",whichcontrolsthehighpowerdrivers in"PGMDATAHV"toselectivelyprogramthebits inawordorbyteaccordingtotheuser inputpattern.

The"PROGRAM/ERASEHIGHVOLTAGE"blockcomprisesthecircuitstogenerateanddeliverthenecessaryhighvoltagetotheX-DECODER,FLASHARRAY,and"PGMDATAHV"blocks.Thelogiccontrolmodulecom-prisesof the "WRITESTATEMACHINE,WSM", "STATEREGISTER", "COMMANDDATADECODER", and"COMMANDDATALATCH".WhentheuserissuesacommandbytogglingWE#,thecommandonQ0-A15/A-1is latched in theCOMMANDDATALATCHand isdecodedby theCOMMANDDATADECODER.TheSTATEREGISTER receives thecommandand records thecurrentstateof thedevice.TheWSM implements the in-ternalalgorithmsforprogramoreraseaccordingtothecurrentcommandstatebycontrollingeachblockintheblockdiagram.

ARRAY ARCHITECTURE ThemainflashmemoryarraycanbeorganizedasBytemode(x8)orWordmode(x16).Thedetailsofthead-dressrangesandthecorrespondingsectoraddressesareshowninTable1.

8P/N:PM1494 REV. 1.0, AUG. 28, 2009


Table 1-1. MX29GL640ET SECTOR ARCHITECTURE

BLOCK STRUCTURE

Sector SizeSector Sector Address

A21-A12(x8)

Address Range (x16)

Address RangeKbytes Kwords64 32 SA0 0000000xxx 000000h-00FFFFh 000000h-07FFFh64 32 SA1 0000001xxx 010000h-01FFFFh 008000h-0FFFFh64 32 SA2 0000010xxx 020000h-02FFFFh 010000h-17FFFh64 32 SA3 0000011xxx 030000h-03FFFFh 018000h-01FFFFh64 32 SA4 0000100xxx 040000h-04FFFFh 020000h-027FFFh64 32 SA5 0000101xxx 050000h-05FFFFh 028000h-02FFFFh64 32 SA6 0000110xxx 060000h-06FFFFh 030000h-037FFFh64 32 SA7 0000111xxx 070000h-07FFFFh 038000h-03FFFFh64 32 SA8 0001000xxx 080000h-08FFFFh 040000h-047FFFh64 32 SA9 0001001xxx 090000h-09FFFFh 048000h-04FFFFh64 32 SA10 0001010xxx 0A0000h-0AFFFFh 050000h-057FFFh64 32 SA11 0001011xxx 0B0000h-0BFFFFh 058000h-05FFFFh64 32 SA12 0001100xxx 0C0000h-0CFFFFh 060000h-067FFFh64 32 SA13 0001101xxx 0D0000h-0DFFFFh 068000h-06FFFFh64 32 SA14 0001110xxx 0E0000h-0EFFFFh 070000h-077FFFh64 32 SA15 0001111xxx 0F0000h-0FFFFFh 078000h-07FFFFh64 32 SA16 0010000xxx 100000h-10FFFFh 080000h-087FFFh64 32 SA17 0010001xxx 110000h-11FFFFh 088000h-08FFFFh64 32 SA18 0010010xxx 120000h-12FFFFh 090000h-097FFFh64 32 SA19 0010011xxx 130000h-13FFFFh 098000h-09FFFFh64 32 SA20 0010100xxx 140000h-14FFFFh 0A0000h-0A7FFFh64 32 SA21 0010101xxx 150000h-15FFFFh 0A8000h-0AFFFFh64 32 SA22 0010110xxx 160000h-16FFFFh 0B0000h-0B7FFFh64 32 SA23 0010111xxx 170000h-17FFFFh 0B8000h-0BFFFFh64 32 SA24 0011000xxx 180000h-18FFFFh 0C0000h-0C7FFFh64 32 SA25 0011001xxx 190000h-19FFFFh 0C8000h-0CFFFFh64 32 SA26 0011010xxx 1A0000h-1AFFFFh 0D0000h-0D7FFFh64 32 SA27 0011011xxx 1B0000h-1BFFFFh 0D8000h-0DFFFFh64 32 SA28 0011100xxx 1C0000h-1CFFFFh 0E0000h-0E7FFFh64 32 SA29 0011101xxx 1D0000h-1DFFFFh 0E8000h-0EFFFFh64 32 SA30 0011110xxx 1E0000h-1EFFFFh 0F0000h-0F7FFFh64 32 SA31 0011111xxx 1F0000h-1FFFFFh 0F8000h-0FFFFFh64 32 SA32 0100000xxx 200000h-20FFFFh 100000h-107FFFh64 32 SA33 0100001xxx 210000h-21FFFFh 108000h-10FFFFh64 32 SA34 0100010xxx 220000h-22FFFFh 110000h-117FFFh64 32 SA35 0100011xxx 230000h-23FFFFh 118000h-11FFFFh64 32 SA36 0100100xxx 240000h-24FFFFh 120000h-127FFFh64 32 SA37 0100101xxx 250000h-25FFFFh 128000h-12FFFFh64 32 SA38 0100110xxx 260000h-26FFFFh 130000h-137FFFh64 32 SA39 0100111xxx 270000h-27FFFFh 138000h-13FFFFh

9P/N:PM1494 REV. 1.0, AUG. 28, 2009



A21-A12(x8)

Address Range (x16)

Address RangeKbytes Kwords64 32 SA40 0101000xxx 280000h-28FFFFh 140000h-147FFFh64 32 SA41 0101001xxx 290000h-29FFFFh 148000h-14FFFFh64 32 SA42 0101010xxx 2A0000h-2AFFFFh 150000h-157FFFh64 32 SA43 0101011xxx 2B0000h-2BFFFFh 158000h-15FFFFh64 32 SA44 0101100xxx 2C0000h-2CFFFFh 160000h-147FFFh64 32 SA45 0101101xxx 2D0000h-2DFFFFh 168000h-14FFFFh64 32 SA46 0101110xxx 2E0000h-2EFFFFh 170000h-177FFFh64 32 SA47 0101111xxx 2F0000h-2FFFFFh 178000h-17FFFFh64 32 SA48 0110000xxx 300000h-30FFFFh 180000h-187FFFh64 32 SA49 0110001xxx 310000h-31FFFFh 188000h-18FFFFh64 32 SA50 0110010xxx 320000h-32FFFFh 190000h-197FFFh64 32 SA51 0110011xxx 330000h-33FFFFh 198000h-19FFFFh64 32 SA52 0110100xxx 340000h-34FFFFh 1A0000h-1A7FFFh64 32 SA53 0110101xxx 350000h-35FFFFh 1A8000h-1AFFFFh64 32 SA54 0110110xxx 360000h-36FFFFh 1B0000h-1B7FFFh64 32 SA55 0110111xxx 370000h-37FFFFh 1B8000h-1BFFFFh64 32 SA56 0111000xxx 380000h-38FFFFh 1C0000h-1C7FFFh64 32 SA57 0111001xxx 390000h-39FFFFh 1C8000h-1CFFFFh64 32 SA58 0111010xxx 3A0000h-3AFFFFh 1D0000h-1D7FFFh64 32 SA59 0111011xxx 3B0000h-3BFFFFh 1D8000h-1DFFFFh64 32 SA60 0111100xxx 3C0000h-3CFFFFh 1E0000h-1E7FFFh64 32 SA61 0111101xxx 3D0000h-3DFFFFh 1E8000h-1EFFFFh64 32 SA62 0111110xxx 3E0000h-3EFFFFh 1F0000h-1F7FFFh64 32 SA63 0111111xxx 3F0000h-3FFFFFh 1F8000h-1FFFFFh64 32 SA64 1000000xxx 400000h-40FFFFh 200000h-207FFFh64 32 SA65 1000001xxx 410000h-41FFFFh 208000h-20FFFFh64 32 SA66 1000010xxx 420000h-42FFFFh 210000h-217FFFh64 32 SA67 1000011xxx 430000h-43FFFFh 218000h-21FFFFh64 32 SA68 1000100xxx 440000h-44FFFFh 220000h-227FFFh64 32 SA69 1000101xxx 450000h-45FFFFh 228000h-22FFFFh64 32 SA70 1000110xxx 460000h-46FFFFh 230000h-237FFFh64 32 SA71 1000111xxx 470000h-47FFFFh 238000h-23FFFFh64 32 SA72 1001000xxx 480000h-48FFFFh 240000h-247FFFh64 32 SA73 1001001xxx 490000h-49FFFFh 248000h-24FFFFh64 32 SA74 1001010xxx 4A0000h-4AFFFFh 250000h-257FFFh64 32 SA75 1001011xxx 4B0000h-4BFFFFh 258000h-25FFFFh64 32 SA76 1001100xxx 4C0000h-4CFFFFh 260000h-247FFFh64 32 SA77 1001101xxx 4D0000h-4DFFFFh 268000h-24FFFFh64 32 SA78 1001110xxx 4E0000h-4EFFFFh 270000h-277FFFh64 32 SA79 1001111xxx 4F0000h-4FFFFFh 278000h-27FFFFh64 32 SA80 1010000xxx 500000h-50FFFFh 280000h-287FFFh64 32 SA81 1010001xxx 510000h-51FFFFh 288000h-28FFFFh64 32 SA82 1010010xxx 520000h-52FFFFh 290000h-297FFFh

10P/N:PM1494 REV. 1.0, AUG. 28, 2009



A21-A12(x8)

Address Range (x16)

Address RangeKbytes Kwords64 32 SA83 1010011xxx 530000h-53FFFFh 298000h-29FFFFh64 32 SA84 1010100xxx 540000h-54FFFFh 2A0000h-2A7FFFh64 32 SA85 1010101xxx 550000h-55FFFFh 2A8000h-2AFFFFh64 32 SA86 1010110xxx 560000h-56FFFFh 2B0000h-2B7FFFh64 32 SA87 1010111xxx 570000h-57FFFFh 2B8000h-2BFFFFh64 32 SA88 1011000xxx 580000h-58FFFFh 2C0000h-2C7FFFh64 32 SA89 1011001xxx 590000h-59FFFFh 2C8000h-2CFFFFh64 32 SA90 1011010xxx 5A0000h-5AFFFFh 2D0000h-2D7FFFh64 32 SA91 1011011xxx 5B0000h-5BFFFFh 2D8000h-2DFFFFh64 32 SA92 1011100xxx 5C0000h-5CFFFFh 2E0000h-2E7FFFh64 32 SA93 1011101xxx 5D0000h-5DFFFFh 2E8000h-2EFFFFh64 32 SA94 1011110xxx 5E0000h-5EFFFFh 2F0000h-2F7FFFh64 32 SA95 1011111xxx 5F0000h-5FFFFFh 2F8000h-2FFFFFh64 32 SA96 1100000xxx 600000h-60FFFFh 300000h-307FFFh64 32 SA97 1100001xxx 610000h-61FFFFh 308000h-30FFFFh64 32 SA98 1100010xxx 620000h-62FFFFh 310000h-317FFFh64 32 SA99 1100011xxx 630000h-63FFFFh 318000h-31FFFFh64 32 SA100 1100100xxx 640000h-64FFFFh 320000h-327FFFh64 32 SA101 1100101xxx 650000h-65FFFFh 328000h-32FFFFh64 32 SA102 1100110xxx 660000h-66FFFFh 330000h-337FFFh64 32 SA103 1100111xxx 670000h-67FFFFh 338000h-33FFFFh64 32 SA104 1101000xxx 680000h-68FFFFh 340000h-347FFFh64 32 SA105 1101001xxx 690000h-69FFFFh 348000h-34FFFFh64 32 SA106 1101010xxx 6A0000h-6AFFFFh 350000h-357FFFh64 32 SA107 1101011xxx 6B0000h-6BFFFFh 358000h-35FFFFh64 32 SA108 1101100xxx 6C0000h-6CFFFFh 360000h-347FFFh64 32 SA109 1101101xxx 6D0000h-6DFFFFh 368000h-34FFFFh64 32 SA110 1101110xxx 6E0000h-6EFFFFh 370000h-377FFFh64 32 SA111 1101111xxx 6F0000h-6FFFFFh 378000h-37FFFFh64 32 SA112 1110000xxx 700000h-70FFFFh 380000h-387FFFh64 32 SA113 1110001xxx 710000h-71FFFFh 388000h-38FFFFh64 32 SA114 1110010xxx 720000h-72FFFFh 390000h-397FFFh64 32 SA115 1110011xxx 730000h-73FFFFh 398000h-39FFFFh64 32 SA116 1110100xxx 740000h-74FFFFh 3A0000h-3A7FFFh64 32 SA117 1110101xxx 750000h-75FFFFh 3A8000h-3AFFFFh64 32 SA118 1110110xxx 760000h-76FFFFh 3B0000h-3B7FFFh64 32 SA119 1110111xxx 770000h-77FFFFh 3B8000h-3BFFFFh64 32 SA120 1111000xxx 780000h-78FFFFh 3C0000h-3C7FFFh64 32 SA121 1111001xxx 790000h-79FFFFh 3C8000h-3CFFFFh64 32 SA122 1111010xxx 7A0000h-7AFFFFh 3D0000h-3D7FFFh64 32 SA123 1111011xxx 7B0000h-7BFFFFh 3D8000h-3DFFFFh64 32 SA124 1111100xxx 7C0000h-7CFFFFh 3E0000h-3E7FFFh64 32 SA125 1111101xxx 7D0000h-7DFFFFh 3E8000h-3EFFFFh

11P/N:PM1494 REV. 1.0, AUG. 28, 2009



A21-A12(x8)

Address Range (x16)

Address RangeKbytes Kwords64 32 SA126 1111110xxx 7E0000h-7EFFFFh 3F0000h-3F7FFFh8 4 SA127 1111111000 7F0000h-7F1FFFh 3F8000h-3FFFFFh8 4 SA128 1111111001 7F2000h-7F3FFFh 3F9000h-3F9FFFh8 4 SA129 1111111010 7F4000h-7F5FFFh 3FA000h-3FAFFFh8 4 SA130 1111111011 7F6000h-7F7FFFh 3FB000h-3FBFFFh8 4 SA131 1111111100 7F8000h-7F9FFFh 3FC000h-3FCFFFh8 4 SA132 1111111101 7FA000h-7FBFFFh 3FD000h-3FDFFFh8 4 SA133 1111111110 7FC000h-7FDFFFh 3FE000h-3FEFFFh8 4 SA134 1111111111 7FE000h-7FFFFFh 3FF000h-3FFFFFh

12P/N:PM1494 REV. 1.0, AUG. 28, 2009



A21-A12(x8)

Address Range (x16)

Address RangeKbytes Kwords8 4 SA0 0000000000 000000h-001FFFh 000000h-000FFFh8 4 SA1 0000000001 002000h-003FFFh 001000h-001FFFh8 4 SA2 0000000010 004000h-005FFFh 002000h-002FFFh8 4 SA3 0000000011 006000h-007FFFh 003000h-003FFFh8 4 SA4 0000000100 008000h-009FFFh 004000h-004FFFh8 4 SA5 0000000101 00A000h-00BFFFh 005000h-005FFFh8 4 SA6 0000000110 00C000h-00DFFFh 006000h-006FFFh8 4 SA7 0000000111 00E000h-00FFFFh 007000h-007FFFh64 32 SA8 0000001xxx 010000h-01FFFFh 008000h-00FFFFh64 32 SA9 0000010xxx 020000h-02FFFFh 010000h-017FFFh64 32 SA10 0000011xxx 030000h-03FFFFh 018000h-01FFFFh64 32 SA11 0000100xxx 040000h-04FFFFh 020000h-027FFFh64 32 SA12 0000101xxx 050000h-05FFFFh 028000h-02FFFFh64 32 SA13 0000110xxx 060000h-06FFFFh 030000h-037FFFh64 32 SA14 0000111xxx 070000h-07FFFFh 038000h-03FFFFh64 32 SA15 0001000xxx 080000h-08FFFFh 040000h-047FFFh64 32 SA16 0001001xxx 090000h-09FFFFh 048000h-04FFFFh64 32 SA17 0001010xxx 0A0000h-0AFFFFh 050000h-057FFFh64 32 SA18 0001011xxx 0B0000h-0BFFFFh 058000h-05FFFFh64 32 SA19 0001100xxx 0C0000h-0CFFFFh 060000h-067FFFh64 32 SA20 0001101xxx 0D0000h-0DFFFFh 068000h-06FFFFh64 32 SA21 0001110xxx 0E0000h-0EFFFFh 070000h-077FFFh64 32 SA22 0001111xxx 0F0000h-0FFFFFh 078000h-07FFFFh64 32 SA23 0010000xxx 100000h-10FFFFh 080000h-087FFFh64 32 SA24 0010001xxx 110000h-11FFFFh 088000h-08FFFFh64 32 SA25 0010010xxx 120000h-12FFFFh 090000h-097FFFh64 32 SA26 0010011xxx 130000h-13FFFFh 098000h-09FFFFh64 32 SA27 0010100xxx 140000h-14FFFFh 0A0000h-0A7FFFh64 32 SA28 0010101xxx 150000h-15FFFFh 0A8000h-0AFFFFh64 32 SA29 0010110xxx 160000h-16FFFFh 0B0000h-0B7FFFh64 32 SA30 0010111xxx 170000h-17FFFFh 0B8000h-0BFFFFh64 32 SA31 0011000xxx 180000h-18FFFFh 0C0000h-0C7FFFh64 32 SA32 0011001xxx 190000h-19FFFFh 0C8000h-0CFFFFh64 32 SA33 0011010xxx 1A0000h-1AFFFFh 0D0000h-0D7FFFh64 32 SA34 0011011xxx 1B0000h-1BFFFFh 0D8000h-0DFFFFh64 32 SA35 0011100xxx 1C0000h-1CFFFFh 0E0000h-0E7FFFh64 32 SA36 0011101xxx 1D0000h-1DFFFFh 0E8000h-0EFFFFh64 32 SA37 0011110xxx 1E0000h-1EFFFFh 0F0000h-0F7FFFh64 32 SA38 0011111xxx 1F0000h-1FFFFFh 0F8000h-0FFFFFh64 32 SA39 0100000xxx 200000h-20FFFFh 100000h-107FFFh64 32 SA40 0100001xxx 210000h-21FFFFh 108000h-10FFFFh

Table 1-2. MX29GL640EB SECTOR ARCHITECTURE

13P/N:PM1494 REV. 1.0, AUG. 28, 2009



A21-A12(x8)

Address Range (x16)

Address RangeKbytes Kwords64 32 SA41 0100010xxx 220000h-22FFFFh 110000h-117FFFh64 32 SA42 0100011xxx 230000h-23FFFFh 118000h-11FFFFh64 32 SA43 0100100xxx 240000h-24FFFFh 120000h-127FFFh64 32 SA44 0100101xxx 250000h-25FFFFh 128000h-12FFFFh64 32 SA45 0100110xxx 260000h-26FFFFh 130000h-137FFFh64 32 SA46 0100111xxx 270000h-27FFFFh 138000h-13FFFFh64 32 SA47 0101000xxx 280000h-28FFFFh 140000h-147FFFh64 32 SA48 0101001xxx 290000h-29FFFFh 148000h-14FFFFh64 32 SA49 0101010xxx 2A0000h-2AFFFFh 150000h-157FFFh64 32 SA50 0101011xxx 2B0000h-2BFFFFh 158000h-15FFFFh64 32 SA51 0101100xxx 2C0000h-2CFFFFh 160000h-167FFFh64 32 SA52 0101101xxx 2D0000h-2DFFFFh 168000h-16FFFFh64 32 SA53 0101110xxx 2E0000h-2EFFFFh 170000h-177FFFh64 32 SA54 0101111xxx 2F0000h-2FFFFFh 178000h-17FFFFh64 32 SA55 0110000xxx 300000h-30FFFFh 180000h-187FFFh64 32 SA56 0110001xxx 310000h-31FFFFh 188000h-18FFFFh64 32 SA57 0110010xxx 320000h-32FFFFh 190000h-197FFFh64 32 SA58 0110011xxx 330000h-33FFFFh 198000h-19FFFFh64 32 SA59 0110100xxx 340000h-34FFFFh 1A0000h-1A7FFFh64 32 SA60 0110101xxx 350000h-35FFFFh 1A8000h-1AFFFFh64 32 SA61 0110110xxx 360000h-36FFFFh 1B0000h-1B7FFFh64 32 SA62 0110111xxx 370000h-37FFFFh 1B8000h-1BFFFFh64 32 SA63 0111000xxx 380000h-38FFFFh 1C0000h-1C7FFFh64 32 SA64 0111001xxx 390000h-39FFFFh 1C8000h-1CFFFFh64 32 SA65 0111010xxx 3A0000h-3AFFFFh 1D0000h-1D7FFFh64 32 SA66 0111011xxx 3B0000h-3BFFFFh 1D8000h-1DFFFFh64 32 SA67 0111100xxx 3C0000h-3CFFFFh 1E0000h-1E7FFFh64 32 SA68 0111101xxx 3D0000h-3DFFFFh 1E8000h-1EFFFFh64 32 SA69 0111110xxx 3E0000h-3EFFFFh 1F0000h-1F7FFFh64 32 SA70 0111111xxx 3F0000h-3FFFFFh 1F8000h-1FFFFFh64 32 SA71 1000000xxx 400000h-40FFFFh 200000h-207FFFh64 32 SA72 1000001xxx 410000h-41FFFFh 208000h-20FFFFh64 32 SA73 1000010xxx 420000h-42FFFFh 210000h-217FFFh64 32 SA74 1000011xxx 430000h-43FFFFh 218000h-21FFFFh64 32 SA75 1000100xxx 440000h-44FFFFh 220000h-227FFFh64 32 SA76 1000101xxx 450000h-45FFFFh 228000h-22FFFFh64 32 SA77 1000110xxx 460000h-46FFFFh 230000h-237FFFh64 32 SA78 1000111xxx 470000h-47FFFFh 238000h-23FFFFh64 32 SA79 1001000xxx 480000h-48FFFFh 240000h-247FFFh64 32 SA80 1001001xxx 490000h-49FFFFh 248000h-24FFFFh64 32 SA81 1001010xxx 4A0000h-4AFFFFh 250000h-257FFFh64 32 SA82 1001011xxx 4B0000h-4BFFFFh 258000h-25FFFFh

14P/N:PM1494 REV. 1.0, AUG. 28, 2009



A21-A12(x8)

Address Range (x16)

Address RangeKbytes Kwords64 32 SA83 1001100xxx 4C0000h-4CFFFFh 260000h-267FFFh64 32 SA84 1001101xxx 4D0000h-4DFFFFh 268000h-26FFFFh64 32 SA85 1001110xxx 4E0000h-4EFFFFh 270000h-277FFFh64 32 SA86 1001111xxx 4F0000h-4FFFFFh 278000h-27FFFFh64 32 SA87 1010000xxx 500000h-50FFFFh 280000h-287FFFh64 32 SA88 1010001xxx 510000h-51FFFFh 288000h-28FFFFh64 32 SA89 1010010xxx 520000h-52FFFFh 290000h-297FFFh64 32 SA90 1010011xxx 530000h-53FFFFh 298000h-29FFFFh64 32 SA91 1010100xxx 540000h-54FFFFh 2A0000h-2A7FFFh64 32 SA92 1010101xxx 550000h-55FFFFh 2A8000h-2AFFFFh64 32 SA93 1010110xxx 560000h-56FFFFh 2B0000h-2B7FFFh64 32 SA94 1010111xxx 570000h-57FFFFh 2B8000h-2BFFFFh64 32 SA95 1011000xxx 580000h-58FFFFh 2C0000h-2C7FFFh64 32 SA96 1011001xxx 590000h-59FFFFh 2C8000h-2CFFFFh64 32 SA97 1011010xxx 5A0000h-5AFFFFh 2D0000h-2D7FFFh64 32 SA98 1011011xxx 5B0000h-5BFFFFh 2D8000h-2DFFFFh64 32 SA99 1011100xxx 5C0000h-5CFFFFh 2E0000h-2E7FFFh64 32 SA100 1011101xxx 5D0000h-5DFFFFh 2E8000h-2EFFFFh64 32 SA101 1011110xxx 5E0000h-5EFFFFh 2F0000h-2F7FFFh64 32 SA102 1011111xxx 5F0000h-5FFFFFh 2F8000h-2FFFFFh64 32 SA103 1100000xxx 600000h-60FFFFh 300000h-307FFFh64 32 SA104 1100001xxx 610000h-61FFFFh 308000h-30FFFFh64 32 SA105 1100010xxx 620000h-62FFFFh 310000h-317FFFh64 32 SA106 1100011xxx 630000h-63FFFFh 318000h-31FFFFh64 32 SA107 1100100xxx 640000h-64FFFFh 320000h-327FFFh64 32 SA108 1100101xxx 650000h-65FFFFh 328000h-32FFFFh64 32 SA109 1100110xxx 660000h-66FFFFh 330000h-337FFFh64 32 SA110 1100111xxx 670000h-67FFFFh 338000h-33FFFFh64 32 SA111 1101000xxx 680000h-68FFFFh 340000h-347FFFh64 32 SA112 1101001xxx 690000h-69FFFFh 348000h-34FFFFh64 32 SA113 1101010xxx 6A0000h-6AFFFFh 350000h-357FFFh64 32 SA114 1101011xxx 6B0000h-6BFFFFh 358000h-35FFFFh64 32 SA115 1101100xxx 6C0000h-6CFFFFh 360000h-367FFFh64 32 SA116 1101101xxx 6D0000h-6DFFFFh 368000h-36FFFFh64 32 SA117 1101110xxx 6E0000h-6EFFFFh 370000h-377FFFh64 32 SA118 1101111xxx 6F0000h-6FFFFFh 378000h-37FFFFh64 32 SA119 1110000xxx 700000h-70FFFFh 380000h-387FFFh64 32 SA120 1110001xxx 710000h-71FFFFh 388000h-38FFFFh64 32 SA121 1110010xxx 720000h-72FFFFh 390000h-397FFFh64 32 SA122 1110011xxx 730000h-73FFFFh 398000h-39FFFFh64 32 SA123 1110100xxx 740000h-74FFFFh 3A0000h-3A7FFFh64 32 SA124 1110101xxx 750000h-75FFFFh 3A8000h-3AFFFFh

15P/N:PM1494 REV. 1.0, AUG. 28, 2009



A21-A12(x8)

Address Range (x16)

Address RangeKbytes Kwords64 32 SA125 1110110xxx 760000h-76FFFFh 3B0000h-3B7FFFh64 32 SA126 1110111xxx 770000h-77FFFFh 3B8000h-3BFFFFh64 32 SA127 1111000xxx 780000h-78FFFFh 3C0000h-3C7FFFh64 32 SA128 1111001xxx 790000h-79FFFFh 3C8000h-3CFFFFh64 32 SA129 1111010xxx 7A0000h-7AFFFFh 3D0000h-3D7FFFh64 32 SA130 1111011xxx 7B0000h-7BFFFFh 3D8000h-3DFFFFh64 32 SA131 1111100xxx 7C0000h-7CFFFFh 3E0000h-3E7FFFh64 32 SA132 1111101xxx 7D0000h-7DFFFFh 3E8000h-3EFFFFh64 32 SA133 1111110xxx 7E0000h-7EFFFFh 3F0000h-3F7FFFh64 32 SA134 1111111xxx 7F0000h-7FFFFFh 3F8000h-3FFFFFh

16P/N:PM1494 REV. 1.0, AUG. 28, 2009


Table 1-3. MX29GL640E H/L SECTOR ARCHITECTURE


A21-A15(x8)

Address Range (x16)

Address RangeKbytes Kwords64 32 SA0 0000000 000000h-00FFFFh 000000h-007FFFh64 32 SA1 0000001 010000h-01FFFFh 008000h-00FFFFh64 32 SA2 0000010 020000h-02FFFFh 010000h-017FFFh64 32 SA3 0000011 030000h-03FFFFh 018000h-01FFFFh64 32 SA4 0000100 040000h-04FFFFh 020000h-027FFFh64 32 SA5 0000101 050000h-05FFFFh 028000h-02FFFFh64 32 SA6 0000110 060000h-06FFFFh 030000h-037FFFh64 32 SA7 0000111 070000h-07FFFFh 038000h-03FFFFh64 32 SA8 0001000 080000h-08FFFFh 040000h-047FFFh64 32 SA9 0001001 090000h-09FFFFh 048000h-04FFFFh64 32 SA10 0001010 0A0000h-0AFFFFh 050000h-057FFFh64 32 SA11 0001011 0B0000h-0BFFFFh 058000h-05FFFFh64 32 SA12 0001100 0C0000h-0CFFFFh 060000h-067FFFh64 32 SA13 0001101 0D0000h-0DFFFFh 068000h-06FFFFh64 32 SA14 0001110 0E0000h-0EFFFFh 070000h-077FFFh64 32 SA15 0001111 0F0000h-0FFFFFh 078000h-07FFFFh64 32 SA16 0010000 100000h-10FFFFh 080000h-087FFFh64 32 SA17 0010001 110000h-11FFFFh 088000h-08FFFFh64 32 SA18 0010010 120000h-12FFFFh 090000h-097FFFh64 32 SA19 0010011 130000h-13FFFFh 098000h-09FFFFh64 32 SA20 0010100 140000h-14FFFFh 0A0000h-0A7FFFh64 32 SA21 0010101 150000h-15FFFFh 0A8000h-0AFFFFh64 32 SA22 0010110 160000h-16FFFFh 0B0000h-0B7FFFh64 32 SA23 0010111 170000h-17FFFFh 0B8000h-0BFFFFh64 32 SA24 0011000 180000h-18FFFFh 0C0000h-0C7FFFh64 32 SA25 0011001 190000h-19FFFFh 0C8000h-0CFFFFh64 32 SA26 0011010 1A0000h-1AFFFFh 0D0000h-0D7FFFh64 32 SA27 0011011 1B0000h-1BFFFFh 0D8000h-0DFFFFh64 32 SA28 0011100 1C0000h-1CFFFFh 0E0000h-0E7FFFh64 32 SA29 0011101 1D0000h-1DFFFFh 0E8000h-0EFFFFh64 32 SA30 0011110 1E0000h-1EFFFFh 0F0000h-0F7FFFh64 32 SA31 0011111 1F0000h-1FFFFFh 0F8000h-0FFFFFh64 32 SA32 0100000 200000h-20FFFFh 100000h-107FFFh64 32 SA33 0100001 210000h-21FFFFh 108000h-10FFFFh64 32 SA34 0100010 220000h-22FFFFh 110000h-117FFFh64 32 SA35 0100011 230000h-23FFFFh 118000h-11FFFFh64 32 SA36 0100100 240000h-24FFFFh 120000h-127FFFh64 32 SA37 0100101 250000h-25FFFFh 128000h-12FFFFh64 32 SA38 0100110 260000h-26FFFFh 130000h-137FFFh64 32 SA39 0100111 270000h-27FFFFh 138000h-13FFFFh64 32 SA40 0101000 280000h-28FFFFh 140000h-147FFFh64 32 SA41 0101001 290000h-29FFFFh 148000h-14FFFFh64 32 SA42 0101010 2A0000h-2AFFFFh 150000h-157FFFh

17P/N:PM1494 REV. 1.0, AUG. 28, 2009



A21-A15(x8)

Address Range (x16)

Address RangeKbytes Kwords64 32 SA43 0101011 2B0000h-2BFFFFh 158000h-15FFFFh64 32 SA44 0101100 2C0000h-2CFFFFh 160000h-167FFFh64 32 SA45 0101101 2D0000h-2DFFFFh 168000h-16FFFFh64 32 SA46 0101110 2E0000h-2EFFFFh 170000h-177FFFh64 32 SA47 0101111 2F0000h-2FFFFFh 178000h-17FFFFh64 32 SA48 0110000 300000h-30FFFFh 180000h-187FFFh64 32 SA49 0110001 310000h-31FFFFh 188000h-18FFFFh64 32 SA50 0110010 320000h-32FFFFh 190000h-197FFFh64 32 SA51 0110011 330000h-33FFFFh 198000h-19FFFFh64 32 SA52 0110100 340000h-34FFFFh 1A0000h-1A7FFFh64 32 SA53 0110101 350000h-35FFFFh 1A8000h-1AFFFFh64 32 SA54 0110110 360000h-36FFFFh 1B0000h-1B7FFFh64 32 SA55 0110111 370000h-37FFFFh 1B8000h-1BFFFFh64 32 SA56 0111000 380000h-38FFFFh 1C0000h-1C7FFFh64 32 SA57 0111001 390000h-39FFFFh 1C8000h-1CFFFFh64 32 SA58 0111010 3A0000h-3AFFFFh 1D0000h-1D7FFFh64 32 SA59 0111011 3B0000h-3BFFFFh 1D8000h-1DFFFFh64 32 SA60 0111100 3C0000h-3CFFFFh 1E0000h-1E7FFFh64 32 SA61 0111101 3D0000h-3DFFFFh 1E8000h-1EFFFFh64 32 SA62 0111110 3E0000h-3EFFFFh 1F0000h-1F7FFFh64 32 SA63 0111111 3F0000h-3FFFFFh 1F8000h-1FFFFFh64 32 SA64 1000000 400000h-40FFFFh 200000h-207FFFh64 32 SA65 1000001 410000h-41FFFFh 208000h-20FFFFh64 32 SA66 1000010 420000h-42FFFFh 210000h-217FFFh64 32 SA67 1000011 430000h-43FFFFh 218000h-21FFFFh64 32 SA68 1000100 440000h-44FFFFh 220000h-227FFFh64 32 SA69 1000101 450000h-45FFFFh 228000h-22FFFFh64 32 SA70 1000110 460000h-46FFFFh 230000h-237FFFh64 32 SA71 1000111 470000h-47FFFFh 238000h-23FFFFh64 32 SA72 1001000 480000h-48FFFFh 240000h-247FFFh64 32 SA73 1001001 490000h-49FFFFh 248000h-24FFFFh64 32 SA74 1001010 4A0000h-4AFFFFh 250000h-257FFFh64 32 SA75 1001011 4B0000h-4BFFFFh 258000h-25FFFFh64 32 SA76 1001100 4C0000h-4CFFFFh 260000h-267FFFh64 32 SA77 1001101 4D0000h-4DFFFFh 268000h-26FFFFh64 32 SA78 1001110 4E0000h-4EFFFFh 270000h-277FFFh64 32 SA79 1001111 4F0000h-4FFFFFh 278000h-27FFFFh64 32 SA80 1010000 500000h-50FFFFh 280000h-287FFFh64 32 SA81 1010001 510000h-51FFFFh 288000h-28FFFFh64 32 SA82 1010010 520000h-52FFFFh 290000h-297FFFh64 32 SA83 1010011 530000h-53FFFFh 298000h-29FFFFh64 32 SA84 1010100 540000h-54FFFFh 2A0000h-2A7FFFh64 32 SA85 1010101 550000h-55FFFFh 2A8000h-2AFFFFh

18P/N:PM1494 REV. 1.0, AUG. 28, 2009



A21-A15(x8)

Address Range (x16)

Address RangeKbytes Kwords64 32 SA86 1010110 560000h-56FFFFh 2B0000h-2B7FFFh64 32 SA87 1010111 570000h-57FFFFh 2B8000h-2BFFFFh64 32 SA88 1011000 580000h-58FFFFh 2C0000h-2C7FFFh64 32 SA89 1011001 590000h-59FFFFh 2C8000h-2CFFFFh64 32 SA90 1011010 5A0000h-5AFFFFh 2D0000h-2D7FFFh64 32 SA91 1011011 5B0000h-5BFFFFh 2D8000h-2DFFFFh64 32 SA92 1011100 5C0000h-5CFFFFh 2E0000h-2E7FFFh64 32 SA93 1011101 5D0000h-5DFFFFh 2E8000h-2EFFFFh64 32 SA94 1011110 5E0000h-5EFFFFh 2F0000h-2F7FFFh64 32 SA95 1011111 5F0000h-5FFFFFh 2F8000h-2FFFFFh64 32 SA96 1100000 600000h-60FFFFh 300000h-307FFFh64 32 SA97 1100001 610000h-61FFFFh 308000h-30FFFFh64 32 SA98 1100010 620000h-62FFFFh 310000h-317FFFh64 32 SA99 1100011 630000h-63FFFFh 318000h-31FFFFh64 32 SA100 1100100 640000h-64FFFFh 320000h-327FFFh64 32 SA101 1100101 650000h-65FFFFh 328000h-32FFFFh64 32 SA102 1100110 660000h-66FFFFh 330000h-337FFFh64 32 SA103 1100111 670000h-67FFFFh 338000h-33FFFFh64 32 SA104 1101000 680000h-68FFFFh 340000h-347FFFh64 32 SA105 1101001 690000h-69FFFFh 348000h-34FFFFh64 32 SA106 1101010 6A0000h-6AFFFFh 350000h-357FFFh64 32 SA107 1101011 6B0000h-6BFFFFh 358000h-35FFFFh64 32 SA108 1101100 6C0000h-6CFFFFh 360000h-367FFFh64 32 SA109 1101101 6D0000h-6DFFFFh 368000h-36FFFFh64 32 SA110 1101110 6E0000h-6EFFFFh 370000h-377FFFh64 32 SA111 1101111 6F0000h-6FFFFFh 378000h-37FFFFh64 32 SA112 1110000 700000h-70FFFFh 380000h-387FFFh64 32 SA113 1110001 710000h-71FFFFh 388000h-38FFFFh64 32 SA114 1110010 720000h-72FFFFh 390000h-397FFFh64 32 SA115 1110011 730000h-73FFFFh 398000h-39FFFFh64 32 SA116 1110100 740000h-74FFFFh 3A0000h-3A7FFFh64 32 SA117 1110101 750000h-75FFFFh 3A8000h-3AFFFFh64 32 SA118 1110110 760000h-76FFFFh 3B0000h-3B7FFFh64 32 SA119 1110111 770000h-77FFFFh 3B8000h-3BFFFFh64 32 SA120 1111000 780000h-78FFFFh 3C0000h-3C7FFFh64 32 SA121 1111001 790000h-79FFFFh 3C8000h-3CFFFFh64 32 SA122 1111010 7A0000h-7AFFFFh 3D0000h-3D7FFFh64 32 SA123 1111011 7B0000h-7BFFFFh 3D8000h-3DFFFFh64 32 SA124 1111100 7C0000h-7CFFFFh 3E0000h-3E7FFFh64 32 SA125 1111101 7D0000h-7DFFFFh 3E8000h-3EFFFFh64 32 SA126 1111110 7E0000h-7EFFFFh 3F0000h-3F7FFFh64 32 SA127 1111111 7F0000h-7FFFFFh 3F8000h-3FFFFFh

19P/N:PM1494 REV. 1.0, AUG. 28, 2009


Table 2-1. BUS OPERATION

Notes:1.ThefirstorlastsectorwasprotectedifWP#/ACC=Vil.2. WhenWP#/ACC=Vih,theprotectionconditionsoftheoutmostsectordependsonpreviousprotectioncondi-

tions.Refertotheadvancedprotectfeature.3. Q0~Q15areinput(DIN)oroutput(DOUT)pinsaccordingtotherequestsofcommandsequence,sectorpro-

tection,ordatapollingalgorithm.4. InWordMode(Byte#=Vih),theaddressesareAMtoA0,AM:MSBofaddress. InByteMode(Byte#=Vil),theaddressesareAMtoA-1(Q15),AM:MSBofaddress.

Mode Select RE- SET# CE# WE# OE# Address

(Note4)

Data I/O

Q0~Q7

Byte#WP#/ ACC

Vil VihData (I/O) Q8~Q15

DeviceReset L X X X X HighZ HighZ HighZ L/H

StandbyMode Vcc±0.3V

Vcc±0.3V X X X HighZ HighZ HighZ H

OutputDisable H L H H X HighZ HighZ HighZ L/HReadMode H L H L AIN DOUT Q8-Q14=

HighZ,Q15=A1

DOUT L/HWrite H L L H AIN DIN DIN Note1,2AccelerateProgram H L L H AIN DIN DIN Vhv

BUS OPERATION

20P/N:PM1494 REV. 1.0, AUG. 28, 2009


Notes:1.Sectorunprotectedcode:00h.Sectorprotectedcode:01h.2.Factorylockedcode: WP#protectshighaddresssector:9Ah. WP#protectslowaddresssector:8AhFactoryunlockedcode: WP#protectshighaddresssector:1Ah. WP#protectslowaddresssector:0Ah3.AM:MSBofaddress.

Table 2-2. BUS OPERATION

ItemControl Input AM

to A12

A11 to

A10A9

A8 to A7

A6A5 to A4

A3 to A2

A1 A0 Q0 ~ Q7 Q8 ~ Q15CE# WE# OE#

SectorLockStatusVerification L H L SA X Vhv X L X L H L 01hor00h

(Note1) X

ReadSiliconIDManufacturerCode

L H L X X Vhv X L X L L L C2H X

ReadSiliconID--MX29GL640ET/B

Cycle1 L H L X X Vhv X L X L L H 7EH 22H(Word),XXH(Byte)

Cycle2 L H L X X Vhv X L X H H L 10H 22H(Word),XXH(Byte)

Cycle3 L H L X X Vhv X L X H H H 01H(Top)00H(Bottom)

22H(Word),XXH(Byte)

ReadSiliconID--MX29GL640EH/L

Cycle1 L H L X X Vhv X L X L L H 7EH 22H(Word),XXH(Byte)

Cycle2 L H L X X Vhv X L X H H L 0CH 22H(Word),XXH(Byte)

Cycle3 L H L X X Vhv X L X H H H 01H 22H(Word),XXH(Byte)

21P/N:PM1494 REV. 1.0, AUG. 28, 2009


FUNCTIONAL OPERATION DESCRIPTION

READ OPERATION Toperformareadoperation,thesystemaddressesthedesiredmemoryarrayorstatusregisterlocationbypro-viding itsaddressontheaddresspinsandsimultaneouslyenablingthechipbydrivingCE#&OE#LOW,andWE#HIGH.AftertheTceandToetimingrequirementshavebeenmet,thesystemcanreadthecontentsoftheaddressedlocationbyreadingtheData(I/O)pins.IfeithertheCE#orOE#isheldHIGH,theoutputswillremaintri-statedandnodatawillappearontheoutputpins.

PAGE READ

ThisdeviceisabletoconductMXICMaskROMcompatiblehighperformancepageread.Pagesizeis16bytesor8words.ThehigheraddressAmax~A3select the certainpage,whileA2~A0 forwordmode,A2~A-1 forbytemodeselecttheparticularwordorbyteinapage.ThepageaccesstimeisTaaorTce,followingbyTpafortherestofthepagereadtime.WhenCE#toggles,accesstimeisTaaorTce.Pagemodecanbeturnedonbykeeping"page-readaddress"constantandchangingthe"intra-readpage"addresses.

WRITE OPERATION

Toperformawriteoperation,thesystemprovidesthedesiredaddressontheaddresspins,enablesthechipbyassertingCE#LOW,anddisablestheData(I/O)pinsbyholdingOE#HIGH.ThesystemthenplacesdatatobewrittenontheData(I/O)pinsandpulsesWE#LOW.ThedevicecapturestheaddressinformationonthefallingedgeofWE#andthedataontherisingedgeofWE#.Toseeanexample,pleaserefertothetimingdiagraminFigure1onPage49. Thesystemisnotallowedtowrite invalidcommands(commandsnotdefined in thisdatasheet)tothedevice.Writinganinvalidcommandmayputthedeviceinanundefinedstate.

DEVICE RESET

DrivingtheRESET#pinLOWforaperiodofTrpormorewillreturnthedevicetoReadmode.Ifthedeviceisinthemiddleofaprogramoreraseoperation,theresetoperationwilltakeatmostaperiodofTready1beforethedevicereturnstoReadmode.UntilthedevicedoesreturnstoReadmode,theRY/BY#pinwillremainLow(BusyStatus).

WhentheRESET#pinisheldatGND±0.3V,thedeviceonlyconsumesstandby(Isbr)current.However,thede-vicedrawslargercurrentiftheRESET#pinisheldatavoltagegreaterthanGND+0.3VandlessthanorequaltoVil.

ItisrecommendedtotiethesystemresetsignaltotheRESET#pinoftheflashmemory.Thisallowsthedevicetoberesetwith thesystemandputs it inastatewhere thesystemcan immediatelybeginreadingbootcodefromit.

STANDBY MODE

ThedeviceentersStandbymodewhenevertheRESET#andCE#pinsarebothheldHighexceptintheembed-dedmode.Whileinthismode,WE#andOE#willbeignored,allDataOutputpinswillbeinahighimpedancestate,andthedevicewilldrawminimal(Isb)current.

22P/N:PM1494 REV. 1.0, AUG. 28, 2009


FUNCTIONAL OPERATION DESCRIPTION (cont'd)

OUTPUT DISABLE

Whileinactivemode(RESET#HIGHandCE#LOW),theOE#pincontrolsthestateoftheoutputpins.IfOE#isheldHIGH,allData(I/O)pinswillremaintri-stated.IfheldLOW,theByteorWordData(I/O)pinswilldrivedata.

BYTE/WORD SELECTION

TheBYTE#inputpinisusedtoselecttheorganizationofthearraydataandhowthedataisinput/outputontheData(I/O)pins.IftheBYTE#pinisheldHIGH,Wordmodewillbeselectedandall16datalines(Q0toQ15)willbeactive.

IfBYTE#isforcedLOW,BytemodewillbeactiveandonlydatalinesQ0toQ7willbeactive.DatalinesQ8toQ14willremaininahighimpedancestateandQ15becomestheA-1addressinputpin.

HARDWARE WRITE PROTECT

BydrivingtheWP#/ACCpinLOW.Thehighestor lowestwasprotectedfromallerase/programoperations. IfWP#/ACCisheldHIGH(VihtoVCC),thesesectorsreverttotheirpreviouslyprotected/unprotectedstatus.

ACCELERATED PROGRAMMING OPERATION

Byapplyinghighvoltage(Vhv)totheWP#/ACCpin,thedevicewillentertheAcceleratedProgrammingmode.Thismodepermitsthesystemtoskipthenormalcommandunlocksequencesandprogrambyte/wordlocationsdirectly.Duringacceleratedprogramming,thecurrentdrawnfromtheWP#/ACCpinisnomorethanICP1.

WRITE BUFFER PROGRAMMING OPERATION

Programs32bytes/16words inaprogrammingoperation.To trigger theWriteBufferProgramming,startby thefirsttwounlockcycles,thenthirdcyclewritestheWriteBufferLoadcommandatthedestinedprogrammingSec-torAddress.Theforthcyclewritesthe"wordlocationssubtractone"number.

Followingaboveoperations,systemstartstowritetheminglingofaddressanddata.Aftertheprogrammingofthefirstaddressordata,the"write-buffer-page"isselected.Thefollowingdatashouldbewithintheabovemen-tionedpage.

The"write-buffer-page"isselectedbychoosingaddressAmax-A4.

"Write-Buffer-Page"addresshastobethesameforalladdress/datawriteintothewritebuffer.Ifnot,operationwillABORT.

ToprogramthecontentofthewritebufferpagethiscommandmustbefollowedbyawritetobufferProgramcon-firmcommand.

Theoperationofwrite-buffercanbesuspendedorresumedbythestandardcommands,oncethewritebufferprogrammingoperationisfinished,it’llreturntonormalREADmode.

23P/N:PM1494 REV. 1.0, AUG. 28, 2009



WRITE BUFFER PROGRAMMING OPERATION (cont'd)

ABORTwillbeexecutedfortheWriteBufferProgrammingSequenceiffollowingconditionoccurs:• Thevalueloadedisbiggerthanthepagebuffersizeduring"NumberofLocationstoProgram"• AddresswritteninasectorisnotthesameastheoneassignedduringtheWrite-Buffer-Loadcommand.• Address/Datapairwritten toadifferentwrite-buffer-page than theoneassignedby the "StartingAddress"

duringthe"writebufferdataloading"operation.• Writingnot"ConfirmCommand"aftertheassignednumberof"dataload"cycles.

AtWriteBufferAbortmode,thestatusregisterwillbeQ1=1,Q7=DATA#(lastaddresswritten),Q6=toggle,Q5=0.AWrite-to-Buffer-AbortResetcommandsequencehastobewrittentoresetthedeviceforthenextoperation.

Writebufferprogrammingcanbeconductedinanysequence.HowevertheCFIfunctions,autoselect,SecuredSiliconsectorarenotfunctionalwhenprogramoperationisinprogress.Multiplewritebufferprogrammingopera-tionsonthesamewritebufferaddressrangewithoutinterveningerasesisavailable.Anybitinawritebufferad-dressrangecan’tbeprogrammedfrom0backto1.

SECTOR PROTECT OPERATION

Thedeviceprovidesuserprogrammableprotectionoperationsforselectedsectors.PleaserefertoTable1whichshowallSectorassignments.

Duringtheprotectionoperation,thesectoraddressofanysectormaybeusedtospecifytheSectorbeingpro-tected.

AUTOMATIC SELECT BUS OPERATIONS

ThefollowingfivebusoperationsrequireA9toberaisedtoVhv.PleaseseeAUTOMATICSELECTCOMMANDSEQUENCEintheCOMMANDOPERATIONSsectionfordetailsofequivalentcommandoperationsthatdonotrequiretheuseofVhv.

SECTOR LOCK STATUS VERIFICATION

Todeterminetheprotectedstateofanysectorusingbusoperations,thesystemperformsaREADOPERATIONwithA9raisedtoVhv,thesectoraddressappliedtoaddresspinsA21toA12,addresspinsA6,A3,A2&A0heldLOW,andaddresspinA1heldHIGH.IfdatabitQ0isLOW,thesectorisnotprotected,andifQ0isHIGH,thesectorisprotected.

24P/N:PM1494 REV. 1.0, AUG. 28, 2009



READ SILICON ID MANUFACTURER CODE

Todetermine theSilicon IDManufacturerCode, thesystemperformsaREADOPERATIONwithA9 raised toVhvandaddresspinsA6,A3,A2,A1,&A0heldLOW.TheMacronixIDcodeofC2hshouldbepresentondatabitsQ0toQ7.

READ INDICATOR BIT (Q7) FOR SECURITY SECTOR

TodetermineiftheSecuritySectorhasbeenlockedatthefactory,thesystemperformsaREADOPERATIONwithA9raisedtoVhv,addresspinA6,A3&A2heldLOW,andaddresspinsA1&A0heldHIGH.IftheSecuritySectorhasbeenlockedatthefactory,thecode99h(H)/89h(L)willbepresentondatabitsQ0toQ7.Otherwise,thefactoryunlockedcodeof19h(H)/09h(L)willbepresent.

INHERENT DATA PROTECTION

Toavoidaccidentalerasureorprogrammingofthedevice,thedeviceisautomaticallyresettoReadmodeduringpowerup.Additionally,thefollowingdesignfeaturesprotectthedevicefromunintendeddatacorruption.

COMMAND COMPLETION

Onlyafter thesuccessfulcompletionof thespecifiedcommandsetswill thedevicebegin itseraseorprogramoperation.Thefailureinobservingvalidcommandsetswillresultinthememoryreturningtoreadmode.

LOW VCC WRITE INHIBIT

Thedevice refuses to accept anywrite commandwhenVcc is less thanVLKO.This prevents data fromspuriously beingalteredduringpower-up, power-down, or temporary power interruptions.Thedeviceautomaticallyresets itselfwhenVcc is lower thanVLKOandwritecyclesare ignoreduntilVcc isgreater thanVLKO.ThesystemmustprovidepropersignalsoncontrolpinsafterVccrisesaboveVLKOtoavoidunintentionalprogramoreraseoperations.

WRITE PULSE "GLITCH" PROTECTION

CE#,WE#,OE#pulsesshorter than5nsaretreatedasglitchesandwillnotberegardedasaneffectivewritecycle.

LOGICAL INHIBIT

AvalidwritecyclerequiresbothCE#andWE#atVilwithOE#atVih.WritecycleisignoredwheneitherCE#atVih,WE#atVih,orOE#atVil.

25P/N:PM1494 REV. 1.0, AUG. 28, 2009



POWER-UP SEQUENCE

Uponpowerup, thedevice isplaced inReadmode.Furthermore,programoreraseoperationwillbeginonlyaftersuccessfulcompletionofspecifiedcommandsequences.

POWER-UP WRITE INHIBIT

WhenWE#,CE#isheldatVilandOE#isheldatVihduringpowerup,thedeviceignoresthefirstcommandontherisingedgeofWE#.

POWER SUPPLY DECOUPLING

A0.1uFcapacitorshouldbeconnectedbetweentheVccandGNDtoreducethenoiseeffect.

26P/N:PM1494 REV. 1.0, AUG. 28, 2009


COMMAND OPERATIONS

READING THE MEMORY ARRAY Readmodeisthedefaultstateafterpoweruporafteraresetoperation.Toperformareadoperation,pleasere-fertoREADOPERATIONintheBUSOPERATIONSsectionabove.

If thedevice receivesanEraseSuspend commandwhile in theSectorErase state, theeraseoperationwillpause(afteratimedelaynotexceeding20us)andthedevicewillenterErase-SuspendedReadmode.WhileintheErase-SuspendedReadmode,datacanbeprogrammedorreadfromanysectornotbeingerased.Readingfromaddresseswithinsector(s)beingerasedwillonlyreturnthecontentsofthestatusregister,whichisinfacthowthecurrentstatusofthedevicecanbedetermined.

If a programcommand is issued to any inactive (not currently beingerased) sector duringErase-SuspendedReadmode,thedevicewillperformtheprogramoperationandautomaticallyreturntoErase-SuspendedReadmodeaftertheprogramoperationcompletessuccessfully.

WhileinErase-SuspendedReadmode,anEraseResumecommandmustbeissuedbythesystemtoreactivatetheeraseoperation. Theeraseoperationwill resume fromwhere iswassuspendedandwill continueuntil itcompletessuccessfullyoranotherEraseSuspendcommandisreceived.

Afterthememorydevicecompletesanembeddedoperation(automaticChipErase,SectorErase,orProgram)successfully,itwillautomaticallyreturntoReadmodeanddatacanbereadfromanyaddressinthearray.Iftheembeddedoperationfailstocomplete,asindicatedbystatusregisterbitQ5(exceedstimelimitflag)goingHIGHduringtheoperations,thesystemmustperformaresetoperationtoreturnthedevicetoReadmode.

ThereareseveralstatesthatrequirearesetoperationtoreturntoReadmode:

1.Aprogramorerasefailure--indicatedbystatusregisterbitQ5goingHIGHduringtheoperation.Failuresdur-ingeitherofthesestateswillpreventthedevicefromautomaticallyreturningtoReadmode.

2.ThedeviceisinAutoSelectmodeorCFImode.Thesetwostatesremainactiveuntiltheyareterminatedbyaresetoperation.

Inthetwosituationsabove, ifaresetoperation(eitherhardwareresetorsoftwareresetcommand) isnotper-formed,thedevicewillnotreturntoReadmodeandthesystemwillnotbeabletoreadarraydata.

AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY

ThedeviceprovidestheusertheabilitytoprogramthememoryarrayinBytemodeorWordmode.AslongastheusersentersthecorrectcycledefinedintheTable3(including2unlockcyclesandtheA0Hprogramcom-mand),anybyteorworddataprovidedonthedatalinesbythesystemwillautomaticallybeprogrammedintothearrayatthespecifiedlocation.

Aftertheprogramcommandsequencehasbeenexecuted,theinternalwritestatemachine(WSM)automaticallyexecutesthealgorithmsandtimingsnecessaryforprogrammingandverification,whichincludesgeneratingsuit-ableprogrampulses,checkingcell thresholdvoltagemargins,andrepeatingtheprogrampulse ifanycellsdonotpassverificationorhavelowmargins.Theinternalcontrollerprotectscellsthatdopassverificationandmar-gintestsfrombeingover-programmedbyinhibitingfurtherprogrampulsestothesepassingcellsasweakercellscontinuetobeprogrammed.

WiththeinternalWSMautomaticallycontrollingtheprogrammingprocess,theuseronlyneedstoenterthepro-gramcommandanddataonce.

27P/N:PM1494 REV. 1.0, AUG. 28, 2009


COMMAND OPERATIONS (cont'd)

AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY (cont'd)

Programmingwillonlychangethebitstatusfrom"1"to"0".Itisnotpossibletochangethebitstatusfrom"0"to"1"byprogramming.Thiscanonlybedonebyaneraseoperation.Furthermore,theinternalwriteverificationonlychecksanddetectserrorsincaseswherea"1"isnotsuccessfullyprogrammedto"0".

Anycommandswrittentothedeviceduringprogrammingwillbeignoredexcepthardwareresetorprogramsus-pend.Hardwareresetwillterminatetheprogramoperationafteraperiodoftimenomorethan10us.Whentheembeddedprogramalgorithmiscompleteortheprogramoperationisterminatedbyahardwarereset,thede-vicewillreturntoReadmode.Programsuspendready,thedevicewillenterprogramsuspendreadmode.

Aftertheembeddedprogramoperationhasbegun,theusercancheckforcompletionbyreadingthefollowingbitsinthestatusregister:

Note:RY/BY#isanopendrainoutputpinandshouldbeconnectedtoVCCthroughahighvaluepull-upresistor.

ERASING THE MEMORY ARRAY

Thereare two typesoferaseoperationsperformedon thememoryarray--SectorEraseandChipErase. IntheSectorEraseoperation,oneormoreselectedsectorsmaybeerasedsimultaneously. In theChipEraseoperation,thecompletememoryarrayiserasedexceptforanyprotectedsectors.Moredetailsoftheprotectedsectorsareexplainedinsection5.

SECTOR ERASE

Thesectoreraseoperation isusedtocleardatawithinasectorbyreturningallof itsmemory locationstothe"1"state.Itrequiressixcommandcyclestoinitiatetheeraseoperation.Thefirsttwocyclesare"unlockcycles",thethird isaconfigurationcycle, thefourthandfiftharealso"unlockcycles",andthesixthcycle istheSectorErasecommand.Afterthesectorerasecommandsequencehasbeenissued,aninternal50ustime-outcounterisstarted.Untilthiscounterreacheszero,additionalsectoraddressesandSectorErasecommandsmaybeis-suedthusallowingmultiplesectorstobeselectedanderasedsimultaneously.Afterthe50ustime-outcounterhasexpired,nonewcommandswillbeacceptedandtheembeddedsectoreraseoperationwillbegin.Notethatthe50ustimer-outcounterisrestartedaftereveryerasecommandsequence.IftheuserentersanycommandotherthanSectorEraseorEraseSuspendduringthetime-outperiod,theeraseoperationwillabortandthede-vicewillreturntoReadmode.

Aftertheembeddedsectoreraseoperationbegins,allcommandsexceptEraseSuspendwillbeignored.TheonlywaytointerrupttheoperationiswithanEraseSuspendcommandorwithahardwarereset.ThehardwareresetwillcompletelyaborttheoperationandreturnthedevicetoReadmode.

Status Q7*1 Q6*1 Q5 Q1 RY/BY# (Note)Inprogress Q7# Toggling 0 0 0

Exceedtimelimit Q7# Toggling 1 N/A 0

28P/N:PM1494 REV. 1.0, AUG. 28, 2009



SECTOR ERASE (cont'd)

Thesystemcandeterminethestatusoftheembeddedsectoreraseoperationbythefollowingmethods:

CHIP ERASE

TheChipEraseoperationisusederaseallthedatawithinthememoryarray.Allmemorycellscontaininga"0"willbereturnedtotheerasedstateof"1".Thisoperationrequires6writecyclestoinitiatetheaction.Thefirsttwocyclesare"unlock"cycles,thethirdisaconfigurationcycle,thefourthandfiftharealso"unlock"cycles,andthesixthcycleinitiatesthechiperaseoperation.

During thechiperaseoperation,noothersoftwarecommandswillbeaccepted,but ifahardware reset is re-ceivedortheworkingvoltageistoolow,thatchiperasewillbeterminated.AfterChipErase,thechipwillauto-maticallyreturntoReadmode.

Thesystemcandeterminethestatusoftheembeddedchiperaseoperationbythefollowingmethods:

*1:RY/BY#isopendrainoutputpinandshouldbeconnectedtoVCCthroughahighvaluepull-upresistor.

Note:1.TheQ3statusbitisthe50ustime-outindicator.WhenQ3=0,the50ustime-outcounterhasnotyetreachedzeroandanewSectorErasecommandmaybeissuedtospecifytheaddressofanothersectortobeerased.WhenQ3=1,the50ustime-outcounterhasexpiredandtheSectorEraseoperationhasalreadybegun.EraseSuspendistheonlyvalidcommandthatmaybeissuedoncetheembeddederaseoperationisunderway.

2.RY/BY#isopendrainoutputpinandshouldbeconnectedtoVCCthroughahighvaluepull-upresistor.3.Whenanattemptismadetoeraseonlyprotectedsector(s),theeraseoperationwillabortthuspreventinganydatachanges intheprotectedsector(s). Q7willoutput"0"andQ6will togglebriefly(100usor less)beforeabortingandreturningthedevicetoReadmode.Ifunprotectedsectorsarealsospecified,however,theywillbeerasednormallyandtheprotectedsector(s)willremainunchanged.

4.Q2isalocalizedindicatorshowingaspecifiedsectorisundergoingeraseoperationornot.Q2toggleswhenuserreadsataddresseswherethesectorsareactivelybeingerased(inerasemode)ortobeerased(inerasesuspendmode).

Status Q7 Q6 Q5 Q3*1 Q2 RY/BY#*2

Time-outperiod 0 Toggling 0 0 Toggling 0Inprogress 0 Toggling 0 1 Toggling 0

Exceededtimelimit 0 Toggling 1 1 Toggling 0

Status Q7 Q6 Q5 Q2 RY/BY#*1

Inprogress 0 Toggling 0 Toggling 0Exceedtimelimit 0 Toggling 1 Toggling 0

29P/N:PM1494 REV. 1.0, AUG. 28, 2009


Afterbeginningasectoreraseoperation,EraseSuspendistheonlyvalidcommandthatmaybeissued.Ifsys-temissuesanEraseSuspendcommandduringthe50ustime-outperiodfollowingaSectorErasecommand,thetime-outperiodwillterminateimmediatelyandthedevicewillenterErase-SuspendedReadmode.IfthesystemissuesanEraseSuspendcommandafterthesectoreraseoperationhasalreadybegun,thedevicewillnotenterErase-SuspendedReadmodeuntil20ustimehaselapsed.ThesystemcandetermineifthedevicehasenteredtheErase-SuspendedReadmodethroughQ6,Q7,andRY/BY#.

AfterthedevicehasenteredErase-SuspendedReadmode,thesystemcanreadorprogramanysector(s)ex-ceptthosebeingerasedbythesuspendederaseoperation.Readinganysectorbeingerasedorprogrammedwillreturnthecontentsofthestatusregister.Wheneverasuspendcommandisissued,usermustissueare-sumecommandandcheckQ6togglebitstatus,beforeissueanothererasecommand.Thesystemcanusethestatusregisterbitsshowninthefollowingtabletodeterminethecurrentstateofthedevice:


ERASE SUSPEND/RESUME

When thedevicehassuspendederasing,user canexecute thecommandsetsexcept sectoreraseandchiperase,suchasreadsiliconID,sectorprotectverify,program,CFIqueryanderaseresume.

SECTOR ERASE RESUME

The sectorEraseResumecommand is valid onlywhen thedevice is inErase-SuspendedReadmode.Aftereraseresumes,theusercanissueanotherEaseSuspendcommand,butthereshouldbea400usintervalbe-tweenEaseResumeandthenextEraseSuspendcommand.

Status Q7 Q6 Q5 Q3 Q2 Q1 RY/BY#Erasesuspendreadinerasesuspendedsector 1 Notoggle 0 N/A toggle N/A 1Erasesuspendreadinnon-erasesuspendedsector Data Data Data Data Data Data 1Erasesuspendprograminnon-erasesuspendedsector Q7# Toggle 0 N/A N/A N/A 0

30P/N:PM1494 REV. 1.0, AUG. 28, 2009



PROGRAM SUSPEND/RESUME

WhenthedevicehasProgram/Erasesuspended,usercanexecutereadarray,auto-select,readCFI,readsecu-ritysilicon.

PROGRAM RESUME

TheProgramResumecommandisvalidonlywhenthedevice is inProgram-Suspendedmode.Afterprogramresumes,theusercanissueanotherProgramSuspendcommand,butthereshouldbea5usintervalbetweenProgramResumeandthenextProgramSuspendcommand.

Status Q7 Q6 Q5 Q3 Q2 Q1 RY/BY#Programsuspendreadinprogramsuspendedsector Invalid 1Programsuspend read in non-programsuspendedsector Data Data Data Data Data Data 1

BUFFER WRITE ABORT

Q1istheindicatorofBufferWriteAbort.WhenQ1=1,thedevicewillabortfrombufferwriteandgobacktoreadstatusregistershownasfollowingtable:

Status Q7 Q6 Q5 Q3 Q2 Q1 RY/BY#BufferWriteBusy Q7# Toggle 0 N/A N/A 0 0

BufferWriteAbort Q7# Toggle 0 N/A N/A 1 0

BufferWriteExceededTimeLimit Q7# Toggle 1 N/A N/A 0 0

Afterbeginningaprogramoperation,ProgramSuspendistheonlyvalidcommandthatmaybeissued.Thesys-temcandetermineifthedevicehasenteredtheProgram-SuspendedReadmodethroughQ6andRY/BY#.

After thedevicehasenteredProgram-Suspendedmode, thesystemcan readanysector(s)except thosebe-ingprogrammedbythesuspendedprogramoperation.Readingthesectorbeingprogramsuspendedisinvalid.Wheneverasuspendcommandisissued,usermustissuearesumecommandandcheckQ6togglebitstatus,beforeissueanotherprogramcommand.Thesystemcanusethestatusregisterbitsshowninthefollowingtabletodeterminethecurrentstateofthedevice:

31P/N:PM1494 REV. 1.0, AUG. 28, 2009


AUTOMATIC SELECT OPERATIONS

WhenthedeviceisinReadmode,ProgramSuspendedmode,Erase-SuspendedReadmode,orCFImode,theusercan issuetheAutomaticSelectcommandshowninTable3(twounlockcyclesfollowedbytheAutomaticSelectcommand90h)toenterAutomaticSelectmode.AfterenteringAutomaticSelectmode,theusercanquerytheManufacturerID,DeviceID,SecuritySectorlockedstatus,orSectorprotectedstatusmultipletimeswithoutissuinganewAutomaticSelectcommand.

WhileInAutomaticSelectmode,issuingaResetcommand(F0h)willreturnthedevicetoReadmode(orEase-SuspendedReadmodeifErase-Suspendwasactive)orProgramSuspendedReadmodeifProgramSuspendwasactive.

Anotherway to enterAutomaticSelectmode is to useoneof thebusoperations shown inTable2.BUSOPERATION_2.Afterthehighvoltage(Vhv)isremovedfromtheA9pin,thedevicewillautomaticallyreturntoReadmodeorErase-SuspendedReadmode.

AUTOMATIC SELECT COMMAND SEQUENCE

AutomaticSelectmodeisusedtoaccessthemanufacturerID,deviceIDandtoverifywhetherornotsecuredsiliconislockedandwhetherornotasectorisprotected.Theautomaticselectmodehasfourcommandcycles.Thefirst twoareunlockcycles,and followedbyaspecificcommand.Thefourthcycle isanormal readcycle,andusercanreadatanyaddressanynumberoftimeswithoutenteringanothercommandsequence.TheResetcommandisnecessarytoexittheAutomaticSelectmodeandbacktoreadarray.Thefollowingtableshowstheidentificationcodewithcorrespondingaddress.

Afterenteringautomaticselectmode,noothercommandsareallowedexcepttheresetcommand.


Address Data (Hex) Representation

ManufacturerIDWord X00 C2Byte X00 C2

DeviceID

MX29GL640ET/B

Word X01/0E/0F 227E/2210/2201(Top)227E/2210/2200(Bottom)

Byte X02/1C/1E 7E/10/01(Top)7E/10/00(Bottom)

MX29GL640EH/LWord X01/0E/0F 227E/220C/2201

Byte X02/1C/1E 7E/0C/01

SecuredSiliconWord X03

9A/1A(H) Factorylocked/unlocked8A/0A(L)

Byte X069A/1A(H) Factorylocked/

unlocked8A/0A(L)

SectorProtectVerifyWord

(Sectoraddress)X 02

00/01 Unprotected/protected

Byte(Sectoraddress)

X 0400/01 Unprotected/protected

32P/N:PM1494 REV. 1.0, AUG. 28, 2009


READ MANUFACTURER ID OR DEVICE ID

TheManufacturerID(identification)isauniquehexadecimalnumberassignedtoeachmanufacturerbytheJE-DECcommittee.EachcompanyhasitsownmanufacturerID,whichisdifferentfromtheIDofallothercompa-nies.ThenumberassignedtoMacronixisC2h.

AfterenteringAutomaticSelectmode,performingareadoperationwithA1&A0heldLOWwillcausethedevicetooutputtheManufacturerIDontheDataI/O(Q7toQ0)pins.

RESET

Inthefollowingsituations,executingresetcommandwillresetdevicebacktoReadmode:

• Amongerasecommandsequence(beforethefullcommandsetiscompleted)• Sectorerasetime-outperiod• Erasefail(whileQ5ishigh)• Amongprogramcommandsequence(beforethefullcommandset iscompleted,erase-suspendedprogramincluded)

• Programfail(whileQ5ishigh,anderase-suspendedprogramfailisincluded)• Auto-selectmode• CFImode

Whiledeviceisatthestatusofprogramfailorerasefail(Q5ishigh),usermustissueresetcommandtoresetdevicebacktoreadarraymode.WhilethedeviceisinAuto-SelectmodeorCFImode,usermustissueresetcommandtoresetdevicebacktoreadarraymode.

Whenthedeviceisintheprogressofprogramming(notprogramfail)orerasing(noterasefail),devicewillig-noreresetcommand.


33P/N:PM1494 REV. 1.0, AUG. 28, 2009


Start

Q1=0 Q2=0

Password Protection Mode

To chooseprotection mode

set lock register bit(Q1/Q2)

SetSPB Lock Bit

SPB = 0

SPB = 1

SPB Lock bit UnlockedSPB is changeable

Solid Write Protect bit (SPB)

SPB=0 sector protect

SPB=1 sector unprotect

Temporary Unprotect SPB bit (USPB)

USPB=0 Temp. Unprotect SPB bit, SPB changeable

USPB=1 SPB bit can not changeable

USPB 0

USPB 1

USPB 2

::

USPB N-1

USPB N

SPB 0

SPB 1

SPB 2

::

SPB N-1

SPB N

SA 0

SA 1

SA 2

::

SA N-1

SA N

DPB 0

DPB 1

DPB 2

::

DPB N-1

DPB N

SPB Lock bit lockedAll SPB can not changeable

Solid Protection Mode

Set 64 bit Password

Sector Array

Dynamic Write Protect bit (DPB)

DPB=0 sector protect

DPB=1 sector unprotect

Advanced Sector Protection/Un-protection

Thereare twoways to implement softwareAdvancedSectorProtectionon this device:PasswordmethodorSolidmethods.Throughthesetwoprotectionmethod,usercandisableorenable theprogrammingorerasingoperationtoanyindividualsectororwholechip.Thefigurebelowhelpsdescribeanoverviewofthesemethods.

ThedeviceisdefaulttotheSolidmodeandallsectorsareunprotectedwhenshippedfromfactory.Thefollowingfigureshowsthedetailalgorithmofadvancesectorprotecting.

Advance Sector Protection/Unprotection SPB Program Algorithm :

34P/N:PM1494 REV. 1.0, AUG. 28, 2009


1. Lock Register

UsercanchoosefavoritesectorprotectingmethodviasettingLockRegisterbitsQ1andQ2.LockRegister isa16-bitone-timeprogrammableregister.OnceprogrammingeitherQ1orQ2,theywillbelockedinthatmodeandtheotherswillbedisabledpermanently.Q1andQ2cannotbeprogrammedatthesametime,otherwisethedevicewillaborttheoperation.

IfuserselectsPasswordProtectionmode,thepasswordsettingisrequired.Usercansetpasswordbyissuingpasswordprogramcommand.

AftertheLockRegisterBitsCommandSetEntrycommandsequenceisissued,thereadandwriteoperationsfornormalsectorsaredisableduntilthismodeexits.

ALockRegisterallowsthememorysectorsandextendedmemorysectorprotectiontobeconfigured.

Lock Register bitsQ15-Q3 Q2 Q1 Q0

Don'tcare PasswordProtectionModeLockBit

SolidProtectionModeLockBit

SecuredSiliconSectorProtectionBit

PleaserefertothecommandforLockRegistercommandsettoreadandprogramtheLockregister.

Lock Register Program Algorithm :

START

Pass

Exit Lock Register command

Done YES

YES

NO

Q5 = 1NO

Write Data AAH, Address 555H

Lock register command set EntryWrite Data 55H, Address 2AAH

Write Data 40H, Address 555H

Write Data A0H, Address don’t care

Write Program Data, Address don’t care

Data # Polling Algorithm

Fail

Reset command

Lock register data program

35P/N:PM1494 REV. 1.0, AUG. 28, 2009


2. Solid write (non-volatile) protection Mode

2.1 Solid write Protection Bits (SPB)

TheSolidwriteProtectionbit (SPB) is a nonvolatile bitwith the sameendurancesas theFlashmemory. Itis assigned to each sector individually.TheSPB isPreprogramming, and its verificationprior to erasurearemanagedbythedevice,sosystemmonitoringisnotnecessary.

WhenaSPBissetto“0”,theassociatedsectorisprotected,preventinganyprogramoreraseoperationonthissector.TheSPBbitsaresetindividuallybySPBprogramcommand.However,itcannotbeclearedindividually.IssuingtheAllSPBErasecommandwilleraseallSPBinthesametime.DuringSPBprogrammingperiod,thereadandwriteoperationsaredisabledfornormalsectoruntilthismodeexits.

If oneof theprotected sector need tobeunprotected (correspondingSPBset to “1”), a fewmore stepsarerequired.First,theSPBLockBitmustbeclearedbyeitherputtingthedevicethroughapower-cycle,orhardwarereset.TheSPBscanthenbechangedtoreflectthedesiredsettings.SettingtheSPBLockBitonceagainlockstheSPBs,andthedeviceoperatesnormallyagain.

To verify theprogramming state of theSPB for a given sector, issuingaSPBStatusReadCommand to thedeviceisrequired.RefertotheflowchartbelowfordetailsofSPBProgramAlgorithm.

Notes1.TheReadactionswithinthatsectorwillbringtheSPBstatusbackforthatsector.AllReadactionsmustbe

executedbyreadmode.Thespecificsectoraddressiswrittenastheprogramcommandatthesametime.2.OnceSPBLockBit is set, itsProgramor erase commandwill not beexecutedand times-outwithout

programmingorerasingtheSPB.3.Alwaysissueexitcommandaftertheexecutionofresettingthedevicetoreadmodeandre-enablesreadand

writeactionsfornormalarray.4.Toachievethebesteffectofprotection,itisrecommendedtoexecutetheSPBLockBitSetcommandearly

inthebootcodeandprotectthebootcodebyholdingWP#/ACC=VIL.NotethattheSPBandDPBbitshavethesamefunctionwhenWP#/ACC=VHH,anditissamewhenACC=VIH.

2.2 Dynamic Protection Bits (DPBS)

TheDynamicProtectionallows the softwareapplication to easily protect sectorsagainst inadvertent change.However,theprotectioncanbeeasilydisabledwhenchangesarenecessary.

AllDynamicProtectionbit (DPB)are volatile andassigned to each sector. It canbemodify individual.DPBsprovide theprotection schemeonly for unprotected sectors that have theirSPBs cleared (erase canbeindividuallymodifiedd to “1”).Tomodify theDPBstatusby issuing theDPBSet (programmed to “0”) orDPBClear(erasedto“1”)commands,thenplacingeachsectorintheprotectedorunprotectedstateseperately.AftertheDPBClearcommandisissued(erasedto“1”),thesectormaybemodifieddependingontheSPBstateofthatsector

Whenthepartsarefirstshipped,theSPBsarecleared(erasedto“1”)anduponpoweruporreset,theDPBscanbesetorcleareddependingupontheorderingoptionchosen.

36P/N:PM1494 REV. 1.0, AUG. 28, 2009


2.3 Temporary Un-protect Solid write protect bit (USPB)TemporaryUn-protectSolidwriteProtectBits are volatile andunique for each sector and canbe individuallymodified.By issuing theUSPBSetorClearcommandsequences, theUSPBsareset (programmedto“0”)orcleared(erasedto“1”),thusmaskeachsector'ssolidwriteprotectbitproperty.ThisfeatureallowssoftwaretotempunprotectwriteprotectsectorsdespiteofSPB'spropertywhenDPBsarecleared.

Notes:1.TheUSPBscanbeset(programmedto“0”)orcleared(erasedto“1”)asoftenasneeded.TheUSPBsarecleared(all1s)uponpowerup.Hardwareresetwon”tchangeUSPBs/DPBsstatus.ThesectorsSPBswouldbeineffectivestateafterpowerupischosen.

2.However, ifthereisaneedtowriteasolidprotectbitprotectsectorstatus,userdon'thavetoclearallSPBbits.TheyjustusesoftwaretosetcorrespondingUSPBto0,whichguaranteesthatcorrespondingDPBstatusisclear,andoriginalsolidprotectbitprotectedsectorscanbetemporarywritten.

3.USPBstatuscouldbechangeddespiteofSPBLKstatus.

Q6 Toggle ?

Q6 Toggle ?

Q5 = 1 ?

NO

NO

YES

NO

NO

SPB command set entry

Program SPB

Read Q7~Q0Twice

Read Q7~Q0Twice

Read Q7~Q0Twice

YES

YES

YES

Wait 500 s

Program Fail Write Reset CMD

Pass

Q0='1' (Erase)

'0' (Program)

SPB command set Exit

Note:SPBprogram/erasestatuspollingflowchart:checkQ6toggle,whenQ6stoptoggle,thereadstatusis00H/01H(00Hforprogram/01Hforerase),otherwisethestatusis“fail”and“exit”.

SPB Program Algorithm :

37P/N:PM1494 REV. 1.0, AUG. 28, 2009


4. Password Protection Method

ThesecuritylevelofPasswordProtectionMethodishigherthentheSolidprotectionmode.The64bitpasswordisrequestedbeforemodifySPBlockbitstatus.Whendeviceisunderpasswordprotectionmode,theSPBlockbitisset“0”,afterapower-upcycleorResetCommand.

AcorrectpasswordisrequiredforpasswordUnlockcommand,tounlocktheSPBlockbit.Await2usisnecessaryto unlocked thedeviceafter valid password is given.After that, theSPBbits are allows to be changed.ThePasswordUnlockcommandareissuedslowerthen2μseverytime,.topreventhackerfromtryingallthe64-bitpasswordcombinations.

Toplace thedevice in passwordprotectionmode, a fewmore stepsare required.First, prior to entering thepasswordprotectionmode, it is necessary to set a 64-bit password to verify it.Password verification is onlyallowedduringthepasswordprogrammingoperation.Second,thepasswordprotectionmodeisthenactivatedbyprogramming thepassword thePasswordProtectionModeLockBit to”0”.Thisoperation isnot reversible.Oncethebit isprogrammed, itcannotbeerased,andthedeviceremainspermanently inpasswordprotectionmode, and the64-bit password canneither be retrievednor reprogrammed.Moreover, all commands to theaddresswherethepasswordisstoredaredisabled.

Thepasswordisall“1”swhenshippedfromthefactory,itisonlycapabletoprogramming"0"sunderpasswordprogramcommand.All64-bitpasswordcombinationsarevalidasapassword.Nospecialaddress is requiredforprogramming thepassword. Inorder topreventaccess, thePasswordModeLockingBitmustbesetafterthePassword isprogrammedandverified.OncethePasswordModeLockBit isset,preventsreading64-bitspasswordonthedatabusandanyfuturemodification.Thereisnomeanstoverifywhatthepasswordisafteritisset.

Entrycommandsequencewillcausethereadandwriteoperationtobedisabledfornormalsectoruntilthismodeexits.Oncesectorunderprotectedstatus,devicewillignorestheprogram/erasecommand,enablestatuspollingandreturnstoreadmodewithoutcontentschange.TheDPB,SPB,USPBandSPBlockbitstatusofeachsectorcanbeverifiedbyissuestatusreadcommands.

3. Solid Protection Bit Lock Bit

TheSolidProtectionBit LockBit (SPB) is assign to control allSPBstatus. It is a uniqueand volatile.WhenSPB=0 (set),allSPBsare lockedandcannotbechanged.WhenSPB=1 (cleared),allSPBsareunlockandallowstobechanged.

There isno software commandsequence requested tounlocks thisbit, unless thedevice is in thepasswordprotectionmode.TocleartheSPBlockbit,justtakethedevicethroughahardwareresetorapower-upcycle.Inordertopreventmoified,theSPBLockBitmustbeset(SPB=0)afterallSPBsaresettingthedesiredstatus.

38P/N:PM1494 REV. 1.0, AUG. 28, 2009


Sector Protection Status TableProtection Bit Status

Sector StatusDPB SPBLK SPB USPBclear clear clear clear unprotect,DPB/SPB/USPBarechangeableclear clear clear set unprotect,DPB/SPB/USPBarechangeableclear clear set clear protect,DPB/SPB/USPBarechangeableclear clear set set unprotect,DPB/SPB/USPBarechangeableclear set clear clear unprotect,DPB/USPBarechangeableclear set clear set unprotect,DPB/USPBarechangeableclear set set clear protect,DPB/USPBarechangeableclear set set set unprotect,DPB/USPBarechangeableset clear clear clear protect,DPB/SPB/USPBarechangeableset clear clear set protect,DPB/SPB/USPBarechangeableset clear set clear protect,DPB/SPB/USPBarechangeableset clear set set protect,DPB/SPB/USPBarechangeableset set clear clear protect,DPB/USPBarechangeableset set clear set protect,DPB/USPBarechangeableset set set clear protect,DPB/USPBarechangeableset set set set protect,DPB/USPBarechangeable

39P/N:PM1494 REV. 1.0, AUG. 28, 2009


Secured Silicon Sector Address Range Standard Factory Locked Express Flash

Factory Locked Customer Lockable

000000h-000007h ESN ESNorDeterminedbyCustomer DeterminedbyCustomer

000008h-00007Fh Unavailable DeterminedbyCustomer

Customer Lockable: Security Sector NOT Programmed or Protected at the Factory

Whenthesecurityfeatureisnotrequired,thesecurityregioncanactasanextramemoryspace.

Securitysiliconsectorcanalsobeprotectedbytwomethods.Notethatoncethesecuritysiliconsector ispro-tected,thereisnowaytounprotectthesecuritysiliconsectorandthecontentofitcannolongerbealtered.

Afterthesecuritysiliconislockedandverified,systemmustwriteExitSecuritySectorRegion,gothroughapow-ercycle,orissueahardwareresettoreturnthedevicetoreadnormalarraymode.

SECURITY SECTOR FLASH MEMORY REGION

TheSecuritySectorregionisanextraOTPmemoryspaceof128wordsin length.Thesecuritysectorcanbelockeduponshippingfromfactory,oritcanbelockedbycustomeraftershipping.CustomercanissueSecuritySectorFactoryProtectVerifyand/orSecuritySectorProtectVerifytoquerythelockstatusofthedevice.

In factory-lockeddevice,securitysectorregion isprotectedwhenshippedfromfactoryandthesecuritysiliconsectorindicatorbit,Q7(atAutoslectaddress03h)issetto"1".Incustomerlockabledevice,securitysectorre-gionisunprotectedwhenshippedfromfactoryandthesecuritysiliconindicatorbitissetto"0".

Factory Locked: Security Sector Programmed and Protected at the Factory

Inafactorylockeddevice,theSecuritySectorispermanentlylockedbeforeshippingfromthefactory.Thede-vicewillhavea16-byte(8-word)ESNinthesecurityregion.

Security Sector Address for MX29GL640ET device

Security Sector Address for MX29GL640EB device

Security Sector Address for MX29GL640E H/L device



3FFF80h-3FFF87h ESN ESNorDeterminedbyCustomer DeterminedbyCustomer

3FFF88h-3FFFFFh Unavailable DeterminedbyCustomer



000000h-000007h ESN ESNorDeterminedbyCustomer DeterminedbyCustomer

000008h-00007Fh Unavailable DeterminedbyCustomer

40P/N:PM1494 REV. 1.0, AUG. 28, 2009


TABLE 3. COMMAND DEFINITIONS

WA=WriteAddressWD=WriteDataSA=SectorAddressN=WordCountWBL=WriteBufferLocationPWD=PasswordPWDn=Passwordword0,word1,wordnID1/ID2/ID3:RefertoTable2-2fordetailIDofeachdevice.

Comm-and

ReadMode

ResetMode

AutomaticSelect SecuritySectorRegion

ExitSecuritySectorSiliconID DeviceID FactoryProtect

VerifySectorProtectVerify

Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte1stBusCycle

Addr Addr XXX 555 AAA 555 AAA 555 AAA 555 AAA 555 AAA 555 AAAData Data F0 AA AA AA AA AA AA AA AA AA AA AA AA

2ndBusCycle

Addr 2AA 555 2AA 555 2AA 555 2AA 555 2AA 555 2AA 555Data 55 55 55 55 55 55 55 55 55 55 55 55

3rdBusCycle

Addr 555 AAA 555 AAA 555 AAA 555 AAA 555 AAA 555 AAAData 90 90 90 90 90 90 90 90 88 88 90 90

4thBusCycle

Addr X00 X00 X01 X02 X03 X06 (Sector)X02

(Sector)X04 XXX XXX

Data C2h C2h ID1 ID1 9A/1A(H)8A/0A(L) 00/01 00/01 00 00

5thBusCycle

Addr X0E X1CData ID2 ID2

6thBusCycle

Addr X0F X1EData ID3 ID3

Comm-and

ProgramWritetoBuffer

Program

WritetoBuffer

ProgramAbortReset

WritetoBuffer

Programconfirm

ChipErase SectorErase CFIRead

Program/Erase

Suspend

Program/EraseResume

Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte

1stBusCycle

Addr 555 AAA 555 AAA 555 AAA SA SA 555 AAA 555 AAA 55 AA xxx xxx xxx xxxData AA AA AA AA AA AA 29 29 AA AA AA AA 98 98 B0 B0 30 30

2ndBusCycle

Addr 2AA 555 2AA 555 2AA 555 2AA 555 2AA 555Data 55 55 55 55 55 55 55 55 55 55

3rdBusCycle

Addr 555 AAA SA SA 555 AAA 555 AAA 555 AAAData A0 A0 25 25 F0 F0 80 80 80 80

4thBusCycle

Addr Addr Addr SA SA 555 AAA 555 AAAData Data Data N-1 N-1 AA AA AA AA

5thBusCycle

Addr WA WA 2AA 555 2AA 555Data WD WD 55 55 55 55

6thBusCycle

Addr WBL WBL 555 AAA Sec-tor

Sec-tor

Data WD WD 10 10 30 30

41P/N:PM1494 REV. 1.0, AUG. 28, 2009


Command

DeepPowerDown PasswordProtection

Enter ExitPassword

CommandSetEntry

PasswordProgram

PasswordRead

PasswordUnlock

PasswordCommandSet

ExitWord Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte

1stBusCycle

Addr 555 AAA XXX XXX 555 AAA XXX XXX X00 X00 00 00 XXX XXXData AA AA AB AB AA AA A0 A0 PWD0 PWD0 25 25 90 90

2ndBusCycle

Addr 2AA 555 2AA 555 PWA PWA X01 X01 00 00 XXX XXXData 55 55 55 55 PWD PWD PWD1 PWD1 03 03 00 00

3rdBusCycle

Addr XXX XXX 555 AAA X02 X02 X00 X00Data B9 B9 60 60 PWD2 PWD2 PWD0 PWD0

4thBusCycle

Addr X03 X03 X01 X01Data PWD3 PWD3 PWD1 PWD1

5thBusCycle

Addr X04 X02 X02Data PWD4 PWD2 PWD2

6thBusCycle

Addr X05 X03 X03Data PWD5 PWD3 PWD3

7thBusCycle

Addr X06 00 X04Data PWD6 29 PWD4

8thBusCycle

Addr X07 X05Data PWD7 PWD5

9thBusCycle

Addr X06Data PWD6

10thBusCycle

Addr X07Data PWD7

11thBusCycle

Addr 00Data 29

42P/N:PM1494 REV. 1.0, AUG. 28, 2009


Command

LockRegister GlobalNon-Volatile

LockregisterCommandSetEntry

Program ReadLockregisterCommandSetExit

SPBCommandSetEntry

SPBProgram

AllSPBErase

SPBStatusRead

Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte1stBusCycle

Addr 555 AAA XXX XXX XXX XXX XXX XXX 555 AAA XXX XXX XXX XXX SA SAData AA AA A0 A0 DATA DATA 90 90 AA AA A0 A0 80 80 00/01 00/01

2ndBusCycle

Addr 2AA 555 XXX XXX XXX XXX 2AA 555 SA SA 00 00Data 55 55 Data Data 00 00 55 55 00 00 30 30

3rdBusCycle

Addr 555 AAA 555 AAA Data 40 40 C0 C0

4thBusCycle

AddrData

5thBusCycle

AddrData

Command

GlobalNon-Volatile GlobalVolatileFreeze Volatile

SPBCommandSetExit

SPBLockCommandSetEntry

SPBLockSet

SPBLockStatusRead

SPBLockCommandSetExit

DPBCommandSetEntry

DPBSet DPBClear

Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte1stBusCycle

Addr XXX XXX 555 AAA XXX XXX XXX XXX XXX XXX 555 AAA XXX XXX XXX XXXData 90 90 AA AA A0 A0 00/01 00/01 90 90 AA AA A0 A0 A0 A0

2ndBusCycle

Addr XXX XXX 2AA 555 XXX XXX XXX XXX 2AA 555 SA SA SA SAData 00 00 55 55 00 00 00 00 55 55 00 00 01 01

3rdBusCycle

Addr 555 AAA 555 AAA Data 50 50 E0 E0

4thBusCycle

AddrData

5thBusCycle

AddrData

Command

Volatile

DPBStatusRead

DPBCommandSetExit

Word Byte Word Byte1stBusCycle

Addr SA SA XXX XXXData 00/01 00/01 90 90

2ndBusCycle

Addr XXX XXXData 00 00

3rdBusCycle

AddrData

4thBusCycle

AddrData

5thBusCycle

AddrData

Notes:*Itisnotrecommendedtoadoptanyothercodenotinthecommanddefinitiontablewhichwillpotentiallyenterthehiddenmode.*FortheSPBLockandDPBStatusRead"00"meanslock(protect),"01"meansunlock(unprotect).

43P/N:PM1494 REV. 1.0, AUG. 28, 2009


Table 4-1. CFI mode: Identification Data Values(Allvaluesinthesetablesareinhexadecimal)

Table 4-2. CFI mode: System Interface Data Values

COMMON FLASH MEMORY INTERFACE (CFI) MODE

QUERY COMMAND AND COMMAND FLASH MEMORY INTERFACE (CFI) MODE

Thedevice featuresCFImode.Host systemcan retrieve theoperating characteristics, structureand vendor-specified informationsuchas identifying information,memorysize,byte/wordconfiguration,operatingvoltagesandtiming informationof thisdevicebyCFImode. If thesystemwritestheCFIQuerycommand"98h", toad-dress"55h"/"AAh"(dependingonWord/Bytemode),thedevicewillentertheCFIQueryMode,anytimethede-viceisreadytoreadarraydata.ThesystemcanreadCFIinformationattheaddressesgiveninTable4.

OnceuserentersCFIquerymode,usercan issue resetcommand toexitCFImodeand return to readarraymode.

DescriptionAddress (h) (Word Mode)

Address (h)(Byte Mode)

Data (h)

Vccsupplyminimumprogram/erasevoltage 1B 36 0027Vccsupplymaximumprogram/erasevoltage 1C 38 0036VPPsupplyminimumprogram/erasevoltage 1D 3A 0000VPPsupplymaximumprogram/erasevoltage 1E 3C 0000Typicaltimeoutpersingleword/bytewrite,2nus 1F 3E 0003Typicaltimeoutformaximum-sizebufferwrite,2nus(00h,notsupport)

20 40 0006

Typicaltimeoutperindividualblockerase,2nms 21 42 0009Typicaltimeoutforfullchiperase,2nms(00h,notsupport) 22 44 0013Maximumtimeoutforword/bytewrite,2ntimestypical 23 46 0003Maximumtimeoutforbufferwrite,2ntimestypical 24 48 0005Maximumtimeoutperindividualblockerase,2ntimestypical 25 4A 0003Maximumtimeoutforchiperase,2ntimestypical(00h,notsupport)

26 4C 0002



Data (h)

Query-uniqueASCIIstring"QRY"10 20 005111 22 005212 24 0059

PrimaryvendorcommandsetandcontrolinterfaceIDcode 13 26 000214 28 0000

Addressforprimaryalgorithmextendedquerytable 15 2A 004016 2C 0000

AlternatevendorcommandsetandcontrolinterfaceIDcode 17 2E 000018 30 0000

Addressforalternatealgorithmextendedquerytable 19 32 00001A 34 0000

44P/N:PM1494 REV. 1.0, AUG. 28, 2009


Table 4-3. CFI mode: Device Geometry Data Values



Data (h)

Devicesize=2ninnumberofbytes(17=64Mb) 27 4E 0017

Flashdeviceinterfacedescription(02=asynchronousx8/x16)28 50 000229 52 0000

Maximumnumberofbytesinbufferwrite=2n(00h,notsupport)2A 54 00052B 56 0000

Numberoferaseregionswithindevice29GL640ET/B=02(bootdevice)29GL640EH/L=01(uniformdevice)

2C 58 00XX

IndexforEraseBankArea1:[2E,2D]=#ofsame-sizesectorsinregion1-1[30,2F]=sectorsizeinmultiplesof256-bytes29GL640ET/B=0007,0000,0020,000029GL640EH/L=007F,0000,0000,0001

2D 5A 00XX2E 5C 0000

2F 5E 00XX

30 60 00XX

IndexforEraseBankArea229GL640ET/B=007E,0000,0000,000129GL640EH/L=0000,0000,0000,0000

31 62 00XX32 64 000033 66 000034 68 00XX

IndexforEraseBankArea3

35 6A 000036 6C 000037 6E 000038 70 0000

IndexforEraseBankArea4

39 72 00003A 74 00003B 76 00003C 78 0000

45P/N:PM1494 REV. 1.0, AUG. 28, 2009


Table 4-4. CFI mode: Primary Vendor-Specific Extended Query Data Values



Data (h)

Query-Primaryextendedtable,uniqueASCIIstring,PRI40 80 005041 82 005242 84 0049

Majorversionnumber,ASCII 43 86 0031Minorversionnumber,ASCII 44 88 0033Unlockrecognizesaddress(Bits1-0)0=recognize,1=don'trecognizeProcessTechnology(Bits7-2)0101b=110ns

45 8A 0014

Erasesuspend(2=tobothreadandprogram) 46 8C 0002Sectorprotect(N=#ofsectors/group) 47 8E 0001Temporarysectorunprotect(1=supported) 48 90 0000Sectorprotect/Chipunprotectscheme 49 92 0008SimultaneousR/Woperation(0=notsupported) 4A 94 0000Burstmode(0=notsupported) 4B 96 0000Pagemode(0=notsupported,01=4wordpage,02=8wordpage) 4C 98 0002

MinimumACC(acceleration)supply(0=notsupported),[D7:D4]forvolt,[D3:D0]for100mV 4D 9A 0095

MaximumACC(acceleration)supply(0=notsupported),[D7:D4]forvolt,[D3:D0]for100mV 4E 9C 00A5

WP#ProtectionFlag29GL640EB=02(BottomBootSectorsWP#Protect)29GL640ET=03(TopBootSectorsWP#Protect)29GL640EL=04(UniformSectorsBottomWP#Protect)29GL640EH=05(UniformSectorsTopWP#Protect)

4F 9E 00XX

ProgramSuspend(0=notsupported,1=supported) 50 A0 0001

46P/N:PM1494 REV. 1.0, AUG. 28, 2009


ABSOLUTE MAXIMUM STRESS RATINGS

OPERATING TEMPERATURE AND VOLTAGE

ELECTRICAL CHARACTERISTICS

SurroundingTemperaturewithBias -65°Cto+125°CStorageTemperature -65°Cto+150°C

VoltageRange

VCC -0.5Vto+4.0V

VI/O -0.5Vto+4.0V

A9,WP#/ACC -0.5Vto+10.5VTheotherpins. -0.5VtoVcc+0.5V

OutputShortCircuitCurrent(lessthanonesecond) 200mA

Industrial (I) Grade SurroundingTemperature(TA ) -40°Cto+85°C

VCC Supply VoltagesFullVCC range +2.7Vto3.6VVI/Orange +2.7Vto3.6V

NOTICE:1.Stressesgreater than those listedunderABSOLUTEMAXIMUMRATINGSmaycausepermanentdamagetothedevice.Thisisstressratingonlyandfunctionaloperationalsectionsofthisspecificationisnotimplied.Exposuretoabsolutemaximumratingconditionsforextendedperiodmayaffectreliability.

2.Specificationscontainedwithinthefollowingtablesaresubjecttochange.3.Duringvoltagetransitions,allpinsmayovershootVssto-2.0VandVccto+2.0Vforperiodsupto20ns,seebelowFigure.

Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform

Vss

Vss - 2.0V

20ns 20ns

20ns

Vcc + 2.0V

Vcc

20ns 20ns

20ns

47P/N:PM1494 REV. 1.0, AUG. 28, 2009


DC CHARACTERISTICSSymbol Description Min Typ Max Remark

Iilk InputLeak ±2.0uA

Iilk9 A9Leak 35uA A9=10.5V

Iolk OutputLeak ±1.0uA

Icr1 ReadCurrent

6mA 20mACE#=Vil,OE#=Vih,Vcc=Vccmax;f=1MHz,ByteMode

30mA 50mACE#=Vil,OE#=Vih,Vcc=Vccmax;f=5MHz,ByteMode

60mA 100mACE#=Vil,OE#=Vih,Vcc=Vccmax;f=10MHz

Icr2 VCCPageReadCurrent



Iio VIOnon-activecurrent 0.2mA 10mA

Icw WriteCurrent 26mA 30mA CE#=Vil,OE#=Vih,WE#=Vil

Isb StandbyCurrent 30uA 100uA Vcc=Vccmax,otherpindisable

Isbr ResetCurrent 30uA 100uAVcc=Vccmax,RESET#enable,otherpindisable

Isbs SleepModeCurrent 30uA 100uA

Idpd Vccdeeppowerdowncurrent 10uA

Icp1 AcceleratedPgmCurrent,WP#/Accpin(Word/Byte) 5mA 10mA CE#=Vil,OE#=Vih

Icp2 AcceleratedPgmCurrent,Vccpin,(Word/Byte) 20mA 30mA CE#=Vil,OE#=Vih

Vil InputLowVoltage -0.1V 0.3xVI/OVih InputHighVoltage 0.7xVI/O VI/O+0.3V

Vhv VeryHighVoltageforAutoSelect/AcceleratedProgram 9.5V 10.5V

Vol OutputLowVoltage 0.45V Iol=100uA

Voh1 OuputHighVoltage 0.85xVI/O Ioh=-100uA

Vlko LowVccLock-outvoltage 2.3V 2.5V

Note:Sleepmodeenablesthelowerpowerwhenaddressremainstablefortaa+30ns.

48P/N:PM1494 REV. 1.0, AUG. 28, 2009


SWITCHING TEST CIRCUITS

SWITCHING TEST WAVEFORMS

TestConditionOutputLoadCapacitance,CL:1TTLgate,30pFRise/FallTimes:5nsInputPulselevels:0.0~VI/OIn/Outreferencelevels:0.5VI/O

Test Points

VI/O

VI/O / 2VI/O / 2

0.0VOUTPUTINPUT

DEVICE UNDERTEST

CL

3.3V

6.2KΩ

2.7KΩ

49P/N:PM1494 REV. 1.0, AUG. 28, 2009


AC CHARACTERISTICS

Symbol Description29GL640E

(VCC=2.7V~3.6V) UnitMin. Typ. Max.

Taa Validdataoutputafteraddress 90 nsTpa Pageaccesstime 25 nsTce ValiddataoutputafterCE#low 90 nsToe ValiddataoutputafterOE#low 25 nsTdf DataoutputfloatingafterOE#high 20 nsTsrw Latencybetweenreadandwriteoperation(Note) 35 ns

Toh Outputholdtimefromtheearliestrisingedgeofaddress,CE#,OE# 0 ns

Trc Readperiodtime 90 nsTwc Writeperiodtime 90 nsTcwc Commandwriteperiodtime 90 nsTas Addresssetuptime 0 nsTah Addressholdtime 45 nsTds Datasetuptime 30 nsTdh Dataholdtime 0 nsTvcs Vccsetuptime 500 usTcs ChipenableSetuptime 0 nsTch Chipenableholdtime 0 nsToes Outputenablesetuptime 0 ns

Toeh OutputenableholdtimeRead 0 nsToggle&Data#Polling 10 ns

Tws WE#setuptime 0 nsTwh WE#holdtime 0 nsTcepw CE#pulsewidth 35 nsTcepwh CE#pulsewidthhigh 30 nsTwp WE#pulsewidth 35 nsTwph WE#pulsewidthhigh 30 nsTbusy Program/EraseactivetimebyRY/BY# 90 nsTghwl Readrecovertimebeforewrite 0 nsTghel Readrecovertimebeforewrite 0 ns

Twhwh1 ProgramoperationByte 11 usWord 11 us

Twhwh1 Accprogramoperation(Word/Byte) 11 usTwhwh2 Sectoreraseoperation 0.6 5 secTbal Sectoraddholdtime 50 usTrdp Releasefromdeeppowerdownmode 200 us

Note:Not100%tested.

50P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 1. COMMAND WRITE OPERATION

Addresses

CE#

OE#

WE#

DIN

Tds

Tah

Data

Tdh

Tcs Tch

Tcwc

TwphTwpToes

Tas

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

VA

VA: Valid Address

51P/N:PM1494 REV. 1.0, AUG. 28, 2009


READ/RESET OPERATION

Figure 2. READ TIMING WAVEFORMS

Addresses

CE#

OE#

Taa

WE#

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Voh

Vol

HIGH Z HIGH ZDATA Valid

ToeToeh Tdf

Tce

Trc

Outputs

Toh

ADD Valid

52P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 3. RESET# TIMING WAVEFORM

Trh

Trb1

Trp2

Trp1

Tready2

Tready1

RY/BY#

CE#, OE#

RESET#

Reset Timing NOT during Automatic Algorithms

Reset Timing during Automatic Algorithms

RY/BY#

CE#, OE#

Trb2

WE#

RESET#

AC CHARACTERISTICS

Item Description Setup Speed UnitTrp1 RESET#PulseWidth(DuringAutomaticAlgorithms) MIN 10 us

Trp2 RESET#PulseWidth(NOTDuringAutomaticAlgorithms) MIN 500 ns

Trh RESET#HighTimeBeforeRead MIN 200 ns

Trb1 RY/BY#RecoveryTime(toCE#,OE#golow) MIN 0 ns

Trb2 RY/BY#RecoveryTime(toWE#golow) MIN 50 ns

Tready1 RESET#PINLow(DuringAutomaticAlgorithms)toReadorWrite MAX 20 us

Tready2 RESET#PINLow(NOTDuringAutomaticAlgorithms)toReadorWrite MAX 500 ns

53P/N:PM1494 REV. 1.0, AUG. 28, 2009


ERASE/PROGRAM OPERATION

Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM

Twc

Address

OE#

CE#

55h

2AAh 555h

10h

InProgress Complete

VA VA

Tas Tah

Tghwl

Tch

Twp

Tds Tdh

Twhwh2

Read StatusLast 2 Erase Command Cycle

Tbusy Trb

Tcs TwphWE#

Data

RY/BY#

54P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART

START

Write Data AAH Address 555H

Write Data 55H Address 2AAH


Write Data 80H Address 555H

YES

NOData=FFh ?



Data# Polling Algorithm or

Toggle Bit Algorithm

Auto Chip Erase Completed

55P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM

Twc

Address

OE#

CE#

55h

2AAh SectorAddress 1

SectorAddress 0

30h

InProgress Complete

VA VA

30h

SectorAddress n

Tas

Tah

Tbal

Tghwl

Tch

Twp

Tds Tdh

Twhwh2

Read Status

Last 2 Erase Command Cycle

TbusyTrb

Tcs TwphWE#

Data

RY/BY#

30h

56P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART

START





Write Data 30H Sector Address


Data# Polling Algorithm or

Toggle Bit Algorithm

Auto Sector Erase Completed

NOLast Sector

to Erase

YES

YES

NOData=FFh

57P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 8. ERASE SUSPEND/RESUME FLOWCHART

START

Write Data B0H

Toggle Bit checking Q6 not toggled

ERASE SUSPEND

YES

NO

Write Data 30H

Continue Erase

Reading or Programming End

Read Array orProgram

AnotherErase Suspend ?

NO

YES

YES

NO

ERASE RESUME

58P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORMS

Figure 10. ACCELERATED PROGRAM TIMING DIAGRAM

Address

OE#

CE#

A0h

555h PA

PD Status DOUT

VA VA

Tas Tah

Tghwl

Tch

Twp

Tds Tdh

Twhwh1

Last 2 Read Status CycleLast 2 Program Command Cycle

TbusyTrb

Tcs TwphWE#

Data

RY/BY#

WP#/ACC

250nS 250nS

Vhv(9.5V ~ 10.5V)

Vil or Vih Vil or Vih

59P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 11. CE# CONTROLLED WRITE TIMING WAVEFORM

Address

OE#

CE#

A0h

555h PA

PD Status DOUT

VA VA

Tas Tah

Tghwl

Tcepw

Tds Tdh

Twhwh1 or Twhwh2

Tbusy

Tcepwh

WE#

Data

RY/BY#

60P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 12. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART

START



Write Program Data/Address

Write Data A0H Address 555H

YES

Read Again Data:Program Data?

YES

Auto Program Completed

Data# Polling Algorithm orToggle Bit Algorithm

next address

Last Word to beProgramed

No

No

61P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 13. SILICON ID READ TIMING WAVEFORM

Taa Taa Taa Taa

Tce

Toe

Toh Toh Toh Toh

Tdf

DATA OUT

Manufacturer ID Device IDCycle 1

Device IDCycle 2

Device IDCycle 3

VhvVihVil

ADDA9

ADD

CE#

A1

OE#

WE#

ADDA0

DATA OUT DATA OUT DATA OUTDATAQ0-Q15

VCC3V

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

A2

Disable

Enable

62P/N:PM1494 REV. 1.0, AUG. 28, 2009


WRITE OPERATION STATUS

Figure 14. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)

Tdf

Tce

Tch

Toe

Toeh

Toh

CE#

OE#

WE#

Q7

Q0-Q6

RY/BY#

Tbusy

Status Data Status Data

Status Data Complement True Valid Data

Taa

Trc

Address VAVA

High Z

High ZValid DataTrue

63P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 15. STATUS POLLING FOR WORD PROGRAM/ERASE

Notes:1.Forprogramming,validaddressmeansprogramaddress.Forerasing,validaddressmeanserasesectorsaddress.2.Q7shouldberecheckedevenQ5="1"becauseQ7maychangesimultaneouslywithQ5.

Read Q7~Q0 at valid address(Note 1)

Read Q7~Q0 at valid address

Start

Q7 = Data# ?

Q5 = 1 ?

Q7 = Data# ?(Note 2)

FAIL Pass

No

No

No

Yes

Yes

Yes

64P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 16. STATUS POLLING FOR WRITE BUFFER PROGRAM

Read Q7~Q0 at last writeaddress (Note 1)

Start

Q7 = Data# ?

Q1=1 ?Only for write

buffer program

Q7 = Data# ?(Note 2)

FAIL Pass

Write Buffer Abort

No

No

No

No

Yes

Yes

Q5=1 ?

Yes

Yes

Read Q7~Q0 at last writeaddress (Note 1)

Notes:1.Forprogramming,validaddressmeansprogramaddress.Forerasing,validaddressmeanserasesectorsaddress.2.Q7shouldberecheckedevenQ5="1"becauseQ7maychangesimultaneouslywithQ5.

65P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 17. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)

Tdf

Tce

Tch

Toe

Toeh

Taa

Trc

Toh

Address

CE#

OE#

WE#

Q6/Q2

RY/BY#

Tbusy

Valid Status

(first read)

Valid Status

(second read) (stops toggling)

Valid Data

VA VAVA

VA : Valid Address

VA

Valid Data

66P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 18. TOGGLE BIT ALGORITHM

Notes:1.Readtogglebittwicetodeterminewhetherornotitistoggling.2.RechecktogglebitbecauseitmaystoptogglingasQ5changesto"1".

Read Q7-Q0 Twice

Q5 = 1?

Read Q7~Q0 Twice

PGM/ERS failWrite Reset CMD PGM/ERS Complete

Q6 Toggle ?

Q6 Toggle ?

NO

(Note 1)

YES

NO

NO

YES

YES

Start

67P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 19. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte mode to word mode)

AC CHARACTERISTICS

WORD/BYTE CONFIGURATION (BYTE#)

Parameter Description Test Setup All Speed Options Unit

Telfl/Telfh CE#toBYTE#fromL/H Max. 5 nsTflqz BYTE#fromLtoOutputHiz Max. 30 nsTfhqv BYTE#fromHtoOutputActive Min. 90 ns

Figure 20. PAGE READ TIMING WAVEFORM

Tfhqv

Telfh

DOUT(Q0-Q7)

DOUT(Q0-Q14)

VA DOUT(Q15)

CE#

OE#

BYTE#

Q0~Q14

Q15/A-1

Amax:A3

(A-1),A0,A1,A2

DATA

CE#/OE#

Note: CE#, OE# are enable. Page size is 8 words in Word mode, 16 bytes in Byte mode. Address are A2~A0 for Word mode, A2~A-1 for Byte mode.

VALID ADD

Data 1 Data 2 Data 3

1'st ADD 2'nd ADD

tpa taa

3'rd ADD

tpa

68P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 21. DEEP POWER DOWN MODE WAVEFORM

CEB

WEB

ADD

DATA

XX

B9

2AA55

tDP

XX (don't care)

AB

Standby mode

AA 55

Deep power down mode

tRDP

Standby mode

ITEM TYP MAXWEBhightoreleasefromdeeppowerdownmode tRDP 100us 200us

WEBhightodeeppowerdownmode tDP 10us 20us

AC CHARACTERISTICS

69P/N:PM1494 REV. 1.0, AUG. 28, 2009


Figure 22. WRITE BUFFER PROGRAM FLOWCHART

Write CMD: Data=AAh, Addr=555h

Write CMD: Data=55h, Addr=2AAh

Write CMD: Data=25h, Addr=SA

SA: Sector Address of to be Programmed page

Write CMD: Data=N-1, Addr=SA

N: Word Count

Write CMD:Data=PGM_data, Addr=PGM_addr

PWC =0?

Write CMD: Data=29h, Addr=SA

Polling Status

Yes

Pass

No

No

Write Buffer Abort

Write reset CMD to return to read Mode

PWC=PWC-1 NoFail

YesWant to Abort ?

Yes

NoNo

Yes

Return to read Mode

Write Abort reset CMD to return to read Mode

Write a different sector address to cause Abort

Yes

70P/N:PM1494 REV. 1.0, AUG. 28, 2009


RECOMMENDED OPERATING CONDITIONS

At Device Power-Up

ACtimingillustratedinFigureAisrecommendedforthesupplyvoltagesandthecontrolsignalsatdevicepower-up.Ifthetiminginthefigureisignored,thedevicemaynotoperatecorrectly.

Figure A. AC Timing at Device Power-Up

Vcc

ADDRESS

CE#

WE#

OE#

DATA

Tvr

TaaTr or Tf Tr or Tf

TceTf

Vcc(min)

GND

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

VohHigh Z

Vol

WP#/ACC

ValidOuput

ValidAddress

Tvcs

Tr

ToeTfTr

Symbol Parameter Min. Max. UnitTvr VccRiseTime 20 500000 us/VTr InputSignalRiseTime 20 us/VTf InputSignalFallTime 20 us/V

Tvcs VccSetupTime 500 us

71P/N:PM1494 REV. 1.0, AUG. 28, 2009


LATCH-UP CHARACTERISTICS

ERASE AND PROGRAMMING PERFORMANCE

PIN CAPACITANCE

Notes:1. Typicalprogramanderasetimesassumethefollowingconditions:25°C,3.0VVCC.Programmingspecifica-

tionsassumecheckboarddatapattern.2.MaximumvaluesaremeasuredatVCC=3.0V,worstcasetemperature.Maximumvaluesarevaliduptoand

including100,000program/erasecycles.3.Erase/ProgramcyclescomplywithJEDECJESD-47E&A117Astandard.4.Exclude00hprogrambeforeeraseoperation.

Parameter Symbol Parameter Description Test Set TYP MAX UNITCIN2 ControlPinCapacitance VIN=0 7.5 9 pFCOUT OutputCapacitance VOUT=0 8.5 12 pFCIN InputCapacitance VIN=0 6 7.5 pF

MIN. MAX.InputVoltagevoltagedifferencewithGNDonWP#/ACCandA9pins -1.0V 10.5VInputVoltagevoltagedifferencewithGNDonallnormalpinsinput -1.0V 1.5VccVccCurrent -100mA +100mAAllpinsincludedexceptVcc.Testconditions:Vcc=3.0V,onepinpertesting

PARAMETER LIMITS UNITSMIN. TYP. (1) MAX. (2)ChipEraseTime 60 150 secSectorEraseTime 0.6 5 sec

ChipProgrammingTime(PageMode) 24 sec

WordProgramTime 11 360 us

TotalWriteBufferTime 100 us

ACCTotalWriteBufferTime 100 us

Erase/ProgramCycles 100,000 Cycles

DATA RETENTIONPARAMETER Condition Min. Max. UNITDataretention 55˚C 20 years

72P/N:PM1494 REV. 1.0, AUG. 28, 2009


ORDERING INFORMATION

PART NO. ACCESS TIME (ns) PACKAGE RemarkMX29GL640ETTI-90G 90ns 48PinTSOP Pb-free

MX29GL640EBTI-90G 90ns 48PinTSOP Pb-free

MX29GL640ETXEI-90G 90ns 48BallLFBGA Pb-free

MX29GL640EBXEI-90G 90ns 48BallLFBGA Pb-free

MX29GL640E T/B

PART NO. ACCESS TIME (ns) PACKAGE RemarkMX29GL640EHT2I-90G 90ns 56PinTSOP Pb-free

MX29GL640ELT2I-90G 90ns 56PinTSOP Pb-free

MX29GL640EHXFI-90G 90ns 64LFBGA Pb-free

MX29GL640ELXFI-90G 90ns 64LFBGA Pb-free

MX29GL640E H/L

73P/N:PM1494 REV. 1.0, AUG. 28, 2009


PART NAME DESCRIPTION

MX 29 GL 90E H T2 I GOPTION:G: Lead-free with Vcc: 2.7V~3.6V

SPEED:90: 90ns

TEMPERATURE RANGE:I: Industrial (-40° C to 85° C)

PACKAGE:

BOOT BLOCK TYPE:T: Top BootB: Bottom BootH: Highest Address Sector ProtectedL: Lowest Address Sector Protected

REVISION:E

DENSITY & MODE:640: 64Mb with x8/x16 Architecture

GL: 3V Page ModeTYPE:

DEVICE:29:Flash

640

T: 48-TSOPT2: 56-TSOPXE: LFBGA (6mm x 8mm)XF: LFBGA (11mm x 13mm)

74P/N:PM1494 REV. 1.0, AUG. 28, 2009


PACKAGE INFORMATION

75P/N:PM1494 REV. 1.0, AUG. 28, 2009


76P/N:PM1494 REV. 1.0, AUG. 28, 2009


77P/N:PM1494 REV. 1.0, AUG. 28, 2009


78P/N:PM1494 REV. 1.0, AUG. 28, 2009


REVISION HISTORY

Revision No. Description Page Date1.0 1.ModifiedCFIdescriptions P44~45 AUG/28/2009 2.Removed"Preliminary"title P2

79

MACRONIX INTERNATIONAL CO., LTD.

Macronix Offices : Taiwan Headquarters, FAB2 Macronix, International Co., Ltd. 16, Li-Hsin Road, Science Park, Hsinchu, Taiwan, R.O.C. Tel: +886-3-5786688 Fax: +886-3-5632888

Taipei Office Macronix, International Co., Ltd. 19F, 4, Min-Chuan E. Road, Sec. 3, Taipei, Taiwan, R.O.C. Tel: +886-2-2509-3300 Fax: +886-2-2509-2200

Macronix Offices : China Macronix (Hong Kong) Co., Limited. 702-703, 7/F, Building 9, Hong Kong Science Park, 5 Science Park West Avenue, Sha Tin, N.T. Tel: +86-852-2607-4289 Fax: +86-852-2607-4229

Macronix (Hong Kong) Co., Limited, SuZhou Office No.5, XingHai Rd, SuZhou Industrial Park, SuZhou China 215021 Tel: +86-512-62580888 Ext: 3300 Fax: +86-512-62586799

Macronix (Hong Kong) Co., Limited, Shenzhen Office Room 1401 & 1404, Blcok A, TianAN Hi-Tech PLAZA Tower, Che Gong Miao, FutianDistrict, Shenzhen PRC 518040 Tel: +86-755-83433579 Fax: +86-755-83438078

http : //www.macronix.com

MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.

Macronix Offices : Japan Macronix Asia Limited. NKF Bldg. 5F, 1-2 Higashida-cho, Kawasaki-ku Kawasaki-shi, Kanagawa Pref. 210-0005, Japan Tel: +81-44-246-9100 Fax: +81-44-246-9105

Macronix Offices : Korea Macronix Asia Limited. #906, 9F, Kangnam Bldg., 1321-4, Seocho-Dong, Seocho-Ku, 135-070, Seoul, Korea Tel: +82-02-588-6887 Fax: +82-02-588-6828

Macronix Offices : Singapore Macronix Pte. Ltd. 1 Marine Parade Central, #11-03 Parkway Centre, Singapore 449408 Tel: +65-6346-5505 Fax: +65-6348-8096

Macronix Offices : Europe Macronix Europe N.V. Koningin Astridlaan 59, Bus 1 1780 Wemmel Belgium Tel: +32-2-456-8020 Fax: +32-2-456-8021

Macronix Offices : USA Macronix America, Inc. 680 North McCarthy Blvd. Milpitas, CA 95035, U.S.A. Tel: +1-408-262-8887 Fax: +1-408-262-8810


Macronix'sproductsarenotdesigned,manufactured,orintendedforuseforanyhighriskapplicationsinwhichthefailureofasinglecomponentcouldcausedeath,personalinjury,severephysicaldamage,orothersubstan-tialharmtopersonsorproperty,suchas life-supportsystems,high temperatureautomotive,medical,aircraftandmilitaryapplication.Macronixanditssupplierswillnotbeliabletoyouand/oranythirdpartyforanyclaims,injuriesordamagesthatmaybeincurredduetouseofMacronix'sproductsintheprohibitedapplications.

Copyright© Macronix InternationalCo., Ltd. 2009.AllRightsReserved.Macronix,MXIC,MXICLogo,MXLogo, are trademarksor registered trademarksofMacronix InternationalCo.,Ltd.. Thenamesandbrandsofothercompaniesarefor identificationpurposesonlyandmaybeclaimedasthepropertyoftherespectivecompanies.

MX29GL640E T/B, MX29GL640E H/L DATASHEET · MX29GL640E T/B MX29GL640E H/L FEATURES GENERAL FEATURES...

Documents

Transcript of MX29GL640E T/B, MX29GL640E H/L DATASHEET · MX29GL640E T/B MX29GL640E H/L FEATURES GENERAL FEATURES...