IMPLEMENTATION OF 8-BIT

MULTIPLEXER BASED ARRAY

MULTIPLIER

K.SUSHMA(709212142027)

B.GAYATRI(709212142008)

INTRODUCTION

Parallel multiplier

Extension of an array multiplier

One bit of the multiplier and one bit of the

multiplicand are processed in parallel

CIRCUIT DIAGRAM OF 5-BIT MUX-BASED

ARR AY MULTIPLIER

CELL-1 MUX BASED MULTIPLIER

IMPLEMENTATION

DETAILS OF CELL-I

4X1 Multiplexer

Full-Adder

CELL-1I MUX BASED MULTIPLIER

IMPLEMENTATION

DETAILS OF CELL-II

Full-Adder

And gates

TOP MODEL VIEW OF 8-BIT MUX-BASED

ARRAY MULTIPLIER

SIMULATED WAVE FORM FOR 8-BIT

USING XILINX 12.1i

4-BIT MUX BASED ARRAY MULTIPLIER

MASK LAYOUT USING MICROWIND

LAYOUT EDITOR

SIMULATED OUTPUT WAVE FORM

USING MICROWIND LAYOUT EDITOR

4-BIT MUX-BASED ARRAY

MULTIPLIER MASK LAYOUT USING I/0

PADS

APPLICATIONS

ALU

DSP

High performance algorithms

SCOPE OF EXPANSION

Rectangular form

Using fast adders

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