Muhammad_HCS12

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------------------------------------------------------------------------------------------------------------------------------------------Los siguientes sitios son fuentes de informacin para los microcontroladores de la familia 9s12: www.freescale.com www.s12x.com www.pemicro.com www.9s12.com www.embeddedrelated.com www.technologicalarts.com www.technologicalarts.ca

Familia Freescale 9S12

Libro: HCS12 Microcontroller and Embedded Systems: Using Assembly and C with CodeWarrior www.futureerc.com

Page: ii

LiiJrllr), of Conl:n.,,~ CIIIIII"I:lol: in PulJlil'>lliuol 011111

Malidi. Muhammad Ali. lies 12 m icnxontroller and embedded .yst."TIS' u.ing A.C'rnan Oprn tions Spcfiali~ 1: Laum WC8\"CT Art U;n'dOL Candace RowleyCo\"~ r [)eslgn~r:

Diane lorenzo

Co,.." [n,allt ' D.:;.n llayl eyliStockphQtoDlr~ fOr

of Mln-Nln l:: David Gesell

,\ brketinl: A, ,i,llIn t: Ll's Roberts

This book Wl\S set in Times Roman by Muhammd Ali Mazidi and Danny Causey and WlIS prinl1.. oo lxmnd by R. R. Dl.>nnelly & Sons Company. The co'''' Center.WlL'S

printed by Dellland Production

Copyright Cl 2009 b )' I'oanon Ed uo ation, In c. Upj>tr Sadd le Hi,'er, Now Je r .. ) 074S!1. Pearson Prentice Hall All rights TCSCrvOO. Prillloo in the United States of America. This publication is prot~ted by O;'pyri ght and P"'"mission shou ld b( obta in~d frun 1M publiJlle' prio r to any prohibitw reproduction , ~t(ll1lge in a retrieval system, or ll11nsmission in any form or by any meillts , electronic, med>ani~al, pbotoo;OJlyinW. n:Wnlinll. or lik~wi ...:. For ioformation reJlllniing pY)llrm to the lUlLS'l! rl{ uniflC(J/;Qn of Our pk",et.

- Muhammad All MazM!

I dedicme my pan 10 my fam ily

for the patience and ,llIpporlllrey provided dwing the prodllCtion

(J(lhi.~

book.

Their love he/ped me 10 see this book tlrrough.

- Donny Cow:ey

I,




Page: x

PREFACEProducts using m icropr(lcessors genera lly fall into two calC gories. The first category uses hi sh-perfonna nce m icroprocessors such as the Pent ium in applica-

tions where s),stem perfonuance is critical. We ha ve rul entire book ded ic ated toIhis topic. Ihe 8Ox86 IBM PC wId Compatible CQmpulen, VOlumes J alld II. from

Prentice l-la[ L In the second category of applications. perfonnanc.: is second ary;issues o f cost, space. power. and rapid development are more critic al than raw pro -

cessing power. The mic roproxcssor for Ihis category is often called a microcontroller. T his book is for the second calegoryof app li cations. The HCS I 2 is a wide ly used m icrocontroller. There arc many reasons for thi s. including the legacy o f once popular chip ca lled 68l1 C 11. This book is intended for usc in coll cgo:-lcvd courses leaching microcomT(l llers and em lxddw systems. II not onl y establishe; a foundation o f As>embly language programming. bm also provi des a ~omprchrn sivc b"catm~nt of ]-](5 12 intcrfacin g for engineering student s. Fro m this bad:ground , the des ign and iDlcrfhc ing o f m icrocontrollcr-based cmbooded systems can b~ ~xp lorcd. This boot can also be used by practic ing technicians, hardwafC engin eers, com plllc r scienti st s, 3ntl hobbyists. It is a n ideal sou rcc for those wanting to movc away from 68 HC II to a more powerfu l chip. Prerequisites Readers should ha ve had nn in tmductnry d igital course. Know looge o f Assembly language would be hel pfu l bm is nOl necessary. A lt hough thi s book is wri nen for those with 110 background in Assembly lan gll~ge programmin g, Sllldents with prior Assembly lon guage expe rience will be oble to gain a mastery of HCS 12 architectu re very rapid ly and stan on their projects ri ght away. For the HCS 12 C programming sect ion s of the book, a basic knowledge of C programmin g is requ ired. We use the CodeWurrior compilcr IDE from Freescu1c throughout the book. Th e CodeWamOl compiler is available for free from the Frcesca le website (www.freesca le.com). We enco umge you to use the CodeWumor or some other IDE to simulute and run the progrums in this book.

OverviewA sysk'ffiJtic, step-by-step approach is used to cove r various aspects of HCS 12 C and A ssemb ly languag~ progmnuning and interfa cing. Many exam pl es lmd sample progmms ure given to clari fy the concepts and provi de st udl'l1t~ wi th an opportunity 10 leam by doing. Rev iew questions are provided at the end o f each section to rein force the main points of the set:tion. Chupk,- 0 COveTli n wnbcr sySll'lIl8 (binary, d ecimal ,:md hex). and provilks an introduction to basic logic gates and com pu ter memory. This chapter is designed espec ially for student s, such as mechani ca l engineering studelll s, who have not takell a di gilal logic cou rse or tliose who need to fefresh tlieir memory on (hese: copies. Cliapler I di scu.sses the hisiory o f the HCSI2r9S 12 and features of (lie origina l fami ly members such as the 68 HC I I . It al so prov ides a list of various me mbers of the HCS 12 fam ily.




Page: xi

Chapter 2 di\lCUSSCS tho: in terna l archilo;cturc oflho: HCSI2 and c the

CodeWumOJ compilCJ from Frceswle for Ihis and other C progrums of the HeS 12fami ly th roughout the book. The Code Wurrior is avai labl e for free from the www.frccscalc .comwcbsitc. In Chapter 8 we di Sl;u&~ the h:mlware connect ion o f the HCS I 2 chi p . Chupier 9 describel; the HCS 12 timl-"TS und how to use them as event counChapter 10 is dedicated to seriu l (\;11:1 commun ication ofl he HCS I 2 (lnd ils interfacing to the RS232. 11 also shows HCSI2 communiC3lion wilh COM pons of the x86I BM PC and compal ible computers. Chapter I I provides a detui led d ist"llssion of HCS 12 interrupts wil h many 0 examples on how 1 write inlerrupt hand ler pro grams. Cha.pter 12 >bows HCS I2 interfacing with real -world device~ such as LC Ds and keyboards . Chapter 13 shows HCS12 imerfacin g with rea l-world devices such as OAC chips. AIX' c hips. and >t: fl';OfS. In Chapter 14 we cover how 10 u se HCS 12 Flash ami EEPROM memories for da ta slOrage and explains ho w 10 do page switching in Flash mem o!),. Chapter 15 co vetS the bask interfacing of the HCS I1 chip !O r elays. oplo iso lalors. and stepper motors. Chapter 16 shows how \(l COIUler from base 2, h ilSo: and lowercasc is as simple as changing bit 5 of the ASC II codc.

Review QuestionsI . Why do compi.ners usc the binary number system instead of the rlccimal system~

2. Convert 34 to !O bi nary :md hex. 3. Convert II 0101 2 1ohe .~;mddccimul. 4. Perform binary add ition: 101100 + 10 1. 5. Convert 10 11002 to its 2's comp lemem representat ion. 6. Add 36BII + F6H. 7. Subtract J6D H - F6H. 8. WrilC "SOxS6 CPUs" in its ASCII codc (in hcx form).

8




Page: xiv

SECTION 0.2: DIGITAL PRIMERTh is >cction gi vcs an ovCfview of d igital logic an d design. First, we cover

binary logic operaTions, then we sho\~1 gales that perform these functions. Nc~t. logic gules are put oogclhcTw form simple digitul drcuits. Firmlly, we rover S()mclogic devices commo nly found in microcontro l1cr interfacing.

Binary logicAs ment ion oo earlier. computers use the binary nwnber system because (he two voltage lev els can be representoo as the ( \\"0 digits 0 and I. Signals in d igi tal electronics have t\\"o d istinct voll age levels.. For ex ample. a system may define 0 V as logic 0 and +5 V as logic I. Figure 0-2 sho\\s (hi s system with the bu ilt-in tolerances for variati oru; in the voltage. A valid d igital signa l in ulis examp le should be w ithin either of the two shaded areas.

,-----=-----,-----,

,

L;clusivc-OR produces u 1

l ll'..;icaJ L Hrtu IIInplll O UIP UI

XU

NOTX

10

x ----{>o- NOT XLogical XOR Funct io nIn l!UTS O UII! UT

output i f one (but on ly one) input is I. If both opernnds are 0, the o Ulput is O. Likewise. if both opernmls ure 1, the ou tput is "Iso O. Not ice from the XOR truth tab le , Ihal whenever the two inputs are the same. the output is O. This function can be used to cornpar~ Iwo bils to sec if Iht:y urc the tmmc.NAND and WOR gates

The N AND gule fun~1 ions like un AND gale with an invcncr on the OUTput 11 produces u 0 OUlp .1I when all inputs ure 1; olh(:rwi se, il produces u 10utput. The NOR gale function s li ke un OR galew ilh an inveTlc r on the outpu t. II produ ces 11 1 if all inp uts ure 0; 04hl'Jwisc, it produces a O. NA ND and NOR gates are used extensively in digital design because thl-y ure eu,~y un d ineX sive to rabri cate. An y circu it p(.'l1 that cun be d t."l;;gned with AND. OR, XOR. und INV ERTER gates can be irnpk mented using only NAND and NOR gales. A s imple e.'(am pl e of this is given below. NOliee in NAND, thaI if any input is 0, Ihe outpul is I. Notice in NOR, that if any input is I, the OUlput b O.

XY 00 U1 1U 11

XXOR Y 0

0

IAlglcal NA ND F u n c llo nIUl!u lS O u tl! UI

XV00 0 1 10 11

X NA NDY1 1 1 0

LogiG design using gatesNext we will show a simple logic design to add IWO binary digits. If we add IWO bi nary digi ts Ihe~ are four poss ible outcomes: Logical NOR Funct io n

I nlJU bXY 00 0 1 10 11

O utl)U tXNOR Y 1 0 0 0

CDI'I)'

Sum0 1 0

0+00 +1 1+ 0 1+1 -

0 0

0

10




Page: 11

Notice !hat when we :ldd 1 + 1 we get 0 wit h a cart)' 10 Ih e next higher p13ce. We will need to delCfll1ine the sum ond the cany fO Ihis design. Notice Ihm f the sum column above matches the output for the XOR function, and that the carrycolumn matche s the output for the AND func tion. Figure 0- 3(u) shows II simp le adder illlp lem cnl

l

co'"S2

Full

y, ,\ddtred to identify a prc.:klCllllincd binary address.

SECTION 0.3: SEMICONOUCTOR MEMORYIn this >('Chcn we discuss various types Df scm icon ctuclOr memori es llnd

their characteristics such as caracily, organi zat ion. and access li me. We will a lso

show hoI'.' the memory is connected 10 th e CPU. Before we em ba rk on the subjcct of m emory, it will be helpful to give an OVCfVicw of oomplllCf c rgani7.atioo andrc~;cw

some Icrminology Thai is wirlcly uscd in computeTli tCTallrro.BitNi bble

Some important terminology

o

Rlocall from the d i~l;u ssion above that U bit is u binary d igil lhu l can have the vnluc 0 or I. A byte is defined as 8 bils. A nibble is half a byte. or 4 bils. A word is 11'.'O by l':&, or 16 bits. The display is illlcnded 10 sIlo w the reial ive size of these units. O f course. th ey coul d all b.: composed of any co mbina tion o f reros and ones. A kilobyte is 210 bytes. whi ch is 1.02 4 bytes. The abbreviation K is often used 10 Tepl"csenl kilobytes. A megabyte , or meg lI.~ some call iI, is 220 by le:bows a block: diagram of the internal (lrganizalioll of a computer. The functioll of the CPU is to exe.::U!e (proca; s) informat ion stored in memory. The function of 1/0 devices such as the keyboard and video monitor is to provide ameans of co nullunicaling with the CPU. The CPU is C01Ulel;kd to memory and Ito

through a group of wires calkd a bU!>. The bus inside a computer allows signals to carry in fomtation from place to pia.:.: just as a street allows cars to carry people from place to pl ace. In ev ery computer there are thrtt types of bu~s: address bus, data bus. and control bus. For a device (memory or 110) to be recog ni zed by the CP U. it must be assigned an address. The address assigned to a given devie.: must be unique; no two devices arc allowed to have the same address. Th~ CPU puts the address (in binary, of course) on the address bus, and the dc~oding cir~uitry finds the device. Then the CPU uses the data bus either to get data from that device or to send data to it , Contml bu ses arc u!iCd to provide read or \~Titc signals to the rlcvicc to ind icate if the CPU is asking for information or send ing information. Of the three buses, the add ress bus and the data bus determine the capability of a given CPU.

More about the data busBecause dum buses lITe used w ~nrry in formation in and out of u CPU, the more OOIU buses uvui lub1e, the better th e CPU. If one thinks of duta buses lIS highwny lanes, ir i3 clenr thn! more Inn es provide a better pathwny between the CPU und it s ex temul devices (such a s prin ters, RA M, ROM, etc.; sec Figure 0-9). By the sume token. Ihnl i nc re1L~e in the number o f lanes ;nt-Teases Ihe cost of COI1Slructioo. More OOtu buses menn u more e~pt."Ilsi ve CPU nn ll compult- The averngc ,-. size o f llu!u b u~ in CPUs vunes bctwoc"ll 8 and 64 bi ts. Enrly pt,-wrml compu ters such as App le 2 used an 8-bit data bus, while supL,-compul ers such as Crn)' used a M-bit data bus. Data bu ses ure bi llireClional. bec:Juse the CP U must use them eilhl,- to i'lXeive or to send ruIn. The proocssing po\\'erofu computer is reluted to the size of its buses, bt--.::ausc an 8-bil bus call sell ll out I byte a lime, bu t a I ii-bit bus can seOO out 2 bytes ut a time, which is twice us fust.

More about the address busBecause the aWircss bus is used 10 i!lcllli f)' the devices and memory COIl 14




Page: x

ncrted to the CPU, the more address bits ava ilable, the larger the number of devices that can be ~rld rcsscd_ In other word s, the nllmber of nddress bits for a CPU dctcrmincs the number of locations with which it can communicate. The number of loc ations is ul wuys eqwl to 2-", where x is the nU mbL"f of address lines.

regnrd less of the size of 100 d~m

bu~.

For exu mpJc, 11 CPU with 16 a!ld rl'Ss lines

call provide a lolal of 65.53(; (2 16) or 64K o f addressable memory. Eru,:h [Qemjon call have II ma.'{imwn o f I byte of data. This is b~ause all general-purpose m icroprocessor ( PUs are what is called b)'1e addn!S$abll;!. As another example. the IBM PC AT uses II CPU with 24 address line s and 16 data lincs. Thus , tho: tolal a ccessible memory is 16 tl1('gabytcs (2 24 - 16 mcgabyl CS), In this ex amp le there wcu ld be 224 10000tions. and because each location is one byte, thcs. In this discussion we use SRAM or ROM for the ~ke o f simplicity. Memory chips have one or more pin~ call ed CS (c hip se led ), which must be activated for the menlOl")'S contents to be accessed. So metimes the chip selt is "Iso referred 10 nschip enalJle (C E). In conn l"Cting" memory ehip to lhe C PU,CHA PTER 0; INTRODU C TION TO COMPU TING




Page: xi

notc the following point s. . The data bu s of the C PU is connec ted diT(x:l ly to the data pins o f the memory

chip.

S~

Figu re 0- 16.~nd

2. Control signa ls RD (read) and WR (memory "'rite) fro m the C PU arc conncc t-

ed 10 the OE (outpUt enable)respectively.

WE (wri te cnnblc) pi ns of the memory chi p,

3. In the case o f the add ress bu>.:3A2 Al AO o 0 100 0 0 0 0 000 o 0 o 0

o

o

1

o

1

1

1

1

1

1

1

1

1

(0) The address range for Y7 is 7000H to 7FFF H.

A15 AU A13 A12 All AlO A9 A8 A7 A6 AS A4 0 11 100000000 0 11 1111 1 111 1

o1

A3 A2 At AO

01

o

01

1

Using programmable logic as an address decoderOther widely used de.:oders are progm mmabk logic chips such as PAL, GAL, and FI'GA chips. One d isadvantage of th ese chips is that they ftquire PAUGALlFPGA softwarc and a burner (programmo: r), whereas tho: 74LS D S ne is that they can be progralluncd for any com bination of addrcss ranges, and so they arc much more vcr""li1U. The COll le nl S o f the program cowlier are placed 011 the address bus 10 li nd and fetch the des iroo ins truction.In tile ,,86 micro pfQ(;e5wr. Ihe progra m CO WI1I.-"f is a re gister ca lled IP. or the instruction poimer. 4. The func tion of the instroc/ion decaier is to int erpret the instruction fetched into the CP U. Oll e can thi nk of the instrue lion decoder as a kind of di ctionruy. storin g the meaning o f eac h instruction and what steps the C PU should take u.poIl receiving a g iven instructiOlL Just as a di ctionary rcquirc~ more IXises the more words it defines, a CP U ,apable of Ulldersland ing more in stru,tions requires m ore IraltSistors to des ign.

Internal workings of CPUsTo demonstrate some of the concepts d iscussed above, a step-by-step analysis of the process a would go through to add three numbers is given next. Assume th at all imaginary C PU ha s registers called A, B, C. and D. It has an R-bi t dam bus and a 16-bit addre ss hus. Th ere fnre. the C PU can access memo!)' from addresses 0000 10 FFFFlI ( for a total of I OOOOH location s). The action to be pctformcd by the CP U is to put hexadecimal val ue 21 into register A, and thell add

cru




Page: 31

10 rcg iSlcr A valtles 42H and 12H.

A~SI.Ime

that the code for the CPU to mo ve a

value 10 register A is 1011 0000 (BO and the code fOf adding n value to regi ster H) A is 0000 0100 (04H ). The ncccssnry steps and the code to perform them arc a~ follows.

ActionMove value

Add value 42" Add value 12"

"" ""

i nto register

A

register A register A

Cod. BDe 04" 04"

Data

"" 42"12"

If the pfOI!:mm to perform the action s li sted ab/we is stOTOO in memory locutions stuT1 ing " t 1400H, the followin g would TCPJCSI.Il! the conten ts for each '

memOJY address locati on:Me!mory address 1400 14; 01 1402 1403 1404 1405 1406

Contents of memory addressI BO f coda

121 . "aloe104fcode ( 42)1Ia lue ( 0 4) codc(2)1I& lue

", moving a val ue " '0be moved

registe rre gister

A A A

' 0' ' 0'

'0

" dding

be a dded be adcled h alt

value

'0

register A. After completin g on e instmetioo, the program counter points 1 the oorlress of the next instruction to be exe0 cuted, which in th is case is 1402H. Addre ss 1402 is sent out 011 the address bus to fetch lhe next instruction. 4. From memory location 1402H the C PU fetches cod e 04H. After decoding, the CPU knows lhul it musl lldd the byte siui ng ut the next address (1403) 10 the con tents orregist~.,. A. Aft~.,. the CPU bri ngs the value (in th is case, 42H) in to rcgistcr A. il provides the contents of register A along with this value to theC II Arn: R U: IJl:T ROJ) UCT10 J TO COMPUT ING ' 'I:31




Page: iii

A LU to pcrform the addition. It then tal:cs the result of the add ition from the A LU', outpu t ~ nd puIS il in register A, Meanwhi le the program cou nter becomes 1404, the addrcss of lhe next in struction. 5. Address 140411 is put on the address bus and the rode is fetched into the CPU,

decoded, aM

~ccutcd.

This coOc llgnin is nM ing II \'llJUC 10 regiStCf A. The

program counter is updated to 1406H. 6. Fin ~1 1 y, the contents of add ress 1406 (HALT code) arc fClChcrl in and executed. Th e HA LT in SiruClioo tel ls the C PU to SlOp incrementi ng the program

COUn1C and a.~kin g for the next instruction. Wi thou t the HALT, the CPU would fconti nue updat ing the program coun ter and fetching instroctions. Now suppose that address 1403 H coo tuinoo the vulue 04 in stead of 42 H. HoI\.' wou ld the CPU rl iSiingui sh between data 0 4 to be ndded and code 041 Rl'fTlemberlhat code 04 for this C PU mean s "move the next vul ue inl o rcgiSll."T ,\ " . Therefore. lhe C PU wi ll nm lry 1 det:ode lhe nexl vul ue. 11 simp ly moves lhe con 0 10015 of lhe followi ng mem ory localion in lo rcgislCT A, regard less o f i1S value.

Harvard and von Neumann architecturesE\'ery lllicropmcessor mUSl have me mory space to sl ore program (corle) and data. While cooe provid es instruclions to the CPU. the data prov ides Ihe information 1 be processed. The CPU uses buses (wire Iraces ) Ie acc ess the code ROM 0 and rlata RAM m emory spaces... The early computers used the sam e bus for access ing both the code and data. Such an arch.i tcclure is com monly re ferred 10 as loon NeumiUm (Princelon) architecture. ThaI mea ns for von NeumalUl computers. the process of accessing cooe or data cou ld cause: each 10 get in th e other's way and slowdollTI the processing speed ofthe C l'U. because each harllO wait for the other to fi nish fetching. To spero up the process of program execution. SOllie CP Us use what is called Harvard (U"Chilecrure. The H arvard architecture has scpamle bu>es for the corle and rlata memory. See Figure 0- 20. That means thaI we need four sets of bu scs : {I} a set of rlata buses forcarry ingda la illlo anrl out oftheC l' U. (2 ) a set of add ress buses for accessing the rlala . (3) a set o f dala hu>es for carrying corle into lhe C PU. anrl (4) an arldress bus for accessing !.he code. See f igure 0 -20. This is casy to implement inside an IC chip such as a m icroeontroller wherc both ROM rorle and data RAM arc internal (on-chip) and distances arc on the mic ron and mi llinder ,.. ,.~

,~

MEMORY~

,

--

, , cvc ral computers with their data bus widths. For each comp uter, list tho: maximum value that can be brought into the CPU at a time (in

bOlh hex lind decimal).( a) Apple 2 with an 8-bit data bu s (b) x1l6 PC lI'ilh a l 6-bil data bus (e) d6 PC with a 32-bil cs~(u) 16-bit address bus (in K)

(b) 24-bil addrCs,~ bu s (in mcgs) (e) 32-bil uddret;s bus (in megabytes :md gig:t by tes) (d) 48-bit addrc:;.s bus (in m~'gllbyles, gigu by tcs, and terubylcs)

27. Regarding the dma bus and address bus, which is Imidircctionai and which isb idi ret:lionu l? 28. What is the d iflcn:m:e in capacity between a 4M memory t:hi p and 4 1'0.1 of comp at er mem ory? 29. True or f"1:;e. The more uddress pins, the more memory 10C3tions ure inside the chip. (A ssume that the nwnber of data pins is fixed.) 30. True or fa lsI.'. The more data pin,;. the more each location inside the chip wi ll hold. 3 1. True or false. The morc data pins. the higher the capaci/)' of tile memory chip. 32. True or fa lse. The more data pins and address pins, the gre aler the capacity of lhe memory chip. 33. T he speed of a m emory chip is rcfen L-u 10 as il S".,""=,,,,----,:-:= 34 . True or false. The price of me mory chips varies according 10 capacily and

Spl.-eU.35. T he main advanlage of EEPROM over UV-EPRO M is _ _ _ _ _ __ 36. True or fa lse. SRAt,,] has a larger cdl Sile Ihan DRAM . 37. Which of lhe following . EPROM, DRAM, or SRAM, must be refreshed perio dicall y! 38. W hich memory is used for PC cache'! 39. Wh ich of dIe following, SRAM, UV- E PRO~", NV-RAM. or DRAM. is volati le memory? 40. RA S and CAS a' associa lCd with w hich me mory? (a) EPROM (b)SRAt.! (e) D RAM (d) all of the above 4 t . W hich memory needs an external mU ltip lexer'! (a}EI'RO M (b}SRAt.! (e) DRAM (d) all of the above 42. Find the organi zation and c apacity of memory chips with th e fo llowing pins. (a) EEPROM A{)-AI4, 00-07 (b) UV-EPROM AO-A I2, 00-01 (e) SRAt.! AD- A II, 00-07 (d) SRM! A{)-AI2, 00-07 (e) D RAM AO-A IO, DO (f) SR AM AO-AI2. DO (g) EEPROM AO-A II. 00-07 (h) UV- EPRO M AO-A IO, DO-07 (i) D RM.! AO-A8, OO-D3 (j) DRAM AO-A7, 00-07

CHAPT ER 0: INTR ODUC TION TO CO MP UTING

39




Page: 1

4 3. Find toc c apaci ty. address. and data pins for the following memory organizations _ (a) 16KxS ROM (b) .32KxS ROM (e) 54KxS SRAM (d) 256Kx8 EEPROl\.1 (e) 64Kx8 ROM (f) 64Kx4 DRAM (h) 4r.1x4 DRAAI (8) 11.1x8 SRAM (i) 64Kx8 tN- RAM 01 - DO 44. Fi nd the address ran ge o f the mem ory

design in tho diagram.45. Usin g NAND gates llnd invc ncrs, design decoding circuit ry for the ud llress mn ge 2000H- 2FF FH. 46. Fi nd the rad.lrcs.~ ran ge for YO. Y3, and16Kxa

Y6 of the 74LS 138 for the diagrummed Idesign.

'Diagram lor Problem 44

""";;;--,;;;:>

Desc ribe th e advantlll;cs "r mic,,-"-,o"trollc rs for s ome aplJlka lluns Explain the ronc~'P t of e lllb ~udcd s~tclU S Discuss cri teria for considering II mlcrucno trollcr Explain the varia tions ohlX'ed. p3Ckagin l:, Illctllory. 91111 cost per unit and how Ih~"Sc alTee! dlOosiu l,: II microcon lroll cr Expla in the evolution uf 68u llIicroconlroliers Compare and contrast th e \'arions members of the IICS12 family Gin th e history and features of IICSI219SI2 microco ntroll crs

43




Page: iii

SECTION 1.1: MICROCONTROLlERS AND EMBEDDED PROCESSORSIn thi s section we diSt;Uf;!; the need for miLTOOOnlroll crs and contrast them

with gerH.'ral-purpose

mi~TopTocessors ~t

sud as the Pentium lmd3

OI h lT ~86 m i ~To

processors. We also look

the ro le o f microcom rollers in the embedded Ill:lrket

In add ition. we prov ide some criteria on how co choose

microconU"ollcr.

Microcontroller versus general-purpose m icroprocessorWhal is the difference between a microprocessor and micfoo;onlroller'! By microprocessor we mean the gencral-purposc lllicroproccssor~ such a.r1in g logic un d m(:mory. except fur DRAM. In other words. we huve the entire eompulCr on u single t:hi p. Currently, becuuse o f Linux . MS-DOS. and Windows slUndurdizution. man y embedded systems use x86 PCs. In muny cm;es, using x86 PCs for the hi ghend embedded application s no t only suves money but uloo shortL'1lS developmen t time bei:ausc " vast library of software lllrcad)' exi sls for the Lirmll, DOS, and Windows plut fonns. The fru,1 tl1:.u Windo ws und Linu~ ure wide ly used and we ll -understood platfonns means that developing a Windows-based or Linux based embl:dded product reduces the cost ami sh ortens the development time considerably.

Choosing a microcontrollerThere are five major S-b it mkroeomro llers. They are; FreeS\: ale Semiconductor' s (formerly Motorola) 68 I1 C08/68 I-1C I I/12, Intel's !lOS I, Atme l's AVR, Zi log 's ZS, and PIC from MiHochip Tedmology. Each microo;onlroller has a wlique instruc tioa set and register set; therdore , they are not compati ble with each other. Programs wrinen for one will not nm on the others. There arc also 16bit and J2-bit microcon lroll ers madc by various chip makers. With all theoc differCOlI mi"n:}C("'tro ll e .. s, what uita ia do dlaigne .. ~ con~ide.. in choo~ing onct The three critcria for choosing m icrocontrollers are as fo llows; ( I) mecring the computing nou!'Ces to ensure wide and time ly avail ability of their product!; becuusc thei r products arc stable. mature. and single sourced. In recen t years, companies ha ve begwl to sell Field-Programmahle Gale Arroy (FPGA) and App liclJlio,,Sproci/ic MegrIJled CiICuil (AS IC) libraries for (he di fferen t microcomrolJe rs.

Mechatronics and mlcrocontrollersThe mio;.rocOlllroU is playing a m ajor 10k in a.n e mnging field ..... Ued n

mechatronics. Here is an exc ellent summary of what the field o f meehatronies isall about, taken from the web site of Newcas lle: 'pture the erillmd In!.11"11>':>.',.,. , . , .m~

"M

>"'[1 iOJ .

.. """

c;=:;c=;;

"'-'I.IJl.I:ll~

~I~

I

K=: ......

"Tf"""-ct.LO:Q rt: AA!OI1 ' cen MSI onobled (1(6"" _ 1)_ ...

Flgun: I 3. C PUO Bluck DIM gn m (from Fn", scMI. ) S

-

su

------------------------------------------------------------------------------------------------------------------------------------------Los siguientes sitios son fuentes de informacin para los microcontroladores de la familia 9s12: www.freescale.com www.s12x.com www.pemicro.com www.9s12.com www.embeddedrelated.com www.technologicalarts.com www.technologicalarts.caIIl~O



Page: xiv

IIIDI

" ,",~

Crull

PP.-GE

lSI,.,E el.. 65535 deci (FFFFH ) 5. A value to be loadoo into a register mus t be preceded with a pound sign (II). Otherwise the comma nd will load from a m emory locati on. For example " LDAA $17" means 10 movc into register A the bytc held in memory location 17H, whk h cou ld have any value. In o rder to load the valuc 17H into the (!CW mum tor we mUSl wtite "1DM ' $17"' with the It- preced ing the nwnber.62




Page: x

Notice that the absence of the pound sign will not cause an e rror by the assemb ler since it is ~ valid instruction_ HOII'ever, the result would not be what the programmer int ended. This is a common error for t>cginnin g programmers in

the lIeS ' 2.

ADDA and ADDB instructionsTh e AD DA and ADDB instruction s huve the fol lowing formatADDA s ource ; ADD s o urce opecand to the ace u A ADDB s ource ; ADD sou rce operand to the accu B

The ADDA im lructioo tells the CPU to udd the source byte 1 H.'g i Sll..- A 0 and p llt the result in the dest ination register A. To add two numbers suc h as 25 H and 34H, each call be moved \0 a reg ister and then added together:

LDAA .$2 5LDAB .$34

;load 25H i nto A ;load 34H i nto B;add B to accumulator A (A - A + B)

ABA

Executing the pHlgranl above rewlts in A - 5911 (251-! + ) 411 - 59H ) andil - 341-1. Notice that the content of B docs not change. The re arc al ways many

ways to wrile the sanle program. One qu estioll tha t m ight cOlne to mind a fter looking at the program above. is Whether it is neccssary to move both data items into registers before adding th.;m together. The answer is no. it is not neecssary. Sec Figu re 2-3 . Look m the foll owin g vari ation of the same program:

LOAA '$25 ADDA '$34

; load one operand into A (Az2 5H) ; a dd t he second operand 34H to Ais~

Annthcr vari ati on

LOllB '$25 ADDS ' $34

;l oad one operand into B (S=25H) ; a dd t he second operand 34H to S

In the above cases, whil e one rcg isteJ contained one value, the SCi:ond value followed the instruction as an operand. This is called an imm('di01e operand. See t' igure 2-3 . The exanlp lcs sho wn so far for th e ADD instructi on indi cate Ihat the source operand can be either a relli ster or immed iate data. but the destina tion must always be register A Of B (the accwnuJakm;). In othe r words, an ins truction such 3.'; "ADD 1$25, '$34" is inV'.llid since an accumulator. register A or B. must be in volved in any 8-bil arithmetk operat ion. There are several 16-bit registers in the HCS 1 2 ~ PC (program counter). D. X. y , and SP (stack pointer). The impOl"lance and usc of the program counteJ are covered in Sec tion 2.2. The X and Y registers are used in ac cessing data using index add ress ing mode, which is discussed in Scrtion 2.3. Th e use of the stack poinleJ is discussed in Section 2.8.

Review Questionst. Wri te the instructions to m ove value 34H into register A and value 3FH into register Il. then add them together.

CHAPTER 2~ IICS I2A RCnITECflJRE&A.W \ffiLYI.ANCUACE PROCIU..\IMIN(; ...

63




Page: xi

2. Write the inslruclions to add toc values 16H and CDH. r lacc the re sult in reg ister A. 3. Troc or false. No value can be moved dirced y int o rcgi~tcrs A and B. 4 . What is the largest hex value that can be moved into an 8-bil register? What is

the dccim ~l CllS,aci

FLASH

FL'.SII

,

Extomal Memory

,,''''' WOOCodeRO~l

(Fla.oh)

' WOO'

FEF F

""

Interrupt Vectors

-~~Sin"le-Chip Mode--

Interrupt Vectors

Review Questions1. True or space in the HCS12 is SRAlI.! memory, whereas program(oode) space is of the ROM type_ 2. True or fa lso_ The geneml-purpose RAlI.! and STRs registers arc nmwo latik. 3. True or fa lsc. The larger the siz(l c f RAM space, the more difficult it is lo manage. 4. True or fa lso_ Reg istC1'S A:md B arc not a pan of the register address space_ 5. Th e vast 1l1.1jority of rcgistCfS in the HCS12 arc _ _ -bit 6. The regisll,- spuce in the HC S 12 ulwuys slurts a t address location_ _ _7. True or fa lse. The register space in HCS 12 end s at the same address for every HCS12 fomilymcmber.

SECTION 2.3: THE HCS12 ADDRESSING MODESTh e CPU can access data operands in variO llS ways. The data cou ld be in a registCJ, in memory. or be provided as an inunedia te value. These various ways o f accessing ope rand dua are calk-d addl'f'iiSing modes. In Ihis section we discuss the HCS 12 addIeS.ing modes in the conlext of some examples. TIle vari ous addressin g modes o f a microprocessor are determin~d when it is designed. and there fore c annot be chang~d by IIle programmer. The HCS 12 pro

'"




Page: iv

vides six distinct add ressing mOOe . Th ey arc as follows:( 1) inherent(l) jn~diale

m e;< l('nded

(4) tlirecl (~) relative (6) indc ~oo

Inherent I register addressing modeInherent addressin g mode involves no operand or it u>cs a rcgiSlcr to ho ld the opcrano. The fol lowing arc examples of inhcrcn l/rcgiSlcr addressing modes:

NO P STOP ABA CLRA! NCB INX

; No Operation . ',laste a clock cycle

; stop the program counter; add the contents o f B to contents o f A ; clear register A

;i ncrement register B ;i ncrement reg i ster X

Immediate addressing modeIn im med ia le :lddres~i ng 11'lOdc, the source ope< 1 th

valuol"S use the li nle (ndilin collvention. FreeSl;a!e microproccs!iOl'S use bi gend ialL TIusdifference might seem as tri vial as whether 10 break an q;s from the bi g end or litt le end. but il is a Iluisance in converting software trom one camp 10 be run on a computer of !he other c:unp.Eumple 2-4Assume memory locations with the fol lowi ng C()mcnlS~ &26H - (S4S) 8ntl 827H (S22). Show the oontcms ofrcgistcr D in the instruction "LOD $.ie

uf MO Assr m bl y L all g ua ~e Pr"l:fllm

An Assem bly language instruclion consisls offour field s:

( label]

mnemon i c

[ opecands]

( ; comment]

Brackets ind ic ate Ihat a field is opti ena l and not all lines have [hem. I1rackelS shoul d nol be typed in. Regarding Ihe abo ve form at . the followin g [loinls should be nOled:I. T he label field allows the progra m to n.fn to a li"e of ~ode by name. n'e lalxl fi eld cannot exceed a emain number o f ehar1l(tcrs. Check your assembler for th e rule. 2. The Aswmb ly language mnemonic (instruction) and op::rand(s) fields together perform the re al work o f the program and accomplis h the tasks for which the program was wrillCn. In Assembly langu age statem ents such asLDAA ts55 ADDA ts61

A DDA and LD AA arc the mne monics that produce opcodcs; the ''$55'' and "Sf; T arc the operands. Inste ad of a "mem o" i, and an operand. tllese two fiel ds could contain assemb ler p>eooo- in slruetiolls. or di~ct i ves. Reme mber

CH .... PTER 2: IICS I2A RCnITECflJRE & A.W ...'ffiLY IANCUAC E PROCIU..\lMIN(;

If7

----------------------------------------------------------------_. . -----------------------------------------------------------------_._-_.Familia Freescale 9S12 Los siguientes sitios son fuentes de informacin para los microcontroladores de la familia 9s12: www.freescale.com www.s12x.com www.pemicro.com www.9s12.com www.embeddedrelated.com www.technologicalarts.com www.technologicalarts.ca


__

Page: 1

that directi ves do nO( generate any machine co de (opcooe) and arc u sed only by the assemb ler. as oppo >ed to instruction s thm are tran sl81cd inlo machine code (opcode) for the CPU to execute. In Fi gure 2-9 tho: ORG (origin) and END (Xlmmands arc examples o f directives. More of lhcsc pscudo-inSlroctionsarc discu s >ed in future chaptCTS.

3. The comment (k id begins with a semico lon comment indicator ";", Commnll s may be at the end () f a lin e or on a li ne by themse lves_ Th e ~ !ISCIl1bl cr ign ores oomlTl('nt ~ hu l they arc indi sf'C11sab1c 10 prog rammers_ A llhough oom mcn lS arc opti onal, they S ld be used lo dcscribc the program in a way that makes IHlU il e as ier for somoone 01>(' to read and understand. 4 . NOlicc the laocl " HeRB" in the label lido in Fig ure 2-9. In the 1MP the HCS I 2 is loki to Sl:J y in this loop indefi nitely. If you r sysk'm has a monitor program you do nOl need Ih is lin e and il should be de leted from your program . In Se~1iOll 2. 7 we wi ll St:e ho w 10 (.Teule u read y-Io-nlll program.

Review QuestionsI. What is the purpose of pse udo- instruc(ions"i 2. ==::;:::==-~ t rnn.Sla(ed by the assemble r into mach ille code. whereas =:.~ are no l. 3. True or false. Asse mbly language is a high-le l'e llanguage. 4. Which of the following instruclion~ produces opcode'! Lil;t a ll that do. (a)LDAA #$25 (b)ADDA #12 (c) ORG $2000 (d) JM P HERE 5. Pseudo- instructions are .11 00 called .. 6. True or false. Assemb ler directives are 110\ used by (he CPU itself. They are simp ly a guide 10 the aS5embk r. 7. In Question 4. which ins h.lcl ion is an asse mbler direc ti ve'!

;

--:=-=:-:::::::,

SECTION 2.7: ASSEMBLING AND LINKING AN HCS12 PROGRAMNow that the basic form o f an Assembly h nguage p rogram has been gi\'cn , Ihc nex t qu cs.rion i s ~ How il is crealoo, assemb loo, and made read y 10 run? The steps 10 e reate an exeClIL1b1c As.'lCmhly language program (sec Fi gure 2- 10) arc a~ follows: I. First we u se II tc~l edilor to t,'Jle in a progmm simil ar 10 Figure 2- 11. In the ca I is fed to the HCSI2 assem bler. The a.~sembler converts the inst ructions into machine code. The assembk r will produce nIl objt:(;t file. Th e l'X lemion for Ihe object

file is "0" . The exlcnsion for lhe list file, which contains nny syn tax errors and their lin e numbers. is "1st" . The lSi fi le cun be viewed " 'il h uny text cdilor.

3. ASSl:mblers n:q uire a lhird SIC t:llh:d linting. The link progmm lakes OIlCor Plllore object file s and produces a hex file and map. The hex file has thc exlcnsimi "s I9". Aner a successful li nk, the hex file is ready 10 be bumc-u im o Ihe HCS1:t 5 progrum ROM or downlouded miD !he HC 51:! Truin~m. See C hupl c..g for more details.

Many of lhe Windows-based ID E as>e mblers combine steps 2 rul d 3 into one step after the program has been typed.

More about asm and object filesThe asm fi l.: is also called the .soun::e fi le and must have tilt "asm" extension. As mentionoo earlier, thi s file can be e1"C3ted II'ith a text editor sudl as Windows Notepad. Many assemb k rs com~ with a t ~xt editor. Th c assembler converts the asm file 's Assembly language instruction s into machine language and provides the 0 (object) file. The HCS12 as>o:mblcr produces the objcct and 1st filcs. Thc object file. as mentioned earlier, has an "0" as its eX lCnsion. In modular proCllAPTER 2: IICS12ARCIIITECTURE&AS%!\ffiLYLANGUAGEPROGRA..\L\1ING H9




Page: iii

;HCS I 2

A~8 ~ Mb l y,~

L ~ ngua~

later",~

;.

,~

'"',,~ ~,

'"'

5210

,0

~ro9'r"m

To Add

,,_

Da t a .

location 210H.

'oc

210H

58000 WAA ts2 5ts3~

~M

,"M~M ~M,,~

t 511

not '00011100,~

"' " "" '"' '" 'e, " = '" ,., '"0 0

address aoooll - 25" (A- 59") ;"dc'! "LDAA S8(l5" 39. ~CLRA $800" is a(n) (v alid, invalid) ill strocu ss how 10 perfo rm 3 loop ing oclion in HCS I 2

and then cNplai n the bronch Uump) inSlructioos. bOlh conditional and unoondi lion~L

Loo ping in HCS12Repeating a sequence of instruction s or an opl--ru tion II. ct-rulin number of limes is called a loop . Th e loop is one of mos! widely used programmi ng techniques. In lhe H CS I 2. there are seve!" ways 10 [c peat an opcmt ion JIlUll Y tim es. .!.i

One way is to Icpcal the operation ove r ami ovcr W J it is finished. as shO WIl ltibelow:

c eM.oMAOM AOMW~W~

; 1\ -

n n n

i Ml loop l i[.5turts to fetch un d execute inst ructions from the add ress of the label. If C '" 1, it will not brunch bul wi ll e~t)Cule Ihe ne~ 1 inl'>truclion below BCe. Sludy Ex um ple 3-610 see how BCC is used to udd numbem togl1hcr whl.-n the sum is h ighl'- than FFH. Note that there is also a "BCS label" in struction. In the BCS instruction. if C = I it j um p!; to the target uddreS/;. We will give more e:wmple s of these instrUl.1 ions in the context o f some upplic mions in Chupk,- 5. The other conditional branc h in structions in Table 3- 1 are discussed in C hupter 5 when ari thmetic opcmtions with sigm:d numbl.'Tl> ure discussed.

1Il




Page: xiv

Eu mpl e 3-6

f ind the sum o f the values 7911, 1'51-1, and E2 l!. Pullhe su m in RAM locations SO? ([ow byte) and 806 (high byte) (bi g-end ian convention). Solu tion : ,_Brt'" roo ,

$807 _Byt. " WO $80 6

;a ~~i!1n; a~~lgn

~ ~

"0 '" ,. ,_ byt.'" " "0 '" " ,_ byt." "0

'0' '0"

,~ ,,~

,, n., ,-' "" ,, n ., '" "" ,, tm "" ,ADDA ADDA A DDA,~

" _ Byte ts19H_ Byte

H_ Byte

OVER

. numbe " ., '" " ne xt , . ,r " - O. AM ;1r , " - '. - 1=-, - , - " , _B yt e - " " . " incra",,;m'" Ino w , '. " t , , , " ";c1 .. PORTB

DElJ.Y

o:JMA

,U""" d"hy ,co:ople= n t A,keop d01rlg this 1n deHnitQ l yt his;pu tdd~y . ubro uti-n .. "ddr~~~ 8JOOH i "'" d ~h y ,pu on onto ~ t ""k,~

BOOb

BRA Me"

,.

830083008~O~

~~,

8301

'"' ,m U n~~

$8 300

t

COM

"YRF.(;

8306

NiMH

8301 8306 S)Ob 830Q

00. 00.~, ~, ~~,

"-

,

"

1 ~~ ,

,~

cou n l ~ I)'('''A~

'.U l ,'P" DO", IlAWltl U

IlAWInl Fr'L'Cscal r)

CHAPTER 4: IICS12f9S12 110 PORT PROG R "lMMING

I3S




Page: ix

MOSl WWM 1I~l't?lIPP\MWWWMI)'~I'Ff'O/I'ru

PA[Hl7IANOlIE TRIG(Il~

OCOlPTO

~

J.'K11P1l IJCO'P12OCllPlJ

PAOWAN05 PAOO4JANOI PAoo:.JJANOlPAOO2iANOI ::J PAOO1JANO I J PA[)(lW,NlJO

MC9S12D-Famil)'IXWU C 11 80 ()FI'

1X5IP 15

121J

IX6IPT61'JC11P11

"00' 1MY1TAI' MIIfIOOOPA!lIAO~1W1TA14PA5I~OOOlJA),O.TA 13

H

/I'OIX;iiAGiiiHKGUADORMlI'.TAOIPIiO

IS16

::::J PMlADDR121O'1.TA12

AOORl,w.,rAl lP81 AIlQIl?!lu,rMfI'8l IlQRMII.,T7I IIPBJ lIOOR4JtIf. -

""

B

an outputport B pins

",tt

'" "AA "AA '"CM'

OCU,

'" '"

=

E'ORTB~u,

AA' :put M' on port B pins

r

'M

U

It must be noted Ih:.l1 un less we ucl ivuh: the DDR bit (set i, to I), the data will not go from Ihe port register to the pins o f the HCSI2. This means that if we remove name i I the fi n;t two lin es oftbe above code. the 55 H and AAH Upon reset configured as i values wi lloo t show up on the pi ns. The), will he s itting in the SFR of Port B inside the CPU. Another VCJsioll of the previous program using the MOVB instruction is as fol lows:~ve

U

~v,

'SFF,DORB IS55, P()RTBOCU,

;_k,. Port B an outpu t por t ; put 55H on port B pin~ : put MH on port B pins

'"

~v,

'" 'M

'SM, P()RTB ocu,U

It must be noted that 55H (010 10 101) whl'fl complemcoted Ix.'colIlt.'s AAH (1 0 10 1010). Appendix C !ilIOW S c urrent drivi ng capability for I/O pin logic levels. NOle!hat upon reset, all ports have value 001-1 in their DDRx reg islers. This means all ports arc con figured as input s. See uampJe 4- J.

DDR register role in inputting dataTo make a port an inpul port. we must first put Os into the DDRx register for that port. and then bring in (read) the data pre>ent at the pi ns. The code in part (b) of Exarnpk 4-1 will get data present at the pins of port H and send it to pun B indefin itely. after add ing the value 5 to il:




Page: xii

Eump le 4 - 1

Write and l(l st 3 program 10 3} toggle al i lh" bi ts of PORTA and PORTE and b} get a b)1e of data from PHI and send it to PORTIl. SoIUllon:

" "C,

'1

c"'

eo" eo"

$ 1101

S1108

C~,,~ ,,~

"ITOOAAOO~

,ssn

; set

,,- = ;';,;pu t

st .. ck pointerFF

;>:Jake ; >:Ja k e

port port

, ,

C~,

ts55ro~,

STAll S TAll

'"'MD8LAY

PORTS OCU,

",

55h

on port

." ."

output ".,,, out put ".,,,A

pins

OO~

; COOlple"u;mt rElq AU

;-----------DELAyPSHAc~, ,,~

1200

" "

C~,,~

,,'C '"' "l " ,,'C t

00 ' 00' 00'

" 0 t25 "

'"' " PULAb)

'''"C~,

""

U llllllllOO~

S TAAc~,

nOOOO OOOOOO~

,,~

C~

m

;/\ - lll lllli (bin a ry) ;Port B an output port (1 for Ou t) ;A _ 00000000 (I.>''''''y) ;Port H iOn inpu t port ( 0 for input ) ; J:l()V& da ta fro'" PTH pins to ceq A

A DDA

S'I'AA

'M

"U

; add some lIalue to iti t to Port B ;continue foreve r; ~nC,C~

HIT, OURS tOO, DDRH

;1Mke Port ;_ke Port

m

,... outpu t , - . input port,"

".,,,r .. gA

ADDA,,~,~

"

l'ORTB U

;IIOV," d .. t .. fro m PTH p in ... Co ;add " .. 1 \.1 .. Co : send CO ~rt ; continue forever

'0_

"

CHAPT ER 4: HCS12t9S12 ItO PORT PROGR"lMMING

139




Page: xiii

Again, it must be nDled that WlI:! PORTA pins

; _~

A .. n input

Port BPon 13 occupies a total of 8 pins (PI3(}..PI37). To usc the pins of Pon 13 asUO, the bits ofregistcr DDRIl must be activated. For example, the fo llowing code

will continuously sen d ou t the

a ltcrn.1~ng

val ues of 55H and "AH to Port B:

, to"" l e all bits of ?ORTB~o

00"

fStT,DDRS IS 55, E'() R'I'Boc~,

;J!'.ake port

; put

'" 00"

t~AA,OC~,

P()RTB

;put AA'

'"oM

", "" '"" ""rt '" "",'

output po rt 0 piM0 pins

U

Port B as inputIn order to make all the bits of Port B an input , DDRD must be progranunro by writillg 0 to all the bits. In the following ,ode, Port B is configured first as an input port by writing all Os to registcr DDRIl. and 111(11 data is received from Pon B and sent to Port A.

140




Page: xiv

'\OOOOO OOO ,ODRB #$FF. DORA ;make ;move PORTA ;",end

m,w

; IOake po rt B an input port Port 11. an ou tput port from E'O RTB pin ~ to r e g A i t to PORTA

Dual role of Ports A and BIn expan ded mode, the HCS12 uses Port A and Pori B for uddress/claw mult iplexing. This allows the connect ion of HCSI2 \0 externa l RAM and ROM. Th e alt ernate functi ons o f lhe p ire; for Ports A lmd B are show n in Tubl es 4-3 an d 4-4, r~specti veJy.

Table 4-3: Port A AlternateFun ction s (in Expanded Mode)

Tabll." 4-4 : PorI 0 Alternate.' ullcli ons (in E xpanded Mod e)

Port EPort E occupies a total of 8 pins (PEO-PE7). To uoc the pins of Pon E as both inpu t an d Dutpul pons, each b it must be conn ected to the eX lernal pin by

enabling the bits of rcg istcr DDRE . In Pon E. we can usc on ly the six pins of PE2- PE7 for outpu t Th e PEO an ti PEl p in, ~rc con figuro:! for input pcrm.1ncntly. For example, the fol lowing code w ill conti nuously send ou t !he ahcmm ing va lues of 55H :md AA H \0 Pon E:: to)'t .. of S UlII;"l .... c A IA = 0) iH_ Byt,. = 0 ;A = 0 + !OK = 70B ,

,=,,~

AddressC

ADDA

"" seu mo " "" " , " '"' " , n., "" '-' n., "" "ADDA

" Byte , H_$842

H_ Byt .. S840

=

0

:branch I f C " 0 : lnere ..",nt (now H_ Byte " 0) IA 1D + Ell ~ 688 and C - 1 Ie;11

840 841 842 843

"''" 7DEBC5 58

H_ Byte

ADDA

1, increment Inoli H Byte - 1) 68 + C5 - 20 and C 11, incremen t lnow H Byte 2D. 58 - BBH and C _ 0

H_ Byte

ADDA

S6.(3

H_ Byt ..L _ By", ..

.

;e ;/\

-"Address Data~

; (H _ Byt ..

=

2)

"

,,~

;now L_ Byt ..

=

88H

805806

02n

At the end, the RAM location 807 - (88), and location 806 - (02) beca use 7D + Ell + C5 + 51] - 288ft We can use th e register indexed addressing mode to do this program much more effid entIy wi th a loop,5601 5806 MYCOUN'l' EQU S600

807808

"

L_ B)'te H_B)'te

''" ""

'M',,~

MYOOUNI " _ Bytet S8400, ,

.

;assign ~ location ;assign ~ location ;a33i gn MM location ; t h e =unter va l ue ; l o .. d C>. count .. r;~'l

,,,

'" " ,,< "

L_byte " _byte

count~I

" "

.~ .~

"=ce,BACK

.... r

A (A

=

0)

,,~

AOOA

n., ""O~'

OOffi " _ Byt ..

; " _ Byt " " 0 ;~ et th e point e r ; "dd byte ; bypa ss if C- O ; .. dd on .. ' 0< Coury; "," x t

m

0",

MYOOUNr

i t .... ; OOC =unter

Bill':,,~

McrL_ Byte

;do '0< ; store

",

,n

the bytes result

CIV\P'I'ER 5: ARIT IIMET IC, LOG IC INSTRUCTIONS, AND I'ROGRAMS

153




Page: iii

For exampl.:. [001; at the addition of SJCE7 + $3138D. as shol\"n next.

,

3C 7

"----'D JB 74

When Ihe first byte is added. there is a carry (E7 + 8D - 74, CY - I). The caft)' is propagmcd 10 the higbcr byH\ which results in 3C +) D + I - 78 (a ll inh~). Exa mple 5-3 shows the above steps in a HCS12 program. We can also usc the 16-bit add instruction 10 do the sarno: th ing sin~ HCSI2 suppons the 16-bit arithmetic opermions E ~lI rn l'[C

5-)

Write a prognun to add IWO 16-bi t numbers. The nwnbers are S3CE7 and $3 138D.Assume lilat RAM [ocalion 807 - (80) and local ion 806 - (3D). I'lace [he sum in RAM locations SOli a nd 809; loo; ation 809 should have die [ower byte.

3CE7 + 3138D7fH4

D","

c---

Solu tion :,~

""~load

..,,, ,m,~

'00' '"AA

'$.&7 $601 $609

the low byte nOW'E1 80 -, ~ ~ nd

Ii'! CY -

$E7)1

,i'! -

me

;load the high by t e;A

IA -

SJC).. dd1n9 th .. UppCfllalion of 0109 is called DCD (sccus..:d next

DAA ins tr uc tio nThe DAA (dcciJl1:J I adjuSt uccu mu l:llor) instruction in the HCS 12 is provided 10 COITt(.1 the ufOTl:mcnl ionoo problem Ilssocimed with BCD lIddition. The mnemonic " DM" works only with an operand in the A register. The DAA inSlructioo will add 6 to the 10\\,, byt e s

"16 807808

" 03

" "borrow.

SU8A Operrmd (A:: A - Operartd)In subtraction. the HCSI2 m icroo:;omrollers (indd. all modern C PU s) use the 2'. I S 169




Page: xiii

Enm pl e 5-12

Assume 1hul 1'011 B is an input pOl1 con ncl-1ed 10 u pressure Sl.'I1SOJ. Wri te a progrum to read the sensor value and h:sl it for the value 75. ,\ccording 10 the lest results, place the vlllue into the locations illdicmed by IIl e fo llowing.

If P =75 If f 75 If 1' < 75Solu tioll;OR"

then A = 75then GREG

=P

then LREG = P

c."

"'" =, """ro'M,~

$ 92 0

$92 1DDRB, '\. 111111 11; PORTB _

inpu t

,~

mPORTB

;A

oPA

: comp ar e

EXI T~'n

'W ,m

LOWER, ~,

;sav e; S ,"V"

;

PORTB with ;branch equal ;not ~ '1ua l ~ inc~ 0_ 10",,, r (C - U _ ~""e

EXI T

U,"

LOWE R

'"~

m,

... ,",...

" "" ""

=

dci_l

can the b its in a byte.E:lIIJIl pl ~

5-27

Write a program to bring in a b ),1C of data seria lly (on e bit at a time) via pin PB7 and save it in RAM location $82 1. The byte comes in with the LSD first. Solution: R(:OtJIfT counter 'W $820,~

I1YREG

,m .,~

D008, =, "" \ 10000000ROOUNT

$821

,,' ,,'

; RlI..."I

", ,,'

AGAIN

,'",~

input ; counter ;load th~ counter ; s tart ",ith C 0;noa ls itiv .. )

ilnd V =

,

Acoordin g to the CPU, the rcs.ult is + 126, which is

\~TOng,

and V - I indicatcs that.

5-36HH

Observe the following. noting the V and N flags:C~

AODA

Soill tlon;

., -'----o!i . ,

"-

;A

~

1111 11 1 0 (- 2 ) \- 5 )

; co e c t,

sin c e

" - ., o..

$FE)

V - O

'"

1111 1110

11 11 10111111 1 001

a ndv=O

According to the CPU. the resllil is - 7. whkh is correct. and the V flag indkales that.

'"' "

-

L

,,,Ihgs~

".

ne gative

E.\ampk 5-37Examine the fo llowing, noting the role of thc VC~

,.,

A DDA . ... 111

;'

" ;, "; co e c t,,

~nd

N

000 0 0111 \+1) \+18) 000 00 111 0001 0010 (0 ) +25 , \ +18 )

v _ ,

-

,-

0001 1 001 0. po~i t i" e

' "'

Soilltion;.......!:.l.!!

70000 0 11 1 0001 QQIQ +25 0001 1 0 0 1

-,

ipositiv .. 25 ) ilndV=O

Accordin g to the CPU. this is +25. which is correct. and V - 0 indicates thaI. CHAPTER 5: ARITHMETIC, LOGIC lNSTRUCTIONS, AND PROGRA:'>IS INS




Page: ix

From the above examp les. we conclude that in any signed number addition, V indi cates whether the fC8Ult is va lid or nOl . If V - " th e resu lt iSCrroneollS: if V - O. the result is valid. We can Siale emphatically lhal in unsigned mun bcr add ition, we must monitor the SlalU S of C (carry fl ag), and in signed munbcr addition, and Res allo\\' the program to branch right after the addition of unsi gned numbers,~s we ,. W in Section 5. 1. 1 The re ~rc also the Bve (branch if V is clear) an d the BVS (branch i f V i s SCI)

the V (overflow) fla g mu.! Ix: monitorcrl. In the HCS12, instructions such as Bee

'l"a ble 5-9: II CS I2 Br .. nch Instr ucti ons Use d for Sig ned N umbers

al low us 10 correct the signed numDcr error. th e alse thai instructions for We V flagImvc

two bnmch instrudions for theN fl ag (ncgutive), BM I (brunch

i"!'i'~'~'.~'ili"~";jl~~~~Ai"~"~"i"jl~~8MI BrL Branch if min ns Branch if plus Branch if N - I Branch if N - 00

8VS

Bra nch if V set

Branch if VBranch if V

1

BVC

Brunch if V clear

if mi nus) and BPL (branch ifplus). See Table 5-9.

Word -si zed (1 6blt j signed numbersIn HCS I 2 a word is 16 bits ill length. Settillg aside theh' S I3 (D IS) for the sign. leaves a tolal of 15 bits (D I4-DO) for the magnitude. Sec Figure 54. Thisgives amllge of - 32,768 to +32,767. If a number is larger than tIti s. it lIUJSt be treat ed as a mui tiworu operand HnU be p rocessed chunk by chlmk the same way as unsignoo numbers.

ID"ID"ID"ID ID ID"I '" ID6 I D' I D6 I D' I '" I D3 1 ID' I DO I " " D'$ign mognltude

-,.d

-

The followinl,t shows th~ range of sijPloo word op~rarn.ls. To ~onverl a n~ lI"ti "" 10 its word operaoo repre.entation, the three sto:ps discussoo in negative byte operands an:Deci mal

Bi na ry

~

- 32,768- )2,767

- 32 , 766

1000 0000 000 0 0 000 1000 0000 000 0 0001 1000 0000 000 0 001 0 1111 1111 0000 0000 00001111 1111 1 110 1111 1111 1111

8000 8001 6002

-, -, ,H

!Tn:ITIT

"

00 00 000 0 0 000 0000 000 0 000 1 0000 000 0 00 10

0000 0001 0002

+32,766 +32,761

0 111 1111 1111 1110 0 111 1111 1111 1111

'm

"IT

Ov erfl ow flag i n 16-b it operat ions

In

II

16-b it opave the resu lt in RAM kx:ation $ 1860. 6. Slate the step s that the S UBA instruction wi ll g(l lhf{)ugh for each (I f tbe fol C H .... PTER 5: .... RITlIMETI C, I. OGIC INSTRUC TIONS. AND PROGR .... M S 189




Page: xiii

lowing. (a) S23 _ $ 12 (b) $43 - $53 (c}99-99 7. For Prob lem 6, wri te a program to perform each operation. 8. Troc or falsc. The "OAA" instroction worts onl y on the A registcr.

9. Wrilc a progrnm to add S7F9A 10 $BC48 and save the result in RAM memory locations staning at $1840.10. WrilC a progr~m 10 su btract S7F9A from $B(48, nnd save too result in RAM mcmmy locrtlions starti ng 81 $ 1840. II . WrilC a program 10 add BCD $7795 to 59548 and save the BCD result in RAM memory localions starting 8\ $1840. Ll. Show how 10 perform 77 )/ 34 in 1he HCS 12. 13. Show how to perfOfll1 7713 in the HCS 12. 14. True or falsc_ Th e MUL instruClion works on ll ny register of the HCS12. 15. The MUL in sl ruc~on places the resuh in n:giSl L "rS uoo ___-

SECfION 5.2: LOGIC INSTRUCTIONS AI\"'O PROGRAMS

l IS. Assume thut A = SFO. PL-rform the following opemlions.Nore: The opt.'rnti ons are independen t of euch o lher.(ll) ANDA 1$45 (b) ORAA # $90

Cj) roM I$AA 17. Fi nd lhe cont ent s of register A after each of the following instru ction s:roM tsEE (3) LDAA #S65ANDA f $16

(e) (e) (g) (i)

EORA EORA ANDA

1$76iI $ 90 t$FF

(d) ANDA #$ 90

(I) ORM(h) ORAA

H90 1$ 99

(b )

LDAA ts10ORAA ts6BLDAA #$5D

(e)

LDAA #$95 EORA f $/U\ LDAA fSC 5 ORAA 1 $12 LDAA ' $37 ORAA 1$2 6

(d)(~

ANDA f$ 18LDAA f$6A

(,)(g)

EORA 1 $6E

SECTION 5.3: COr.WARE INSTRUCTION AND PROGRAt.IS

I S. True or false. In using the CMPA MYRAt.r instruction, we must usc A as one of the rcg ist crs. 19. Explain how the 13HI instruction worb. 20. Docs the compare instmetion affec t the fl ag bits of the stams register? 21. Assume thai MYREG - 85 H. Inrlicme ifit ski ps after compare is cxcculCrl in each o f the following cases: LIlAll IS90 (b) WAA 1$70 (a)CMFABHI

I$B5O VER

~FA

, $85OV ER

ADM

'"

"$ 2, ~.

~"

"" '"

'"

''''




Page: xiv

)

,~

1~85

C d)

,~

t$5D

e~o

#$85"U~

''''IlI:X'I'

0000

'"

." ,OCm"regi sl~'-

CJo:PJ>.

1$85IlUT

0

"

... DnA

"

22. In Prob1t:m 21, indicate the valuc in

A.

SEC TION 5.4: ROTATE. SHiFf INSTR UCTIONS, AND DATA SERIALIZATION 23 . Fi nd n.'gisl~'- A contents a ller cuch of the fullowi ng is executed: (a) WAIl 'S65 (b) LDAA #$3 9CLC CLC

roM roM(e)

"0

Cd)j$04

cec

ro" ro"W~

WAA

f$A7

roMroMroAA

"''' "'c.

24. Soow the code for swapp in g .he nibbles in regi ster A. 25. Writ e 3 program tlial finds the number of zeros in all 8-bi t datu ilL,u . 26. Writ e a program that fmus (he position of (he fi ~t high in an S-bi! data item. T he data is >CaJUu:u from DO to D7. Give III I.' result for 68H.

Z? Writ e a progra m thai finu s (he position of theT he data is>C'J.lUleU

fi ~(

high in an S-bj! data item.

fmm D7 10 DO. Give tile re,ult for 68H.

SECTION 5.5: I3CD AN D ASCII CONVERSION28. Write a program l(l convert Ihe following packed BCD nwn be r !oASCII. Place we ASCII codes in data RAM locations starting at 5840.MYocn ROIl$ "j~

29. Writ e a program to convert the fo llowin g ASCII Ilwubers 10 a packed BCD.MYASC_l MYASC 2 EQU EOU 'S ' '1 '

SEC TION 5.6: SIGNED t.'1.Th.IBER CONCEPTS AND ARITIlMETIC OPERATIONS

30. Show holl' The following arc rcpresenlCrl by TOO a~>cmblcr~ (a)_23 (b) +12 (e) _28 (d)+6F in oox (c} - 121': (I) +1273 1. The memory atklrcsscs in eom pUlcrs are (signcrl , unsigned) num bers. 32. Writc a program for cach of thc following and ind icatc thc status ofthc V fl ag

CHAPTER 5: ARITHMET IC, LOGIC lNSTRUCTIONS, AND PROGRA:'>IS

191




Page: 1

fer each: (b) (- 123 ) + (_127) (8)(+1 5) + (_12) (d) (_127 ) + {+I 27) (e) (+25H) + (+ 34H) 33. Ex plain the diffe rence bc!w~n the C and V flags and where each one is used. 34. When is t he V flag misro1 Explain. 35. Which reg ister bolds Ihe V flag? 36. How do you detect Ihe V flag in th e HCS 12'> How do YC ll detect lhe C fi ag? 37. In an S-b i! operand , b il _ _ is usOO for 1he sign bit, whereas in a 16-b it

operand, bit _ _ is used for the sign bit.

ANSWERS TO REVIEW QUESTIONSSECTION 5.1: AR1TH!l.IETlC INSTRUCTION S AND PROORAMS1. 2.

A. BReg, ",or 0

J.4. 5. 6.,

No. The oc:conciQPCllOlld ihould Ix in "'gi>l'lCkw lJCD, 0000 0((11,0000 0 10 1 Ufll""'k,.J !le O (h) S99 - 100 1 100 1 I""'kcd BCD , 0000 100 1.0000 tOOl u n ~k ed BCDs 3n6 ~ OO I 1 01 11 00 11 0 1 10B

2.

3. 4.

and in BCD we have i6H ~ O l ll OI . OB No, We ",," the )'ISH with the sign bit in each: the LSB i. shiftcd into the carry fl ng. (B) BLE will bnm:h if(V Ex. OR N) + Z '" I. (b) BOE .. ill bran. we

,crl as a po inter for indexoo addressi ng 0

mode when accessing data RAM ? Gi ve their names and show how lhey areloaded. 2. Wrilc u progrlllll 10 copy $FF inlo RA"'l locutions ll50H to 116FH. 3. Writ e a program \0 copy 10 bytes of data Marting at RAM address $840 to RAM location s starting at $870. 4. What is tile size of the X register? j. v IVO the regIsters lhal c an bCI1olhc fo ll owi ng A SCII c haracters 10 PO RTA, basco on 0 the status oflhc switches :

0000 0001 0010

'0'I' "'J '4 'j"

00 11 OJ 000101 0 110

'6'

0 11111100 1001 10 10 l Oll

'T"" " -

11 00

'8' 'C'

11011110

'D''ET

I I 11

SECTION 6.3: CHECKSUfl.l AND ASCII SUBROUTI NES 23. Fi nd th e checksu m by te for the fo llowing ASCII message: " Hello" 24. True OJ fa lse. If we add all b)'les. includ ing the cha:k slllll byte. and the result i!; OOH, there is no error in th e data. 25. Wrile a program 10 (a) b'Cllhe dma " Hello , my fel low world c it izen s" from progra m ROM. (b) C'J.lcuJale lhe checbl.llll byte. a nd (e) tes t the checksum b)'1e for any data e rror. 26. To di splay dma on LCD or PC monj lOIl>. it mu st be in (binary, BCD.

ASCII ).27. Assu me that the lower 4 bits of Pon E are colllccll:d \0 switches. Write a pro gram \0 send the following ASC II ,hara,lers 10 Port A ba!iCd on the status of tile s\\"itches: 0000 0001 0010

'0''I'

00 11 OJOO0101 Ol IO Ol JJ 1000 1001

'"

'J'

.,'6''T

> 4'

''""

'"




Page: iv

28. WrilC a program 1 oonvcrt a >c ries ofpad::rt B iln outpu t

Ox55; OxAA ;

... ni le (1) ;

I /stay h e r e fol\t'd ill Cha(1 t:rs 5 and 6. As slated theil:, many newer micrOCQllIrolJers have a realtime clock (RIC) whcre the time and !lac are kepi even when the llOWer is off. Very ofkn the RTC provides the time and dme ill pa;ked BCD. Todisplay them. howcVI:J, il JIlU';tOOlIV Ihem toASC II. bl tllis section we show t:lt the uppli cnli(l1 of logic and millIe instm ctions in the ronversion of BCD und ASC II .CHAPTER 7: PI C PROGRAMMING IN C237




Page: xiii

ASCI I numbersOn ASC II keyboards. when the ''0'' key is activated. "011 0000" (JOB) is provided to the compu ter. Similarly. 3 11-[ tO il 000 I) is provided for the " I " key. and >0 on. as ShO llTI in Table 7-3. Table 7-3: ASC II Code for Ui ;:il s D- 9

Pac ked BCD to ASCII convers ionThe RTC provid es the lime o f day (hou r, mi nute, second) und th e uulc (year, month, day) cont inuollsly, regard less of whcthcr the power is on or off, Th is data is provided in pu cked BC D. however. To con vCTI plld a:d BCD 10 ASC II , you must first conver1 ill(] unpacked BCD. Th en the unpuckell BCD is lugged wi th 011 0000 (30H). Th e following demonslm les convt:11ing from pad ed BCD to ASCII,

See also Example 7- 17.P. c ~

BCD

Ox29

Unpack..:! B(n Ox02, 0,.09

lI.SCIl

0010100 1

0000 00 10, 00001001

Ox 32, 0,,39 001100 1 0 , 00 111 00 1

ASCII to packed BCD conversionTo oonvcn ASCII to packed BCD, you fIrst c on vc " it 10 unpacked BCD (to get tid of the 3), and then combine to make pocked BCD. For example, 4 an d 7 on the keyboard give 34H and 37H, respectivel y. The goal is 1 produce 47H or "O 100 0 I II " , wh ich is pacl.:cd BCD. Sox Exam ple 7- 1&.

o

.,

Key

ASCII

" H

Unpacked BCD

Pac:lted BCD

0000 0100000001ll 01000] 11O~

47H

Arter thi s con version , lhe pu ck ed BC D nu mbers are p rocessed and the result w ill be in pocked BCD fOm131. C haple r 16 di scusses the RTC chip and u>cs the BCD and ASCII convCJsion programs shown in fu amplcs 7- 17 an d 7- 18.




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Eump le 7- 17

Write a C program kl convert packed BCD Ox29 \0 ASCII and d isplay the bytes on

PORTA and PORTH.Solu tion :linclude ame .;on.;ept using lhe C compiler.

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RAM data space VS. code data spaceIn the lieS] 2 we have two memo ry add ress sp aces in which to store data. l11ey are as follows:

I. Several kilobytes of data RAM space. As we have seen in previous chapters. many 12 chips have up to 14K bytes for the data RAM. We also have seen

lies

h ow we can read (from) or write (into) this RAlI-I space direct ly or indirectly. 2. Several h\U\drcd ki lobytes of code (program) space. T hi s on-chip ROM space is u.sxAll """,,"

66Htinc l ude void MSDelayrunsiqned lnt); void ," ~ i n (void)DDRB _ OxFF;

P()RTB=Ox55; "hil .. ll)

,

PO RTB-IQRTB ' Ox n ' ;

MSDe l" y(250) ;

void MSoala y (uns igned i ntunsiqned int i; IInsign ~d int j;for(I -o ;i:>

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F,x pillin t he f unclion of !h e nosel l)!" of Ih e IICS 12 micro controller Show th e hanhnr~ cOn nl'i.1 ion of Ihe IICS12 (,hip Show Ih ... Uill.' of II crpta l usdlllltor for II d ock SlIUn: C F,x pillin t he rule of th e eRG n-gislcrs in II CS 12-lJ as~d~)'s l cms

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Code II '~'S1 pro!;ram in Aliscmb ly lind C for Ic~lin g th e IICS I2 systems Code II '~'S1 pro gram in Alisernbly lind C for settin g th e PLL do~: k Explain the 519 hex tile characteristics fur th e IICS I2 family Explain the role of th e BUM (bac kgrou nd debu g Imide) in the IICSI2




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SECTION 8.1: HCS1 2 PIN CONNECTION AND 80 MTh e HCS I2f9S I2 famil y members come in two packages: SO-pin QFf'

(qu.1d fl at package) and 11 2-pin LQFr (low-profile quad fl at package). They all have Il'I:1ny pins thai are dcd icuhXI to vurioos functions such us I/O, ADC, timer. ~nd interrupts. Fi gu res & and & show the pi ns for the HCS 12 chips. -2 -3Exumining Fi gures 8- 2 and 8-3, nOlc thUI man y pins ure desi gnated us porI:;

A, B. E, H, and so on, with their nltCTl131e funct ions. The rest of the pins urc designatedde~be a~

VDDl(, VSSx (Gnd), XTAL, EXTAL, BKGD, an d Rosel . some o f featu res and funL1iuns lISSOci lll(.~ with these pi n ~

Nc~ l ,

we

VddR (Vee) and VssR (Gnd)

These pi ns ure used 10 provide supply volt.uge and ground to Ihe vo llugeregula tion section of the chi p. The typical vo ltage sou r~ is +5 V Many of the recent members of microcomrolJcr fam ilies havc lowcr volta ge for Vdd pi ns in onk:J to reduce the noi se lind power dissipation of the sy st~'fl1 . For ch ips wi th 40 p ins an d more, it is common Hl havc mult iple pins for vce and GND. This wi ll help red uce the noise (groun d bounce) in high -freq uency systems, lIS di scussed in Append ix C.XTA L and EXT AL

Thc HCS l2 has two opt ions for the c lock sourcc ~ I'LL (ph.1Sed lock loop) C1 HCS12 ~nd crystal osci ll ator. In many trainer C2 boards .1 quan z crystal oseill:l!or is con XTAL necled 1 pi ns XTA L and EXTAL Thc 0 quan z crystal oscil1 aHlr connected to Ihc XTA L nnd EXT,\L pins a lso need s Ihree capacilOrs. The capaciHl r connoctio n is GND shown in Figure 8-l u. If ~'ou decide 10 "",.. buse a frcqul"lH;y source oth~..- than u c.-y s-tal oscil lator, such as a CMOS oscil lator, ~"l' "" ~"_:;'~'Cx-;-ACC"X ~ " - _ X'IA L - x-;-TAACL-------' it wi ll be con nected to EX TAL; XT AL is Con nl'Clion tn CI)'sll l Oscill atnr "Cloo, as shown in Figure 8 lell uneoolllOb_ Not Connecled XTAL

Ir--r,------ilf--I EXTALt--..,f--'-------l

Coc

'r'

VddPLL and VssP1.L

Th e>e p ins are used 1 pro vi de 0 supp ly voltagc 10 the I'LL and osc il1alo EXTERNAL par1 of the chip. Th e PLL ulkJws lIS to OSCILLATOR EXTAl havc another source of working frequen- SIGNAL t:)' independent of the t..-ySlul ooc illll lo 0 freq u'OOM'j.rrlSU< ' .!"A'III2I:>

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>::..

Usl Ihe time rs or l hl' li es 12 lind Ih rir associated rcglslcrs Describe Ih e frc .. runnlng fClllurc ofl he Il CS12 limt:r -Dcscribt, Ih e output-compan. feature uflhe II CS12 timer Program Ihe ou tput-com pare feat ure in Assemhly lind C Dcscrihe Ih e input-ca pt u re fell'ure oflhl' IICS12 limcr PrOl:ram the inpu t-cllp l ure fcature in Asscmbl)" and C I'rlll:ram the II CS I2 timers in AS~JIlbly anll C 10 I:cllHatc time dela ys Program the II CS I2 counler.; in Assembly and C as cHn l cou nt ers

m




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Every timer needs a clock. pu lse to tick. In the microccntrollcr, the clock sourc

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