MSD Project 10236

MSD Project 10236Configurable Control Platformfor Unmanned VehiclesDetailed Design ReviewJoe PinzoneAlex MykytaRoberto StolfaRobert GhildutaJason Stanislawski

System Overview

System OverviewControl Code Processor (CCP) Gumstix: TEXAS INSTRUMENTS OMAP3530 ARM Cortex-A8 GP CPU C64x DSP Store/execute Simulink control code 256MB flash (OS / Control Code) 256MB RAM Power management IC High-speed serial bus to I/O Controller

System OverviewInput/Output Controller (IOC)

XILINX SPARTAN 3E FPGA w/ PLASMA uC CORE

Arbitrates sensor and actuator input/output Provides sensor data to CCP in common format through shared, dual-port memory

Provides analog and digital I/O interface connectors, broken out on I/O Breakout Board

System OverviewI/O Breakout Board (IOB) The only vehicle-specific hardware Breaks out IOC header to individual sensors and actuators Physically separate package from Controller Platform Generally no processing done here

System OverviewPower, Control Code Processor, I/O Controller are physically: separablestackedenclosed

System OverviewPower, IOC, CCP = Vehicle Controller Platform, separate from IOB

Power*All values are worst case

Power*All values are worst case

RailCurrent RequiredPower Required1.2 V0.088 A0.106 W2.5 V0.045 A0.113 W3.3 V0.322 A1.060 W4 V0.400 A1.600 W5 V0.129 A0.643 W

PowerFRONT END CONDITIONING TEXAS INSTRUMENTS TPS43000 SEPIC (buck/boost) configuration 1.8 9V Input 6A output with proper FET switches Synchronous Rectification (+eff)

TPS43000 (PSU FRONT END)

PowerSECONDARY STAGE LINEAR REGULATORS LM317 ADJ. LDO Low-drop-out Vout 1.25 > 5+ volts Use for 5V, 4V Up to 1.5A output

TLV70012 for 1.2V/200mATLV70025 for 2.5V/200mATPS73733 for 3.3V/0.50A

Power Summary

MaxNomUnitsTotal Useful Pwr3.5242.890WattsTotal Current0.9840.792Amps

Power to LDOs4.9183.958WattsEfficiency of SM0.9000.900

Total Reqd. Pwr5.4644.398WattsSupply Voltage4.8004.800VoltsSupply Current1.1380.916AmpsBattery Capacity2.7002.700+A-h

Est. Time2.3722.947HoursEst Efficiency0.6450.657

NomenclatureFirmware: Program code that runs on the embedded processors. This does not include the Control Code, which will always be referred to specifically.

Rigidware: The HDL containing the image of the FPGA gate configuration. This may contain RAM/ROM initialization images and basic boot loader to initialize and load the stored firmware. This term generally pertains only to the IOC, since it is the only programmable-logic device in the system.

Software:Any program that runs on the user PC for the purpose of programming, configuring, compiling, or monitoring the embedded system.

IO Controller ModuleArbitrates IO from the CCPPhysically separable from CCPCan be used as independent data logger or used in future projects.Implemented using a Xilinx Spartan 3E FPGA (XCS500E-PQ208)

FPGA SelectionFPGA chosen for highest gate & largest pin countBGA is not desirable due to board routing complexity

PackageDeviceVQ100CP132TQ144PQ208FT256FG320FG400FG484XC3S100EXXXXC3S250EXXXXXXC3S500EXXXXXXC3S1200EXXXXC3S1600EXXX

IOC Rigidware

32

Plasma Core

Dedicated UART

~40kB RAM

A

D

SPI Master

CE

CK

DO

DI

Tx

Dual Port RAM1kB

Serial Controller

Rx

High Speed Serial

To CCP

IRQ

System Clock Counter

A

IRQ

D

PWM Reader

PWM Generator

IO Port

SPI Bus:PM Storage & SD Card

8

8

8

8

8

IO Port

IO Port

IO Port

ADC Controller

CK

SO

SI

CS-ADC

CS-DAC

NOTE: All IO Ports, ADC Controller, Dedicated UART and SD/PM SPI module are capable of generating interrupts.

8

Main RAMXC3S500E has 45KB of Block MemoryApproximately 40 KB will be used for Plasma CPURAM preloaded with boot loader

32

Plasma Core

Dedicated UART

~40kB RAM

A

D

SPI Master

CE

CK

DO

DI

Tx

Dual Port RAM1kB

Serial Controller

Rx

High Speed Serial

To CCP

IRQ


A

IRQ

D

PWM Reader

PWM Generator

IO Port


8

8

8

8

8

IO Port

IO Port

IO Port

ADC Controller

CK

SO

SI

CS-ADC

CS-DAC


8

SPI FLASH & MMCApplication code is stored on SPI FlashBoot loader loads application into RAMSame SPI bus is used for an SD card for loggingAll typical SD cards support standard MMC protocol

32

Plasma Core

Dedicated UART

~40kB RAM

A

D

SPI Master

CE

CK

DO

DI

Tx

Dual Port RAM1kB

Serial Controller

Rx

High Speed Serial

To CCP

IRQ


A

IRQ

D

PWM Reader

PWM Generator

IO Port


8

8

8

8

8

IO Port

IO Port

IO Port

ADC Controller

CK

SO

SI

CS-ADC

CS-DAC


8

System Clock CounterProvides timing informationSourced from 50 MHz clock which allows for integer division to decade increments of time.

32

Plasma Core

Dedicated UART

~40kB RAM

A

D

SPI Master

CE

CK

DO

DI

Tx

Dual Port RAM1kB

Serial Controller

Rx

High Speed Serial

To CCP

IRQ


A

IRQ

D

PWM Reader

PWM Generator

IO Port


8

8

8

8

8

IO Port

IO Port

IO Port

ADC Controller

CK

SO

SI

CS-ADC

CS-DAC


8

Dedicated UARTHardwired to USB-UART transceiverLoad new application codeDebug system during operation

32

Plasma Core

Dedicated UART

~40kB RAM

A

D

SPI Master

CE

CK

DO

DI

Tx

Dual Port RAM1kB

Serial Controller

Rx

High Speed Serial

To CCP

IRQ


A

IRQ

D

PWM Reader

PWM Generator

IO Port


8

8

8

8

8

IO Port

IO Port

IO Port

ADC Controller

CK

SO

SI

CS-ADC

CS-DAC


8

CCP CommunicationDual port ram allows for independent operationHigh speed serial interface used to access shared RAMInterrupt signals provided to and from CCP

32

Plasma Core

Dedicated UART

~40kB RAM

A

D

SPI Master

CE

CK

DO

DI

Tx

Dual Port RAM1kB

Serial Controller

Rx

High Speed Serial

To CCP

IRQ


A

IRQ

D

PWM Reader

PWM Generator

IO Port


8

8

8

8

8

IO Port

IO Port

IO Port

ADC Controller

CK

SO

SI

CS-ADC

CS-DAC


8

Analog ControllerFinite state machine responsible for acquiring analog data from ADCData available for direct access from CPU address spaceConfigures reference voltage DAC

32

Plasma Core

Dedicated UART

~40kB RAM

A

D

SPI Master

CE

CK

DO

DI

Tx

Dual Port RAM1kB

Serial Controller

Rx

High Speed Serial

To CCP

IRQ


A

IRQ

D

PWM Reader

PWM Generator

IO Port


8

8

8

8

8

IO Port

IO Port

IO Port

ADC Controller

CK

SO

SI

CS-ADC

CS-DAC


8

PWM ControllerFSM that arbitrates servo PWM generation and readingGenerator is configurable to provide servo format or full range duty cycles

32

Plasma Core

Dedicated UART

~40kB RAM

A

D

SPI Master

CE

CK

DO

DI

Tx

Dual Port RAM1kB

Serial Controller

Rx

High Speed Serial

To CCP

IRQ


A

IRQ

D

PWM Reader

PWM Generator

IO Port


8

8

8

8

8

IO Port

IO Port

IO Port

ADC Controller

CK

SO

SI

CS-ADC

CS-DAC


8

Configurable IO PortsEach pin can be configured as input, output, or special functionSpecial functions include configurable SPI, I2C and UART modulesIP provided by OpenCores

32

SPI Core

I2C Core

UART

GPIO

CE

CK

DO

DI

SDA

SCL

Tx

Rx

A

D

D

D

D

A

A

A

8

Special FunctionSelect

Configurable IO PortsMAV peripheral set only requires 1 portPreliminary logic estimates show that 5 ports should be possible

32

Plasma Core

Dedicated UART

~40kB RAM

A

D

SPI Master

CE

CK

DO

DI

Tx

Dual Port RAM1kB

Serial Controller

Rx

High Speed Serial

To CCP

IRQ


A

IRQ

D

PWM Reader

PWM Generator

IO Port


8

8

8

8

8

IO Port

IO Port

IO Port

ADC Controller

CK

SO

SI

CS-ADC

CS-DAC


8

IOC Hardware

SD/MMC Card socket

32

Xilinx Spartan 3EXC3S500E-4PQ208

FPGA Config. ICXCF02S

SPI FLASH PM StorageSST25VF032B

50.0000 MHz Clock

14.7456 MHz Clock

USBDual UARTFT2232

EEPROMAT93C46E

8 Channel 16-bit ADCADS1178

Bidirectional Voltage TranslatorTXB0108

Voltage Reference DACTLV5623C

BankVref


IO Ports

8

8

8

8

8

8

8

PWM Out

PWM In

BankVref


[-]

SPI

SPI

Rx

Tx

High SpeedSerial(or future GPMC)

IRQ

IRQ

JTAG

Config.

JTAG

JTAG

JTAG Header

USB Mini-B

USB

Digital IO Header

Analog Header

BankVref


BankVref

Rx

Tx

Header to CCP

[+]

8

Programming InterfaceUSBUART converter does most of the work for usPM FLASH is programmed from UARTSecond UART is provided for CCP configuration

SD/MMC Card socket

32




50.0000 MHz Clock

14.7456 MHz Clock

USBDual UARTFT2232

EEPROMAT93C46E




BankVref


IO Ports

8

8

8

8

8

8

8

PWM Out

PWM In

BankVref


[-]

SPI

SPI

Rx

Tx


IRQ

IRQ

JTAG

Config.

JTAG

JTAG

JTAG Header

USB Mini-B

USB

Digital IO Header

Analog Header

BankVref


BankVref

Rx

Tx

Header to CCP

[+]

8

FLASH & SD CardSSTs 4MB FLASH stores application programShares SPI Bus with SD Card for data logging and removable storage

SD/MMC Card socket

32




50.0000 MHz Clock

14.7456 MHz Clock

USBDual UARTFT2232

EEPROMAT93C46E




BankVref


IO Ports

8

8

8

8

8

8

8

PWM Out

PWM In

BankVref


[-]

SPI

SPI

Rx

Tx


IRQ

IRQ

JTAG

Config.

JTAG

JTAG

JTAG Header

USB Mini-B

USB

Digital IO Header

Analog Header

BankVref


BankVref

Rx

Tx

Header to CCP

[+]

8

CCP InterfaceHigh speed serial interface to CCP along with interrupt requestsPins on FPGA and header are reserved specifically for implementing GPMC in the future

SD/MMC Card socket

32




50.0000 MHz Clock

14.7456 MHz Clock

USBDual UARTFT2232

EEPROMAT93C46E




BankVref


IO Ports

8

8

8

8

8

8

8

PWM Out

PWM In

BankVref


[-]

SPI

SPI

Rx

Tx


IRQ

IRQ

JTAG

Config.

JTAG

JTAG

JTAG Header

USB Mini-B

USB

Digital IO Header

Analog Header

BankVref


BankVref

Rx

Tx

Header to CCP

[+]

8

FPGA ConfigurationOn power-up, FPGA is automatically configured by the XCF02S which stores rigidware.Rigidware can be changed via JTAG interface

SD/MMC Card socket

32




50.0000 MHz Clock

14.7456 MHz Clock

USBDual UARTFT2232

EEPROMAT93C46E




BankVref


IO Ports

8

8

8

8

8

8

8

PWM Out

PWM In

BankVref


[-]

SPI

SPI

Rx

Tx


IRQ

IRQ

JTAG

Config.

JTAG

JTAG

JTAG Header

USB Mini-B

USB

Digital IO Header

Analog Header

BankVref


BankVref

Rx

Tx

Header to CCP

[+]

8

Analog to Digital ConverterSimultaneous samples of 8 channelsSupports differential inputsAdjustable sampling rangeRange is digitally controlled by adjacent DAC

SD/MMC Card socket

32




50.0000 MHz Clock

14.7456 MHz Clock

USBDual UARTFT2232

EEPROMAT93C46E




BankVref


IO Ports

8

8

8

8

8

8

8

PWM Out

PWM In

BankVref


[-]

SPI

SPI

Rx

Tx


IRQ

IRQ

JTAG

Config.

JTAG

JTAG

JTAG Header

USB Mini-B

USB

Digital IO Header

Analog Header

BankVref


BankVref

Rx

Tx

Header to CCP

[+]

8

Digital IOPWM signals connected directly to IOB (3.3v levels)Configurable IO Ports have adjustable logic levels.User supplies voltage referenceTXB0108 detects direction of communication without the need for direction control

SD/MMC Card socket

32




50.0000 MHz Clock

14.7456 MHz Clock

USBDual UARTFT2232

EEPROMAT93C46E




BankVref


IO Ports

8

8

8

8

8

8

8

PWM Out

PWM In

BankVref


[-]

SPI

SPI

Rx

Tx


IRQ

IRQ

JTAG

Config.

JTAG

JTAG

JTAG Header

USB Mini-B

USB

Digital IO Header

Analog Header

BankVref


BankVref

Rx

Tx

Header to CCP

[+]

8

Logic Cost AnalysisDesign with 5 IO ports uses approximately 80% of available logic20% for uncertainty in estimates and potential overhead for PAR of large designs.

LUTsPlasma Core3306CCP Interface300PWM IO Controller300Analog Controller230Configurable IO Port710Number of IO Ports:5Total LUTs Used:7686Available LUTs9312Remaining LUTs1626

Throughput EstimationDummy DAQ program written for MAV set of peripheralsSingle sample can be executed in ~420 clock cycles @ 25 MHzAssuming SPI communication to IMU is done without interrupts, CPU must stall for duration of transfer (~200 cycles @ 2 MHz)Results in theoretical sample rate of 30 kHz

I/O Breakout Board

I/O Breakout Board

DEVICE LIST FOR UAV IOBAnalog Devices IMU Tyco Electronics GPSAirspeed Differential Pressure SensorAltimeter Absolute Pressure SensorThermistor

I/O Breakout BoardTI ADS1178V- CalculationAirspeed Sensor:(4.7V + .2V)/2 = 2.45V Altitude Sensor:( 4.5V + .5V)/2 = 2.5V Temperature Sensor:(4.986V + .229V) / 2 = 2.493V

Vref CalculationAirspeed Sensor:(4.7V - .2V)/2 = 2.25V Altitude Sensor:( 4.5V - .5V)/2 = 2.0V Temperature Sensor:(4.986V -.229V) / 2 = 2.38V

Diff V_IN max.( V+) - ( V-)+/- 3.1 VV_IN max.V+ or V-5.1 VV_IN min.V+ or V-- 0.1V

SensorVout MaxVout MinV- VrefAirspeed4.70.22.452.25Altitude4.50.52.52.0Temperature4.9860.2292.4932.38

I/O Breakout BoardDigital Peripherals: Tyco Electronics GPS UART (NMEA) Analog Devices IMU SPI Telemetry (P10231) I2C, SPI, UART

I/O Breakout BoardMUX IC Manual Override:2 Quad 2 to 1 multiplexers

I/O Breakout BoardMolex 24 position connectorStandard DSUB Connectors Pitot-Static Probe (Airspeed)Ram Air PressureStagnation (Static)

Control Code Processor

CCP OverviewOMAPARMLinuxFixed point TI DSPDSP/BIOS running RT workshop Control SystemSensor data is memory mapped with DMA from the IO controller over a dedicated link

Incremental DesignGumstix (target for MSD 2)Ready-to-run system on a moduleSelf-sustained (low to no dependency count)Readily available, non-existent lead timeTopedo SOMSmaller + lower power consumption than GumstixHigher throughput achievableCustom BoardCheapest, fastest, most efficient yet most complicated solutionAn implementation meeting every need marked HIGH has to be met before proceeding

GumstixBoard requires nothing power2 expansion slots breakout McBSP and GPMCBoard lacks DMA support for GPMCImplementation will use DMA with McBSPDMA will be configured to routinely read data from McBSP and copy to a location in memory without interruptsSlower than GPMC, uses less pinsInterface is well knownTarget development time: 4 weeks

TorpedoSecond revisionMotivations: smaller board, GPMC with DMA becomes possibleUses OMAP3530 (just as the Gumstix)Product comes with verified schematics and layoutsRelease date - late DecemberExpected price - $150Target development time: 4 weeks

Custom boardReasons to improve on TorpedoOMAP3525 is cheaper than the 3530TPS65920 consumes less power, requires less layout area (fewer discrete components are required)Development timeSoftware and interface overlaps with TorpedoSchematics and layout can mostly be reused

McBSP with DMA

McBSP contdMulti-channel Buffered Serial Port(High speed serial)Asynchronous Synchronous supportedDMA would be used to limit the use of the ARM processorMaximum clock speed (bit speed) can use L4 clock (96MHz)FPGA may not be able to reach thisBit speed may need to be halved and channel count double

GPMC contdGeneral Purpose Memory Controller (Interface)Typical SRAM interfaceAsynchronous/Synchronous supportedAllows external memory devices to be mapped into OMAPs memory address spaceBurst speeds (where Row address is latched) of 400MB/s supportedin reality speed is limited by FPGAs IO buffersGumstix cannot use this interface because DMA pins that would be used to notify L2 Memory of outdated data are not accessible

Control Code Processor - Software

Matlab IntegrationEnd User WorkflowSoftware Required:Matlab/SimulinkReal-time WorkshopTI C6x DSP ToolchainCode Sourcery ARM Toolchain

Vehicle Profiler

Control Code Uploader

Control Code Processor OSLinuxOpenEmbedded FrameworkTI DSP-Bridge

Control Code Loader Daemon

Control Code Wrapper

BudgetController Platform

ITEMPRODUCT COST ESTOUR COST ESTPower Controller$4.50$0.00Linear Regulators$2.80$0.00Switching Components$7.00$7.00Spartan 3E FPGA$24.90$24.90FPGA Config IC$4.25$4.25FLASH Boot Memory$2.56$0.00Oscillator$2.63$2.63Oscillator$2.63$2.63USB to dual RS232$6.99$6.99EEPROM for FT2232$0.37$0.378ch 16-bit ADC$25.42$0.00Bidirectional Voltage Translator$2.00$0.008-bit DAC$2.48$0.00Gumstix$170.00$170.00Gumstix Dev Board$0.00$50.00Board to Board Conex$25.00$25.00Misc Passives$30.00$30.00External Connectors$50.00$50.00Enclosures$20.00$20.00PCB FAB$116.00$248.00Control Platform Total$499.53$641.77

BudgetUAV I/O Breakout

24 pin, 0.1" Header Pins6.84$6.84Dual Flip-Flop1.001.00Quad 2 to 1 Multiplexer0.400.4010k POT6.68$6.68Airspeed Sensor11.70$0.00Altitude Sensor5.80$0.00Temperature Sensor34.00$0.00Analog Devices IMU$527.44$0.00GPS61.50$0.00Pitot Static Probe160.00$0.00Mounting Chuck35.00$0.00

UAV IOB Total$527.44$13.52

Budget

Final ProductThis ProjectTotal$1,026.97$655.29

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MSD Project 10236

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