MSC8156 DSP Processor and the Baseband MarketRysavy research Freescale Focus •3G-LTE •HSPA+...

TM

Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009.

MSC8156 DSP Processor and the Baseband Market

July 2009

Barry SternBaseband DSP Product Line, Marketing Manager

AN144

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009. 2

Agenda

► Baseband Market Evolution and Freescale Focus► MSC8156 DSP Highlights

• Device Block Diagram• New DSP Core and Platform• MAPLE-B – Baseband Accelerators

►MSC8156 Enablement• Hardware & Software

► Summary


Freescale High-End DSPs

WiMAXPico

TD-SCDMAbase station

TDD-LTEMacro

VoIP Carrier-Class Media Gateway

Video ConferencingMCU

Trunking Gateway Wireless TRAU

Gateways

High-End IPBX

Multicore DSPs for Voice and Video Gateways

Multicore DSPs for Multistandard Wireless Base Stations

WiMAXMacro

Common denominator: Drive for optimal programmable DSP performance density (Cost, Power)

3G-LTE & 3GMacro

… Deliver scalable, programmable solutions that extend the user migration to new services

http://www.airvananet.com/images/graphics/ip_rnc_fron2.jpg�


Broadband Wireless Timelines

Rysavy research

Freescale Focus•3G-LTE•HSPA+•Advanced-LTE•WiMAX/802.16m


3G Evolution – from Thin to Thick Data Pipe

► Increasing integration for high data rates and low latencies► Algorithm differentiation and flexibility require high-performance

multicore DSP for programmability combined with integrated baseband accelerators for cost and power efficiency

3G-LTE Significantly Outperforms 3G Standards

WCDMA0.5 Mbpsat 5 MHz

HSDPAUp to

14 Mbps DLat 5 MHz

HSPA+Up to

42 Mbps DL11.5 Mbps UL

at 5 MHzHSUPAUp to

5 Mbps ULat 5 MHz

3G-LTE300+ Mbps DL

at 20 MHz

2003 – 2004 2005 – 2006 2007 – 2008 2009 – 2010 2011 – 2012


Wireless Peak Data Rates over Time

Rysavy research


Freescale Building Blocks for Wireless Base Stations

ATM

WCDMA(HSPA)

Rich Multimedia & VoIP capable

IP IP

ATM IP Evolved RAN

LTE RadioLow Latency PHYup to 300 MbpsOFDM, MIMO

Evolving to All-IP

Consolidated GSN/RNC Functions

S1

X2

3G RAN

3G-LTE Evolved Network3G Network

NetworkEvolution

IP RoutingHigh bandwidth, Low latencyLow-cost, Simpler Architecture

TM

Low Latencyin RAN < 5ms

Scalable CapacitySpectrum Efficiency Scalable bandwidth

High Speed Data Rate100Mbps (DL), 50Mbps (UL)

Ease of Upgradereasonable OPEX/CAPEX

Power/Cost OptimalArchitecture

New RAN ArchitectureIP Routing

LTE RadioSC-FDMA (UL), OFDMA (DL)

FEC, MIMO

All IP NetworkSecurity

Flexible SpectrumRF Linearity

Timing SynchronizationIEEE1588

High Speed Interfaces

LDMOS TechnologyHigh Eff, Low cost package

PHY Processing

High Power RF

Baseband Accelerators

sRIO, PCI-Ex, GigESerDES, LVDS

Packet process, SecurityEth. Protocols, Encryption

Multicore QorIQScalable CPU Platforms

MAC Processing

Multicore DSPHigh Performance Platform

Key Technology Challenges Freescale Solutions

14.4 Mbps

Node B Node B

RNC

MSC Server/MGW xGSN

eNB

aGW

eNB

IP Transport

Next Generation

RNC


3G-LTE & WiMAX Base Station Portioning

► Layer 1 PHY, Layer 2 MAC ► No FPGA/ASIC required► Scalable platform

MSBA8100

DUC, DDC RLC

(ARQ)MAC

(HARQ)RF/IF

Sector Processing for Radio Baseband

Freq Process OFDMA/ SCFDMA

User Processing

inc. FEC

Turbo

FFT.

MAC-CPS

SchedulerDUC, DDC

MAC-CSRF/IF

Layer 1 PHY

Freq Process PUSC,

Ranging, Eq., MRC, STC

User processing FEC, HARQ, QAM mod…

WiMAX

Turbo

FFT

S1/X2 Network Interface

PDCP

Network Interface

Scheduler

sRIO/GigE

sRIO/GigE

QorIQBridge

QorIQ

IP or ATM/TDM

sRIO-to-

CPRI

To Antenna

Layer 1 PHY Layer 2 MAC

Layer 2 MAC

gnal

Control

Radio Layer1 – Physical Layer

Radio Layer2 – MAC Layer

NetworkInterface

DUC/DDCRF Small

SignalRFPA

MSC8156

sRIO

RF Products (HV07)

3G-LTE


MSC8156 Multicore DSP – HighlightsWireless Infrastructure Baseband Processor


MSC8156 Highlights ► Target Wireless Base Station Systems

• 3G-LTE, TDD-LTE, WiMAX, HSPA+ and TD-SCDMA

• Meets all leading future wireless technologies

► Multi-Standard Technology• Single Sector 3G-LTE• Multi-sector WIMAX• Multi-carrier TD-SCDMA• Multi-sector HSPA along with external chip rate

acceleration

► Pioneering Expertise• Leveraging multicore architecture expertise by

introducing its 4th generation multicore DSP• First to implement Turbo/Viterbi accelerators in

DSP—compliant to latest OFDMA standards

► Highly Efficient Intenal Memory • Large on die low latency memory:

6x512KB of L2/M2 + 1MB M3 = 4Mbyte

► MAPLE-B Accelerator • High throughput, multi-standard compliant,

re-programmable

MSC8156 Device Performance • Optimized Programmable

Performance• Based on next generation

SC3850 DSP core, delivers up to 48 GMACS

• 6 GHz effective performance• Added Intelligent application

specific accelerators• High-speed standard interfaces

• 2xsRIO, 2xSGMII, 2xDDR-3, PCI-Express

• Highly optimized multilevel memory• High speed DDR interface


MSC8156 DSP Now Sampling

• Target applications• PHY layer processing for FDD-LTE, TDD-LTE, HSPA+, TD-SCDMA, WiMAX channel cards in NodeB BTS

• Key advantages• Industry’s highest performance Programmable DSP, outperforms competition

• Featuring six fully-programmable 1GHz DSP cores delivering 6GHz of DSP processing power plus innovative, multistandard application specific accelerators

• Supports at least 3G-LTE 10Mhz sector, UL+DL including MiMO in a single device

• Status• Samples and ADS shipments to multiple industry leading OEMs started 8/1/09

• Functionality validation: Fully Covered

M3 SharedMemory1056 KB

DDR 2/3 800M/64bMemory

Controller

CLASS – Non-Blocking Switch Fabric H/W Semaphores

I²C, SPI, UART, GPIOs

CLA

SS

–N

on-Blocking S

witch Fabric

CLA

SS

–N

on-Blocking S

witch Fabric

DMA Engine

MAPLE-B BasebandAcceleration Engines

Turbo, Viterbi, FFT/DFT, CRC

2x GbESGMII/RGMII

SecurityAcceleration

EngineSerDes x4

On-Chip Network2x sRIO x4/x1,

1x PCIe x4/x2/x1

SerDes x4

TDM Highway4 ports

DDR 2/3 800M/64bMemory

Controller

SC3850 1GHz Core

32KB L1I-Cache

32KB L1D-Cache

512KB Unified M2/L2

SC3850 1GHz Core

32KB L1I-Cache

32KB L1D-Cache

512KB Unified M2/L2

SC3850 1GHz Core

32KB L1I-Cache

32KB L1D-Cache

512KB Unified M2/L2

SC3850 1GHz Core

32KB L1I-Cache

32KB L1D-Cache

512KB Unified M2/L2

SC3850 1GHz Core

32KB L1I-Cache

32KB L1D-Cache

512KB Unified M2/L2

SC3850 1GHz Core

32KB L1I-Cache

32KB L1D-Cache

512KB Unified M2/L2


MSC8156E Block Diagram

Virtual

Interrupts &

Hardware Semaphores

BootROM

JTAG/SAP

DDR 2/3Controller

64-bit @ DDR800

I2C

UART

200Mbps

TDM1024Ch.

MAPLE-B

TVPE

RISC RISC

FFTPE

DFTPE

M3Memory

1056 KB

8GB/s

1 Gbps

SecurityEngine

QUICCEngineTM

1GbpsEthernet

1GbpsEthernet

1 Gbps

RISC RISC

SPI

8 GB/s

SC3850DSP Core

800MHz-1GHzStarCore SC3850

Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

4GB/s

32 ch.DMA

8 GB/s8 GB/s

8 GB/s

SC3850DSP Core


Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

4GB/s

8 GB/s

SC3850DSP Core


Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

4GB/s

8 GB/s

SC3850DSP Core


Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

4GB/s

8 GB/s

SC3850DSP Core


Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

4GB/s

8 GB/s

SC3850DSP Core


Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

4GB/s

<8GB/s

Non-blocking Switching Matrix 12 masters x 8 slaves each with 128 bit i/f

4GB/s

8 GB/s

SRIO1x/4x

SRIO1x/4x

OCN8

LYNX LYNX

High Speed Serial Interfaces (HSSI)

PCI-EX

DDR 2/3Controller

64-bit @ DDR800

<8GB/s

Two 1x/4x 3.125GbaudPCIe 1x/4x, two SGMII

RGMIIRGMII

8 GB/s


StarCore® DSP Core Architecture Roadmap

• MMU Support• Additional ASI• Enhanced Video• Dynamic Branch

Prediction• Additional SIMD

Instructions• Memory Protection• Prediction

• Up to 6-Issue VLIW Architecture• VLES • SIMD

MSC711x, MSC8101/3, MSC8122/26/12/13, Wireless subscriber

MXC (2.5G, 3G, 3.5G)

V2

V3

V5

SC1000 products…

SC140e products…

SC3400 products…1 GHz and

beyond(90nm)

V7 products…

V6 SC3850 products…

• Enhanced Control code Support

• 8 MAC/cycle

MSC8144/E

MSC8156


StarCore® DSP Core Architecture

►StarCore core consists of the following main units:• Data arithmetic logic unit (DALU) that contains four instances of an arithmetic

logic unit (ALU) and a data register file• Address generation unit (AGU) that contains two address arithmetic units (AAU)

and an address register file• Program Control Unit (PCU)

AGU DALUPCU

ALU0 ALU1

OCE(Debug) RSU – Resource Stall Unit

BTB

Data RegistersAddress Registers

XA_A

DD

R

XB_A

DD

R

3232

XB_D

ATA

64

XA_D

ATA

64

XP_A

DD

R

32

Memory Sub-SystemXP

_DA

TA

128

Instr. Bus

Dispatcher

COF, Loop, INTREG

MAC3a

MAC3b

Logic3

MAC3a

MAC3b

Logic3

MAC2a

MAC2b

Logic2

MAC2a

MAC2b

Logic2

MAC1a

MAC1b

Logic1

MAC1a

MAC1b

Logic1

MAC0a

MAC0b

Logic0

MAC0a

MAC0b

Logic0

WRQ


SC3850 DSP Sub-System Features – Caches►Caches optimized to give best performance reducing TTM► L1 caches

• Instructions and Data caches both: 32 KB, 8 way Data cache supports Write Back allocate and Write Through policies

• Advanced automatic pre-fetching: Line pre-fetch with critical word first and next line pre-fetch

• SW-controlled pre-fetching with cache control instructions

►L2/M2 memory system• 512 KB, configurable as L2 cache or M2 SRAM in

64 KB banks• M2 SRAM accessible by DMA• L2 cache: 8-ways, unified program and data• Programmable cache way partitioning according

to address ranges• Low latency to the core (10-12 cycles)• SW-triggered DMA like Pre-fetch channels operate

in the background• DMA based “Stashing” to DDRz


MAPLE Baseband Acceleration - Positioning

Flexibility

Cost

Hardware/ASIC

MAPLE

Flexibility:• Technologies/standards modifications• Algorithmic modifications• Architecture options• Solution scalability

Cost:• Power dissipation• Silicon area

Programmable System Interface (PSIF)

• 1 to 4 RISC controllers• 1-12 Processing Elements• 1-4 System DMA’s & internal DMA’s

PE PE PEPEPE

• Legoland integrations• From Macro to Femto• Mix and match different PE’s for various

solution scalability and derivatives

FPGA


MAPLE-B Block Diagram

PSIF : Programmable System InterfaceTVPE : Turbo/Viterbi Processing EngineFFTPE : FFT Processing EngineDFTPE : DFT Processing EngineCRCPE: CRC processing Engine

PSIF

CESlave

Rou

ting

and

Con

fig

I/O Data Buffer

FFTPE

TwiddlesMemory SBIF

Radix 8Cells

Radix 4Cells

Radix 2Cells

SIF

TwiddlesMemory

I/O Data Buffer

DFTPE

Rou

ting

and

Con

fig

Radix 4Cells

Radix 5Cells

Radix 3Cells

Radix 2Cells

SBIF

SIF

DATASRAM16kB

DATASRAM16kB

CD , NII, HO MEM

CTL

CDLEXTL

EXT MEM

TVPE

NIILHOL

SIFSIF

Interrupts

DRE0 DRE1 DRE2 DRE3VRE

Arbitration and switching

SystemDMA Engine MAG2DRAM IRAM

16kBRISC 1

CoreIRAM 16kB

RISC 0 Core PIC

DRAM

2x 64b 450 MHz

64b 450 MHz

Local DMA/CRC PE x2

PSIF config


MAPLE-B Performance and Standards Compliance WiMAX Systems MAPLE-B (MSC8156)Turbo DecodingOptional support for sub-block de-interleaving

> 195 Mbps (6 iterations)

Viterbi DecodingOptional support for periodic de-puncturing

> 100 Mbps (Tail-biting multi-iteration)

FFT/IFFTOptional support for guard bands insertion

> 350 Msps using 2 units (FFTPE, DFTPE)

CRC, Insertion for DL and check for UL > 10 Gbps , CRC16 (PDU)

IEEE® 802.16 Rev23GLTE FDD/TDD Systems MAPLE-B (MSC8156)Turbo DecodingOptional support for sub-block de-interleaving

> 200 Mbps (6 iterations)


> 100 Mbps (Tail-biting multi-iteration)

FFT/IFFT/DFT/IDFTOptional support for guard bands insertion

> 280 Msps FFT using FFTPE> 175 Msps DFT using DFTPE

CRC, Insertion for downlink and check for uplink > 10 Gbps , CRC24A, CRC24B

3GPP TS 36.212 FEC & CRC

UMTS – WCDMA, HSPA+ MAPLE-B (MSC8156)Turbo Decoding > 165 Mbps (6 iterations)


> 115 Mbps (Zero tail, K=9)

FFT/IFFT > 350 Msps FFT using FFTPE and DFTPE

CRC, Insertion for DL and check for UL > 10 Gbps , CRC24

3GPP TS 25.212 (FDD) FEC & CRC3GPP TS 25.222 (TDD) FEC & CRC


MSC8156 Other Building Blocks

►Security engine acceleration – enabling data protection for MAC/L2 processing

►Dual Serial RapidIO® – x4 @3.125G, high throughput interfaces connecting to antenna, L2/MAC processor and other DSPs on channel card

►Dual gigabit Ethernet – control path

►PCI Express® – x4 @ 2.5G, high throughput interface connecting to L2/MAC processor or FPGA

►DDR 2/3 – high throughout memory interfaces

►TDM – 4 interfaces, each 256 channels


Freescale’s 1st Wave 45nm Products

PowerQUICC® MPC8569Flip Chip PBGA

Multicore DSP MSC8156Flip Chip PBGA

QorIQ™ P2020Wire Bond TEPBGA-II

► CHRT and IBM► General Sampling► Functionality, performance

execution on track

► CHRT and IBM► Sampling► Functionality, performance

execution on track

► CHRT and IBM► Sampling► Functionality, performance

execution on track


MSC8156 DSP Enablement


CodeWarrior™ Development Studio for StarCore® v10.0A complete development environment under Eclipse

►Eclipse IDE• Configuration wizards• Plug-In architecture• 3rd party community

►StarCore Build Tools• C/C++ optimizer compilers

►Software Simulators• Multicore functional accurate simulator• Core platform cycle accurate simulator• MAPLE integrated into multicore simulator

►SmartDSP - Operating Systems• Pre-emptive, high performance, field deployed,

networking stacks• Royalty-free

►Starcore Debugger• Multicore and multi-DSP• MSC8144 and MSC8156 targets

►Trace & Profile• Trace data offload via Ethernet using SmartDSP

HEAT technology


MSC8156 ADS (Evaluation Board)

• DSP – MSC8156 Multicore DSP

• Memories – DDR2/3, 1 GByte each• Ethernet Switches – SGMII & RGMII• SGMII/RGMII PHY• TDM – 2x E1/T1 Framers & PTMC• AdvancedMC™ (AMC) connector

• Dual 1000BaseX• Dual Serial RapidIO® x4/PCI Express® x4• TDM

• Board form factor – Dual-width AMC

• Availability – Now


MSC8156 - 3G-LTE Reference Software/Hardware

AMC Wireless Board References

Item Standard Description

L1Software 3GPP TS

36.211/ 36.212/ 36.213/36.214

Enablement Software for MSC8156:- ANSI-C Source for Channel estimation SISO/MIMO- UL MU-MIMO- DL MIMO- MMSE modulation demapping- UL / DL HARQ- Turbo Encoder

L2/L1 Interworking

3GPP TS 36.300

- Well defined L2/L1 Interface- Reuse possible across devices

Board AMC Multi-Standard Baseband AdvancedMC (AMC) Platform

- Sample quantities as Development Reference- Cards available to decrease time-to-market

Platform 3GPP TS 36.201

Quick Start integrated reference platform- Running L1/L2 multicore system software


MSC8156AMC – Reference Development System

MMC

I2C

Port 8:11

Port 4:7

Port 1

Port 0

Port 12:15

Port 17:20

FPGA

SRIO SWITCH[IDT 80KSW0005]

4x4x

4x4x

4x4x

EthernetRGMII Switch

[VSC7384]

4x4x

RJ45

4x4x 4x

4x

JTAG

JTAG

4x4x

JTAG Conn.

EEPROM

2:1 2:1

SRIO

PCIeSRIO/PCIe

EEPROM

EthernetTrans

[VSC8224]DD

R III

64 – bit

DD

R III

64 – bit

MSC8156GigE

I2CsRIOsRIO

JTAG

Mezzanine

GigEMDIO

MDIO

JTAG

DD

R III

64 –bitD

DR

III

64 –bit

MSC8156GigE

I2CsRIOsRIO

JTAG

Mezzanine

GigEMDIO

DD

R III

64 – bit

DD

R III

64 – bit

MSC8156GigE

I2CsRIOsRIO

JTAG

Mezzanine

GigEMDIO

RJ45

SPI Flash

SPI

SPI

SPI

4x4x

4x

I2C

EEPROM

Mini- USB

Mini- USB

USB

UART FT2232

EthernetEthernet

SRIO/PCIeSRIOSRIO

SRIO

SPI

{USB]

► High Density DSP Platform• 3x MSC8156 Multicore DSP – each with:

6x SC3850 StarCore® DSP cores at 1GHz + MAPLE-B baseband accelerator

2x 512MByte of 64-bit DDR3 memory

► Connectivity• Four 3.125Gbaud SRIO (x4) interfaces from

backplane to DSP farm via SRIO switch • Two 1000 Base-X Gigabit Ethernet interfaces

from backplane to DSP farm via Ethernet switch

► Module Management Controller (MMC)• Hot swapping• Board Control

► Target Applications• 3G-LTE, WCDMA, WiMAX base stations and

Media Gateway systems• Design reference and enablement platform for

customers and third parties

► Form Factor• Single Width AdvancedMC

► Availability• Alpha: July ’09• General: Q3’09


DDR

DDR2/DDR3

GbE

QorIQ/MPC85xx

GbEGbE

GbE

LBsRIO

Ant.

Bac

k Pl

ane

MSC8156 Solution - Delivering Low BOM CostsChannel Cards

4x

4x

4x

sRIOSwitch

DD

R

DD

R2/3

GbEGbE

sRIO

DD

R

DD

R2/3

GbEGbE

sRIO

MSC8156

DSP

MSC8156

DSP

sRIO

sRIO

LTE- FDD: • Single Sector 20 MHz, 2x4 MIMO UL, 4x4 MIMO DL• Up to 300 Mbps DL, Up to 150 Mbps UL

WiMAX-TDD:• 3 Sectors 10 MHz 2x4 MIMO UL, 4x4 MIMO DL• Up to 100 Mbps/Sector DL• Up to 14 Mbps/Sector UL

PHY MAC


Summary


Processing power equivalent to 6GHz DSP plus FPGA/ASIC Based on new SC3850 programmable DSP core Embedded with high throughput multistandard baseband

accelerators Industry’s first 45nm, six core DSP ideal for infrastructure Ready for deployment of cost-optimized base stations of 3G-LTE

MSC8156 - Solution for Multistandard base stationsMultistandard Baseband Solution

3G-LTETDD-LTEWiMAXHSPA+

TD-SCDMA

Ready for MostAdvanced Wireless

Standards

TD-SCDMA Solution6 Carrier base station

handling symbol rate and chip rate

3G-LTE Solution20 MHz 3G-LTE, 1 sector, MiMO

144Mbps downlink &76Mbps uplink

WiMAX Solution10 MHz, 3 sectors, 2Tx by

4Rx antenna single device handles150Mbps downlink & 42 uplink

HSPA+ SolutionMulti-sector HSPA+ with

external chip rate acceleration


MSC8122

MSC8112/3

Perf

orm

ance

& In

tegr

atio

n

2006 – 2007 2008 20092004 – 2005 2010

Wireless Infrastructure DSP RoadmapBinary Code Compatible

► Quad core► 500-MHz SC140► 8 (16-bit)

GMACs► 1.4Mbyte RAM► 90nm

MSC8126

► Quad core► 500-MHz SC140► 8 (16-bit) GMACs► Integrated Turbo

& Viterbi COPs► 1.4 Mbyte RAM► Ethernet, Serial► 90nm

MSBA8100 ► Six core DSP ► Supporting 3G-LTE, TDD-

LTE, WiMAX, TD-SCDMA, 3GPP, 3GPP2

► Six core 1-GHz SC3850 StarCore DSP

► 48 (16-bit) GMACs► MAPLE Accelerator► 4 Mbyte RAM► Dual 1G Ethernet (SGMII)► Integrated Security Accel.► Dual DDR3 800MHz-64b► Dual Serial RapidIO port x4 ► PCI Express® x4► 45nm

MSC8156

Enabled

► Accelerator device for 3G-LTE, TDD-LTE, WiMAX, TD-SCDMA, 3GPP, 3GPP2

► Turbo, Viterbi, FFT, DFT

► 512 KB internal RAM► DDR2► PCI► Dual Serial RapidIO

ports x4 (3.125 Gbaud)► Companion for

MSC8144► 90nm

► Quad core► 1-GHz SC3400 cores► 16 (16-bit) GMACs► 10.5 Mbyte RAM► Dual 1G Ethernet (SGMII)► ATM/Utopia► Integrated Security Accel.► Serial RapidIO® port x4

(3.125 Gbaud)► 90nm

MSC8144/E

MSC81xx

Future

Sampling

Production

► Tri & Dual core► 400/300-MHz SC140

Starcore cores► 8 (16-bit) GMACs► 1.4Mbyte RAM► 90nm► 2008 introduction

Next Generation SC3850 based DSPs

45nm

MSC81xx

In Development


► MSC8156 enables OEMs opportunity to take full advantage of LTE capabilities• Supports legacy 3G technologies as well as the newest wireless standards to enable using same DSP for

multiple technologies or in a multistandard base stations• 6 GHz raw performance with fully programmable cores• Embeds the unique MAPLE-B technology that accelerates Turbo and Viterbi, MiMO, CRC, Fast Fourier

Transform (FFT), Inverse Fast Fourier Transform (IFFT), Discrete Fourier Transform (DFT), Inverse Discrete Fourier Transform (IDFT) operations currently performed in FPGA/ASIC custom devices

► Manufactured at most advanced process technology• Helps to significantly increase performance and design energy efficient solution while integrating

functionality compared to previous generations process technologies• Help OEMs deliver cost effective solution, to design small form factor channel cards that take up less

space, increased functionality and consumes less power giving the opportunity to provide differentiated and competitive solutions for their customers

► High speed and standard interfaces pertinent to different board topologies• Meet required throughputs• Equipped with off-the-shelf ecosystem

► Cost-optimized solutions• Reduces channel card bill of material by reducing chip count and eliminates the need attach costly,

customized and power hungry dedicated devices • The combination of 6 cores DSP plus baseband accelerator into a single SoC can be used for final and

cost optimized system production

► Future Roadmap• Addressing the need for highly optimized solutions• Forward looking for further cost optimized 3G/4G-LTE Solutions

Freescale’s Value Add Base Station Solutions


Freescale Introduces Product Longevity Program

►The embedded market needs long-term product support, which allows OEMs to provide assurance to their customers.

►Freescale has a longstanding track record of providing long-term production support for our products.

►Freescale is pleased to introduce a formal product longevity program for the market segments we serve.

• For the automotive and medical segments, Freescale will manufacture select devices for a minimum period of 15 years.

• For all other market segments in which Freescale participates, Freescale will manufacture select devices for a minimum period of 10 years.

►A list of applicable Freescale products is available at www.freescale.com.


Q&A

►Thank you for attending this presentation. We’ll now take a few moments for the audience’s questions and then we’ll begin the question and answer session.

MSC8156 DSP Processor and the Baseband MarketRysavy research Freescale Focus •3G-LTE •HSPA+...

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Transcript of MSC8156 DSP Processor and the Baseband MarketRysavy research Freescale Focus •3G-LTE •HSPA+...