mp8051.ppt

UNIT - II

FEATURES 8-bit CPU optimized for control applications Extensive Boolean processing (Single-bit logic) capabilities 64K Program Memory address space 64K Data Memory address space 4K bytes of on-chip Program Memory 128 bytes of on-chip Data RAM 32 bidirectional and individually addressable 1/0 lines Two 16-bit timer/counters Full duplex UART 6-source/5-vector interrupt structure with two priority levels On-chip clock oscillator

PIN DETAILS

P1 P0RESET

+ _P3

P2

XTAL

BLOCK DIAGRAMInterrupt Control

4K ROM

128 RAM

Timer 0 Timer 1

CPUOSCBus Control

4 I/O Ports

Serial PortTXD RXD

P0

P1

P2

P3

ARCHITECURE

All

ARCHITECURE

1

ARCHITECURE

2

ARCHITECURE

3

MEMORY STRUCTUREExternal

60K

64K

ExternalSFR

64K

EXTEA = 0

INTEA = 1

4K

128 Data Memory

Program Memory

INTERNAL RAM STRUCTUREInirect Direct Addressing Addressing Only Only

SFR

Direct & Indirect Addressing

128 Byte Internal RAM

128 BYTE RAMGeneral Purpose Area

BIT Addressable Area 128 BYTE INTERNAL RAM Reg Bank 3 Reg Bank 2 Register Banks Reg Bank 1 Reg Bank 0

REGISTER BANK STRUCTUREBank 3 Bank 2

R0 R1 R2 R3 R4 R5 R6 R7 R0 R1 R2 R3 R4 R5 R6 R7

Bank 1Bank 0

R0 R1 R2 R3 R4 R5 R6 R7R0 R1 R2 R3 R4 R5 R6 R7

Program Status Word - PSW

CY

AC

F0

RS1 RS0 OV

-

P

SFRF8 F0 E8 E0 D8 D0 C8 PSW Acc B FF F7 EF E7 DF D7 CF

C0B8 B0 A8 A0 98 90 88 80 IP P3 IE P2 SCON P1 TCON P0 TMOD SP TL0 DPL TL1 DPH TH0 TH1 PCON SBUF

C7BF B7 AF A7 9F 97 8F 87

UNIT - III

TIMERS SERIAL PORT INTERRUPTS


TIMERS Timer 0Mode 0 Mode 1 Mode 2 Mode 3

Timer 1Mode 0 Mode 1 Mode 2

TIMER / COUNTEROSC 12C /T 0

TL

TH

TF(1 Bit)

C /T 1

(8 Bit) (8 Bit)

T PIN

TRGateINT PIN

INTERRUPT

TIMER 0OSC 12C /T 0

TL0 TH0

TF0

C /T 1

T 0PIN

TR0GateINT 0 PIN

INTERRUPT

x

TIMER 0 Mode 013 Bit Timer / CounterOSC 12T 0PIN

TR0GateINT 0 PIN

X

C /T 0C /T 1

TL0 TH0 (5 Bit) (8 Bit)

TF0

INTERRUPT

Maximum Count = 1FFFh (1111111111111)

TIMER 0 Mode 116 Bit Timer / CounterOSC 12T 0PIN

TR0GateINT 0 PIN

X

C /T 0C /T 1


TF0

INTERRUPT

Maximum Count = FFFFh (1111111111111111)

TIMER 0 Mode 28 Bit Timer / Counter with AUTORELOADOSC 12T 0PIN

TR0GateINT 0 PIN

X

C /T 0C /T 1

TL0 (8 Bit)Reload

TF0

INTERRUPT

TH0 (8 Bit)

Maximum Count = FFh (11111111)

TIMER 0 Mode 3Two - 8 Bit Timer / CounterOSC 12T 0PIN

TR0GateINT 0 PIN

X

C /T 0C /T 1

TL0 (8 Bit)

TF0

INTERRUPT

OSC

12

TH0 (8 Bit)

TF1

INTERRUPT

TR1

TIMER 1OSC 12C /T 0

TL1 TH1

TF1

C /T 1

T1PIN

TR1GateINT 1 PIN

INTERRUPT

TIMER 1OSC 12C /T 0

TL1 TH1

TF1

C /T 1

T1PIN

TR1GateINT 1 PIN

INTERRUPT

Y

TIMER 1 Mode 013 Bit Timer / CounterOSC 12T1PIN

TR1GateINT 1 PIN

Y

C /T 0C /T 1


TF1

INTERRUPT

Maximum Count = 1FFFh (1111111111111)

TIMER 1 Mode 116 Bit Timer / CounterOSC 12T1PIN

TR1GateINT 1 PIN

Y

C /T 0C /T 1


TF1

INTERRUPT

Maximum Count = FFFFh (1111111111111111)

TIMER 1 Mode 28 Bit Timer / Counter with AUTORELOADOSC 12T1PIN

TR1GateINT 1 PIN

Y

C /T 0C /T 1

TL1 (8 Bit)Reload

TF1

INTERRUPT

TH1 (8 Bit)

Maximum Count = FFh (11111111)

SFRs Related to TIMERTMODGate C/ M1 M0 Gate C/ M1 M0

Timer 1

Timer 0

TCONTF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

Timers

Interrupt


Write to BUFFERSQ D CL

SBUFFZero Detector

RXD O/P

Start

Shift

TX ControlCLKTX Clock TI Send

Serial Port InterruptRX Clock

RI

Receive Shift

TXDShift Clock

RI REN

RX ControlStart 1 1 1 1 1 1 1 0

RXD I/P

Input Shift Register

Load to BUFFER

SBUFFRead From BUFFER

SERIAL PORT Mode 0The Serial Port in Mode-0 has the following features: Serial data enters and exits through RXD TXD outputs the shifl clock 8 bits are transmitted / received The baud rate is fixed at (1/12) of the oscillator frequency

SERIAL PORT Mode 0

SERIAL PORT Mode 0

SERIAL PORT Mode 1The Serial Port in Mode-1 has the following features: Serial data enters RXD Serial data exits through TXD On receive, the stop bit goes into RB8 in SCON 10 bits are transmitted / received Start bit (0) Data bits (8) Stop Bit (1) Baud rate is determined by the Timer 1 over flow rate.

SERIAL PORT Mode 1

SERIAL PORT Mode 1

SERIAL PORT Mode 2The Serial Port in Mode-2 has the following features: Serial data enters RXD Serial data exits through TXD 9th data bit (TB8) can be assign value 0 or 1 On receive, the 9th data bit goes into RB8 in SCON 11 bits are transmitted / received Start bit (0) Data bits (9) Stop Bit (1) Baud rate is programmable (1/32) or (1/64) of the oscillator frequency

SERIAL PORT Mode 2

SERIAL PORT Mode 2

SERIAL PORT Mode 3The Serial Port in Mode-3 has the following features: Serial data enters RXD Serial data exits through TXD 9th data bit (TB8) can be assign value 0 or 1 On receive, the 9th data bit goes into RB8 in SCON 11 bits are transmitted / received Start bit (0) Data bits (9) Stop Bit (1) Baud rate is determined by the Timer 1 over flow rate.

SERIAL PORT Mode 3

SERIAL PORT Mode 3

SFRs Related to SERIAL PORTSCONSM0 SM1 SM2 REN TB8 RB8 TI RI

PCONSMOD

-

-

-

GF1

GF0

PD

IDL


INTERRUPTSThe Interrupt structure has the following features: 6 sources / 5 vectored interrupts Each interrupts can be individually programmable Each interrupts can have two priority levels Priority levels can be programmed All interrupts can be masked by a single bit - EA External interrupt type can be programmed Edge triggered Level Triggered

TIMER / COUNTERINT 0IE0

TF 0INT 1IE1 INTERRUPT SOURCES

TF1TI RI

TIMER / COUNTERIE Reg IP Reg

High Priority Interrupt

INT 0

0 IT 0 1

IE0

TF 00

INT 1

IT1

IE1

1

Interrupt Polling Sequence

TF1TI RIIndividual Enable Global Disable Low Priority Interrupt

SFRs Related to INTERRUPTSIE IP-

EA

-

-

ES

ET1

EX1

ET0

EX0

-

-

PS

PT1

PX1

PT0

PX0

Priority Within LevelRI / TI LOW TF1 TR1 TF0 TF1 IE1 TF0 IE0 HIGH

TCONTR0 IE1 IT1 IE0

IT0

MEMORY INTERFACINGExternal RAM Interfacing :-

P1

P0

Data

EXT RAM

MCS 51P3 ALE P2

ALE

Address

WR

RD

RD WR

MEMORY INTERFACINGExternal RAM Interfacing :D0

AD0

D CLK

Q

A0 D1

AD1

DCLK

Q

A1 D2

AD2

D CLK

Q

A2 D3

AD3

D CLK

Q

A3

MEMORY INTERFACINGExternal ROM Interfacing :-

P1

P0

Instr

EA

EXT ROMALE

MCS 51P3 ALE P2

EEPROMAddress

PSEN

CE

Instruction Set5 Groups Arithmetic Operation Group Logical Operation Group Data Transfer Group Boolean Variable Manipulation Group Program Branching Group


Arithmetic Operation GroupADD ADD ADD ADD A,Direct A,Rn A,@Ri A,#Data

Arithmetic Operation GroupADDC ADDC ADDC ADDC A,Direct A,Rn A,@Ri A,#Data

Arithmetic Operation GroupSUBB SUBB SUBB SUBB A,Direct A,Rn A,@Ri A,#Data

Arithmetic Operation GroupINC INC INC INC A Direct Rn @Ri

Arithmetic Operation GroupDEC DEC DEC DEC A Direct Rn @Ri

Arithmetic Operation GroupINC MUL DIV DA DPTR AB AB A


Logical Operation GroupANL ANL ANL ANL ANL ANL A,Direct A,Rn A,@Ri A,#Data Direct,A Direct,#Data

Logical Operation GroupORL ORL ORL ORL ORL ORL A,Direct A,Rn A,@Ri A,#Data Direct,A Direct,#Data

Logical Operation GroupXRL XRL XRL XRL XRL XRL A,Direct A,Rn A,@Ri A,#Data Direct,A Direct,#Data

Logical Operation GroupCLR A CPL A RL A RLC A RR A RRC A SWAP A


Data Transfer GroupMOV MOV MOV MOV MOV MOV MOV A,Direct A,Rn A,@Ri A,#Data Rn,Direct Rn,@Ri Rn,#Data

Data Transfer GroupMOV MOV MOV MOV MOV MOV MOV Direct,Direct Direct,Rn Direct,@Ri Direct,#Data Direct,A @Ri,A @Ri,#Data

Data Transfer GroupMOV @Ri,Direct MOV DPTR,#DATA16 MOVC A,@A+DPTR MOVC A,@A+PC MOVX A,@Ri MOVX @Ri,A MOVX @DPTR,A

Data Transfer GroupPUSH Direct POP Direct XCH A,Rn XCH A,Direct XCH A,@Ri XCHD A,@Ri


Boolean Variable Manipulation Group CLR C CLR bit SETB C SETB bit CPL C CPL bit

Boolean Variable Manipulation Group ANL ANL ORL ORL MOV MOV C,bit C,/bit C,bit C,/bit C,bit bit,C

Boolean Variable Manipulation Group JC JNC JB JNB JBC rel rel bit,rel bit,rel bit,rel


Program Branching GroupACALL LCALL RET RETI AJMP LJMP SJMP addr11 addr16

addr11 addr16 rel

Program Branching GroupJMP JZ JNZ CJNE CJNE CJNE CJNE @A+DPTR rel rel A,Direct,rel A,#Data,rel Rn,#Data,rel @Ri,#Data,rel

Program Branching GroupDJNZ Rn,rel DJNZ Direct,rel NOP

UNIT - IV

UNIT - IV

8255Programmable Peripheral Interface

24 Programmable I/O pins Three Configurable Ports - A,B & C BSR Mode TTL Compatible




A1 0 0 1 1

A0 0 1 0 1

Select PA PB PC Control reg.

8255Programmable Peripheral InterfaceControl Word General

D7 D6 D5 D4 D3 D2 D1 D0

Group AMode Selection 00 = Mode 0 01 = Mode 1 1x = Mode 2 PortA 1 = Input 0 = Output PortC (Upper) 1 = Input 0 = Output BSR Mode Select 0 = BSR Mode Enabled 1 = BSR Mode Enabled

Group BPortC (Lower) 1 = Input 0 = Output PortB 1 = Input 0 = Output Mode Selection 0 = Mode 0 1 = Mode 1

8255Programmable Peripheral InterfaceControl Word BSR Mode

D7 D6 D5 D4 D3 D2 D1 D0

Bit Set/Reset X X XNot Used 1 = Set 0 = Reset

Bit Select000 = Bit 0 001 = Bit 1 010 = Bit 2 011 = Bit 3 100 = Bit 4 101 = Bit 5 110 = Bit 6 111 = Bit 7

0BSR Mode Selected

8255Programmable Peripheral InterfaceMode 0 :-



8253Programmable Interval Timer

3 Independent 16bit Counters DC - 2.6MHz BCD or Binary Counting Programmable Counting Modes Single Supply Operations

8253Programmable Interval TimerPin Diagram :-

8253Programmable Interval TimerBlock Diagram :-

8253Programmable Interval TimerSystem Interface :-

8253Programmable Interval TimerControl WordSC1 SC0 RL1 RL0 M2 M1 M0 BCD

Read / Load00 = Counter Latching 01 = Read/Load MSB only 10 = Read/Load LSB only 11 = Read/Load LSB first then MSB

Binary / BCD1 = BCD 0 = Binary

Mode Select000 = Mode 0 001 = Mode 1 X10 = Mode 2 X11 = Mode 3 100 = Mode 4 101 = Mode 5

Select Counter00 = Select Counter 0 01 = Select Counter 1 10 = Select Counter 2 11 = Illegal

8253Programmable Interval TimerMode 0 :-






8279Programmable Keyboard / Display Interface

Simultaneous Keyboard & Display Drive Scanned Keyboard Mode Scanned Sensor Mode 8-Character Keyboard FIFO Duel 8 / 16 Numerical Display R / L Entry 16 bit Display RAM Mode Programmable From CPU Programmable Scan Timing Interrupt Output on Key Entry

8279Programmable Keyboard / Display InterfacePin Diagram :-

8279Programmable Keyboard / Display InterfaceSignal Diagram :-

8279Programmable Keyboard / Display InterfaceBlock Diagram :-

8279Programmable Keyboard / Display InterfaceSystem Interface :-

8251Programmable Communication InterfacePin Diagram :-

8251Programmable Communication InterfaceBlock Diagram :-

8251Programmable Communication InterfaceSystem Interface :-

8251Programmable Communication Interface

Mode Instruction Format

8251Programmable Communication Interface

Command Instruction Format

UNIT - V

1) Stepper Motor Control 2) Matrix Keyboard 3) Dynamic 7 Segment Display 4) Analog to Digital converter 5) DC Motor Control 6) LCD Display 7) Serial Data Transfer

STEPPER MOTOR CONTROL Stepper Motor Winding Diagram Specifications Rotation / Excitation methods Clockwise / Anti Clockwise Sequence Single & Multi Winding Excitation Driving unit Digital & Analog

STEPPER MOTOR CONTROLW1 1 0 0 1 1 0 0 1 W2 1 1 0 0 1 1 0 0 W3 0 1 1 0 0 1 1 0 W4 0 0 1 1 0 0 1 1

STEPPER MOTOR CONTROL

MATRIX KEYBOARD General Keyboard Structure Adv & Disadv of General Keyboard Layout of Matrix Keyboard Scanning and Sense Lines Scan Sequence Key De-bounce Methods

MATRIX KEYBOARD DRIVERScan Lines Sense Lines

7 8 9 5 6

4

1

MATRIX KEYBOARD

0 #

2 3

MATRIX KEYBOARDSense Lines RL2 RL1 RL0 SL0 Scan Lines

1 4 7

2 5 8 0

3 6 9 #

SL1

SL2 SL3

MATRIX KEYBOARDSL3 SL2 SL1 SL0 RL2 RL1 RL00 0 1 0 0 1 0 0 1 1 0 0 1 0 0 1 0

1 2 3 4 5RL2 RL1 RL0 SL0 SL1

0 0 0 01

0 0 1 0

0 1 0 0

1 0 0 0

0 1 0 0 1 0 0

1 4 7

2 5 8 0

3 6 9 #

10 0

00 1

01 0

6 7 8 9 0

SL2 SL3

1

0

0

#

MATRIX KEYBOARD

MATRIX KEYBOARD

DYNAMIC 7 SEGMENT DISPLAY Seven Segment Display Eight LEDs Two types Common Anode & Common Cathode Dynamic Seven Segment Display Scan Sequence

DYNAMIC 7 SEGMENT DISPLAYSeven Segment Displaya f b

gVe d dp c

a

b

c

d

e

f

g

dp

Common

DYNAMIC 7 SEGMENT DISPLAY



ANALOG TO DIGITAL CONVERTER ADC Working Types Applications Specifications No of Bits, i/p, o/p etc

ANALOG TO DIGITAL CONVERTER

DIGITAL TO ANALOG CONVERTER

DC MOTOR CONTROL DC Motor Speed Control Methods Advantage of PWM Method Driving Circuit

DC MOTOR CONTROL

LCD DISPLAY Principle of LCD 16x2 LCD LCD Module Driver & Screen RAM Character Molding Display Type Cursor, L/R Entry etc

LCD DISPLAY

LCD DISPLAY

LCD DISPLAY

Pin number1 2 3 4

SymbolVss Vcc Vee RS

Level0/1

I/OI

FunctionPower supply (GND) Power supply (+5V) Contrast adjust 0 = Instruction input, 1 = Data input 0 = Write to LCD module, 1 = Read from LCD module Enable signal Data bus line 0 (LSB)

5 6 7

R/W E DB0

0/1 1, 1->0 0/1

I I I/O

89 10 11 12 13 14

DB1DB2 DB3 DB4 DB5 DB6 DB7

0/10/1 0/1 0/1 0/1 0/1 0/1

I/OI/O I/O I/O I/O I/O I/O

Data bus line 1Data bus line 2 Data bus line 3 Data bus line 4 Data bus line 5 Data bus line 6 Data bus line 7 (MSB)

Code InstructionRS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Description

Executi on time

Clear display Cursor home Entry mode set Display On/Off control Cursor/disp lay shift Function set Set CGRAM address Set DDRAM address Read busyflag and address counter Write to CGRAM or DDRAM Read from CGRAM or DDRAM

0 0

0 0

0 0

0 0

0 0

0 0

0 0

0 0

0 1

1 *

Clears display and returns cursor to the home position (address 0). Returns cursor to home position (address 0). Also returns display being shifted to the original position. DDRAM contents remains unchanged. Sets cursor move direction (I/D), specifies to shift the display (S). These operations are performed during data read/write. Sets On/Off of all display (D), cursor On/Off (C) and blink of cursor position character (B). Sets cursor-move or display-shift (S/C), shift direction (R/L). DDRAM contents remains unchanged. Sets interface data length (DL), number of display line (N) and character font(F). Sets the CGRAM address. CGRAM data is sent and received after this setting. Sets the DDRAM address. DDRAM data is sent and received after this setting.

1.64mS

1.64mS

0

0

0

0

0

0

0

1

I/D

S

40uS

0 0 0 0

0 0 0 0

0 0 0 0

0 0 0 1

0 0 1

0 1 DL

1S/C

DR/L

C * *

B * *

40uS

40uS 40uS

N

F

CGRAM address

40uS

0

0

1

DDRAM address

40uS

0

1

BF

CGRAM / DDRAM address

Reads Busy-flag (BF) indicating internal operation is being performed and reads CGRAM or DDRAM address counter contents (depending on previous instruction).

0uS

1

0

write data

Writes data to CGRAM or DDRAM.

40uS

1

1

read data

Reads data from CGRAM or DDRAM.

40uS

LCD DISPLAY

mp8051.ppt

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