MOS Logic - Hacettepe Universityusezen/ele315/nmos-cmos-2sp.pdf · MOS Logic s e t a g S OM•N –...
Transcript of MOS Logic - Hacettepe Universityusezen/ele315/nmos-cmos-2sp.pdf · MOS Logic s e t a g S OM•N –...
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MOS Logic
MOS Logic
• NMOS gates– Fabrication– Modes of operation
• NMOS Inverters and Analysis– General NMOS Inverter– Resistor Loaded NMOS Inverter– E-MOSFET loaded NMOS Inverter– D-MOSFET loaded NMOS Inverter
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NMOS (n-channel E-MOSFET) Fabrication Examples
CMOS Fabrication Example
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IV Characteristics
NMOS modes of operation
(a) Cutoff mode (b) Linear mode
(c) Saturation mode (d) body-bias effect on threshold voltage
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General NMOS Inverter
Graphical analysis when load is a resistor
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Load capacitance
Power dissipation
PDD = VDD (IDD(OH) + IDD(OL)) / 2
VDD IDD(OL) / 2
(a) Static power dissipation
(b) Transient power dissipation
PD = CL V2DD
: frequency at which the gate is switched
PTOTAL = PDD + PD
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Resistor Loaded NMOS
Resistor Loaded NMOS Inverter
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Propagation Delay
Fall time
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E-MOSFET Loaded NMOS
E-MOSFET Loaded NMOS Inverter
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D-MOSFET Loaded NMOS
D-MOSFET Loaded NMOS Inverter
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NMOS Gates
Symbol Shorthands
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NOR Gate
NOR Gates
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NAND Gate
OR Gates
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AND Gates
Example
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AOI (AND-OR-INVERT) Gates
Examples
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XOR/XNOR Gates
Hysteresis
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Schmitt Trigger
Transmission Gate
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Transmission Gate Array
CMOS Logic
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CMOS Inverter
CMOS Inverter
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Symmetric CMOS Inverter
Capacitance Effect on Transition - 1
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Capacitance Effect on Transition - 2
Electrostatic Discharge (ESD) Protection
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CMOS Gates
Symbol Shorthands
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CMOS NAND Gate
CMOS NAND Gates
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CMOS NOR Gate
CMOS NOR Gates
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CMOS AND/NAND Gate
CMOS OR/NOR Gate
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CMOS AOI Gates
CMOS AOI Gates
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CMOS AND-OR Gate
CMOS OAI Gates
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CMOS AOI Gates
Example
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Example
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XOR Gate