Modelling Hardware and Software for Fast Serial Interprocessor
Transcript of Modelling Hardware and Software for Fast Serial Interprocessor
Modelling Hardware and Software for Fast Serial
Interprocessor Communication
Wolfgang Fengler, Bernd Dä[email protected]
tu-ilmenau.de/ra
Ilmenau Technical University
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Topics
1. Introduction
2. The Project
3. The Model
4. Comparison of Results
5. Conclusion
This work is supported by German Research Council (DFG) under SFB 622.Some figures are taken from: MLDesigner, Copyright (C) 2006 MLDesign Technologies, Inc. All rights reserved.
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1. Introduction
Efficiency of model based design depends on availibility of accurate models for all system components
Off-the-shelf components often provide functio-nal descriptions but no formal models
Design model must combine parts derived from different sources
Case study will investigate modelling process within a real project
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2. The Project: Hardware Platform
Multiprocessor DSP system:• TMS320C67x family (Texas Instruments)• Up to six processing nodes• Controls high precision measurement machines
McBSP (Multichannel Buffered Serial Port):• Fast inter-node communication (ca. 83 Mbit/s)• Communication hardware included in processors• Special protocol and wiring needed when connecting
more then two units
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Modelling Tool
Modelling tool under consideration:MLDesigner ® from MLDesign Technologies, Inc.
Hierarchical multi domain modelling framework
Covers module, system and strategy levels
Capabilities for simulation, design check, export
Derived from well-known Ptolemy tool (University of Berkeley)
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MLDesigner Sample Workspace
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Design Goal
Add serial communication functionality to actual system:• Medium shared: up to five participants
• Software solution (protocol implementation, API)
Case study for modelling:• Combine overall model from parts contributed differently
• Compare results of modelling and implementation processes
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3. The Model
Covers hardware functions, interconnections, protocols, software strategies
Combines information derived from different sources and represented differently
Models for hardware functions derived from documentation and experiments
Models for protocols and software functions derived from actual design process
Model partly shown in top-down manner
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Top Level of Model
Slave nodes next slideMaster node
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Structure of Slave NodeBehavioral software model
DMA modules
McBSP modules
next slide
Standard element
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Structure of McBSP ModuleTransmit circuitry
Receive circuitry
Sample rate generator
next slide
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Structure of Sample Rate Generator
Configuration register(parametrized constant)
Synchronizationcircuitry
Frame pulse generatornext slide
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Structure of Frame Pulse Generator
Bottom level
Standard elements only
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Modelling Software Functions
Software functions modelled by behaviour
Implement communication protocols and test transfers
Interrupt sequences included
Hardware blocks controlled by configura-tion registers
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Top Level Software Model for Slave Node
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4. Comparison of Results
Model evaluated by simulation
Actual system evaluated by measurement
Comparisons:• Qualitative (e.g. signal sequences)
• Quantitative (e.g. data rates)
Good matching found
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Simulation Result in Multichannel Mode
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Signals Measured in Multichannel Mode
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Data Rates: Simulation vs. Measurement
Configuration Data Rates [Mbit/s]
Device # Channels Block Size Simulated Measured
32 Byte 51.6 50.7
64 kByte 52.9 52.8
32 Byte 12.7 12.4
64 kByte 13.1 12.9
32 Byte 68.7 67.2
64 kByte 71.1 71.2
32 Byte 17.0 16.3
64 kByte 17.8 17.64
1TMS320C6713
300 MHz
4
1TMS320C6701
167 MHz
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5. Conclusion
Method developed for combined modelling:• Hardware: off-the-shelf, own• Software
Method applied to real design project
Design model combined parts derived from different sources
In case study modelling process validated by comparison of results
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Further Work
Combine several functional aspects of the DSP system into one model
Include controlled process and its environ-ment into the model
Generate software from the model
Develop methodical framework for model-ling processes