MLDL2000 Version 2 1 28.09.07 MLDL2000 Version 2 – What’s new HEPAX How-To HHC Conference,...

128.09.07 MLDL2000 Version 2MLDL2000 Version 2

MLDL2000

Version 2 – What’s new

HEPAX How-To

HHC Conference, September 2007, San Diego

MLDL2000 Version 2MLDL2000 Version 2

Mail from Richard


His Botnet Must Run on 50g’s


URLs

http://www.kuipers.comhttp://retrocalculator.com/hp41/MLDL2000_HEPAX.ppt

http://hpmuseum.org

http://hp41.org


Contents

Credits due .... MLDL2000, what is it Structure of the MLDL2000 Memory layout and Settings Registers Access I/O from the HP41 for control of the MLDL2000 The Vinculum USB Host Controller MLDL V2 Project Status MLDL2000 and HEPAX


Credits due to ...

The MLDL2000 would not have been possible without the support of the user community. The enthusiasm, feedback, help and willingness to test was really great and motivated me to keep moving forward.

Of course there are those who made me enthusiastic for the HP41 in the first place: HP, the HHC and the local club in The Netherlands.

Today, the maintainers of the various HP websites and forums, conference organizers and hosts of ad-hoc meetings keep the calculator spirit alive!


What is an MLDL2000 ?

The answer is not that complicated:

The MLDL2000 is peripheral for the HP41 that can emulate HP41 modules by way of loading its contents (“ROM image”) in a block of memory

Additional functions of the MLDL2000 are USB interface offers PC communication

· Up- and downloading ROM images· Control of module ports and banks· Firmware upgrading· HP41 communication with PC


What is an MLDL2000 ?

And the new feature of V2:

USB Host Controller

The USB Host controller gives the HP41 access to files on a USB storage medium (“USB stick”)

This could enable the following functions: Emulation of HP-IL Mass Storage

· Saving and retrieving User Code, Key Assignments, XMem Data

· Backup of all HP41 memory· Saving and retrieving of ROM images


Structure of the MLDL2000

Block diagram

HP41 signals

CLK02CLK01

SYNCISA

DATAF1B3B4

PWO

BatteryV+

GND

powercontrol

outputdriver

input buffer&

levelshifter

Xilinx XPLA3384 macrocell

CPLD

FLASH

SRAM

control

XA [0..19]

XD [0..15]

VSRAM

+3.3V

J TAG

Power

I/O

Spare pins

FTDI USBFT2232

I/OJ TAG

USB Host

I/O andprogramming

FTDI USB HostVinculum

USB DeviceMemory stick

+5V External power



The MLDL2000 V1 was implemented on 3 PCB’s:

1. CPLD and Memory

2. HP41 Interface & Power

3. USB Device

4. Supercap backup (opt) 11

223344



The assembly would fit in a cardreader housing



The logic of the MLDL2000 is implemented in a CPLD: The CPLD is the heart and soul of the MLDL2000 A CPLD is a very low power programmable logic device Firmware is written in VHDL, almost like software The firmware can be upgraded by the user through USB

· Bug fixes are possible· Enhancements can be made· The source is public· The tools are free

The part is a Xilinx XPLA3 device with 384 macrocells. A macrocell is a configurable flip-flop with programmable logic

around it



The CPLD contains everything that makes the MLDL2000 behave like an MLDL2000. Do you recognize anything from the ‘old’ style MLDL?

HP41signals

CLK02CLK01

SYNC

ISA

DATA

PWO

DATA InputShift Register

Phase counterMLDL2000

State Machine

MemoryController

&Status Register /CE /WE /OE

CONTROLSRAM FLASH

XA [0..19]

I/O, control DIP SwitchI/O

XD [0..15]

ISA InputShift Register

ISA OutputShift Register

PowerReset

Programming

Timing SignalGenerator

ISA_OUTISA_OE

J TAG

+3.3VGND

3* OUT3* OE

DATA, SYNC, FISpare Outputs

I/O Shift &SPI Register

I/O Control &Utility Signals

Enabled BankRegister

SettingsRegister

InstructionDetector

Power & Programming

MemoryInterface

Spare pins


Memory Layout and Settings Registers

The HP41 has 16 Pages, 4 physical ports. Each Page can have up to 4 Banks . . . . . .

Page Address Range HP41C/CV Map HP41CX map $F $F000-$FFFF Port 4, upper Port 4, upper $E $E000-$EFFF Port 4, lower Port 4, lower $D $D000-$DFFF Port 3, upper Port 3, upper $C $C000-$CFFF Port 3, lower Port 3, lower $B $B000-$BFFF Port 2, upper Port 2, upper $A $A000-$AFFF Port 2, lower Port 2, lower $9 $9000-$9FFF Port 1, upper Port 1, upper $8 $8000-$8FFF Port 1, lower Port 1, lower $7 $7000-$7FFF HP-IL (when plugged) $6 $6000-$6FFF Printer (when plugged) $5 $5000-$5FFF Time (when plugged) Time+XFunctions $4 $4000-$4FFF Service ROM (when plugged) $3 $3000-$3FFF Not Used XFunctions ROM $2 $2000-$2FFF System ROM 2 System ROM 2 $1 $1000-$1FFF System ROM 1 System ROM 1 $0 $0000-$0FFF System ROM 0 System ROM 0



The Settings Registers define the configuration of the MLDL2000 and how the HP41 sees the ROM images.

Maximum flexibility, no limits imposed by the design No need for any special HP41 mcode to manage the MLDL2000 Bankswitching support Configuration is done from a PC through the USB Interface Some configuration can be done from the MLDL2000 itself with

only 4 switches



How does the MLDL2000 emulate a ROM? Settings Registers do the translation from an HP41 access to a

memory access inside the MLDL2000 The switches select one of 8 sets of Settings Registers The Settings Registers are also in FLASH and SRAM Every possible Bank of a Page has a Settings Register Attributes of the Settings Register are

· Memory Type is

(FLASH, SRAM or I/O)· Physical Address in Memory· Enabled or Disabled· Write Protected or Enabled

(SRAM only)

HP41 AccessISA-line: 9123

Access in page $9

Bank 0Bank 1Bank 2Bank 3

Pag

e $9

MLDL2000 memorySRAM or FLASH

Page $A

Page $8

SR number 0

SR number 1

SR number 2

SR number 3

ON

4321

ON

4321

Target ROM image

$9xxx

$x123



Address Translation

A05 A04A14 A13 A12 A11 A10 A09 A08A15 A02 A01 A00A03A07 A06

ADDRESS FROM ISA/DATA

B0B1

B0B1

Enabled Bank Registers

Page E-F

Page 8-9. . . .. . . .

. . . .

A14 A13 A12A15 B0B1$FFF

S4S3

SR Address for MLDL2000S4S3

Fixed offset

M17 M16 M14 M13 M12M15M19 M18

DIP switch . . . .

EN F/S

M17 M16 M14 M13 M12M15IO WPEN F/S

Data from SR

FLASH

SRAM

M17 M16 M14 M13 M12M15M19 M18 A05 A04A11 A10 A09 A08 A02 A01 A00A03A07 A06

Full address for MLDL2000 memory

Capture DATA Address

Read SR

PageEnabled?

CombineAddress

YES

Read word

InstructionDetector

YES

NO

Capture ISA Address

WROM?

Read SR

ConditionsTrue?

CombineAddress

YES

Write word

NO

DONE

NO Page EnabledLocation in SRAMWrite Enable


I/O from the HP41

The Settings Register offer a possibility to map an HP41 Page as I/O

Communication with the Host PC over USB Direct access of MLDL memory from the HP41 Direct access of MLDL Settings Registers from the HP41 Communication with the Vinculum USB Host controller

All options above require special Mcode programming.

The best Page to be mapped as I/O is Page $4, normally only used for the Service ROM.


I/O from the HP41

Memory map defined The ignores are required in Page $4 because of Service ROM

behaviour, so the HP41 does see valid ROM contents here The area $4B00 .. $4BFF is where the SPI Interface registers of

the USB Host Interface are mapped

Address Read Operation (FETCH S&X) Write Operation (WROM, $040)

$4000…$47FF Operation will be ignored (return $000) Operation will be ignored

$4800…$48FF Read from I/O Register Write to I/O Register

$4900…$49FF Read cycle from FLASH or SRAM Write cycle to SRAM (FLASH is ignored) $4A00…$4AFF

Read cycle Settings Register from FLASH or SRAM

Write cycle to Settings Register in SRAM (ignore FLASH)

$4B00…$4BFF Read SPI Registers from Vinculum Write to SPI Registers of Vinculum

$4C00…$4FFF Operation will be ignored (return $000) Operation will be ignored


The Vinculum USB Host Controller

This USB Host Interface is implemented with the Vinculum USB Host Controller VNC1L-1A from FTDI.

The Vinculum is controlled from an SPI interface that is created in the CPLD for sending data and commands. The Vinculum is loaded with the VDAP Firmware for access of Disk and Peripherals

Other firmware can potentially be used The Vinculum is a device intended to give USB Host functionality to

microcontrollers and other embedded equipment The Vinculum is controlled through a very simple 4-wire SPI

Interface which is easy to implement in microcontrollers of FPGA’s Firmware can be updated in the field from a USB stick



Vinculum block diagram· Command Mode is for accessing USB Flash Drives· Data Mode is for low level control of FTDI base USB

peripherals or other devices (printer, mouse etc)



The MLDL2000 will use SPI as the communications port to the Vinculum Monitor Port

A block of registers is defined in the I/O Memory map, assuming Page $4 is mapped for I/O

Commands can be given to the Vinculum, and data is received Communication is byte-by-byte

Function Address Action

SPI_Read SPI_Write $4B00 Read/Write SPI Data Register in VDAP Command Mode

SPI_Read SPI_Write $4B01 Read/Write SPI Status Register in VDAP Command Mode

SPI_Read SPI_Write $4B02 Read/Write SPI Data Register in VDAP Data Mode

SPI_Read SPI_Write $4B03 Read/Write SPI Status Register in VDAP Data Mode

SPI_Status_Read $4B04 Read SPI Status (READ ONLY REGISTER)



When the Vinculum is successfully started it will respond with a DOS like prompt, and is ready for commands, which are not unlike DOS commands. A special mode is available for giving more compact commands using hexadecimal instructions.

Commands are divided in the following groups:· Monitor Configuration Commands· Disk Commands· Power Management Commands· Pin I/O Commands· Printer Commands· USB Device Commands· FTDI Device Commands· Debug Commands



Some typical Disk Commands are:· DIR List files in current directory· CD Change directory· OPR filename Open File for Reading· SEK dword Seek to byte position· RDF word Read from File· Etc etc

The file system management (FAT32 or FAT16) is implemented in the Vinculum, the HP41 does not have to understand this

See www.vinculum.com or www.ftdichip.com for more information on this controller


Project Status

The MLDL2000 is an existing device. V2 of this is in its definition phase. Things to do are:

Hardware test· Build a prototype setup with a Vinculum demo board· Implement SPI in the CPLD of the MLDL2000· Perform low level testing for verification of actual operation· Test a few minor hardware changes in the MLDL2000

Software tasks· Within the user community, define a special ROM with

functions for supporting USB mass storage using MLDL2000V2

Design and Production· Start the final hardwaredesign and production


MLDL2000 and HEPAX

Both are “MLDL” devices (“Machine Language Development Lab”)

HEPAXClassic MLDL Device Perhaps the nicest of the classic

MLDLs

Consists of HEPAX itself and one or more RAM modules

Modules are very rare

But images are available at hp41.org and elsewhere

Images work in popular simulators (EMU41, 41X, V41)

MLDL2000

· Modern Technology– USB– Flash– SRAM

· RAM is larger and faster

Why use HEPAX at all?


MLDL2000 and HEPAX

NostalgiaFunny, Strange but Effective Documentation

FUN!!Self Contained on the 41C

Onboard Memory EditorOnboard DisassemblerLots of other Goodies


MLDL2000 and HEPAX

Using HEPAX on MLDL2000 is Tricky

Bug in MLDL2000 V1 FirmwareMapping of bank pages 2 and 3 swapped

Fixed in upcoming firmware revision

New MLDL2K will allow firmware update

HEPAX RAM Initialization Not SupportedHEPAX uses two undocumented Nut instructions

Neither are Supported by the MLDL2000

HEPAX relocation/RAM initialization doesn’t work


MLDL2000 and HEPAX

Using HEPAX on MLDL2000 is Tricky

Place the HEPAX in an odd numbered pageHEPAX won’t try to relocate itself

Initialize HEPAX RAM YourselfUsing a Perl script – easiest

http://retrocalculator.com/hp41/hepram.pl

Using the provided mcode program on the HP41

My first one!


MLDL2000 and HEPAX

Questions?

MLDL2000 Version 2 1 28.09.07 MLDL2000 Version 2 – What’s new HEPAX How-To HHC Conference,...

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