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IEE 572

Design Engineering Experiments

Project Report

Design and Analysis of Experiments for

Developing Accurate Performance Model of2-input NAND Gate Considering

Multiple Input Switching Criteria

Submitted To:

Prof. Douglas Montgomery

By

Anupama R. Subramaniam

Date: 12.09.2008

E-mail: [email protected]



IEE 572 – DOE Project Report- Fall 2008

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Acknowledgement

I would like to Thanks Prof. Montgomery for his timely reviews

valuable and kind suggestions for better progress of this project

work and all the course work throughout this semester.

Thank You Prof. Montgomery.

Sincerely,

Anupama R. Subramaniam




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Table of Contents

1. OBJECTIVE ........................................................................................................................................................4

2. PRE-EXPERIMENTAL PLANNING...............................................................................................................4 2.1 RECOGNITION AND STATEMENT OF PROBLEM ................................................................................................4

2.1.1 Recognition of Problem ......... ........... .......... ........... .......... ........... .......... ........... ........... .......... ........... ......4 2.1.2 Problem Statement.................................................................................................................................5

2.2 CHOICES OF FACTORS, LEVELS AND RANGES.................................................................................................6 2.2.1 Experimental Design factors......... ........... .......... ........... .......... ........... .......... ........... ........... .......... ..........6 2.2.2 Choices of Factor Levels and Ranges....................................................................................................9

2.3 SELECTION OF RESPONSE VARIABLES ..........................................................................................................10

3 CHOICE OF EXPERIMENTAL DESIGN.....................................................................................................10

3.1 DESIGN CHOICE............................................................................................................................................11 3.2 DESIGN SETTINGS AND DIAGNOSTICS ..........................................................................................................12 3.3 OVERLAY OF INPUT FACTORS .......................................................................................................................14

3.4 DISTRIBUTION OF INPUT FACTORS ................................................................................................................16

4 PERFORMING EXPERIMENT......................................................................................................................17

4.1 EXPERIMENTAL SETUP .................................................................................................................................17 4.1.1 Simulator used for Performance Characterization..............................................................................17 4.1.2 Data Processing......... ........... .......... ........... .......... ........... .......... ........... .......... ........... .......... ........... ......17 4.1.3 Transistor Model for Performance Characterization .......... .......... ........... ........... .......... ........... .......... .17

4.2 PROCEDURE FOR RESPONSE MEASUREMENT ................................................................................................17 4.3 DOX TOOLS FOR EXPERIMENTAL ANALYSIS ...............................................................................................17

5 STATISTICAL ANALYSIS OF DATA ..........................................................................................................18

5.1 RESPONSE TABLE .........................................................................................................................................18 5.2 RESPONSE 1: TPD..........................................................................................................................................19

5.2.1 Model Fit .......... ........... .......... ........... .......... ........... .......... ........... .......... ........... ........... .......... ........... ....19 5.2.2 Model Report – Estimated functional ANOVA ............. .......... ........... ........... .......... ........... .......... ........19 5.2.3 Marginal Model Plot ........ ........... .......... ........... .......... ........... .......... ........... .......... ........... .......... ..........20 5.2.4 Factor Interaction................................................................................................................................22 5.2.5 Predictive Model.................................................................................................................................23

5.3 RESPONSE 2: TX ...........................................................................................................................................26 5.3.1 Model Fit .......... ........... .......... ........... .......... ........... .......... ........... .......... ........... ........... .......... ........... ....26 5.3.2 Model Report – Estimated Functional ANOVA .......... ........... .......... ........... .......... ........... .......... ..........27 5.3.3 Marginal Model Plot ........ ........... .......... ........... .......... ........... .......... ........... .......... ........... .......... ..........28 5.3.4 Factor Interaction................................................................................................................................29 5.3.5 Predictive Model.................................................................................................................................30

5.4 RESPONSE CHARACTERIZATION AND OPTIMIZATION ...................................................................................33 5.4.1 Optimization ........................................................................................................................................33

5.4.2 Comparison of Response Measurement Technique .............................................................................35 5.4.3 Characterization..................................................................................................................................36

6 CONCLUSION AND RECOMMENDATION ..............................................................................................50

7 REFERENCES ..................................................................................................................................................52




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1. Objective

To analyze the accuracy of performance characterization method of the basic 2-input

CMOS NAND gate using single input switching approach and multiple input switchingapproach.

To develop accurate performance predictive model used for circuit optimization that

accurately characterizes the gate performance.

Recommend a favorable characterization approach for simple gates in standard cell

library.

2.

Pre-experimental Planning

2.1

Recognition and Statement of Problem

2.1.1 Recognition of Problem

The semiconductor manufacturing is a time consuming and expensive process

technology used in the fabrication of integrated circuits in today’s market. Standard

cells are one of the fundamental building blocks used in the design of integrated circuits.

These fundamental building blocks need to be modeled accurately in order to optimize

the circuit design according to specification and improve product yield. The standard cell

library model includes characterizing the unit cell such as inverter, buffer, AND gate, OR

gate, NAND gate, NOR gate, complex gates and sequential elements such as Latches in

the library. The characterization is performed for a range of input variables with a

particular assumption for measuring each output responses.

For example, the combinational cells such as basic AND gate, OR gate, NAND

gate, NOR gate in the standard cell library can have anywhere from 2 to 4 input pins and

1 output pin. The performance characterization of such combinational cells are performed

with an assumption that only one input of a given multi input gate switches from logical

0 1 or 1 0 at a particular event and the other inputs remain at a static value of

logical 1 or 0. For high performance integrated circuit, this assumption may not be




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sufficient and it is important to consider multiple input switching in a particular event for

accurately characterizing the performance of basic gates in the standard cell library.

2.1.2

Problem Statement

Thought the standard cell library consists of different types of gates with different

number of input pins, it is important to identify the accurate characterization procedure

for a basic cell with more than one input. Once an accurate characterization approach is

identified for the basic gate, the same approach can be extended for rest of the gates in

the standard cell library with appropriate changes to modeling procedure.

Thus the design of our experiment involve performance characterization of a

basic 2-input NAND gate in the standard cell library with single input switching &

multiple input switching approach and identify the accurate method for performance

characterization and modeling.

In order to meet the objective, the design of our experiment have to be

constructed in such a way that the following goals are met.

The accuracy of performance characterization approach is measurable.

Develop performance model efficiently with few simulation experiments..

Able to derive simple model that is more general and more accurate.

Figure:2-1. explains the objective of this design experiment study through a data flow

diagram. The performance characterization of 2-input NAND gate circuit considering

multiple inputs switching is the focus of this study.




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Figure: 2-1. Data Flow for Performance Characterization of 2-input NAND gate Circuit

2.2

Choices of Factors, Levels and Ranges

Figure:2-2. shows the performance factors for the characterization of 2-input

NAND gate. The choices of factors, levels and ranges are defined in Table.2-1.

2.2.1

Experimental Design factors

The performance factors are:

Data_in slope – The slew rate of the input data signal (ps).

Data_out load – The gate driving capacity in (ff).

Input RAT – The Relative Arrival Time between the data inputs (ps).

Process corner - Defined by manufacturing technology.

Voltage – Operating voltage (V)

Temperature – Temperature of the operating environment (0C)

data_in slope

Input RAT

process corner

voltage

cell_rise

cell_fall

rise_tx

fall_tx

temperatur

data_out load

Input

Factors

Performance

Model For

Standard Cell

Optimization

Simulations ToCharacterize

2-input NAND Gate

Circuit

Using Transistor

Model

Output

Responses

System Performance

Modeling

Process / System

Under Test

Design

Specifications

System

Performance

Estimates




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Figure:2-2. Performance factors for 2-input NAND gate

Constant Factors

Process Corner:

In general, the upper and lower limit for the process corners are defined by the

manufacturing technology. The process corner can be SS, FF, SF, FS, TT for the NMOS

& PMOS transistors in the NAND gate representing the behavior of the process corners.

Since this experiment is about the study of characterization approach, process variation

impact to any characterization approach will be similar if we do not account for any

process variation for this study. Thus we can treat the process corner as constant variable.

We will use the typical process corner - TT for this study for NMOS and PMOS

transistor in the 65nm CMOS process technology .

Temperature:

The operating range for a temperature can be any where from -400C to 125

0C . The

low and high level of temperature range represents the circuit operation in the cold and

hot environment. In practice, the characterization is performed in blocks for these

extreme temperature and at room temperature 270C. Thus for the study of

characterization approach, the temperature factor can be treated as a constant block. We

will use the room temperature 270C for our experiments.

input RAT

data_in slope

data_out load

process corner

voltage

temperature

FactorsResponse

2-input NAND

gatePropagation delay

T d

Transition time

(Tx)

A

B

O




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Variable Factors

Data input slope:

The input signal slope is one of the critical factor that impacts the input relative

arrival times (RAT) between the input signals and in turn affects the performance of the

2-input NAND gate.

Data output load:

The output load impacts the propagation delay and in turn impacts the

performance of the 2-input NAND gate.

Input relative arrival time (RAT):

The relative arrival time (RAT) between the two inputs signals can impact the

performance of the 2-input NAND gate. The input RAT also defines the boundary

between single input switching and multiple input switching scenarios / assumptions for

the characterization of gate performance.

Operating voltage:

The operating voltage of the gate also impacts the effect of input RAT on

performance characterization of 2-input NAND gate.

Thus the factors that are varied in our experiment are input slope, output load, input RAT

and operating voltage.




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Table.2-1: The choices of factors, levels and ranges.

Factors Low Level High Level Constant Value Type

Input Slope (ps) 0.25 750 - Numeric

Output Load (ff) 0.1 250 - Numeric

Voltage (V) 0.7 1.32 - Numeric

Input RAT (ps) 0.0001 250 - Numeric

Temperature (0C) - - 27 Constant

Process Corner - - TT Categorical

2.2.2

Choices of Factor Levels and Ranges

Table.2-1 lists the low level and high level values of input factors that will be

used for the experiment, which is based on the feedback & suggestion from experienced

members of various operations in the product team.

The low and high level of operating voltage, input slope and output load are based on

the requirements imposed by design technology specification. But we will widen that

rage for our experiment to have a better fitting empirical model.

The inputs relative arrival time (RAT) has a low level of 0.0001ps and a high level of

250ps. The high level of RAT=250ps is appropriate enough to cover the single input

switching condition where the RAT is assumed to be infinite. And the low level of

RAT=0.0001ps is a condition where a performance failure can occur due to multiple

input switching condition. In case of multiple input switching assumption for

performance characterization, some intermediate level RAT need to be identified forperformance measurement.




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2.3 Selection of Response Variables

There are two response variables in the process of characterizing the performance

of 2-input NAND gate are the propagation delay Tpd and transition time Tx.

Propagation delay – Tpd

Propagation delay comprises of cell rise and cell fall delay.

o Cell_rise: Propagation delay from input to output for the output pin transition

from 0 1.

o Cell_fall : Propagation delay from input to output for the output pin transition

from 1 0

Transition time – Tx

o

Rise_tx: Output slew rate for output pin transition from 0 1.

o Fall_tx: Output slew rate for output pin transition from 1 0

To simplify the problem further, we consider the propagation delay (Tpd) and transition

time (Tx) for output fall condition (ie) 1 0 of the 2-input NAND gate. This makes sure that

the RAT analysis will make sense for our experiment.

3 Choice of experimental Design

Since our experimental design applies deterministic computer model for simulation

its is not required to replicate the design as the result will be the same for each

replicate. Thus our design is single replicate design.

Randomized design will be considered.

No blocking required as there are no nuisance factors involved. All other parameters

such as temperature and process corner, that are less important to the goal of this

experimental design are set at nominal constant value in our computer simulation.

o

Only one operator involved in this design and so blocking is not required to

eliminate user err as well.

Run time is not an issue as it is a simple NAND gate and so any number of runs can

be performed through automation of simulations.





o Low and high level of factors were iteratively refined based on the validity of

simulated response and operating range of the NAND gate for this process

design.

Based on previous research work we are aware that the factor RAT has a non-linear

relation to output response (ie) propagation delay Tpd as shown in Figure:3-0. Also

the 2input-NAND gate has a definitive computer model for estimating the

performance response Tpd and output signal transition response Tx.

slope = 50ps (20-80%vdd); load = 7.5fF; T=27c; 65nm

40

41

42

43

44

45

46

47

48

49

50

0 10 20 30 40 50 60 70 80

RAT (ps)

D e l a y

( p s )

nand2

Figure:3-0. Tpd vs RAT behavior

3.1 Design Choice

Since we use definitive computer simulation model with continuous factor values,

Space Filling Latin Hyper Cube design is considered for performance prediction of

2-input NAND gate in order to meet our goal for characterization and optimization

of performance characteristic of standard cells. The data will be analyzed using

Gaussian Process Model .





Table.3-1 describes the experimental design from JMP for four factor Space

Filling Latin Hypercube design with a sample size of 25.

Table.3-1: Space Filling Latin Hypercube with 4 factors and sample size = 25

3.2 Design Settings and Diagnostics

The design setting including the four factor range, responses and the run order for this

Latin Hypercube design is described in Table 3-2-a for sample size n=25.





Table.3-2-a: Design Setting for Space Filling Latin Hypercube

The design diagnostics is captured in Table.3-2-b. The minimum distance between

the run approximately range from 0.519 to 0.573 for the scaled factors. And the

discrepancy is very small = 0.0067.





Table.3-2-b: Design Diagnostics for Space Filling Latin Hypercube

3.3

Overlay of input factors

The overlay plot is show in Figure:3-3 for all four factors. There are some holes in

the overlay plot but still the design look reasonably good as far as the uniformity

of the input factors for space filling is considered.





Figure:3-3. Overlay plot for 2 dimensional input factors





3.4 Distribution of input factors

The histogram for input factor distribution is shown in Figure:3-4 for all input

factors. The distribution is nearly flat for all four factors. So it can be concluded

that the inputs are reasonably uniform to meet the space filling experimental

design criteria.

Figure:3-4. Distribution of input factors





4 Performing Experiment

4.1 Experimental Setup

4.1.1

Simulator used for Performance Characterization

The transistor level hspice simulator is used in capturing the output responses (ie)

propagation delay Tpd and output transition time Tx of 2-input NAND gate .

4.1.2

Data Processing

Matlab and/or shell / perl programs are used in providing the input factor values

to the response simulator and extracting the output responses from the hspicesimulation output files.

o Tpd - propagation delay.

o Tx - transition time.

4.1.3 Transistor Model for Performance Characterization

65nm process technology is used for performance characterization of the 2-input

NAND gate.

BSIM3 transistors models for NMOS and PMOS transistors are used for the

prediction of transistor operation in the 2-input NAND gate logic.

4.2 Procedure for Response Measurement

The propagation delay Tpd is measured between the worst input to output delay

path of the NAND gate. The worst input is the one farthest from the output. In our

case it is the Tpd from input pin B to output pin O. Also the delay is measured at

50% voltage level between input pin and output pin according to standards.

The transition time Tx is measure between the 20% voltage level and 80%

voltage level at the output pin O of the NAND gate.

4.3 DOX Tools for Experimental Analysis

JMP and/or Design Expert is used for statistical analysis of the responses.





5 Statistical Analysis of Data

5.1 Response Table

The output responses in our design (ie) Tpd and Tx are displayed in Table.5-1 for

the Space Filling Latin Hyper cube design along with the model predicted formulas.

NOTE: Negative delay occurs during un realistic assumption and so the

desirability is set to zero for Tpd < 0. Desirability is set to maximum for Tpd =250ps

which corresponds to 400MHz performance requirement. The last column in Table.5-1

represents this desirability for the Tpd response.

Table.5-1 : Response Table for Space Filling Latin Hypercube with sample size = 25





5.2 Response 1: Tpd

5.2.1

Model Fit

The actual versus predicted plot is displayed in Figure:5-2-1. The actual responseTpd versus the Jackknife predicted response lie along 45 degree angle and so it can be

concluded that the model fit is good and acceptable. Thus we can confidently conclude

that the prediction model is a good approximation of the simulation model that was used

in generating the response data Tpd.

Figure:5-2-1. Model fit for Tpd

5.2.2 Model Report – Estimated functional ANOVA

The estimated functional ANOVA table for the product exponential correlation

function of Tpd is shown in Table.5-2-2. The variability over the entire experimental

space for Tpd is analyzed from this table.

Table.5-2-2: Functional ANOVA table





Observation:

The model report shows that the propagation delay is mainly affected by main

effect of slope, load, vdd and the interaction between load & vdd at 1%

significance level.

• 78.53% of variation in Tpd is due to main effect of load, 15.76% of

variation is due to main effect of Vdd and 2.9% of variation is due to main

effect of slope.

• Accounting for all second order effects, 80.95% of total variation in Tpd

is due to total effect of load, 18.17 % of total variation is due to total effect

of Vdd and 3.25% of total variation is due to total effect of slope.

•

2.2% of variation is due to interaction between load and vdd. None of the

other second order interaction are significant at 1% level.

Theta:

• The theta values for all four factors have non-zero value and so they all

contribute to the prediction model for Tpd to some extend..

• The main effect of Vdd and Load is higher compared to that of slope and

RAT.

•

The main effect as well as the interaction effects of RAT and slope are lessthan 0.25% and so the impact of these factors in the prediction model is

relatively very small compared to load and vdd.

5.2.3 Marginal Model Plot

The Tpd behavior with respect to each input factor is represented as marginal

model plot shown in Figure:5-2-3.





Figure:5-2-3.Tpd Marginal Model Plot

Observation:

The marginal model plot confirms that load and vdd are the significant

contributors to Tpd variation.

The propagation delay has linear dependence on slope.

Tpd has non-linear dependence on load and vdd.

Tpd variation due to RAT is relatively very small at high level of RAT and some

what significant at low level of RAT.

As non of the marginal plots are flat it can be concluded that all 4 factors impact

the behavior of Tpd.





5.2.4 Factor Interaction

The Tpd behavior with respect to each input factor interaction is captured in the

interaction profile shown in Figure:5-2-4.

Figure:5-2-4. Factor Interaction

Observation:

The propagation delay decreases linearly with respect to decrease in slope.

Tpd increases non- linearly with respect to increase in load value.

Tpd decreases exponentially with respect to increase in vdd . Tpd increase with respect to small RAT value for high voltage operation and

decrease with respect to small RAT value for low voltage operation.

In general, to minimize Tpd, slope and load need to be small, Vdd and RAT need

to be large for high performance operation.

The overall effect of RAT is not that significant compared to slope, load and vdd.





5.2.5 Predictive Model

The parametric model and the simplified full quadratic model for Tpd is shown

below. The model is an empirical fitting of the response with respect to all four factors

and their second order interactions. This meets our characterization and optimization

goal.

Parametric Model:

Full Quadratic model:

865.944920587689 + -32397.9900299023 *

Exp(

-(0.0000000682075420491 * ((-750) + :Name( "Slope (ps)" )) ^ 2 +

0.0000090406127417989 * ((-208.35) + :Name( "Load (ff)" )) ^ 2 +

0.0000009776470398464 * ((-83.3334) + :Name( "RAT (ps)" )) ^ 2 +

1.91271067690853 * ((-0.906666666666667) + :Name( "Vdd (v)" )) ^

2)

) + 23837.6585841386 * Exp(-(0.0000000682075420491 * ((-718.760416666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000090406127417989 * ((-114.6375)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000009776470398464 * ((-

62.500075) + :Name( "RAT (ps)" )) ^ 2 + 1.91271067690853 * ((-

1.29416666666667) + :Name( "Vdd (v)" )) ^ 2)

) + -21024.046392572 * Exp(

-(0.0000000682075420491 * ((-687.520833333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000009776470398464 * ((-208.33335)

+ :Name( "RAT (ps)" )) ^ 2 + 0.0000090406127417989 * ((-104.225)





+ :Name( "Load (ff)" )) ^ 2 + 1.91271067690853 * ((-

1.21666666666667) + :Name( "Vdd (v)" )) ^ 2)

) + -1955.52048336531 * Exp(

-(0.0000000682075420491 * ((-656.28125) + :Name( "Slope (ps)" ))

^ 2 + 0.0000009776470398464 * ((-250) + :Name( "RAT (ps)" )) ^ 2

+ 0.0000090406127417989 * ((-83.4) + :Name( "Load (ff)" )) ^ 2+ 1.91271067690853 * ((-0.880833333333333) + :Name( "Vdd (v)" ))

^ 2)

) + 15437.361405518 * Exp(

-(0.0000000682075420491 * ((-625.041666666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000009776470398464 * ((-104.166725

) + :Name( "RAT (ps)" )) ^ 2 + 0.0000090406127417989 * ((-41.75)

+ :Name( "Load (ff)" )) ^ 2 + 1.91271067690853 * ((-

0.725833333333333) + :Name( "Vdd (v)" )) ^ 2)

) + 16304.0474309202 * Exp(

-(0.0000000682075420491 * ((-593.802083333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000090406127417989 * ((-239.5875)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000009776470398464 * ((-

229.166675) + :Name( "RAT (ps)" )) ^ 2 + 1.91271067690853 * ((-

0.829166666666667) + :Name( "Vdd (v)" )) ^ 2)

) + -57414.3646817993 * Exp(

-(0.0000000682075420491 * ((-562.5625) + :Name( "Slope (ps)" ))

^ 2 + 0.0000009776470398464 * ((-145.833375) + :

Name( "RAT (ps)" )) ^ 2 + 1.91271067690853 * ((-1.06166666666667)

+ :Name( "Vdd (v)" )) ^ 2 + 0.0000090406127417989 * ((-

0.0999999999999943) + :Name( "Load (ff)" )) ^ 2)

) + 35424.9358199177 * Exp(

-(0.0000000682075420491 * ((-531.322916666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000009776470398464 * ((-20.833425)

+ :Name( "RAT (ps)" )) ^ 2 + 0.0000090406127417989 * ((-10.5125)

+ :Name( "Load (ff)" )) ^ 2 + 1.91271067690853 * ((-

1.13916666666667) + :Name( "Vdd (v)" )) ^ 2)

) + 2425.07481560567 * Exp(-(0.0000000682075420491 * ((-500.083333333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000090406127417989 * ((-229.175)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000009776470398464 * ((-

187.500025) + :Name( "RAT (ps)" )) ^ 2 + 1.91271067690853 * ((-

1.165) + :Name( "Vdd (v)" )) ^ 2)

) + 46879.3346905908 * Exp(

-(0.0000000682075420491 * ((-468.84375) + :Name( "Slope (ps)" ))

^ 2 + 0.0000009776470398464 * ((-135.4167125) + :

Name( "RAT (ps)" )) ^ 2 + 0.0000090406127417989 * ((-125.05) + :

Name( "Load (ff)" )) ^ 2 + 1.91271067690853 * ((-

0.984166666666667) + :Name( "Vdd (v)" )) ^ 2)

) + -1148.52720408473 * Exp(

-(0.0000000682075420491 * ((-437.604166666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000090406127417989 * ((-135.4625)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000009776470398464 * ((-

10.4167625) + :Name( "RAT (ps)" )) ^ 2 + 1.91271067690853 * ((-

1.0875) + :Name( "Vdd (v)" )) ^ 2)

) + 15290.8266745897 * Exp(

-(0.0000000682075420491 * ((-406.364583333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000090406127417989 * ((-187.525)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000009776470398464 * ((-

31.2500875) + :Name( "RAT (ps)" )) ^ 2 + 1.91271067690853 * ((-





0.7775) + :Name( "Vdd (v)" )) ^ 2)

) + -26195.9076107296 * Exp(

-(0.0000000682075420491 * ((-375.125) + :Name( "Slope (ps)" )) ^

2 + 0.0000009776470398464 * ((-114.5833875) + :Name( "RAT (ps)" )

) ^ 2 + 0.0000090406127417989 * ((-62.575) + :Name( "Load (ff)" )

) ^ 2 + 1.91271067690853 * ((-1.32) + :Name( "Vdd (v)" )) ^ 2)) + -575.95011139253 * Exp(

-(0.0000000682075420491 * ((-343.885416666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000009776470398464 * ((-166.6667)

+ :Name( "RAT (ps)" )) ^ 2 + 0.0000090406127417989 * ((-156.2875

) + :Name( "Load (ff)" )) ^ 2 + 1.91271067690853 * ((-0.7) + :

Name( "Vdd (v)" )) ^ 2)

) + 22931.4241268768 * Exp(

-(0.0000000682075420491 * ((-312.645833333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000009776470398464 * ((-

197.9166875) + :Name( "RAT (ps)" )) ^ 2 + 0.0000090406127417989

* ((-31.3375) + :Name( "Load (ff)" )) ^ 2 + 1.91271067690853 * (

(-0.855) + :Name( "Vdd (v)" )) ^ 2)

) + 15791.5451239584 * Exp(

-(0.0000000682075420491 * ((-281.40625) + :Name( "Slope (ps)" ))

^ 2 + 0.0000090406127417989 * ((-250) + :Name( "Load (ff)" )) ^

2 + 0.0000009776470398464 * ((-93.7500625) + :Name( "RAT (ps)" ))

^ 2 + 1.91271067690853 * ((-1.01) + :Name( "Vdd (v)" )) ^ 2)

) + 30729.5908579605 * Exp(

-(0.0000000682075420491 * ((-250.166666666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000009776470398464 * ((-

239.5833375) + :Name( "RAT (ps)" )) ^ 2 + 0.0000090406127417989

* ((-52.1625) + :Name( "Load (ff)" )) ^ 2 + 1.91271067690853 * (

(-1.19083333333333) + :Name( "Vdd (v)" )) ^ 2)

) + -48529.8604772396 * Exp(

-(0.0000000682075420491 * ((-218.927083333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000090406127417989 * ((-72.9875)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000009776470398464 * ((-72.9167375) + :Name( "RAT (ps)" )) ^ 2 + 1.91271067690853 * ((-

0.803333333333333) + :Name( "Vdd (v)" )) ^ 2)

) + 4432.47412015415 * Exp(

-(0.0000000682075420491 * ((-125.208333333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000009776470398464 * ((-52.0834125

) + :Name( "RAT (ps)" )) ^ 2 + 0.0000090406127417989 * ((-20.925)

+ :Name( "Load (ff)" )) ^ 2 + 1.91271067690853 * ((-

1.11333333333333) + :Name( "Vdd (v)" )) ^ 2)

) + -45874.866461309 * Exp(

-(0.0000009776470398464 * ((-218.7500125) + :Name( "RAT (ps)" ))

^ 2 + 0.0000090406127417989 * ((-197.9375) + :

Name( "Load (ff)" )) ^ 2 + 0.0000000682075420491 * ((-187.6875)

+ :Name( "Slope (ps)" )) ^ 2 + 1.91271067690853 * ((-

0.958333333333333) + :Name( "Vdd (v)" )) ^ 2)

) + 19502.7981302677 * Exp(

-(0.0000009776470398464 * ((-177.0833625) + :Name( "RAT (ps)" ))

^ 2 + 0.0000090406127417989 * ((-166.7) + :Name( "Load (ff)" ))

^ 2 + 0.0000000682075420491 * ((-156.447916666667) + :

Name( "Slope (ps)" )) ^ 2 + 1.91271067690853 * ((-

1.26833333333333) + :Name( "Vdd (v)" )) ^ 2)

) + 11171.9286619654 * Exp(

-(0.0000009776470398464 * ((-156.2500375) + :Name( "RAT (ps)" ))





^ 2 + 0.0000090406127417989 * ((-93.8125) + :Name( "Load (ff)" )

) ^ 2 + 1.91271067690853 * ((-1.03583333333333) + :

Name( "Vdd (v)" )) ^ 2 + 0.0000000682075420491 * ((-0.25) + :

Name( "Slope (ps)" )) ^ 2)

) + 3103.64565852293 * Exp(

-(0.0000090406127417989 * ((-218.7625) + :Name( "Load (ff)" )) ^2 + 0.0000009776470398464 * ((-125.00005) + :Name( "RAT (ps)" ))

^ 2 + 0.0000000682075420491 * ((-31.4895833333334) + :

Name( "Slope (ps)" )) ^ 2 + 1.91271067690853 * ((-

0.751666666666667) + :Name( "Vdd (v)" )) ^ 2)

) + 6251.37743120435 * Exp(

-(0.0000090406127417989 * ((-177.1125) + :Name( "Load (ff)" )) ^

2 + 0.0000000682075420491 * ((-62.7291666666666) + :

Name( "Slope (ps)" )) ^ 2 + 1.91271067690853 * ((-0.9325) + :

Name( "Vdd (v)" )) ^ 2 + 0.0000009776470398464 * ((-

0.00010000000000332) + :Name( "RAT (ps)" )) ^ 2)

) + -34396.9900797982 * Exp(

-(0.0000090406127417989 * ((-145.875) + :Name( "Load (ff)" )) ^ 2

+ 0.0000000682075420491 * ((-93.96875) + :Name( "Slope (ps)" ))

^ 2 + 0.0000009776470398464 * ((-41.66675) + :Name( "RAT (ps)" )

) ^ 2 + 1.91271067690853 * ((-1.2425) + :Name( "Vdd (v)" )) ^ 2)

)

5.3 Response 2: Tx

5.3.1 Model Fit

The actual versus predicted plot is displayed in Figure:5-3-1. The actual response

Tx versus the Jackknife predicted response lie along 45 degree angle and so it can be

concluded that the model fit is good and acceptable. There is a some gap in the 45 degree

angle which is due to the hole in the Latin hyper cube uniformity of input factors.

Figure:5-3-1. Model fit for Tx





5.3.2 Model Report – Estimated Functional ANOVA

The estimated functional ANOVA table for the product exponential correlation

function of Tx is shown in Table.5-3-2. The variability over the entire experimental space

for Tx is analyzed from this table.

Table.5-3-2: Functional ANOVA table

Observation:

The output transition time is mainly affected by main effect of load, vdd and the

interaction between load & vdd.

• 90.74% of total variation in Tx is due to load and 12.00 % of total

variation is due to Vdd.

•

87.88% of variation in Tx is due to main effect of load and 9.05% of

variation is due to main effect of Vdd.

• 2.79% of variation is due to interaction between load and vdd.

• The main effect of slope and RAT and any interactions involving those

factors are not much significant at 1%.

Theta:

• The theta values for all four factors have non-zero value and so they all

contribute to the prediction model for Tx.

• The effect of Vdd and Load is higher compared to that of slope and RAT.

• The main effect as well as the interaction effects of RAT and slope are less

than 0.25% and so the impact of these factors in the prediction model is

relatively very small compared to load and vdd.





5.3.3 Marginal Model Plot

The Tx behavior with respect to each input factor is represented as marginal

model plot as shown in Figure:5-3-3.

Figure:5-3-3. Marginal Model Plot

Observation:

The transition time increases linearly with respect to increase in load.

Tx has non-linear dependence on Vdd. Tx decrease with increase in vdd.

There is not much impact to Tx model due to slope and RAT as the marginal

model plot is almost flat.





5.3.4 Factor Interaction

The Tx behavior with respect to each input factor interaction is captured in the

interaction profile shown in Figure:5-3-4.

Figure:5-3-4. Factor Interaction

Observation:

The transition time slightly increases linearly with respect to increase in slope

except for low Vdd where it decrease with increased slope.

Tx increases linearly with respect to increase in load value.

Tx decreases exponentially with respect to increase in vdd .

Tx is almost the same with respect to RAT value except when vdd is low Tx

decreases.

In general, to minimize Tx, slope and load need to be small, and Vdd need to be

large for high performance operation.





The interaction effect between slope and RAT is negligible when Tx variation is

concerned.

Tx is less sensitive to RAT values compared to Tpd.

5.3.5

Predictive Model

The parametric model and the simplified full quadratic model for Tx is shown

below. The model is an empirical fitting of the response with respect to all four factors

and their second order interactions. This meets our characterization and optimization

goal.

Parametric Model:

Full Quadratic model:

1163.01055893396

+ 29625.9323580878 * Exp(

-(0.0000000243208631182 * ((-750) + :Name( "Slope (ps)" )) ^ 2 +

0.0000134460089951655 * ((-208.35) + :Name( "Load (ff)" )) ^ 2 +

0.0000001147929885888 * ((-83.3334) + :Name( "RAT (ps)" )) ^ 2 +

1.64149416195459 * ((-0.906666666666667) + :Name( "Vdd (v)" )) ^

2)

) + 39901.135164106 * Exp(

-(0.0000000243208631182 * ((-718.760416666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000134460089951655 * ((-114.6375)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000001147929885888 * ((-

62.500075) + :Name( "RAT (ps)" )) ^ 2 + 1.64149416195459 * ((-

1.29416666666667) + :Name( "Vdd (v)" )) ^ 2)





) + -58298.8822833803 * Exp(

-(0.0000000243208631182 * ((-687.520833333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000001147929885888 * ((-208.33335)

+ :Name( "RAT (ps)" )) ^ 2 + 0.0000134460089951655 * ((-104.225)

+ :Name( "Load (ff)" )) ^ 2 + 1.64149416195459 * ((-

1.21666666666667) + :Name( "Vdd (v)" )) ^ 2)) + -103265.8516234 * Exp(

-(0.0000000243208631182 * ((-656.28125) + :Name( "Slope (ps)" ))

^ 2 + 0.0000001147929885888 * ((-250) + :Name( "RAT (ps)" )) ^ 2

+ 0.0000134460089951655 * ((-83.4) + :Name( "Load (ff)" )) ^ 2

+ 1.64149416195459 * ((-0.880833333333333) + :Name( "Vdd (v)" ))

^ 2)

) + 7405.61304663843 * Exp(

-(0.0000000243208631182 * ((-625.041666666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000001147929885888 * ((-104.166725

) + :Name( "RAT (ps)" )) ^ 2 + 0.0000134460089951655 * ((-41.75)

+ :Name( "Load (ff)" )) ^ 2 + 1.64149416195459 * ((-

0.725833333333333) + :Name( "Vdd (v)" )) ^ 2)

) + 1864.14986536815 * Exp(

-(0.0000000243208631182 * ((-593.802083333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000134460089951655 * ((-239.5875)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000001147929885888 * ((-

229.166675) + :Name( "RAT (ps)" )) ^ 2 + 1.64149416195459 * ((-

0.829166666666667) + :Name( "Vdd (v)" )) ^ 2)

) + -104345.629695068 * Exp(

-(0.0000000243208631182 * ((-562.5625) + :Name( "Slope (ps)" ))

^ 2 + 0.0000001147929885888 * ((-145.833375) + :

Name( "RAT (ps)" )) ^ 2 + 1.64149416195459 * ((-1.06166666666667)

+ :Name( "Vdd (v)" )) ^ 2 + 0.0000134460089951655 * ((-

0.0999999999999943) + :Name( "Load (ff)" )) ^ 2)

) + 182113.335258005 * Exp(

-(0.0000000243208631182 * ((-531.322916666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000001147929885888 * ((-20.833425)+ :Name( "RAT (ps)" )) ^ 2 + 0.0000134460089951655 * ((-10.5125)

+ :Name( "Load (ff)" )) ^ 2 + 1.64149416195459 * ((-

1.13916666666667) + :Name( "Vdd (v)" )) ^ 2)

) + -13069.8230322348 * Exp(

-(0.0000000243208631182 * ((-500.083333333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000134460089951655 * ((-229.175)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000001147929885888 * ((-

187.500025) + :Name( "RAT (ps)" )) ^ 2 + 1.64149416195459 * ((-

1.165) + :Name( "Vdd (v)" )) ^ 2)

) + 187248.041900149 * Exp(

-(0.0000000243208631182 * ((-468.84375) + :Name( "Slope (ps)" ))

^ 2 + 0.0000001147929885888 * ((-135.4167125) + :

Name( "RAT (ps)" )) ^ 2 + 0.0000134460089951655 * ((-125.05) + :

Name( "Load (ff)" )) ^ 2 + 1.64149416195459 * ((-

0.984166666666667) + :Name( "Vdd (v)" )) ^ 2)

) + -105334.852363422 * Exp(

-(0.0000000243208631182 * ((-437.604166666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000134460089951655 * ((-135.4625)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000001147929885888 * ((-

10.4167625) + :Name( "RAT (ps)" )) ^ 2 + 1.64149416195459 * ((-

1.0875) + :Name( "Vdd (v)" )) ^ 2)

) + -54107.3893727038 * Exp(





-(0.0000000243208631182 * ((-406.364583333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000134460089951655 * ((-187.525)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000001147929885888 * ((-

31.2500875) + :Name( "RAT (ps)" )) ^ 2 + 1.64149416195459 * ((-

0.7775) + :Name( "Vdd (v)" )) ^ 2)

) + -53234.4678659231 * Exp(-(0.0000000243208631182 * ((-375.125) + :Name( "Slope (ps)" )) ^

2 + 0.0000001147929885888 * ((-114.5833875) + :Name( "RAT (ps)" )

) ^ 2 + 0.0000134460089951655 * ((-62.575) + :Name( "Load (ff)" )

) ^ 2 + 1.64149416195459 * ((-1.32) + :Name( "Vdd (v)" )) ^ 2)

) + 57664.7753685004 * Exp(

-(0.0000000243208631182 * ((-343.885416666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000001147929885888 * ((-166.6667)

+ :Name( "RAT (ps)" )) ^ 2 + 0.0000134460089951655 * ((-156.2875

) + :Name( "Load (ff)" )) ^ 2 + 1.64149416195459 * ((-0.7) + :

Name( "Vdd (v)" )) ^ 2)

) + 101467.475217556 * Exp(

-(0.0000000243208631182 * ((-312.645833333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000001147929885888 * ((-

197.9166875) + :Name( "RAT (ps)" )) ^ 2 + 0.0000134460089951655

* ((-31.3375) + :Name( "Load (ff)" )) ^ 2 + 1.64149416195459 * (

(-0.855) + :Name( "Vdd (v)" )) ^ 2)

) + 34511.5111928246 * Exp(

-(0.0000000243208631182 * ((-281.40625) + :Name( "Slope (ps)" ))

^ 2 + 0.0000134460089951655 * ((-250) + :Name( "Load (ff)" )) ^

2 + 0.0000001147929885888 * ((-93.7500625) + :Name( "RAT (ps)" ))

^ 2 + 1.64149416195459 * ((-1.01) + :Name( "Vdd (v)" )) ^ 2)

) + 57904.7939557199 * Exp(

-(0.0000000243208631182 * ((-250.166666666667) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000001147929885888 * ((-

239.5833375) + :Name( "RAT (ps)" )) ^ 2 + 0.0000134460089951655

* ((-52.1625) + :Name( "Load (ff)" )) ^ 2 + 1.64149416195459 * (

(-1.19083333333333) + :Name( "Vdd (v)" )) ^ 2)) + -91423.3656619021 * Exp(

-(0.0000000243208631182 * ((-218.927083333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000134460089951655 * ((-72.9875)

+ :Name( "Load (ff)" )) ^ 2 + 0.0000001147929885888 * ((-

72.9167375) + :Name( "RAT (ps)" )) ^ 2 + 1.64149416195459 * ((-

0.803333333333333) + :Name( "Vdd (v)" )) ^ 2)

) + -133312.767584835 * Exp(

-(0.0000000243208631182 * ((-125.208333333333) + :

Name( "Slope (ps)" )) ^ 2 + 0.0000001147929885888 * ((-52.0834125

) + :Name( "RAT (ps)" )) ^ 2 + 0.0000134460089951655 * ((-20.925)

+ :Name( "Load (ff)" )) ^ 2 + 1.64149416195459 * ((-

1.11333333333333) + :Name( "Vdd (v)" )) ^ 2)

) + -110486.049228448 * Exp(

-(0.0000001147929885888 * ((-218.7500125) + :Name( "RAT (ps)" ))

^ 2 + 0.0000134460089951655 * ((-197.9375) + :

Name( "Load (ff)" )) ^ 2 + 0.0000000243208631182 * ((-187.6875)

+ :Name( "Slope (ps)" )) ^ 2 + 1.64149416195459 * ((-

0.958333333333333) + :Name( "Vdd (v)" )) ^ 2)

) + 42337.3627021308 * Exp(

-(0.0000001147929885888 * ((-177.0833625) + :Name( "RAT (ps)" ))

^ 2 + 0.0000134460089951655 * ((-166.7) + :Name( "Load (ff)" ))

^ 2 + 0.0000000243208631182 * ((-156.447916666667) + :





Name( "Slope (ps)" )) ^ 2 + 1.64149416195459 * ((-

1.26833333333333) + :Name( "Vdd (v)" )) ^ 2)

) + 73977.1307433118 * Exp(

-(0.0000001147929885888 * ((-156.2500375) + :Name( "RAT (ps)" ))

^ 2 + 0.0000134460089951655 * ((-93.8125) + :Name( "Load (ff)" )

) ^ 2 + 1.64149416195459 * ((-1.03583333333333) + :Name( "Vdd (v)" )) ^ 2 + 0.0000000243208631182 * ((-0.25) + :

Name( "Slope (ps)" )) ^ 2)

) + 8853.76318681623 * Exp(

-(0.0000134460089951655 * ((-218.7625) + :Name( "Load (ff)" )) ^

2 + 0.0000001147929885888 * ((-125.00005) + :Name( "RAT (ps)" ))

^ 2 + 0.0000000243208631182 * ((-31.4895833333334) + :

Name( "Slope (ps)" )) ^ 2 + 1.64149416195459 * ((-

0.751666666666667) + :Name( "Vdd (v)" )) ^ 2)

) + 20982.5227697837 * Exp(

-(0.0000134460089951655 * ((-177.1125) + :Name( "Load (ff)" )) ^

2 + 0.0000000243208631182 * ((-62.7291666666666) + :

Name( "Slope (ps)" )) ^ 2 + 1.64149416195459 * ((-0.9325) + :

Name( "Vdd (v)" )) ^ 2 + 0.0000001147929885888 * ((-

0.00010000000000332) + :Name( "RAT (ps)" )) ^ 2)

) + -18978.464017667 * Exp(

-(0.0000134460089951655 * ((-145.875) + :Name( "Load (ff)" )) ^ 2

+ 0.0000000243208631182 * ((-93.96875) + :Name( "Slope (ps)" ))

^ 2 + 0.0000001147929885888 * ((-41.66675) + :Name( "RAT (ps)" )

) ^ 2 + 1.64149416195459 * ((-1.2425) + :Name( "Vdd (v)" )) ^ 2)

)

5.4

Response Characterization and Optimization

5.4.1

Optimization

The output response is optimized using the prediction profiler in JMP for the

Gaussian process analysis.

Figure:5-4-1-a shows the optimal input factors in achieving a target frequency of

400MHZ (ie) Tpd = 250ps. The desirability for Tpd is set to ~1 (maximum) at the

targeted Tpd = 250ps which is a requirement for our optimization. The 95% confidence

interval for this target frequency is 250ps +/- 9.012ps . The corresponding input factors

are:

Slope = 121.16 ps,

Load=59.45 ff,

Vdd=0.924 v,

RAT=134.71 ps.





The corresponding Tx for the optimal input factors are shown in Figure:5-4-1-b.

The optimal Tx = 314.2 ps and the 95% confidence interval is +/- 7.5ps.

Figure:5-4-1-a. Tpd Optimization

Figure:5-4-1-b. Tx Optimization





5.4.2 Comparison of Response Measurement Technique

In order to justify the response measurement technique (ie) whether to apply

single input switching criteria or multiple input switching criteria all we have to do is to

compare the Tpd and Tx with RAT set at high and low level for particular values of input

factors. This is because if RAT is set to high value of 250ps, that means the input signals

are arriving far apart and so it would simulate single input switching criteria for response

measurement. Where as if RAT is set to low value of 0.0001ps , then the input signals are

arriving close together and so it would simulate multiple input switching criteria for

response measurement.

We use the combination of surface profiler and contour profiler in JMP for the

RAT analysis to justify the response measurement using single input vs multiple input

switching criteria.

Figure:5-4-2 describes the surface profiler of Tpd for vdd vs RAT using optimal

slope factor =121.16ps and load factor =59.45ff identified during Tpd optimization for

250ps. From this surface profiler we can see that for high performance operation (ie) high

vdd operation (ie) vdd > 1v, RAT at low level seem to have more impact on Tpd

compared to RAT at high level. For low vdd operation (ie) vdd < 1v, RAT at low level

seem to have less impact on Tpd compared to RAT at high level. Since we are interested

in high performance operation we will focus on high vdd operation approximately 1.1v

for our RAT analysis.





Figure:5-4-2. Tpd surface profiler for Vdd vs RAT (slope=121.16 ps & load=59.45 ff)

5.4.3

Characterization

Figure:5-4-3-a shows the Tpd contour profile for single input switching criteria (ie)

RAT=250 ps.

The vdd value used is 1.1v based on high performance RAT analysis in section 5.4.2.

The slope is 121.16 ps and load = 59.45 ff based on high performance optimization

discussed in section 5.4.1.

The Tpd corresponding to these input factor is 232.22 ps which translates to an

operating frequency of 430MHz.





Figure:5-4-3-a. Tpd measurement using Single input Switching Technique

Figure:5-4-3-b shows the Tpd contour profile for multiple input switching criteria (ie)

RAT=0.0001 ps. All the other input factor values such as slope, load and vdd are same as

in single input switching case.

Note that the operating range for the output response Tpd is now 253.051ps. The Tpd

is degraded by ~20ps which translates to a frequency degradation of ~30MHz. Thus

the final target frequency met is only 400MHz compared to single input switching

criteria.

It is important to account this frequency degradation in the performance model so the

circuit operation can be predicted accurately and further performance optimization

can be carried on.





Figure:5-4-3-b. Tpd measurement using Multiple input Switching Technique

From the contour plot in Figure:5-4-3-a and Figure:5-4-3-b, it can be observed that

for the optimal Tpd operating range of 250ps, the load factor can range from 0 to 65

ff and the slope factor can range from 0 to 750 ps.

Though the optimal operating frequency is 400MHz (ie) Tpd =250ps, we would like

to have a wider range for performance characterization so we can predict the

performance of the NAND gate for above and below the optimal operating range.

o

By setting the Tpd low limit to 0ps and high limit to 500ps we can see that for2-input NAND gate, the characterization range for slope is 0 to 750 ps and

load is 0 to 150 ff at operating voltage vdd=1.1v and RAT=0.0001ps.





Figure:5-4-3-c. Tx measurement using Multiple input Switching Technique

Figure:5-4-3-c shows the optimal characterization range for Tx corresponding to the

optimal input factors derived from Tpd characterization using multiple input

switching criteria. From the factor interaction discussed in section 5.3.4, we are aware

that Tx is in sensitive to RAT at high performance operation (ie) also high vdd

operation. So we take the optimal input factors derived from Tpd and verify that the

characterization range for Tpd is also the optimal characterization range for Tx.

o

For lower limit Tx=0ps and upper limit Tx=500ps and for vdd=1.1v,

RAT=0.0001, the characterization range for slope is 0 to 750ps and load is 0 ff

to 150 ff which also agrees with the Tpd characterization range.





5.5 Model Adequacy Check – Cross Validation

The model predicted Tpd and Tx are cross verified against the objective fro a

sample size of 250. The input factor values for these samples are randomly generated byJMP profiler within the lower and upper limit used for experimental analysis. The

corresponding predicted response is also obtained from the JMP prediction profile

simulation. The objective response is obtained following the same procedure applied

during the initial data collection. The residual analysis is discussed in the following

sections.

5.5.1 Predicted vs objective Tpd

Figure:5-5-1. Model Predicted Tpd response versus Objective Tpd

Observation and Inference:

The model predicted Tpd versus objective is plotted in Figure:5-5-1. The modelsimulated Tpd versus the objective Tpd lie along 45 degree angle and so the model is

reasonably accurate enough to meet our goal for performance characterization and

optimization of Tpd.





5.5.1.1 Normality Assumption

Figure:5-5-1-1. Normal Plot of Residuals for Tpd






The normal plot of residual for Tpd is shown in Figure:5-5-1-1. The

residual for Tpd is approximately flat with the 45 degree line with the exception

of few outliers. All the residual including the outliers are distributed with in +/- 3

standard deviation from zero. Thus it can be concluded that model predicted Tpd

error is normally distributed with mean 0 and variance σ2 (ie) NID(0, σ

2 ).

The outliers that are between +/- 2 to +/- 3 are due to irrelevant data points

(ie) un realistic input factor combinations which can be eliminated for residual

analysis. The unrealistic input combinations includes:

Large slope and small load.

Large load and small vdd.

Small RAT and small vdd.

The model adequacy check can be performed over a range of realistic operating

range of the system under test in such case the residual analysis will get even

better.

5.5.1.2

Independence Assumption on Error

Figure:5-5-1-2. Residual Vs Run order for Tpd






The residual vs run order is displayed in Figure:5-5-1-2. There is no

specific pattern to the residuals and so the assumption of equal variance holds

satisfactorily.

5.5.1.3

Constant Variance

Figure:5-5-1-3-a. Residual Vs Predicted Tpd


The residual vs predicted Tpd is displayed in Figure:5-5-1-3-a. There is a

specific pattern to the residuals. The residual has inward funnel shape with

increased Tpd. These are not due to measurement error and so they are real. we

will further analyze the residual vs input factors plot to derive conclusion. Data

transformation will be required to further improve the accuracy of predictivemodel.





Figure:5-2-6-4-b. Residual Vs Input Factors for Tpd


The residual vs input factors are shown in Figure:5-5-1-3-b. There are no obvious

pattern of residuals with respect to slope and RAT. Where as the load and Vdd seem to

have some correlation effect (ie) there is inward funnel shape to Tpd residual for

increase in load and Tpd residual moving from negative to positive to negative for

increase in Vdd. These are possibly due to the interaction between load and vdd as well

as due to un realistic input combinations such as:








The residual can be analyzed further after carefully eliminating the un realistic input

combination. If the residual still present violation of constant variation, then a data

transformation need to be applied in order to further improve the accuracy of the predictive

model.

5.5.2

Predicted vs objective Tx

Figure:5-5-2. Model Predicted Tx response versus Objective Tx


The model predicted Tx versus objective is plotted in Figure:5-5-2. The model

predicted Tx versus the objective Tx lie along approximately 45 degree angle and so the

model is reasonably accurate enough to meet our goal for performance characterization

and optimization of Tx.





5.5.2.1 Normality Assumption

Figure:5-5-2-1. Normal Plot of Residuals for Tx






The normal plot of residual for Tx is shown in Figure:5-5-2-1. The

residual for Tx is not exactly flat with the 45 degree line . It seem to have a slight

S patters. But it is reasonably flat and good for the preliminary model. And also

there are some outliers. But all the residual including the outliers are distributed

with in +/- 3 standard deviation from zero. Thus it can be concluded that model

predicted Tx error is normally distributed with mean 0 and variance σ2 (ie)

NID(0, σ2 ).

Most of the outliers that are between +/- 2 to +/- 3 are due to irrelevant

data points (ie) un realistic input factor combinations which can be eliminated for

residual analysis. The unrealistic input combinations includes:




The model adequacy check can be performed over a range of realistic operating

range of the system under test in such case the residual analysis will get even

better.

5.5.2.2

Independence Assumption on Error

Figure:5-5-2-2. Residual Vs Run order for Tx






The residual vs run order is displayed in Figure:5-5-2-2. There is no

obvious specific pattern to the residuals and so the assumption of equal variance

holds satisfactorily.

5.5.2.3

Constant Variance

Figure:5-5-2-3-a. Residual Vs Predicted Tx


The residual vs predicted Tx is displayed in Figure:5-5-2-3-a. There is a

specific pattern to the residuals. The residual moves from positive to negative to

positive again. These are not due to measurement error and so they are real. we

will further analyze the residual vs input factors plot to derive conclusion. Data

transformation will be required to further improve the accuracy of predictive

model.





Figure:5-5-2-3-b. Residual Vs Input Factors for Tx


The residual vs input factors are shown in Figure:5-5-2-3-b. There are no specific

pattern of residuals with respect to slope and RAT. Where as the load and Vdd seem to

have some correlation effect. There is inward funnel shape for increase in vdd and

outward funnel shape for increase in load. These are not due to measurement error and so

they are real. These are due to the un realistic input combinations such as:








The residual can be analyzed further after carefully eliminating the un realistic input

combination. If the residual still present violation of constant variation, then a data

transformation need to be applied in order to further improve the accuracy of the predictive

model.

6 Conclusion and Recommendation

Conclusion:

The Space Filling Design with Gaussian Process analysis is the better experimental

design choice for predicting the range of input factors for performance characterization of

standard cells. Also the optimal operating range can be arrived from this design for better

performance of the overall circuit design.

The full quadratic models shown in section 5.2.5 and 5.3.5 for Tpd and Tx responses can

be used to predict the performance of basic 2-input NAND gate using 65nm process

technology.

For high voltage operation (ie) vdd >1v (which is also in most case high performance

operation), low level RAT increases the Tpd response and so degrades the circuit

performance. Where as for low voltage operation (ie) vdd < 1v, high level RAT increases

the Tpd response and degrades the circuit performance.

For high performance characterization and optimization of standard cells, multiple input

switching based response measurement (ie) RAT=0.0001ps causes significant frequency

degradation of ~30MHz compared to single input switching criteria .

The optimum input factors for the frequency target of 400MHz (Tpd=250ps) for the

2-input NAND gate at is :

o

Slope = 121.16 ps, Load=59.45 ff, Vdd=0.924 v, RAT=134.71 ps. The Tpd and Tx response characterization range for lower limit 0ps and upper limit

500ps at vdd=1.1.v and RAT=0.0001 is:

o Slope = 0 to 750 ps.

o Load = 0 to 150ff.





Recommendations:

The same characterization approach can be extended for any type of circuit and various

drive strengths in the standard cells library with changes to appropriate factor setting .

The characterization approach can also be extended for low voltage vdd=0.7v and high

voltage vdd=1.32v as well considering multiple input switching criteria for response

measurement.

The optimum input factors can be identified for any frequency target and be characterized

accordingly for all cells in the standard cell library.

Since the range of characterization of the standard cell can be wide, we would

recommend to use sample size > 25 in order to further improve the accuracy of prediction

model for Tpd and Tx. This ensures that the uniformity of the Latin Hypercube is met.

The constant factors in our design are temperature and the process corner. These factors

can also be considered as continuous variable for future experimentation.

The un realistic input combinations such as large slope and small load, large load and

small vdd and small RAT and small vdd can be eliminated from the residual analysis.

Data transformation will be required to further improve the accuracy of predictive model.

The parametric predictive model for Tpd / Tx is as follows. The parameters need to be

extracted from the physical model and cross verified with the empirical fit using DOE.




7 References

Design and Analysis of Experiments –Dr.Douglas C. Montgomery, Sixth Edition, John Wiley &

Sons,Inc.

JMP software – Version 7.0.1

Design Expert Software Package – Version 7.0.3

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