Microprocessors And Microcontrollers · Microprocessors And Microcontrollers By: Dr. Attiya Baqai...
Transcript of Microprocessors And Microcontrollers · Microprocessors And Microcontrollers By: Dr. Attiya Baqai...
Microprocessors And Microcontrollers
By: Dr. Attiya Baqai
Semester : 4th , 5th (TL, ES) Assistant Professor,
Course Code : ES256 , ES313 Department of
Electronics, MUET.
Bit-Addressability
I/O
GPR
SREG
Bit-Addressability
◉ Bit oriented instructions for I/O registers (0<=d<=31)- i.e lower 32 IO registers from 64 registers
◉ Bit oriented instructions for GPR (R16-R31)
◉No bit oriented instructions for Program Memory
Bit-Oriented Instructions for I/O
Bit-Oriented Instructions for I/O
I/O Bit-Addressability
◉ SBI I/oReg, bit_num
◉CBI I/oReg, bit_num
Toggling a pin using IO bit addressibility feature
Example 4-2
Example 4-2
Checking an input pin
◉ skip if the bit in IO register is set
◉ skip if the bit in IO register is clear
Checking an input pin
Checking an input pin
Checking an input pin
Example-2
◉ LDI R17, 0b01011001 ; R17=0x59
SBR R17,0b01100100; set bits 2,5 and 6 in Register R17
R17 = 0x7D
Bit No 7 6 5 4 3 2 1 0
R17 0 1 0 1 1 0 0 1
SBR X √ √ X X √ X X
Result 0 1 1 1 1 1 0 1
Example-2
◉ LDI R17, 0b01011001 ; R17=0x59
CBR R17,0b01100100; set bits 2,5 and 6 in Register R17
R17 = 0x19
Bit No 7 6 5 4 3 2 1 0
R17 0 1 0 1 1 0 0 1
CBR X √ √ X X √ X X
R17 0 0 0 1 1 0 0 1
Copying a bit
◉T bit is used to copy bit from one GPR to another GPR
◉BST Rd, b (Bit store from register to T)
◉BLD Rr,b ( Bit Load from T to register)
Bit No 7 6 5 4 3 2 1 0
SREG I T H S V N Z C
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Rr
BLD Rr,b
Copy bit 6 from R18 to bit 3 in Register R17
BST Rd,b
Rd
Example 6-21
◉ A switch is connected to pin PB4. Write a program to get the status of the switch and save it in D0 of internal RAM location $200.
◉ Solution
.EQU MYREG=0x200
CBI DDRB,4; make PB4 i/p
IN R17, PINB; R17=PINB
BST R17,4; T=PINB.4
LDI R16,0X00; R16=0
BLD R16,0 ; R16.0=T STS MYREG,R16; Copy R16 to location $200 HERE: JMP HERE
Checking a bit
◉ SBRc Rd,b
◉(skip next instruction if Bit in Register is Cleared)
◉ SBRS Rd,b
◉(skip next instruction if Bit in Register is Cleared)
◉Rd∈{r0, r1, …, r31}
Example-1
LDI R17,0B00001010 SBRS R17,3 ; skip next instruction if bit 3 in R17 is set LDI R20,0X55 LDI R30, 0X33 What will happen if instead of SBRS, SBRC instruction is used, what will be the contents of R20 and R30?
Bit 3
Example 6-22
◉ A switch is connected to pin PC7. Using the SBRS instruction, write a program to check the status of switch and perform the following:
(a) If switch=0 send letter “N” to Port D.
(b) If switch=1 send letter “Y” to Port D.
Solution:
.INCLUDE “M32DEF.INC”
CBI DDRC,7
LDI R16,0XFF
OUT DDRD, R16
AGAIN: IN R20, PINC SBRS R20,7 RJMP OVER LDI R16, „Y‟ OUT PORTD, R16 RJMP AGAIN OVER: LDI R16, „N‟ OUT PORTD, R16 RJMP AGAIN
Example 6-22
◉ A switch is connected to pin PC7. Now use SBIS instruction instead of SBRS to write the same program to check the status of switch and perform the following:
(a) If switch=0 send letter “N” to Port D.
(b) If switch=1 send letter “Y” to Port D.
Solution:
.INCLUDE “M32DEF.INC”
CBI DDRC,7
LDI R16,0XFF
OUT DDRD, R16
AGAIN: IN R20, PINC SBRS R20,7 SBIS PINC,7 RJMP OVER LDI R16, „Y‟ OUT PORTD, R16 RJMP AGAIN OVER: LDI R16, „N‟ OUT PORTD, R16 RJMP AGAIN
Checking a Flag bit
◉ BRBS s,k (branch if status flag bit is set)
◉ BRBC s,k (branch if status flag bit is cleared)
◉ 0<=s<=7, bit in Status Register
◉ k is the relative address of the target location
BRBS 0, L1 ; Branch if status flag bit 0 is set
LDI R20,3
L1:
BRCS 0, L1 ; Branch if carry flag is set
LDI R20,3
L1:
Checking a Flag bit
Manipulating a bit
◉ BSET s; flag bit set
◉ BCLR s; flag bit clear
◉ 0<=s<=7, bit in Status Register
◉ BSET 0 ; set bit 0 (carry flag)
◉ BCLR 0; clear bit 0 (carry flag)
◉ BCLR 1; clear bit 1 (zero flag)
◉ CLZ ; clear zero flag
Manipulating a bit
Internal RAM bit addressability Write a program to see if internal RAM location &195 contains an even value. If so, send it to port B. If not, make it even and then send it to port B.
Solution 1:
.EQU MYREG = 0X195
LDI R16, 0XFF
OUT DDRB, R16
AGAIN:LDS R16, MYREG
SBRS R16,0
RJMP OVER
CBR R16, 0B 00000001
OVER: OUT PORTB,R16
JMP AGAIN
Solution 2:
.EQU MYREG = 0X195
LDI R16, 0XFF
OUT DDRB, R16
AGAIN: LDS R16, MYREG
CBR R16, 0B 00000001
OVER: OUT PORTB,R16
JMP AGAIN
Any questions ?
Thanks!