Microelectronics Lab ELCT 708 - GUCeee.guc.edu.eg/Courses/Electronics/ELCT706... · •OCR2 Output...

Dr M. Abd El GhanyEng. Yasmin Adel

Microelectronics Lab ELCT 706

Session 3


Content

• Introduction to Timers

• Atmega 16/32

• Timer Normal Mode

• Timer Compare Mode

• Timer Pulse Width Modulation Mode


Introduction

• Timers are used to generate delays, waveforms, counting, PWM generation.

• Timers can be either operated in

1. Normal mode (Overflow)

2. Compare mode CTC or compare match mode

3. PWM Pulse Width Modulation mode.


Timers

• 8 bit timer register holds 28 = 256 values from 0-255

• 255 is the maximum number that the timer can count after that we

Say the timer overflowed

• 16 bit timer register holds 216 =65536 values from 0-65535

• 65535 is the maximum number that the timer can count after that we

Say the timer overflowed


Resolution

• It is the smallest time period of one timer count.

• 𝑅𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 =1

𝐹𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦 𝑜𝑓 𝑇𝑖𝑚𝑒𝑟

• If timer counts 256 ticks (8 bit timer) until overflow then and frequency=1M hz


1𝑀=1us

• Time till overflow =Resolution*ticks =1us*256=256us


Problem

• we need to flash an LED every 10 ms.

• This implies that its frequency is 1/10ms = 100 Hz

• For F_CPU = 4 MHz, time period T = 1/4M = 0.00025 ms.

• Timer Count = 39999


Solution

• Now, to achieve this, we definitely cannot use an 8-bit timer

(as it has an upper limit of 255, after which it overflows).

• we use a 16-bit timer (which is capable of counting up to 65535) to achieve this delay.


Prescaler

• The prescaler is used to divide the clock frequency and produce a clock for TIMER.

• The prescaler is used when it is necessary to measure longer periods of time (decrease frequency).

• The prescaler can be used to get the following clock for timer:

No clock (Timer Stop) No prescaler

Clock =FCPU FCPU/256

FCPU/8 FCPU/1024

FCPU/64


Why do we need prescaler?

• The maximum delay for FCPU 4M hz is 16.384 ms using the equation.

𝑀𝑎𝑥 𝐷𝑒𝑙𝑎𝑦 = 𝑀𝑎𝑥 𝑇𝑖𝑚𝑒𝑟 𝑐𝑜𝑢𝑛𝑡 ∗ 𝑐𝑙𝑜𝑐𝑘 𝑡𝑖𝑚𝑒 𝑝𝑒𝑟𝑖𝑜𝑑 + 1

• Now what if we need a greater delay, say 20 ms? We are stuck?!


Why do we need prescaler?

• if we decrease the F_CPU from 4 MHz to 0.5 MHz (i.e. 500 kHz)

• clock time period increases to 1/500k = 0.002 ms.

• Required Delay = 20 ms

• Clock Time Period = 0.002 ms

• Timer Count = 9999.

• At this frequency, a maximum delay of 131.072 ms can be achieved.


Resolution when using prescaler

• If we use 1024 prescaler FCPU/1024

• FCPU=1M

• TIMER FREQUENCY=1M/1024


𝑇𝑖𝑚𝑒𝑟 𝐹𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦=

1024

1𝑀= 1024𝑢𝑠

• Time till overflow =Resolution*ticks =1024us*256=0.26s


Atmega 16 Timers

• Atmega 16/32 have 3 timer/counter we have 3 timers/counters each with separate prescaler.

• Timer 0 – 8 bit

• Timer 1 -16 bit

• Timer 2 – 8 bit


Registers For Timer 0

• TCNT0 Timer/Counter Register 0

• TCCR0 Timer/Counter Control Register 0

• OCR0 Output Compare Register 0



• TCNT1 Timer/counter Register 1

• TCCR1A Timer/Counter Control Register1A

• TCCR1B Timer/Counter Control Register1B

• OCR1A Output Compare Register1A

• ICR1 Input Capture register



• TCNT2 Timer/Counter Register 2

• TCCR2 Timer/Counter Control Register 2

• OCR2 Output Compare Register 2


Normal Mode

• In normal mode the counter start counts from certain initial value until it reaches its maximum value and then start counting from the beginning.


Timer Overflow

• A timer overflow means that the counter (TCNT0) has counted up to its maximum value and is reset to zero in the next timer clock cycle.

• The timer overflow event causes the timer overflow flag (TOV0) to be set in the timer interrupt flag register(TIFR)


Interrupt

• In the condition of counter overflow, we can set up a bit to fire an interrupt whenever an overflow occurs.

• Set Global Interrupt Flag SREG

• Now, during execution of the program, whenever an overflow occurs, an interrupt is fired and the MCU attends to the corresponding ISR.

• Now it’s up to us what do we want to do inside the ISR. We can toggle the value of a pin, or increment a counter, etc etc.


Interrupt vector table


Interrupt Vector Name


TIMSK – Timer/Counter Interrupt Mask Register


TIMSK – Timer/Counter Interrupt Mask Register• Bit 0 – TOIE0: Timer/Counter0, Overflow Interrupt Enable

• When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally

• enabled), the Timer/Counter0 Overflow Interrupt is enabled

• Bit 2 – TOIE1: Timer/Counter1, Overflow Interrupt Enable


• enabled), the Timer/Counter1 Overflow Interrupt is enabled.

• Bit 6– TOIE2: Timer/Counter2, Overflow Interrupt Enable


• enabled), the Timer/Counter2 Overflow Interrupt is enabled.


Timer 0Normal Mode


TCNT0 – Timer/Counter Register

The Timer/Counter Register gives direct access, both for read and write operations, to the Timer/Counter unit 8-bit counter.


TCNT0 updates its values


TCCR0 – Timer/Counter Control Register 0


Waveform Generation Mode Bit Description


Timer 2 Normal Mode


TCNT2 – Timer/Counter Register


TCCR2 – Timer/Counter Control Register


Waveform Generation Mode Bit Description


Timer 1Normal Mode


TCNT1H and TCNT1L –Timer/Counter1 High and Low Register


TCCR1A – Timer/Counter1 Control Register A


TCCR1B – Timer/Counter1 Control Register B


Exercise 1

• Write embedded C code using Atmega16 to control led by timer0.

• Requirements

• Configure the uc control with internal 1Mhz clock

• The LED is connected to pin 0 in PORTA

• Connect the led using positive logic configuration

• Configure the timer clock to F_CPU/1024

• Timing should be count using Timer0 in normal mode

• Toggle the led every half second


Compare Mode

• Compare mode is used for generating periodic event or for generating waveforms.

• In compare mode, there is one compare register OCRX, where we can set value to compare with the Timer / counter register value.

• Once the compare value matches with timer / counter register value OCRX, compare match occurs.


Compare Mode

• In ATmega 16 / 32, the Timer counts up until the value of the TCNT0 (Timer / counter register) register becomes equal to the content of OCR0 (Compare register).

• As soon as TCNT0 becomes equal to the OCR0, compare match occurs and then timer will get cleared and OCF0 flag will get set.

• OCF0 flag is located in TIFR register.

• When the compare match occurs. If the I-bit was set and the timer compare interrupt is also enabled it will generate an interrupt.


TIFR – Timer/Counter Interrupt Flag Register


TIFR – Timer/Counter Interrupt Flag Register• Bit 4 – OCF1A: Timer/Counter1, Output Compare A Match Flag

• This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output

Compare Register A (OCR1A).

• OCF1A is automatically cleared when the Output Compare Match A Interrupt Vector is executed.

• Alternatively, OCF1A can be cleared by writing a logic one to its bit location.

• • Bit 3 – OCF1B: Timer/Counter1, Output Compare B Match Flag

• This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output

Compare Register B (OCR1B).

• OCF1B is automatically cleared when the Output Compare Match B Interrupt Vector is executed.

• Alternatively, OCF1B can be cleared by writing a logic one to its bit location.


Generating Square Wave using Compare Mode

• To generate square wave in compare mode, we can set COM bits in TCCRX to toggle mode (COM01:00=01), So OC0 pin will be toggled on each compare match and square wave will be generated.


Interrupt vector Table


Interrupt Vector Name



Bit 1 – OCIE0: Timer/Counter0 Output Compare Match Interrupt Enable

• When the OCIE0 bit is written to one and the I-bit in the Status Register is set (one), the Timer/Counter0 Compare Match interrupt is enabled.

• The corresponding interrupt is executed if a compare match in Timer/Counter0 occurs.



Bit 7 – OCIE2: Timer/Counter2 Output Compare Match Interrupt Enable

• When the OCIE2 bit is written to one and the I-bit in the Status Register is set (one), the Timer/Counter2 Compare Match interrupt is enabled.

• The corresponding interrupt is executed if a compare match in Timer/Counter2 occurs.


COMPARE Mode


Timer 0Compare Mode


OCR0 – Output Compare Register


Timer 2 Compare Mode


OCR2 – Output Compare Register


Timer 1 Compare Mode


OCR1A – Output Compare Register 1A


OCR1B – Output Compare Register 1B


TCCR1A – Timer/Counter1 Control Register A


TCCR1B – Timer/Counter1 Control Register B


Exercise 2

• Write embedded c code using Atmega16 to generate a 2khz clock using Timer0 CTC mode.

• Requirements

• Configure the MCU with internal clock 1Mhz.

• Use timer0 in CTC Mode with clock equals to F_CPU clock

• Clock duty cycle 50%


Timer 0Pulse Width Modulation


Pulse width Modulation

• Pulse width modulation (PWM is a method of reducing the average power delivered by an electrical signal.

• The average value of voltage (and current) fed to the load is controlled by turning the switch between supply and load on and off at a fast rate.

• The longer the switch is on compared to the off periods, the higher the total power supplied to the load

https://en.wikipedia.org/wiki/Volt

https://en.wikipedia.org/wiki/Electric_current

https://en.wikipedia.org/wiki/Electrical_load


Duty Cycle

• It describes the proportion of 'on' time to period of time.

• A low duty cycle corresponds to low power, because the power is off for most of the time.

• Duty cycle is expressed in percent, 100% being fully on.

%𝐷𝑢𝑡𝑦 𝐶𝑦𝑐𝑙𝑒 =𝑜𝑛 𝑡𝑖𝑚𝑒

(𝑜𝑛 𝑡𝑖𝑚𝑒 + 𝑜𝑓𝑓 𝑡𝑖𝑚𝑒)


Duty Cycle

• When a digital signal is on half of the time and off the other half of the time, the digital signal has a duty cycle of 50% and resembles a "square" wave.

• When a digital signal spends more time in the on state than the off state, it has a duty cycle of >50%.

• When a digital signal spends more time in the off state than the on state, it has a duty cycle of <50%. Here is a pictorial that illustrates these three scenarios:


Duty Cycle


Examples of using PWM

1. Controlling LED Brightness

2. Servo Motor Controllers


LED Brightness

• The 100% duty cycle, it is high 100% of the time, so this will be full power for the LED.

• At 50% duty cycle, the signal is high for 50% of the time delivering 50% of the power to the LED.

• And lastly when there is 0% duty cycle, the signal is low 100% of the time so the LED has no power at all so remains off.


Servo Motors

• The servo circuitry is built right inside the motor unit and has a positionable shaft, which usually is fitted with a gear .

• The motor is controlled with an electric signal which determines the amount of movement of the shaft.

Increase in average voltage = increase in speed

• The motor's speed is proportional to the difference between its actual position and desired position.

https://www.jameco.com/webapp/wcs/stores/servlet/ProductDisplay?langId=-1&storeId=10001&productId=1810072&catalogId=10001


Servo Motors

: Angular Velocity V: VoltageT : Torque R: Resistance K : is constant


Servo Motors

• There is a minimum pulse, a maximum pulse, and a repetition rate.

• The servo motor expects to see a pulse every 20 milliseconds (ms) and the length of the pulse will determine how far the motor turns.

• A 1.5ms pulse will make the motor turn to the 90° position.

• Shorter than 1.5ms moves it in the counter clockwise direction toward the 0° position

• longer than 1.5ms will turn the servo in a clockwise direction toward the 180° position.


Types of PWM in ATmega16

1. Fast PWM Mode

2. Phase Correct PWM Mode


Fast PWM

• (WGM01:0 = 3) provides a high frequency

• PWM waveform generation option.


compare output modes of operation:


compare output modes of operation:

• Inverted Mode – In this mode, if the waveform value is greater than the compare level, then the output is set high, or else the output is low. This is represented in figure A above.

• Non-Inverted Mode – In this mode, the output is high whenever the compare level is greater than the waveform level and low otherwise. This is represented in figure B above.


Fast PWM


Fast PWM

• We have a sawtooth waveform, and we compare it with a fixed voltage level (say A), and thus we get a PWM output as shown (in A). Now suppose we increase the compare voltage level (to, say B). In this case, as we can see, the pulse width has reduced, and hence the duty cycle. But, as you can see, both the pulses (A and B) end at the same time irrespective of their starting time.

• In this mode, since sawtooth waveform is used, the timer counter TCNTn (n = 0,1,2) counts from BOTTOM to TOP and then it is simply allowed to overflow (or cleared at a compare match) to BOTTOM.


PWM frequency for Fast PWM

𝐹 =𝑓𝐶𝐿𝐾𝑖/𝑜

𝑁 ∗ 256• N=1,8,64,256,1024

• Note : to be able to generate an output from the PWM in timer0, the output compare pin of timer0 (oc0) must be set as output

• DDRB|=(1<<PB3)


Phase correct PWM

• The phase correct PWM mode (WGM01:0 = 1) provides a high resolution phase correct PWM

• waveform generation option.


Phase Correct PWM

• we have used a triangular waveform.

• Increasing the compare voltage level, the duty cycle reduces.

• But unlike Fast PWM, the phase of the PWM is maintained. Thus it is called Phase Correct PWM.

• By visual inspection, we can clearly see that the frequency of Fast PWM is twice that of Phase Correct PWM.


Fast PWM


PWM frequency for phase correct PWM

• Get it from the datasheet


When to use Fast and Phase correct

• If you want to control the speed of DC motors or brightness of LEDs, go for any one of them. But if you are using it for telecommunication purposes, or for signal sampling, fast PWM would be better. For general applications, phase correct PWM would do.


Servo Motors


Exercise 3

• Write embedded c code using Atmega16 to control LED brightness

Using Fast PWM

• Requirements

• Configure the MCU with internal 1Mhz clock

• Use Timer0 in PWM with clock F_CPU/8

• Generate the same PWM signal with varying duty cycles to control the brightness of the LED.

Microelectronics Lab ELCT 708 - GUCeee.guc.edu.eg/Courses/Electronics/ELCT706... · •OCR2 Output...

Documents

Transcript of Microelectronics Lab ELCT 708 - GUCeee.guc.edu.eg/Courses/Electronics/ELCT706... · •OCR2 Output...