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Transcript of Microelectronic Materials and Processes - Springer978-94-009-0917-5/1.pdfChapter 7 Properties and...
Microelectronic Materials and Processes
NATO ASI Series Advanced Science Institutes Series
A Series presenting the results of activities sponsored by the NA TO Science Committee, which aims at the dissemination of advanced scientific and technological knowledge, with a view to strengthening links between scientific communities.
The Series is published by an international board of publishers in conjunction with the NATO Scientific Affairs Division
A Life Sciences B Physics
C Mathematical and Physical Sciences
D Behavioural and Social Sciences E Applied Sciences
F Computer and Systems Sciences G Ecological Sciences H Cell Biology
Series E: Applied Sciences - Vol. 164
Plenum Publishing Corporation London and New York
Kluwer Academic Publishers Dordrecht, Boston and London
Springer-Verlag Berlin, Heidelberg, New York, London, Paris and Tokyo
Microelectronic Materials and Processes edited by
R.A. Levy AT & T Bell Laboratories, Murray Hill, New Jersey, U.8A
Kluwer Academic Publishers
Dordrecht / Boston / London
Published in cooperation with NATO Scientific Affairs Division
Proceedings of the NATO Advanced Study Institute on Microelectronic Materials and Processes II Ciocco, Castelvecchio Pascoli, Italy June 30 - July 11,1986
ISBN-13: 978-0-7923-0154-7 DOl: 10.1007/978-94-009-0917-5
e-ISBN-13: 978-94-009-0917-5
Published by Kluwer Academic Publishers, P.O. Box 17, 3300 AA Dordrecht, The Netherlands.
Kluwer Academic Publishers incorporates the publishing programmes of D. Reidel, Martinus Nijhoff, Dr W. Junk, and MTP Press.
Sold and distributed in the U.S.A. and Canada by Kluwer Academic Publishers, 101 Philip Drive, Norwell, MA 02061, U.S.A.
In all other countries, sold and distributed by Kluwer Academic Publishers Group, P.O. Box 322, 3300 AH Dordrecht, The Netherlands.
All Rights Reserved © 1989 by Kluwer Academic Publishers. Softcover reprint of the hardcover 1 st edition 1989 No part of the material protected by this copyright notice may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying, recording or by any information storage and retrieval system, without written permission from the copyright owner.
CONTENTS
List of Contributors xi
Preface xiii
Chapter 1 Silicon Crystal Growth w. Lin K. E. Benson
1.1 Introduction 1 1.2 Growth Characteristics 1 1.3 Impurity Incorporation 6 1.4 Trends in Large-Diameter Silicon Growth 18 1.5 Conclusions 23
Chapter 2 Silicon Epitaxy McD. Robinson
2.1 Introduction 25 2.2 EPI Equipment 27 2.3 Deposition 29 2.4 Doping 40 2.5 Autodoping 43 2.6 Pattern Shift 52 2.7 Defects 56 2.8 EPI Characterization 66 2.9 Conclusions 73
Chapter 3 Silicon Oxidation G. J. Declerck
3.1 Introduction 79 3.2 Oxide Formation 79 3.3 Silicon Dioxide Properties 109 3.4 Conclusions 127
vi
Chapter 4 Physical Vapor Deposition
W. D. Westwood
4.1 Introduction 133 4.2 Deposition Methods 136 4.3 Alloys and Compounds 164 4.4 Film Properties 182 4.5 Conclusions 195
Chapter 5 Chemical Vapor Deposition
W. Kern
5.1 Introduction 203 5.2 Some Basic Aspects of CVD 205 5.3 Types of CVD Processes 211 5.4 Production CVD Reactor Systems 218 5.5 Deposition of Various Materials for VLSI Device
Fabrication 224 5.6 Conclusions 240
Chapter 6 Dielectric Materials
W. Kern
6.1 Introduction 247 6.2 Dielectric and Insulator Materials and their
Applications in VLSI Technology 248 6.3 Methods of Film Formation and Equipment 252 6.4 Vertical Insulation in VLSI Technology 258 6.5 High Temperature Interconductor Insulation 258 6.6 Low Temperature Intermetal Insulation 263 6.7 Over-Metal Passivation Layer 269 6.8 Conclusions 270
Chapter 7 Properties and Applications of Silicides
s. P. Murarka
7.1 Introduction 275 7.2 Properties 279 7.3 Formation of Silicides and their Processing 293 7.4 Process Stability of Silicides-Resistivity,
Stress and Device Reliability 317 7.5 Limitations 318 7.6 Conclusions 319
vii
Chapter 8 Forefront of Photolithographic Materials G. N. Taylor
8.1 Introduction 325 8.2 Extending Positive Resist Performance in the UV Region 326 8.3 Negative Resist Materials Which Do Not Swell During
Development 335 8.4 Image Reversal Techniques 341 8.5 Contrast Enhancing Materials (CEMs) 347 8.6 Amplification in Photoresist Technology 353 8.7 Deep UV Resists 357 8.8 Multilevel Resist Technology and Planarization 368 8.9 Bilayer Resist Processes 372
8.10 Gas-Phase-Functionalized Plasma-Developed Resists 389 8.11 Conclusions 401
Chapter 9 Fine-Line Lithography
A. N. Broers
9.1 Introduction 409 9.2 Basic Fabrication Processes and Ultimate Resolution 410 9.3 UV Shadow Printing 413 9.4 X-Ray Lithography 414 9.5 Ion and Electron Beam Proximity Printing 419 9.6 Optical Projection 420 9.7 Scanning Electron Beam Lithography 427 9.8 Scanning Ion Beam Lithography 451 9.9 Conclusions 454
Chapter 10 Dry Etching Processes D. W. Hess
10.1 Introduction 459 10.2 RF Glow Discharges (Plasmas) 461 10.3 Etching Considerations 474 10.4 Profile Control 491 10.5 Process Monitoring (Diagnostics) 496 10.6 Other Dry Etch Techniques 510 10.7 Radiation Damage 511 10.8 Safety Considerations 513 10.9 Conclusions 513
viii
Chapter 11 Ion Implantation E. Rimini
11.1 Introduction 521 11.2 Ion Implanters 522 11.3 Range Distributions 529 11.4 Ion Damage 550 11.5 Annealing of Implanted Dopant Impurities 555 11.6 Ion Beam Annealing 571 11.7 Conclusions 576
Chapter 12 Diffusion in Semiconductors
U. Gosele
12.1 Introduction 583 12.2 Phenomenological Description 584 12.3 Point Defects and Atomistic Diffusion Mechanisms 590 12.4 Diffusion in Silicon 596 12.5 Diffusion in Germanium 622 12.6 Diffusion in Gallium Arsenide 623 12.7 Conclusions 629
Chapter 13 Interconnect Materials Y. Pauleau
13.1 Introduction 635 13.2 Material and Process Requirements for VLSI Technology 637 13.3 Gate Metallization 638 13.4 Metal-Silicon Contacts 650 13.5 Interconnect Lines 665 13.6 Conclusions 674
Chapter 14 Imperfection and Impurity Phenomena K. V. Ravi
14.1 Introduction 679 14.2 Imperfections and Impurities 680 14.3 Electrical Phenomena 717 14.4 Defect-Free Processing 735 14.5 Conclusions 767
ix
Chapter 15 Process Simulation
W. Fichtner
15.1 Introduction 775 15.2 Epitaxy 776 15.3 Ion Implantation 783 15.4 Diffusion 795 15.5 Lithography 810 15.6 Conclusions 839
Chapter 16 Diagnostic Techniques
H. W. Werner
16.1 Introduction 845 16.2 Physical Background of Diagnostic Techniques 852 16.3 Analytical Aspects of Diagnostic Techniques 862 16.4 Areas of Application of Diagnostic Techniques 871 16.5 Specific Features and Applications of the Different Methods 871 16.6 Conclusions 966 16.7 Explanation of Acronyms and Abbreviations 973
Index 981
LIST OF CONTRIBUTORS
K. E. BENSON
AT &T Bell Laboratories Allentown, Pennsylvania 18103
A. N. BROERS
Engineering Department Cambridge University Cambridge, England
G. J. DECLERCK
IMEC Leuven, Belgium
W. FICHTNER
Institute for Integrated Systems Swiss Federal Institute of Technology Zurich, Switzerland
.. U. GOSELE
School of Engineering Duke University Durham, North Carolina 27706
D. W. HESS
Department of Chemical Engineering University of California Berkeley, California 94720
xi
WERNER KERN
David Sarnoff Research Center RCA Laboratories Princeton, New Jersey 08543
W. LIN
AT & T Bell Laboratories Allentown, Pennsylvania 18103
s. P. MURARKA
Rensselaer Polytechnic Institute Center for Integrated Electronics Watervliet, New York 12189
Y PAULEAU
CNET 38243 Meylan, France
K. V. RAVI
Mobil Solar Energy Corporation Waltham, Massachusetts 02254
E. RIMINI
Dipartimento di Fisica Universita di Catania Catania, Italy
xii
McD. ROBINSON
ASM Epitaxy Tempe, Arizona 85282
G. N. TAYLOR
AT&T Bell Laboratories Murray Hill, New Jersey 07974
H. W. WERNER
Philips Research Laboratories Eindhoven, The Netherlands
W. D. WESTWOOD
Bell Northern Research Ottawa, Canada
PREFACE
The primary thrust of very large scale integration (VLS!) is the miniaturization of devices to increase packing density, achieve higher speed, and consume lower power. The fabrication of integrated circuits containing in excess of four million components per chip with design rules in the submicron range has now been made possible by the introduction of innovative circuit designs and the development of new microelectronic materials and processes. This book addresses the latter challenge by assessing the current status of the science and technology associated with the production of VLSI silicon circuits. It represents the cumulative effort of experts from academia and industry who have come together to blend their expertise into a tutorial overview and cohesive update of this rapidly expanding field. A balance of fundamental and applied contributions cover the basics of microelectronics materials and process engineering. Subjects in materials science include silicon, silicides, resists, dielectrics, and interconnect metallization. Subjects in process engineering include crystal growth, epitaxy, oxidation, thin film deposition, fine-line lithography, dry etching, ion implantation, and diffusion. Other related topics such as process simulation, defects phenomena, and diagnostic techniques are also included.
This book is the result of a NATO-sponsored Advanced Study Institute (AS!) held in Castelvecchio Pascoli, Italy. Invited speakers at this institute provided manuscripts which were edited, updated, and integrated with other contributions solicited from non-participants to this AS!. A 28 hour video program providing an audiovisual documentation of the contents of this book has also been produced. Information about this program is available from the editor.
In the course of editing this book, many people have assisted and offered their support. First, I wish to thank the authors for their enlightening contributions and patience during the lengthy editing process. I also wish to thank the reviewers, N. Erdos, D. C. Jacobson, M. D. Giles, and D. E. Ibbotson for their valuable comments. Thanks are due to M. A. Cappuzzo, E. D. Miller, P. Carracino and R. A. Matula for the diverse activities involved in researching and laying out material for this volume. I am indebted to the Text Processing group in Murray Hill and specifically G. Moore for preparation of the many
xiii
xiv Preface
iterations required to produce the final manuscript. I specially wish to thank Dr. C. Sinclair at NATO as well as Dr. E. Van Landingham and Dr. D. Flood at NASA without whose generous financial support this ASI and the events leading to this publication would not have been realized. Last, but not least, I wish to express my appreciation to the management of AT&T Bell Laboratories for providing the opportunity of working on this book.
Murray Hill, New Jersey R. A. Levy