Microcontroller Np
-
Upload
vishal-gudla-nagraj -
Category
Documents
-
view
234 -
download
0
description
Transcript of Microcontroller Np
MICROCONTROLLER MICROCONTROLLER 80518051
OUTLINEOUTLINE What is microcontroller?What is microcontroller? What are different types of microcontroller?What are different types of microcontroller? How to select controller for a given application?How to select controller for a given application? 8051 internal architecture8051 internal architecture 8051 pinout & pin description8051 pinout & pin description 8051 architecture details8051 architecture details 8051 assembly programming8051 assembly programming 8051 addressing modes8051 addressing modes 8051 Timer,Interrupt,serial port programming8051 Timer,Interrupt,serial port programming
IntruductionIntruduction
Microprocessor = CPU on a single chip. Microprocessor = CPU on a single chip. ALU + registers + control +…ALU + registers + control +…
Micro-computer = small computerMicro-computer = small computer uP + I/O + memory + peripheral + … uP + I/O + memory + peripheral + …
Microcontroller (uC) Microcontroller (uC) u-Computer on a u-Computer on a single chipsingle chip of silicon of silicon
MicrocontrollersMicrocontrollers
CPUROM RAM
I/O
A single chip
Subsystems:Timers, Counters, AnalogInterfaces, I/O interfaces
Memory
Microcontroller :
A microprocessor, and RAM, ROM, I/O ports, and
timer on a single chip. Also called MCU, , uC “Computer on a chip” Also called MCU (MicroController Unit) Usually not as powerful as general purpose
microprocessor Low power consumption, small in size, low cost. A lot of MCUs are application specific (as against the
general purpose microprocessor).μC
A Microprocessor System
Contains the same 6 basic components:–Arithmetic logic unit (ALU)–Register array–Control unit–Memory–Input unit–Output unit
Basic Microprocessor SystemsBasic Microprocessor Systems
MICROPROCESSORMICROPROCESSOR Microprocessor: a CPU on a single
integrated chip (IC) a special type of CPU The brain of a computer E.g.: – 8086, 80286, 80386, 80486, Pentium,
Core 2 Duo, Core 2 Quad, K5, K6, Atholon, Atholon 64, Opteron, Phenon, PowerPC G4, PowerPC G5, Xenon, Broadway, Cell, …
Contains no RAM, no ROM, no I/O ports.
Difference between µP and µCDifference between µP and µCSr. No µP µC
1 Several Instructions for moving Data from ext. memory to CPU.
One or two instructions for moving the data from ext memory to CPU.2 In µP few pins are multi
functioned.In µC large number of pins are multi functioned.
3 Designer can decide on the amount Designer can decide on the amount of ROM, RAM and I/O ports.of ROM, RAM and I/O ports.
Fixed program and data memory.
4 Uses different ICs for memory and I/O
Inbuilt Memory and I/O.
5 No Inbuilt timer. Inbuilt timer is there.
uCsuCs Many uCs are existing right now.Many uCs are existing right now.
8051, 68HC11, MSP430, ARM series, and etc.8051, 68HC11, MSP430, ARM series, and etc. We may widely divide it with We may widely divide it with
how it is designed (RISC/CISC architecture)how it is designed (RISC/CISC architecture) Manufacturer (Atmel, Intel, Microchip, Philips,…)Manufacturer (Atmel, Intel, Microchip, Philips,…) ROM technology (Programming Serial/Parallel)ROM technology (Programming Serial/Parallel) RAM/ROM capacityRAM/ROM capacity Other features (ADC/DAC, WatchDog, timer/counter, Other features (ADC/DAC, WatchDog, timer/counter,
Number of IO pin… Number of IO pin…
Common MicrocontrollersCommon Microcontrollers•Atmel •ARM •Intel
•8-bit •8XC42 •MCS48 •MCS51 •8xC251
•16-bit •MCS96 •MXS296
•National Semiconductor •COP8
•Microchip •12-bit instruction PIC •14-bit instruction PIC
•PIC16F84 •16-bit instruction PIC
•NEC
•Motorola •8-bit
•68HC05 •68HC08 •68HC11
•16-bit •68HC12 •68HC16
•32-bit •683xx
•Texas Instruments •TMS370 •MSP430
•Zilog •Z8 •Z86E02
– Speed– Power consumption– Amount of RAM and ROM on chip– Number of I/O pins– Cost per unit– Packaging
How do we decide which MCU to use?
1.1. Meeting the computing needs of the task efficiently and cost Meeting the computing needs of the task efficiently and cost effectivelyeffectively
• speed, the amount of ROM and RAM, the number of I/O speed, the amount of ROM and RAM, the number of I/O ports and timers, size, packaging, power consumptionports and timers, size, packaging, power consumption
• easy to upgradeeasy to upgrade• cost per unitcost per unit
2.2. Availability of software development toolsAvailability of software development tools• assemblers, debuggers, C compilers, emulator, simulator, assemblers, debuggers, C compilers, emulator, simulator,
technical supporttechnical support
3.3. Wide availability and reliable sources of the Wide availability and reliable sources of the microcontrollers.microcontrollers.
Three criteria in Choosing a Microcontroller
Different architecturesDifferent architecturesOne shared memory for instructions (program) and data with one data bus and one address bus between processor and memory. Instructions and data have to be fetched in sequential order (known as the Von Neumann Bottleneck), limiting the operation bandwidth. simpler than that of the Harvard architecture. mostly used to interface to external memory.
Basic Microprocessor SystemsBasic Microprocessor SystemsHarvard architectureHarvard architecture uses physically separate memories for their uses physically separate memories for their instructions and data, requiring dedicated buses for each of them. instructions and data, requiring dedicated buses for each of them. Instructions and operands can therefore be fetched Instructions and operands can therefore be fetched simultaneouslysimultaneously..Different program and data bus widths are possible, allowing Different program and data bus widths are possible, allowing program and data memory to be better optimized to the program and data memory to be better optimized to the architectural requirements. architectural requirements. E.g.: If the instruction format requires 14 bits then program bus and memory can E.g.: If the instruction format requires 14 bits then program bus and memory can be made 14-bit wide, while the data bus and data memory remain 8-bit wide.be made 14-bit wide, while the data bus and data memory remain 8-bit wide.
8051 Basic Component8051 Basic Component
4K bytes internal 4K bytes internal ROMROM 128 bytes internal 128 bytes internal RAMRAM Four 8-bit Four 8-bit I/O portsI/O ports (P0 - P3). (P0 - P3). Two 16-bit Two 16-bit timerstimers/counters/counters One One serialserial interface interface
RAM
I/O Port Timer
Serial COM Port
Microcontroller
CPU
A single chip ROM
Block DiagramBlock Diagram
CPU
InterruptControl
OSC BusControl
4kROM
Timer 1Timer 2
Serial
128 bytes RAM
4 I/O Ports
TXD RXD
External Interrupts
P0 P2 P1 P3Addr/Data
Other 8051 featursOther 8051 featurs
only only 11 On chip On chip oscillatoroscillator (external crystal) (external crystal)
6 interrupt sources (2 external , 3 internal, Reset)6 interrupt sources (2 external , 3 internal, Reset)
64K external 64K external codecode (program) memory( (program) memory(only readonly read))PSENPSEN
64K external 64K external datadata memory( memory(can be read and writecan be read and write) by ) by
RD,WRRD,WR
Code memory is selectable by Code memory is selectable by EAEA (internal or external) (internal or external)
We may have External We may have External memorymemory as as datadata and and codecode
Comparison of the 8051 Family Comparison of the 8051 Family MembersMembers ROM typeROM type
8031 no ROM8031 no ROM 80xx mask ROM80xx mask ROM 87xx EPROM87xx EPROM 89xx Flash EEPROM89xx Flash EEPROM
89xx89xx 89518951 89528952 89538953 89558955 898252898252 891051891051 892051892051
Example (AT89C51,AT89LV51,AT89S51)Example (AT89C51,AT89LV51,AT89S51) AT= ATMEL(Manufacture)AT= ATMEL(Manufacture) C = CMOS technologyC = CMOS technology LV= Low Power(3.0v)LV= Low Power(3.0v)
Comparison of the 8051 Family Comparison of the 8051 Family MembersMembers
89XX89XX ROMROM RAMRAM TimerTimer Int Int SourceSource
IO pinIO pin OtherOther
89518951 4k4k 128128 22 66 3232 --
89528952 8k8k 256256 33 88 3232 --
89538953 12k12k 256256 33 99 3232 WDWD
89558955 20k20k 256256 33 88 3232 WDWD
898252898252 8k8k 256256 33 99 3232 ISPISP
891051891051 1k1k 6464 11 33 1616 ACAC
892051892051 2k2k 128128 22 66 1616 ACAC
WD: Watch Dog TimerAC: Analog ComparatorISP: In System Programable
8051 Internal Block Diagram8051 Internal Block Diagram
8051 8051 Schematic Schematic
Pin outPin out
Important Pins (IO Ports)Important Pins (IO Ports) One of the most useful features = 4 I/O ports (P0 - P3)One of the most useful features = 4 I/O ports (P0 - P3)
Port 0 :-P0 = (Port 0 :-P0 = (P0.0 - P0.7)P0.0 - P0.7) 8-bit R/W - General Purpose I/O8-bit R/W - General Purpose I/O low byte low byte addressaddress and and datadata bus for bus for externalexternal memory memory
Port 1 :- P1= (Port 1 :- P1= (P1.0 - P1.7)P1.0 - P1.7) Only Only 8-bit R/W - General Purpose I/O8-bit R/W - General Purpose I/O
Port 2 :- P2 = (Port 2 :- P2 = (P2.0 - P2.7P2.0 - P2.7)) 8-bit R/W - General Purpose I/O8-bit R/W - General Purpose I/O highhigh byte byte addressaddress for external memory for external memory
Port 3:- P3 = (Port 3:- P3 = (P3.0 - P3.7P3.0 - P3.7)) General Purpose I/OGeneral Purpose I/O Timers(T0,T1) – ext. int (INT0, INT1) – Serial (TXD, Timers(T0,T1) – ext. int (INT0, INT1) – Serial (TXD,
RXD)- RD,WRRXD)- RD,WREach port can be used as input or output (bi-direction)Each port can be used as input or output (bi-direction)
Port 3 Alternate FunctionsPort 3 Alternate Functions
Hardware Structure of I/O PinHardware Structure of I/O Pin
D Q
Clk Q
Vcc
InternalPull-Up
Read latch
Read pin
Write to latch
Internal CPU bus
M1
P1.X pinP1.X
B1
B2
Hardware Structure of I/O PinHardware Structure of I/O Pin Each pin of I/O portsEach pin of I/O ports
Internally connected to CPU busInternally connected to CPU bus A A D latchD latch store the value of this pin store the value of this pin
Write to latchWrite to latch == 11 :: write data into the D latchwrite data into the D latch
2 2 Tri-stateTri-state buffer buffer :: B1: controlled by “Read pin”B1: controlled by “Read pin”
Read pinRead pin == 11 :: really read the data present at the pinreally read the data present at the pin B2: controlled by “Read latch”B2: controlled by “Read latch”
Read latchRead latch == 11 :: read value from internal latchread value from internal latch
A A transistortransistor M1 gate M1 gate Gate=0: openGate=0: open Gate=1: closeGate=1: close
Writing “1” to Output Pin P1.XWriting “1” to Output Pin P1.X
D Q
Clk Q
Vcc
InternalPull-Up
Read latch
Read pin
Write to latch
Internal CPU bus
M1
P1.X pinP1.X
2. output pin is Vcc1. write a 1 to the pin
1
0 output 1
B1
B2
Writing “0” to Output Pin P1.XWriting “0” to Output Pin P1.X
D Q
Clk Q
Vcc
InternalPull-Up
Read latch
Read pin
Write to latch
Internal CPU bus
M1
P1.X pinP1.X
2. output pin is ground1. write a 0 to the pin
0
1 output 0
B1
B2
Reading “High” at Input PinReading “High” at Input Pin
D Q
Clk Q
Vcc
InternalPull-Up
Read latch
Read pin
Write to latch
Internal CPU bus
M1
P1.X pin
P1.X
2. MOV A,P1
external pin=High1. write a 1 to the pin MOV
P1,#0FFH
1
0
3. Read pin=1 Read latch=0
1
B1
B2
Reading “Low” at Input PinReading “Low” at Input Pin
D Q
Clk Q
Vcc
InternalPull-Up
Read latch
Read pin
Write to latch
Internal CPU bus
M1
P1.X pin
P1.X
8051 IC
2. MOV A,P1
external pin=Low1. write a 1 to the pin
MOV P1,#0FFH
1
0
3. Read pin=1 Read latch=0
0
B1
B2
Important Pins Important Pins PSEN’PSEN’ (out): (out): PProgram rogram SStore tore EnEnable able
Read for External Code Memory (active low)Read for External Code Memory (active low)
ALEALE (out): (out): AAddress ddress LLatch atch EEnable nable
to latch address outputs at Port0 and Port2to latch address outputs at Port0 and Port2
EA’EA’ (in): (in): EExternal xternal AAccess Enableccess Enable
to access external program memory 0 to 4K (active low) to access external program memory 0 to 4K (active low)
RXDRXD,,TXDTXD: UART pins for serial I/O on Port 3: UART pins for serial I/O on Port 3
VccVcc (( pin 40pin 40 )) : +5V (3~5V for 89LV51): +5V (3~5V for 89LV51)
GNDGND (( pin 20pin 20 )) : ground: ground
XTAL1XTAL1 , , XTAL2XTAL2 (( pins 19,18pins 19,18 ))
RSTRST (( pin 9pin 9 ):): reset reset (active high) (active high)
Crystal Connection to 8051Crystal Connection to 8051 Using a quartz crystal oscillatorUsing a quartz crystal oscillator We can observe the frequency on the XTAL2We can observe the frequency on the XTAL2
C2
30pF
C1
30pF
XTAL2
XTAL1
GND
External Clock SourceExternal Clock Source Using a TTL oscillatorUsing a TTL oscillator XTAL2 is unconnected.XTAL2 is unconnected.
NC
EXTERNALOSCILLATORSIGNAL
XTAL2
XTAL1
GND
Machine cycleMachine cycle
Machine Cycle Freq.=1/12Machine Cycle Freq.=1/12 XTALXTAL
Find the machine cycle forFind the machine cycle for(a) XTAL = 11.0592 MHz (a) XTAL = 11.0592 MHz
(b) XTAL = 16 MHz.(b) XTAL = 16 MHz.
Solution:Solution:(a) 11.0592 MHz / 12 = 921.6 kHz;(a) 11.0592 MHz / 12 = 921.6 kHz; machine cycle = 1 / 921.6 kHz = 1.085 machine cycle = 1 / 921.6 kHz = 1.085 ss
(b) 16 MHz / 12 = 1.333 MHz;(b) 16 MHz / 12 = 1.333 MHz; machine cycle = 1 / 1.333 MHz = 0.75 machine cycle = 1 / 1.333 MHz = 0.75 ss
Power-On ResetPower-On Reset
EA/VPPX1
X2RST
Vcc
10 uF
10 K
30 pF
9
31
at least 2 machine cycles
Registers Reset ValueRegisters Reset Value
00000000DPTRDPTR
0707SPSP
0000PSWPSW
0000BB
0000ACCACC
00000000PCPC
Reset ValueReset ValueRegisterRegister
RAM are RAM are all zeroall zero
Types of Memory Types of Memory
ExternalDATA
Memory)up to 64KB(
RAM
ExternalCODE
Memory)up to 64KB(
ROM
8051 Chip
0000h
FFFFh
FFFFh
Internal RAM
SFRs
Internal code Memory
)EEPROM(0000h
Types of Memory Types of Memory External Code Memory (64k)External Code Memory (64k) External RAM Data Memory (64k)External RAM Data Memory (64k) Internal Code MemoryInternal Code Memory
4k,8k,12k,20k4k,8k,12k,20k ROM, EPROM, EEPROMROM, EPROM, EEPROM
Internal RAMInternal RAM First 128 bytes:First 128 bytes:
00h to 1Fh00h to 1Fh Register BanksRegister Banks20h to 2Fh20h to 2Fh Bit Addressable RAMBit Addressable RAM
30 to 7Fh30 to 7Fh General Purpose RAMGeneral Purpose RAM Next 128 bytes:Next 128 bytes:
80h to FFh80h to FFh Special Function RegistersSpecial Function Registers
Memory ArraysMemory Arrays RAM (Volatile)RAM (Volatile)
Read from and write to RAMRead from and write to RAM Used for Data and Program StorageUsed for Data and Program Storage
ROM (Non volatile)ROM (Non volatile) Only read from ROMOnly read from ROM Used for Program Storage onlyUsed for Program Storage only
Also store “Constant” data.Also store “Constant” data. Special program stored in ROMSpecial program stored in ROM
““Boot” Program or “Loader” ProgramBoot” Program or “Loader” Program This is the program that is executed when the microcontroller is This is the program that is executed when the microcontroller is
“reset”“reset”
Memory ArraysMemory Arrays Two major typesTwo major types
VolatileVolatile Data are lost when power is removedData are lost when power is removed E.g. E.g.
SRAM – Static Random Access MemorySRAM – Static Random Access Memory DRAM – Dynamic Random Access MemoryDRAM – Dynamic Random Access Memory
Generically referred to as Generically referred to as RAMRAM (Random Access Memory) (Random Access Memory) Although non-volatile RAM exists as wellAlthough non-volatile RAM exists as well
Non-VolatileNon-Volatile Data are retained when power is removedData are retained when power is removed E.g. E.g.
EEPROM – Electrically Erasable ProgrammableEEPROM – Electrically Erasable Programmable Read Only MemoryRead Only Memory
EPROM - Erasable Read Only MemoryEPROM - Erasable Read Only Memory Generically referred to as Generically referred to as ROMROM (Read Only Memory) (Read Only Memory)
External Memory AccessExternal Memory Access /EA/EA (( pin 31pin 31 ):): external accessexternal access
/EA=‘0’ indicates that code is stored externally./EA=‘0’ indicates that code is stored externally. /PSEN /PSEN & & ALE are used for external ROM.ALE are used for external ROM. For 8051 internal code, /EA pin is connected to Vcc.For 8051 internal code, /EA pin is connected to Vcc. ““/” means active low./” means active low.
/PSEN/PSEN (( pin 29pin 29 ):): program store enableprogram store enable Output- connected to OE of ROM.Output- connected to OE of ROM. Read signal – fetch from ROMRead signal – fetch from ROM
ALEALE (( pin 30pin 30 )) : address latch enable: address latch enable It is an output pin and is active highIt is an output pin and is active high
8051 port 0 provides both address and data8051 port 0 provides both address and data
The ALE pin is used for de-multiplexing the address and The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch.data by connecting to the G pin of the 74LS373 latch.
Address Multiplexing for Address Multiplexing for External Memory (code)External Memory (code)
Accessing External Data RAMAccessing External Data RAM
Overlap External Code and Data Overlap External Code and Data SpacesSpaces
Allows the RAM to be
written as data memory
read as data memory
Read code memory.
This allows a program to be
downloaded from outside into the RAM as data, and
executed from RAM as code.
Overlap External Code and Data Overlap External Code and Data SpacesSpaces
On-Chip Memory Internal RAMOn-Chip Memory Internal RAM
General Purpose RegisterGeneral Purpose Register
0706050403020100
R7R6R5R4R3R2R1R0
0F
08
17
10
1F
18
Bank 3
Bank 2
Bank 1
Bank 0
4 Register BanksEach bank has R0-R7Selectable by PSW.2,3
Bit Addressable MemoryBit Addressable Memory20h – 2Fh (16 locations 8-bits = 128 bits)
7F7F 7878
1A1A
1010
0F0F 0808
0707 0606 0505 0404 0303 0202 0101 0000
27
26
25
24
23
22
21
20
2F
2E
2D
2C
2B
2A
29
28
Special Function RegistersSpecial Function Registers
DATA registers
CONTROL registersTimersSerial portsInterrupt systemAnalog to Digital converterDigital to Analog converterEtc.
Addresses 80h – FFh
Direct Addressing used to access SFRs
Program Status Word (PSW)Program Status Word (PSW)
8051 CPU Registers8051 CPU Registers
A (Accumulator)BPSW (Program Status Word)SP (Stack Pointer)PC (Program Counter)DPTR (Data Pointer)
Used in assembler instructions
RegistersRegisters
A
B
R0
R1
R3
R4
R2
R5
R7
R6
DPH DPL
PC
DPTR
PC
Some 8051 16-bit Register
Some 8-bit Registers of the 8051
SP
Stack in the 8051Stack in the 8051
The register used to access The register used to access the stack is called the stack is called SP SP (stack pointer) register.(stack pointer) register.
The stack pointer in the The stack pointer in the 8051 is only 8 bits wide, 8051 is only 8 bits wide, which means that it can which means that it can take value 00 to FFH. take value 00 to FFH. When 8051 powered up, When 8051 powered up, the SP register contains the SP register contains value 07.value 07.
7FH
30H
2FH
20H
1FH
17H10H
0FH
07H
08H
18H
00HRegister Bank 0
)Stack (Register Bank 1
Register Bank 2
Register Bank 3
Bit-Addressable RAM
Scratch pad RAM
ReviewReview
What is microcontroller?What is microcontroller? What are different vendors?What are different vendors? What are factors differentiating uc form each What are factors differentiating uc form each
other?other? How to select uc for developing application?How to select uc for developing application? What is there inside 8051?What is there inside 8051? What are pins of 8051?How they function?What are pins of 8051?How they function?