Method for Troubleshooting Power Integrity Problems in ......Cosmin Iorga - NoiseCoupling.com -...

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Cosmin Iorga - NoiseCoupling.com - [email protected] 1 DesignCon 2012 Method for Troubleshooting Power Integrity Problems in Programmable Logic Device Electronic Systems by Embedded Measurement of Power Distribution Impedance Cosmin Iorga NoiseCoupling.com [email protected] (805) 231-9786

Transcript of Method for Troubleshooting Power Integrity Problems in ......Cosmin Iorga - NoiseCoupling.com -...

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DesignCon 2012

Method for TroubleshootingPower Integrity Problems inProgrammable Logic DeviceElectronic Systems by EmbeddedMeasurement of PowerDistribution ImpedanceCosmin [email protected] (805) 231-9786

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Outline

Overview of Power Distribution Networks (PDN)

PDN Failure Mechanisms

PDN Troubleshooting Techniques

Proposed PDN Troubleshooting Method

Embedded On-Die PDN Impedance Measurement

Case Study Implemented in a Spartan 3A FPGA

Conclusions

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Overview of Power DistributionNetworks

Transient currents flowing through PDNimpedance generate noise on power supply rails

PDN Impedance

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PDN Failure Mechanisms

Total PDN Failure PDN Performance Degradation

Easy to detect

Can be addressed usingstandard troubleshootingtechniques

Hard to detect

System level performancedegradation

System level “indirect” failures

Sometimes failures areintermittent

Difficult to troubleshoot

PDN Failure Types

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PDN Failure Mechanisms

Total PDN Failure PDN Performance Degradation

Easy to detect

Can be addressed usingstandard troubleshootingtechniques

Hard to detect

System level performancedegradation

System level “indirect” failures

Sometimes failures areintermittent

Difficult to troubleshoot

PDN Failure Types

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PDN Performance Degradation

Increased impedance atsome frequencies

Existing resonance peaksmay shift in frequency

The increase in PDN impedance increases the noise on power supplies

New or frequency shifted resonance peaks may now coincide with chipoperating frequencies generating significant supply noise

Additional resonancepeaks may appear

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Troubleshooting PDN

These types of problems andespecially open circuitcapacitors, open vias or solderjoints, and increased seriesresistance are in general hardto identify using common testinstruments due to:

1. redundant / parallel power supply current paths

2. multiple decoupling capacitors connected in parallel

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Troubleshooting PDN - What are welooking for?

We want to be able to detect any increase in PDN impedance and thefrequency location and magnitude of resonance peaks.

Increased impedance atsome frequencies

Existing resonance peaksmay shift in frequency

Additional resonancepeaks may appear

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Troubleshooting PDN - What do weneed?

We need to get access to the PDN impedance frequency profile asseen by the logic circuits on the FPGA / PLD die.

Z_PDN

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Proposed PDN TroubleshootingTechnique

AC Steady State AnalysisAC steady stateanalysis connects asinusoidal currentsource to the measuredport and records thevoltage drop whilesweeping the sinusoidalcurrent frequency

Z_PDN

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Proposed PDN TroubleshootingTechnique

AC Steady State Analysis

(patent pending technology)

Z_PDN

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Proposed PDN TroubleshootingTechnique

A group of FPGAlogic blocks isconfigured to forma ring oscillator

(patent pending technology)

A group ofFPGA logicblocks isconfigured tofunction as asinusoidalcurrent source

FPGA / PLD Implementation

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Proposed PDN TroubleshootingTechnique

The sinusoidal current flows through the power distribution network andgenerates sinusoidal variation of the on-die power supply voltage

(patent pending technology)

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Proposed PDN TroubleshootingTechnique

The sinusoidal variation of the voltage supply modulates the frequency of thering oscillator

(patent pending technology)

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Proposed PDN TroubleshootingTechnique

A counter circuit measures the frequency of the ring oscillator

PDN impedance is calculated from the average frequency deviation(patent pending technology)

Counter

Computer

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Device Configuration andMeasurement Process

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Case Study

The proposed PDN troubleshooting technique has beenimplemented in a Spartan 3A FPGA on a test board

PDN impedance frequency profile has been measured atfrequencies up to 500MHz

Various PDN failure mechanisms have been intentionallyinduced in the test board

The proposed PDN troubleshooting technique has beenused to detect each induced PDN failure mechanism

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Case Study

Measured on-die PDN impedance frequency profile

Measurement up to 500MHz

Not accurate below 20kHz

Accuracy can be extendedbelow 20kHz with theexpense of increasedmeasurement time

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Detecting Tantalum Capacitors withBurnt Internal Fuse

One of the two 220uF Tantalumcapacitors with burned internalfuse

Two 220uF Tantalum capacitors

One of the two 220uFTantalum capacitorswith burnt internalfuse

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Detecting Capacitance Degradationin Ceramic Capacitors

80%

60%

40%

20%

Capacitance degradation inone ceramic decouplingcapacitor

Capacitancedegradation in oneceramicdecouplingcapacitors

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Detecting Increased SeriesResistance of PDN Interconnects

Resistance increased byabout 10 mOhms

R

Increased resistanceinduced in the PDNinterconnect path bycutting open a redundantcurrent path

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Detecting Increased Loop Inductance

Induced open interconnectpath divert transient currentsflow increasing loopinductance

X

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Test Case Summary

PDN failure mechanisms detected bythe proposed method:

Tantalum capacitors with burnt internal fuse

Capacitance degradation in ceramic capacitors

Increased series resistance of interconnects

Increased PDN loop inductance

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Conclusions

Low cost PDN troubleshooting method for PLD devices

Uses only common logic blocks and can be implemented in mostexisting PLDs (FPGA, CPLD, …)

Evaluation on a FPGA test case has shown how this method canidentify typical PDN failure mechanisms

PLDs can be temporarily configured in PDN troubleshooting modeand then reconfigured back to their intended functionality

Can be easily implemented in existing production test floors and inproduct support/repair environments

Allows remote PDN troubleshooting in systems installed in thefield or in hardly accessible areas