Merging high-performance instruments and FPGAs for meeting … · 2019-08-20 · LabVIEW FPGA Code...

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ni.com Merging high-performance instruments and FPGAs for meeting hard RF test challenges Andreas Gustafsson National Instruments

Transcript of Merging high-performance instruments and FPGAs for meeting … · 2019-08-20 · LabVIEW FPGA Code...

Page 1: Merging high-performance instruments and FPGAs for meeting … · 2019-08-20 · LabVIEW FPGA Code RF Board 1 RF In RF Down converter LONI Design Library Host Code The Open FPGA-Based

ni.com

Merging high-performance instruments and FPGAs for

meeting hard RF test challenges

Andreas Gustafsson

National Instruments

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Wireless Everywhere

“The proliferation of mobile devices, including smartphones and other mobile

devices, will continue to be the key growth driver into the foreseeable future.” –Jessy Cavazos, Industry Director, Frost & Sullivan

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Escalating Complexity Over Time

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RF Application Challenges

• Cost of Test • Rapidly Changing RF Standards (802.11ac, LTE)

• More RF Complexity in Mobile Devices

• Increasing Test Time

• Need for Customization • Better Repeatability

• Integrated DUT Control

• Test Sequencing

• Advanced Applications • Channel Emulation

• Software-Defined Radio

• Power Level Servoing

Cos

t of T

est

Device Complexity

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Introducing the NI PXIe-5644R The World’s First Vector Signal Transceiver

PXIe-5644R

Configuration VSA and VSG w/ independent LOs 24 DIO lines @ 250 Mbps

Frequency Range

65 MHz to 6 GHz

Bandwidth 80 MHz

Features • Programmable FPGA w/ LabVIEW • Fast Tuning Mode: <400 μs

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Software-Designed Instrumentation

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PXIe-5644R Block Diagram

IP

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PXIe-5644R VST Receiver Architecture

Zero IF

Very small size, low cost, and low power

Wide analysis bandwidth

Ideal for modulated signal analysis

Alias rejection and image suppression

IQ Calibration/Equalization

40 MHz: 16-bit @ 120 MS/s

40 MHz: 16-bit @ 120 MS/s

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PXIe-5644R VST Receiver Architecture

Zero IF

Very small size, low cost, and low power

Wide analysis bandwidth

Ideal for modulated signal analysis

Alias rejection and image suppression

IQ Calibration/Equalization

40 MHz: 16-bit @ 120 MS/s

40 MHz: 16-bit @ 120 MS/s

Calibration is needed to correct for I/Q gain and phase impairments

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Effects of IQ Impairments on QAM Tr

ad

itio

nal

Wid

eb

an

d

Image

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Effects on 802.11ac Signal (80MHz)

Traditional Correction Wideband Correction

EVM -37.6dB

EVM -47.2dB

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Up to 5 Signal Analyzers and Generators in a Single PXI Express Chassis

• MIMO Configurations

• Parallel Multi-DUT Test

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Closed

Open

Open Source

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RF Board 0

RF Out RF Up

converter

LO

RF Board 1

RF In RF Down converter

LO

Baseband Board

Hardware Architecture

FPGA Virtex 6

LX195/240T

PXIe

FPGA DAC

ADC

BUS DIO DIO

DRAM

CLK DRAM

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LabVIEW Application Code

RF Board 0

RF Out RF Up

converter

LO

RF Board 1

RF In RF Down converter

LO

Baseband Board

The Traditional Approach

FPGA Virtex 6

LX195/240T

PXIe

FPGA DAC

ADC

DRAM

BU

S

CLK

DIO DIO

Open

(LabVIEW)

Processor

Instrument Driver

DSP

DSP NI-RFSG Configuration Calibration

Triggering Data Movement

NI-RFSA Configuration Calibration

Triggering Data Movement

TCLK Synchronization

SMC DRAM

Generation

Acquisition

Closed

(C++/VHDL)

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Baseband Board

FPGA LabVIEW Application Code

RF Board 0

RF Out RF Up

converter

LO

LabVIEW FPGA Code

RF Board 1

RF In RF Down converter

LO

The Open FPGA-Based Approach

PXIe

DAC

ADC

BU

S DIO DIO

Processor

NI Design Library Host Code

Configuration

Acquisition

Generation

DSP

Synchronization

NI Design Library FPGA Code

Configuration

Acquisition

Generation

DSP

Synchronization

DRAM

CLK DRAM

Open

(LabVIEW)

Closed

(C++/VHDL)

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Software-Designed Advantages

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RF Output

RF Input

Configuration

and Processes

Hardware Programmability through Software

Equivalent to ~200,000 lines

of VHDL…

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User Application

Config. & Calibration

Software-Designed Instrument Architecture

Host

FPGA

Waveform Acquisition

Waveform Generation

Sync.

Instrument Design Libraries

Trigger

Host Interface

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LabVIEW 2012 Sample Projects for the VST

Application /

Host Layer

Firmware /

FPGA Layer

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User Application

Simple VSA / VSG Sample Project

RF In Config. & Cal.

Simple VSA / VSG Sample Project

Host

FPGA

RF Out

Multi-Record

Acq.

Base-card

Config.

Wave-form Seq.

DSP

RF Out Config. & Cal.

Trigger Sync.

DSP

Instrument Design Libraries

DAC ADC

RF In

RF Hardware

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User Application

VST Streaming Sample Project

RF In Config. & Cal.

VST Streaming Sample Project

Host

FPGA

RF Out

Base-card

Config. DSP

RF Out Config. & Cal.

Trigger Sync.

DSP

Instrument Design Libraries

DAC ADC

RF In

RF Hardware

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IP and Examples ni.com/vstgettingstarted

Simple VSA / VSG VST Streaming

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Traditional LTE PA Servoing Application

RF-out

Vector Signal Analyzer Desktop PC and GPIB

Vector Signal Generator

Servoing Time = 4-5 seconds

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PA Settling Time – Traditional Instruments

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Power Level Servoing

The Traditional Approach

With FPGA

DUT

Settle VSG Settle DUT Measure Power Calculation

Settle DUT

Measure Power Calc Dig.

Gain

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PA Settling Time – Vector Signal Transceiver

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FPGA-based RF PA Servoing Application

NI PXIe-5644R

Vector Signal Transceiver

Servoing Time = <5 milliseconds; Over 800x faster!

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Real World Environment Impairments

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Real-Time MIMO Channel Emulation using 2 VSTs

Hardware Configuration

and Application

Control

NI PXIe-5644R Vector Signal Transceiver

DDC/ Sample

Rate Change

Dot Product

DUC/ Sample

Rate Change

BRAM Delay Bank

Interpolate

NI PXIe-5644R Vector Signal Transceiver

DDC/ Sample

Rate Change

Dot Product

DUC/ Sample

Rate Change

BRAM Delay Bank

Interpolate

RFout

RFout

RFin

RFin

Scalable and flexible from 1x1 up to 8x8 MIMO

Fading Generation

LabVIEW

LabVIEW FPGA

LabVIEW FPGA

High-quality,

wide-bandwidth RF

Tight sample and phase

synchronization for MIMO/

beamforming

Powerful FPGA

tightly integrated

with RF in and out

High-throughput, low-latency

streaming through PXI

Express peer-to-peer

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• The networking and connectivity subsidiary of Qualcomm, Inc.

• Leading provider of wired and wireless technologies

• Serving mobile, computing, consumer electronics and networking channels

802.11ac Device Block Diagram

Synthesizer

Power

Management

PCIE

GPIO

PCIE

GPIO

3.3 V

CPU and

Memory

SOC, MAC

and PHY

WLAN RF

2.4/5 GHz 11ac

Radio

Front

End

REF CLK/

Crystal

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Qualcomm Atheros

802.11ac Device Under Test

RF-out

Digital Device

Control

VSA

VSG RF-out

Tx

Rx

Digital

I/O

Digital

I/O

RF-in

RF-in

Vector Signal Transceiver/Device Under Test Integration

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Traditional Instrumentation

-48

-43

-38

-33

-28

-23

-18

-45 -25 -5 15

NI PXI Vector Signal Transceiver

-48

-43

-38

-33

-28

-23

-18

-45 -25 -5 15

EVM (dB) Versus Average Output Power Chain

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Qualcomm Results

Early 2000s—Traditional

Rack and Stack

2007—NI PXI RF

Instrumentation

802.11a + b + g + 802.11n + 802.11ac

10X Faster Than

Traditional

200X Faster Than

Traditional

2012—NI PXI Vector

Signal Transceiver