May Nghe Nhac Su Dung Chip Arm Cortexm3 32bit GkCI8 20130514025321 97383 x6xY

7/24/2019 May Nghe Nhac Su Dung Chip Arm Cortexm3 32bit GkCI8 20130514025321 97383 x6xY

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I HC QUC GIA THNH PH HCH MINHTRNG I HC BCH KHOA TP HCM

KHOA: IN-IN T

B MN: IN T---------O0O---------

LUN VN TT NGHIPI HC

MY NGHE NHC S DNG

CHIP ARM CORTEX-M3 32-BIT

GVHD: TS. HONG TRANGThS.PHNG THV

SVTH: PHM VN VANG

MSSV: 40602934

Tp HCM, Thng 1/2011


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LUN VN TT NGHIP Li cm n

LI CM N

Ti xin chn thnh cm nTS. Hong Trang nhn li hng dn ti xuyn sut

n 2 v Lun vn tt nghip. Trong thi gian , thy ginh nhiu thi gian hng

dn tng bc hon thnh tt cng vic cng nh ch bo cho ti mt sknng

trnh by tng ca mnh.

Ti cng chn thnh gi li cm n n THS. Phng ThV tn tnh gip ti

trong sut thi gian lm lun vn. c bit l nh hng nghnghip cho ti trong

tng lai.

Cui cng, ti xin chn thnh cm n qu thy c trong khoa in-in t truyn

t cho ti nhng kin thc qu bu trong sut cc nm ti hc ti trng.


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LUN VN TT NGHIP Tm tt lun vn

TM TT LUN VN

Lun vn bao gm 4 chng.Trnh by nhng kin thc c bn vARM Cortex-M3cng nhng dng c pht trin trn CHIP ARM STM32F103RC.

Ni dung chnh ca lun vn tp trung vo vic pht trin sn phm my nghe nhcda trn EASY KIT c pht trin bi nhm ARM Vit Nam.Ni dung ch yu vquan trng tp trung vo chng 2 v chng 3

Lun vn c tch ring lm 4 phn chnh nm trong 4 chng ring bit nhm lmcho ngi c tin theo di nhng kin thc phn cng cng nh phn mm cn thitto thnh my nghe nhc n gin trn nn hthng nhng.

Chng 1:Gii Thiu Chung VSn Phm

Ni dung chng ny gm 3 phn:

Phn 1:Gii thiu nhng c im chung ca sn phm, cung cp cho ngi c cinhn tng qut vsn phm thng qua s khi.

Phn 2:Trnh by nguyn l hot ng c bn ca sn phm.

Phn 3:Gii thiu vdng ARM Cortex-M3, mt sc im chnh v ni tri so vicc dng ARM khc.Trnh by nhng ngoi vi c tch hp vi li ARM pht

trin nhng ng dng va v nh.Gii thiu CHIP STM32F103RC, c sn xut biSTMicroelectronics, vtc CPU, bnhcng nh cc ngoi vi c tch hp.

Chng 2:M Hnh Phn Cng

Ni dung ca chng ny gii thiu cc module phn cng cn sdng to thnhsn phm.

Vi cc ngoi vi tch hp sn bn trong CHIP nh SPI, DAC, DMAu tin strnh by nhng c tnh c bn, sau l phn cu hnh phn cng ca ngoi vi

tng thch vi nhng yu cu ca sn phm.

Vi nhng Module bn ngoi nh LCD, mch khuch i cng sut strnh by s nguyn l v chhot ng.

Chng 3: M Hnh Phn mm

Chng ny trnh by kin thc vphn mm lp trnh cho sn phm da vo phncng tch hp sn trn EASY KIT.

Ni dung bao gm 4 phn:


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5/94

LUN VN TT NGHIP Muc lc

MC LC

mc Trang

Trang ba ...........................................................................................................................i

Li cm n ...................................................................................................................... ii

Tm tt ni dung lun vn ............................................................................................. iii

Muc lc ............................................................................................................................ v

Danh sch hnh v........................................................................................................ viii

Danh sch bng biu ........................................................................................................ x

CHNG 1

GII THIU CHUNG V

SN PHM

............................................................

1

1.1 S

khi

..............................................................................................................................

1

1.2 Nguyn l hot ng c bn

.................................................................................................

2

1.3 Tng quan v

CPU ARM Cortex-M3 STM32F103RC

......................................................

2

1.3.1 Gii thiu v

dng ARM Cortex v CPU STM32F103RC

.........................................

2

1.3.2

STM32

ARM Cortex M3 v CPU STM32F103RC

................................................

3

CHNG 2

M HNH PHN CNG

.....................................................................................

5

2.1 S

nguyn l mch...........................................................................................................

5

2.2 KIT pht trin ng dng ( EASY KIT)................................................................................

6

2.3 Chi tit cc modules c s

dng trong mch

..................................................................

7

2.3.1 Khi ngun

....................................................................................................................

7

2.3.2 SD Card...........................................................................................................................

7

2.3.2.1 Cu trc lu tr

file ca SD Card...........................................................................

7

2.3.2.2 Giao tip vi Micro SD Card

...............................................................................

12

2.3.3 Giao din SPI

...............................................................................................................

17

2.3.3.1 Gii thiu giao din SPI

........................................................................................

17

2.3.3.2 c im ca giao din SPI

..................................................................................

17

2.3.3.3 SPI hot ng

ch

Master.............................................................................

18

2.3.3.4 Cu hnh giao din SPI

giao tip vi Micro SD Card

...................................

19


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LUN VN TT NGHIP Muc lc

2.3.4 Giao din DAC ............................................................................................................. 20

2.3.4.1 c im chnh ca bchuyn i DAC: ........................................................... 20

2.3.4.2 Bm ng ra ..................................................................................................... 22

2.3.4.3 nh dng dliu cho bDAC ............................................................................ 23

2.3.4.4 Qu trnh chuyn i ............................................................................................. 23

2.3.4.5 Ngun xung kch ngoi ......................................................................................... 24

2.3.4.6 DMA dnh cho DAC ........................................................................................... 24

2.3.4.7 Cu hnh DAC cho sn phm ............................................................................... 25

2.3.4.8 Hot ng ca bDAC ........................................................................................ 25

2.3.5 DMA ( Direct Memory Access) ................................................................................. 26

2.3.5.1Gii thiu DMA ..................................................................................................... 26

2.3.5.2 c im chnh ...................................................................................................... 26

2.3.5.3 Hot ng vn chuyn dliu ca DMA ............................................................ 27

2.3.5.4 Bphn x............................................................................................................. 27

2.3.5.5 Ngt DMA ............................................................................................................. 27

2.3.5.6 DMA dnh cho 2 knh DAC ................................................................................ 28

2.3.5.7 Cu hnh DMA cho sn phm .............................................................................. 28

2.3.6 Giao din EXTI (External event/ interrupt controller) .............................................. 30

2.3.6.1 c im chnh ...................................................................................................... 30

2.3.6.2 nh vcc ngun ngt ngoi ............................................................................... 31

2.3.7 Khi iu khin ( cc nt nhn) .................................................................................. 32

2.3.8 Khi hin thLCD ........................................................................................................ 33

2.3.9 Mch khuch i cng sut ......................................................................................... 35

CHNG 3M HNH PHN MM..........................................................................37

3.1 nh dng file WAVE..........................................................................................37

3.2 Cng chtrlp trnh .......................................................................................39

3.2.1 Trnh bin dch Keil uVerion4.......................................................................39


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LUN VN TT NGHIP Mc lc

3.2.2 Trnh son tho Source Insight

......................................................................

40

3.2.3 Chng trnh np Flash Loader Demonstrator (FLD)

...................................

40

3.3 Gii thiu cc b

th vin h

tr

lp trnh

...........................................................

44

3.3.1 B

th vin chun CMSIS

.............................................................................

44

3.3.2 B

th vin DOSFS

.......................................................................................

45

CHNG 4

NHNG HN CH

V HNG PHT TRIN

..................................

55

4.1 Nhng hn ch

ca sn phm...............................................................................

55

4.2 Hng pht trin tip theo

...................................................................................

55

Datasheet ca cc IC

...................................................................................................

57

Ti liu tham kho

.......................................................................................................

56
http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/


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LUN VN TT NGHIP Danh sch hnh v

Danh sch hnh v

Chng1

Hnh 1.1: S khi sn phm ....................................................................................... 1

Hnh 1.2: Kin trc vi xl ARM-Cortex M3 ................................................................ 3

Hnh 1.3: Kin trc chung ca dng STM32 .................................................................. 4

Chng 2

Hnh 2.1: S nguyn l mch ..................................................................................... 5

Hnh 2.2: EASY KIT ....................................................................................................... 6

Hnh 2.3: S nguyn l khi ngun ............................................................................ 7

Hnh 2.4 Cu Trc Ca a ........................................................................................ 7

Hnh 2.5: Cu trc chung ca mi phn vng ................................................................. 9

Hnh 2.6: Giao tip gia SD Card v SPI ..................................................................... 12

Hnh 2.7 Cu trc p ng R1 v R3 ........................................................................... 14

Hnh 2.8: c mt khi dliu .................................................................................... 15

Hnh 2.9: c nhiu khi dliu ................................................................................. 16

Hnh 2.10: S khi giao din SPI ............................................................................ 18

Hnh 2.11: S kt ni Micro SD Card vi giao din SPI2 ..................................... 19

Hnh 2.12: Trng thi clock tnh ca SPI .................................................................... 20Hnh 2.13: S khi ca bchuyn i DAC ......................................................... 21

Hnh 2.14: Ng ra khng m ( c ti v khng ti ng ra)...................................... 22

Hnh 2.15: Ng ra c m ( c ti v khng ti ng ra) ........................................... 22

Hnh 2.16: Thanh ghi dliu tng ng vi 3 trng hp Single mode ..................... 23

Hnh 2.18 Qu trnh chuyn i khng cn xung kch ................................................. 24

Hnh 2.19: S khi ca biu khin DMA. ......................................................... 27
http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/


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LUN VN TT NGHIP Danh sch hnh v

Hnh 2.20: Biu khin DMA2 v nh xngoi vi ca n ....................................... 28

Hnh 2.21: S khi ca EXTI .................................................................................. 31

Hnh 2.22: Cc ngun ngt ca EXTI0 ........................................................................ 31

Hnh 2.23: Cc ngun ngt ca EXTI15 ..................................................................... 32

Hnh 2.24: S khi ca module iu khin ............................................................. 32

Hnh 2.25: S nguyn l cc nt nhn..................................................................... 33

Hnh 2.26: S nguyn l kh LCD ......................................................................... 34

Hnh 2.27: S gii thut m ttrnh tgiao tip vi LCD ....................................... 35

Hnh 2.28: S nguyn l mch khuch i cng sut ............................................. 36

Chng3

Hnh 3.1: nh dng file WAVE ................................................................................... 37

Hnh 3.2: Minh ha nh dng ca file WAVE ............................................................. 39

Hnh 3.3: Trang ci t kt ni ...................................................................................... 41

Hnh 3.4: Trang trng thi ca Flash ............................................................................. 42
http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/


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LUN VN TT NGHIP Danh sch bng biu

Danh sch bng biu

Bng 2.1 Mark Boot Recor ............................................................................................ 8

Bng 2.2 Thng tin ca mt phn vng ......................................................................... 8

Hnh 2.5: Cu trc chung ca mi phn vng ................................................................. 9

Bng 2.3: Thng tin cha trong Boot sector ................................................................. 10

Bng 2.4: Gi trca cc mc nhp trong FAT ............................................................ 11

Bng 2.5: Cu trc ca Directory Table ....................................................................... 11

Bng 2.6: Cu trc lnh ca SD Card............................................................................ 13

Bng 2.7: Mt slnh thng gp ca SD Card .......................................................... 13

Bng 2.8: Cc chn ca b DAC ................................................................................. 22

Bng 2.9: Ngun xung kch ngoi ................................................................................ 24

Bng 2.10 Cc yu cu ngt ca DMA ...................................................................... 28
http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/http://0.0.0.0/


11/94

LUN VN TT NGHIP Chng 1. Gii thiu chung vsn phm

CHNG 1

GII THIU CHUNG VSN PHM

1.1 S khi

Hnh 1.1:S

khi s

n ph

m

c im:

Trung tm chnh l CPU ARM Cortex M3 STM32F103RC ca hng

STMicroeletronics nh c gii thiu phn sau.

c file nhc tMicro SD Card.

Chi nhc tfile WAV 8 bit, mono, stereo, tn sly mu bt k.

Hin thbi ht ang chy trn LCD 16x2.

AMPLIFIER


12/94


iu khin: Pause, Play, Next, Previous

Tng chuyn bi ht.

1.2 Nguyn l hot ng c bn

c File nhc WAV tMicro SD Card qua giao din SPI2 bng bth vin

DOSFS

Dliu sau khi c c lu vo RAM.

Dng DMA chuyn dliu ti DAC.

Chngtrnh stm thng tin cn thit ca file nhc nhtn sly mu, sknh (

mono hay stereo), kch thc ...

Ty thuc vo tn sly mu m TIM6 v TIM7 sc np gi trthch hp.

Ty vo sknh ca file nhc WAV m knh DAC tng ng sc kch hot

Stereo: DAC channel 1, DAC channel 2 cng c kch hot.

Mono: DAC channel 2sc kch hot.

Khi file dng MONO: TIM7 to xung kch cho DAC channel 2 theo ng tn s

ly mu, mi khi c xung kch tTIM7 DAC channel 2 yu cu DMA2 chuyn dliu 8 bit tRAM ti DAC channel 2, ng thi DAC channel 2 schuyn gi trlu

thanh ghi DATA trc vo thanh ghi DAC_DOR, ngay lp tc tn hiu audio sxut hin ng ra.

Khi file dng STEREO: tng tnh dng MONO, TIM7 to xung cho kchDAC channel 2 theo tn sly mu, to tn hiu audio ca knh 2, TIM6 to xung kchcho DAC channel 1to tn hiu audio ca knh 1.

Tn hiu iu khin c to ra bng cc ngt ngoi. C 3 tn hiu iu khin

Play/Pause: mi khi c tn hiu ngt tchn ny chng trnh phc vngt s

enable hay disable TIM6, TIM7, DAC channel1, DAC channel2,

DMA2_Channel3, DM A2_Channel4ty vo trng thi trc .

Next: khi c ngt chn ny chng trnh phc vngt stm v c file nhctip theo.

Pre: khi c ngt chn ny chng trnh phc vngt schy li file nhc va

chy xong.

1.3 Tng quan vCPU ARM Cortex-M3 STM32F103RC


13/94


1.3.1 Gii thiu vdng ARM Cortex

Cortex l bxl thhmi a ra mt kin trc chun cho nhu cu a dng vcngngh. Khng ging nh cc dng ARM khc, dng Cortex l mt li xl hon thin

a ra mt chun CPU v kin trc hthng chung. Dng Cortex gm 3 nhnh: dngA dnh cho cc ng dng cao cp, dng R dnh cho cc ng dng thi gian thc vdng M dnh cho cc ng dng iu khin v chi ph thp.

Li ARM Cortex M3 l sci tin ca ARM7, tng mang li thnh cng vang di chocng ty ARM.

Cortex-M3 a ra mt li vi iu khin chun nhm cung cp phn tng qut, quantrng nht ca vi iu khin bao gm hthng ngt( Interrupt system), SysTick timer (c thit kcho hiu hnh thi gian thc), hthng kim li ( Debug system),memory map v nhiu tnh nngci tinkhc.

Cc chip ARM7 v ARM9 c hai tp lnh ( tp lnh ARM 32-bit v tp lnh Thumb16-bit), trong khi dng Cortex c thit khtrtp lnh ARM Thumb-2, l s

phi hp gia 2 tp lnh trn t c stng nhng gia dung lng code vthi gian xl.

Hnh 1.2:Kin trc vi xl ARM-Cortex M3

1.3.2 STM32ARM Cortex M3 v CPU STM32F103RC

STM32


14/94


Dng STM32 do ST sn sut, vi iu khin da trn li ARM Cortex M3. DngSTM32 thit lp cc tiu chun mi vhiu sut, chi ph cng nh cc ng dngi hi tiu thnng lng thp v i hi kht khe viu khin thi gian thc.

Hnh 1.3:Kin trc chung ca dng STM32

Cc dng STM32 c ST tch hp thm nhiu ngoi vi thch hp cho cc ngdng iu khin a dng.

Thnhphn chnh ca STM32 l nhn Cortex M3, dng I-Bus v D-Bus kt nivi FLASH cng nh cc ngoi vi. Ngoi ra thnh phn quan trng khc l DMA.

Cc ngoi vi c chia lm 2 nhm kt ni n hai giao din khc nhau AHB-

APB1 v AHB-APB2( c tc ti a ln hn AHB-APB1).

CPU STM32F103RC

STM32F103RC l dng high density ca STM32 vi cc c im sau:

ARM 32-bit Cortex-M3 Microcontroller, 72MHz, 256kB Flash, 48kB SRAM, PLL,

Embedded Internal RC 8MHz and 32kHz, Real-Time Clock, Nested Interrupt

Controller, Power Saving Modes, JTAG and SWD, 4 Synch. 16-bit Timers with Input

Capture, Output Compare and PWM, 2 16-bit Advanced Timer, 2 16-bit Basic Timer,

2 16-bit Watchdog Timers, SysTick Timer, 3 SPI/I2S, 2 I2C, 5 USART, USB 2.0 Full

Speed Interface, CAN 2.0B Active, 3 12-bit 16-ch A/D Converter, 2 12-bit D/A

Converter, SDIO, Fast I/O Ports


15/94

LUN VN TT NGHIP Chng 2 M hnh phn cng

CHNG 2

M HNH PHN CNG

2.1 S nguyn l mch

Hnh 2.1: S nguyn l mch

C12100nF

SW1

TL1105A

1

4

2

3

VCC_3.3V

R1410K

R19

1K

PC2

PB15

R2610K

R27470

PB10

C12

18pFC1118pF

C1

100nF

VCC_3.3V

PB1

C15

100nF

PB10

U3

LM1117MPX-3.3

ADJ/GND1

NPUT3

OUTPUT 2

VOUT 4

C3210uF/16V

C33

100nF

C35

100nF

STM32F103TRC

ARM CORTEX-M3

POWER

MICRO SD CARD

AMPLIFIER

CONTROLLER

RESET

PB13

LSE OSC

HSE OSC

LCD

16X2

LCD 16X2

16 K

15 A

14 D713 D612 D511 D410 D39 D28 D1

6 EN5 R/W4 RS

3 Vee

2 VCC

1 VSS

7 D0

VCC_3.3V

BOOT LOADER

LCD

RESET

+C34

10uF/16V

PB14

100K

VAR

100K3

VAR

R64.7

PA3

R74.7

Load8

Load18

C2100u

C3100u

C7470u

C14100nF

C8470u

C9

100u

SW3

TL1105A

1

4

2

3

C100.1u

R1610K

C160.1u

VCC_3.3V

U1

TDA2822

OUTPUT1 1V

cc

2

NP25

NP18

INPUT26

GND

4

INPUT17

OUTPUT2 3

R21

1K

5 V

ADAPTER

12

CON3

123

C15100nF

SW4

TL1105A

1

4

2

3

R1710K

VCC_3.3V

R22

1K

R25470E

D3

LED

SD Card

SOCKET

1

2

3 4

5

6

7

8

9

R17470E

D1

LED1

VCC 3.3 V

R16

470E

D1

LED

RTC

PC4

J5

DIPSWITCH

13

24

DIP SWITCH INSTEAD OF HEADER

32.768 KHzQ2

C-001R 32.7680K-A

2

1

3C13

12pFC14

12pF

VCC 5V

R28100

R2

10K

SW1

TL1105A

1

4

2

3

R1

10K

DAC_OUT1

1-2 ADAPTER2-3 USB

SPI2_MOSI

SPI2_MISO

VCC_3.3V

C4

10nF

C5

100nF

C6

100nF

SD_CS

SPI2_SCK

USB INTERFACE

1234

PC1

R29

4.7K

PC0

PA9

R 3 10M

USB_DMUSB_DP

PA10

R410K

VCC_3.3V

VCC_3.3V

PA8

Q1ECS-80-S-4

21

BUTTON4 BUTTON3BUTTON1

PC5

U2

STM32F103RCT6

PA0-WKUP/USART2_CTS/AIN0/TIM2_CH1_ETR 14PA1/USART2_RTS/AIN1/TIM2_CH2 15PA2/USART2_TX/AIN2/TIM2_CH3 16

PA3/USART2_RX/AIN3/TIM2_CH4 17

PA4/SPI1_NSS/USART2_CK/AIN4 20PA5/SPI1_SCK/AIN5 21

PA6/SPI1_MISO/AIN6/TIM3_CH1 22PA7/SPI1_MOSI/AIN7/TIM3_CH2 23

PA8/USART1_CK/TIM1_CH1 41

PA9/USART1_TX/TIM1_CH2 42

PA10/USART1_RX/TIM1_CH3 43PA11/USART1_CTS/USBDM/CANRX/TIM1_CH4 44PA12/USART1_RTS/USBDP/CANTX/TIM1_ETR 45

PA13/SYSJTMS-SWDAT46 PA14/SYSJTCK-SWCLK49

PA15/SYSJTDI50 PB0/AIN8/TIM3_CH3

26

PB1/AIN9/T

IM3

_CH4

27

PB2/SYSBOOT128

PB3/SYSJTDO55

PB4/SYSJTRST56

PB5/I2C1_SMBAI 57PB6/I2C1_SCL/TIM4_CH1 58PB7/I2C1_SDA/TIM4_CH2 59PB8/TIM4_CH3 61

PB9/TIM4_CH4

62

PB10/I2C2_

SCL/USART3

_TX

29

PB11/I2C2_SDA/USART3_RX 30PB12/SPI2_NSS/I2C2_SMBAI/USART3_CK/TIM1_BKIN 33PB13/SPI2_SCK/USART3_CTS/TIM1_CH1N 34PB14/SPI2_MISO/USART3_RTS/TIM1_CH2N 35PB15/SPI2_MOSI/TIM1_CH3N 36

VSS_131VSS_2

47

VSS_363

VSS_418

VSSA12

AIN10/PC08 AIN11/PC19 AIN12/PC2

10

AIN13/PC311

AIN14/PC424 AIN15/PC525 PC637 PC738

PC839

PC940

PC1051

PC1152

PC1253 ANTI_TAMP/PC132

OSC32_IN/PC14 3OSC32_OUT/PC15 4

OSC_IN/PD05

OSC_OUT/PD16

TIM3_ETR/PD2 54

NRST7

BOOT060

VBAT1

VDD_1 32

VDD_2 48

VDD_3 64

VDD_4 19

VDDA 13

PC6

R5

1K

PC7

VCC 5V

BOOT1BOOT0

DAC_OUT2


16/94


2.2 KIT pht trin ng dng ( EASY KIT)

Hnh 2.2:EASY KIT

EASY KIT c pht trin bi nhm ARM Vit Nam, cung cp mt sModule pht trin cc ng dng cho bc u lm quen vi ARM Cortex-M3.

c im:

CPU ARM Cortex-M3 STM32F103RC nh gii thiu phn trc

Module giao tip Micro SD Card qua giao din SPI

Khi nt nhn gn vi cc ngt ngoi

Cung cp cc jump ni n cc ngoi vi khi cn thit

Np thng qua cng COM


17/94


2.3 Chi tit cc modules c sdng trong mch

2.3.1 Khi ngun

Hnh 2.3: S nguyn l khi ngun

Ngun c thly tcng USB hoc tAdapter

Khi ngun cung cp ngun 3,3V cho CPU v ngun 5V cho ngoi vi

2.3.2 SD Card

2.3.2.1 Cu trc lu trfile ca SD Card

2.3.2.1.1 Cu trc file chung ca mt SD Card

Hu nh tt ccc a cng u c cu to tng tnhau: mi a c chiathnh cc phn vng ( partition),s lng phn vng ty vo dung lng ca a,ti a l 4 phn vng. Mi phn vng cha nhiu Cluster, mi Cluster cha nhiuSector.

Khi mt file c lu vo a th n sc lu vo cc Cluster, nu mt Cluster

dng lu mt file no th n khng thdng lu 1 file khc mc d c thfile vn cha chim ht Cluster , iu ny gy ra lng ph bnh.

Mark BootRecord

(MBR)Reserved

Region

Partition

0

Partitton

1

Partition

2

Partition

3

Hnh 2.4 Cu Trc Ca a

U3

LM1117MPX-3.3

ADJ/GND1

NPUT3

OUTPUT 2

VOUT 4

C3210uF/16V

C33

100nF

C35

100nF

VCC_3.3V

+C34

10uF/16V

ADAPTER

12

J9

CON3

123

R25470E

D3

LED

1-2 ADAPTER

2-3 USBJ10

USB INTERFACE

1234


18/94


Sector u tin ca a l MBR, n cha Executable Code v thng tin ca 4phn vng (partition)nh bn di:

Bng 2.1 Mark Boot Recor

Thng tin ca mi phn vng c cha trong 16 bytes , bao gm cc trng:

Bng 2.2 Thng tin ca mt phn vng

Thng tin quan trng y l Starting sector of the partition, n cng chnh la chca Boot Sectorca mi phn vng.

Mun giao tip c vi SD Card cn tm v c c Sector ny.

2.3.2.1.2 Cu trc file ca mi phn vng

Phn vng l ni m ta cn tm ra c thgiao tip c-ghi file ln SD card.

Mi phn vng c cu trc lu trthng tin chung nh bn di:

Offset Decription Size

000h Executable Code (Boots Computer) 446 Bytes

1BEh 1st Partition Entry 16 Bytes

1CEh 2nd Partition Entry 16 Bytes

1DEh 3rd Partition Entry 16 Bytes

1EEh 4th Partition Entry 16 Bytes

1FEh Executable Marker (55h AAh) 2 Bytes

Offset Description Size

00h Current State of Partition (00h=Inactive, 80h=Active) 1 Byte

01h Beginning of Partition - Head 1Byte

02h Beginning of Partition - Cylinder/Sector (See Below) 2 Bytes04h Type of Partition (See List Below) 1 Byte

05h End of Partition - Head 1 Byte

06h End of Partition - Cylinder/Sector 2 Bytes

08h Starting sector of the partition 4 Bytes0Ch Number of Sectors in the Partition 4 Bytes


19/94


Hnh 2.5: Cu trc chung ca mi phn vng

Cu trc file ca phn vng c t chc theo dng FAT ( File Allocation

Table). Bao gm 4 phn:a. Reserved sectors: nm vng u tin ca mt phn vng. Sector u tin caReserved sectors l Boot sector, n cha tt ccc thng tin vphn vng.

b. FAT Region: n gm hai bn copy ca F il e Al location Table, bn thhai rt himkhi dng n. N c nh vti vng dliu.( Data Region) , scp phn sau

c. Root Directory Region: n l mt bng th mc( directory table) cha thng tinvcc files v cc th mc trong th mc gc.

d. Data Region: y l vng tht scha cc files dliu v cc th mc con.

Chi tit vcc vng quan trng cn nm r

Boot sector

C kch thc 1 sector, nm u tin ca mi phn vng ( khng phi l sector utin ca a), cha cc thng tin quan trng vphn vng.

Bao gm cc trng nh bng di:

Contents Boot

Sector

FS

Information

Sector

( FAT32only)

More

Reserved

Sector

(optional)

File

Allocation

Table #1

File

Allocation

Table #2

Root

Directory

(FAT16/12

Only)

Data region

( directories and file)

Size insector

Number of reserved sectors

(Reserved sectors)

(number ofFATs)*(sectors perFAT)

(number of rootentries*32)/Bytesper sector

NumberOfClusters

*SectorsPerCluster


20/94


Bng 2.3:Thng tin cha trong Boot sector

Offset Decription Size

00h Jump Code + NOP 3 Bytes

03h OEM Name 8 Bytes

0Bh Bytes Per Sector 2 Bytes

0Dh Sectors Per Cluster 1 Byte

0Eh Reserved Sectors 2 Bytes

10h Number of Copies of FAT 1 Byte

11h Maximum Root Directory Entries 2 Bytes

13h Number of Sectors in Partition Smaller than 32MB 2 Bytes

15h Media Descriptor (F8h for Hard Disks) 1 Byte

16h Sectors Per FAT 2 Byte

18h Sectors Per Track 2 Bytes

1Ah Number of Heads 2 Bytes

1Ch Number of Hidden Sectors in Partition 4 Bytes

20h Number of Sectors in Partition 4 Bytes

24h Logical Drive Number of Partition 2 Bytes

26h Extended Signature (29h) 1 Byte

27h Serial Number of Partition 4 Bytes

2Bh Volume Name of Partition 11 Bytes

36h FAT Name (FAT16) 8 Bytes

3Eh Executable Code 448 Bytes

1FEh Executable Marker (55h AAh) 2 Bytes

Nh ni trn Boot sector ny cha tt ccc thng tin ta cn phi bit giao tipvi SD card nh: ssector dtr, sbyte trong 1 sector, ssector trong 1 cluster, s

bng FAT copy ( thng l 1)

F il e Al location Table

L mt danh sch cc mc nhp nh xn mi Cluster trong vng dliu.

Khi ghi mt file vo SD Card, trng hp dung lng file ln hn 1 cluster th file sc lu trong nhiu cluster v ch l cc cluster ny c thkhng lin tip nhau; do bng FAT ny gip ta tm ra cluster tip theo cha file.

N gm cc mc nhp mi mc nhp cha mt trong 5 thng tin sau:


21/94


1.Sca Cluster tip theo trong dy Cluster ca file dliu.

2.Kt thc chui cc Cluster trong file dliu.

3.Mc nhp nh du mt Cluster xu.

4.Mc nhp nh du mt Cluster dtr.

5.Mt gi tr0 chra mt Cluster cha sdng.

Hai mc nhp u tin cha hai gi trc bit

+ Mc nhp thnht cha bn copy ca Media Decriptor.

+ Mc nhp thhai cha end-of-cluster-chain marker

Bi v hai Cluster u tin cha gi tr c bit thnh ra khng c Cluster 0 v 1.

Cluster u tin theo sau Root directory l Cluster 2.

Bng 2.4: Gi trca cc mc nhp trong FAT

FAT12 FAT16 FAT32 M t

0x000 0x0000 0x00000000 Cluster cha dng

0x001 0x0001 0x00000001 Gi trdtr

0x0020xFEF

0x00020xFFEF

0x000000020x0FFFFFEF

Cluster dng, gi trny ch n Cluster tiptheo

0xFF00xFF6

0xFFF00xFFF6

0x0FFFFFF00x0FFFFFF6

Gi trdtr

0xFF7 0xFFF7 0x0FFFFFF7 Cluster xu hay dtr

0xFF80xFFF

0xFFF80xFFFF

0x0FFFFFF80x0FFFFFFF

Cluster cui ca file

Root Directory Region

L mt loi c bit ca file dng trnh by mt th mc, c cu to theo dng bng.Mi th mc hay file lu trtrong n c to thnh bi mt mc nhp 32 bytes chacc thng tin nh tn, phn mrng, thuc tnh

Bng 2.5: Cu trc ca Directory Table

Byte th 0 -7 8 - 10 11-25 2627 28 - 31

File 1 Tn file Phn mrng Thuc tnh, ngy Cluster u Kch thc

File 2 Tn file Phn mrng Thuc tnh, ngy Cluster u Kch thc

File n Tn file Phn mrng Thuc tnh, ngy Cluster u Kch thc


22/94


Thng tin cn thit y l cluster bt u ca file hay th mc con.

Data Region

Cha dliu ca file, bao gm nhiu cluster. Ch l mi cluster chcha dliu camt file, khng c trng hp mt cluster cha dliu ca nhiu file khc nhau.

2.3.2.2 Giao tip vi Micro SD Card

2.3.2.2.1 Lnh v p ng ca Micro SD Card

Trong SPI mode, hng ca d liu trn ng tn hiu c c nh, d liutruyn ng bni tip theo tng byte .

Lnh tSPI n Card c di cnh ( 6 bytes) nh bn di:

Hnh 2.6: Giao tip gia SD Card v SPI

Trong : SCLK : SPI2_SCKDI : SPI2_MOSI

DO : SPI2_MISO

NCR: thi gian p ng ca lnh ( ty vo tng loi Card m c thi giankhc nhau )

Khi mt khung lnh c truyn n Card, mt p ng tng ng cho lnh (R1, R2,R3 ) c thc c tCard. V vic chuyn dliu c li bng xung clockca SPI do sau khi truyn xong khung lnh SPI cn tip tc cp xung clock choCard th mi c thnhn c p ng tCard ( bng cch gi lin tc gi tr0xFF vc gi trtrvcho ti khi nhn c p ng ng).

a. Cu trc lnh ca SD Card

Mt khung lnh c di 6 bytes gm cc trng nh bn di


23/94


Bng 2.6: Cu trc lnh ca SD Card

Vtr bit 47 46 [45- 40] [398] [71] 0

Kch thc 1 1 6 32 7 1

Gi tr 0 1 X x x 1

M tStart bit Transmittion

bit

Commandindex

argument CRC7 Endbit

Mt slnh thng gp khi giao tip vi Micro SD Card

Bng 2.7: Mt slnh thng gp ca SD Card

Mlnh K hiu M t

CMD0 GO_IDLE_STATE Reset thvtrng thi idle

CMD1 SEND_OP_CODE Yu cu th gi ni dung thng tin ca OperatingCondition Regiters

CMD8 SEND_EXT_CSD Yu cu th gi thng tin cc thanh ghi CSD(CardSpecific Data) di dng block dliu.

CMD9 SEND_CSD Yu cu thgi thng tin cthca thanh ghi CSD.

CMD10 SEND_CID Yu cu gi cc thng tin CID(Card InformationData).

CMD12 STOP_TRANSMISSION Ngng trao i dliu

CMD16 SET_BLOCKLEN Thit lp ln tnh theo byte ca mt block dliu,gi trmc ny c lu trong CSD

CMD17 READ_SINGLE_BLOCK c mt block dliu

CMD18 READ_MULTIPLE_BLOCK c nhiu block d liu. S lng block c thitlp bi lnh CMD23

CMD23 SET_BLOCK_COUNT Thit lp slng block dliu ghi hoc c.CMD24 WRITE_BLOCK Ghi mt block dliu.

CMD25 WRITE_MULTIPLE_BLOCK Ghi nhiu block dliu. Slng block c thit lpbi lnh CMD23

MD55 APP_CMD Thng bo cho thnhlnh tip theo l lnh ring cang dng chkhng phi l lnh chun


24/94


25/94


Data Token

C 3 dng Data Token cho 3 nhm lnh khc nhau nh bn di:

Data Token cho CMD17/18/24

Data token cho CMD25

Data Token cho CMD25( ngng chuyn dl iu)

c mt khi dliu

Hnh 2.8: c mt khi dliuDI: MOSI

DO: MISO

Qu trnh c mt khi dliu

Tham s( argument) trong lnh CMD17 xc nh a chbt u ca khi dliucn c.

Khi lnh CMD17 c chp nhn, hot ng c dliu bt u din ra, dliu sc gi n Host.

Sau khi Host nhn c mt Data Token thch hp, biu khin sbt u nhn

dliu v 2 bytes CRC theo sau Data token.Host phi nhn 2 bytes CRC mc d c thkhng dng n n.

Nu c li xut hin, th Error token sc nhn thay v Data packet.

1 1 1 1 1 1 1 0

1 1 1 1 1 1 0 0

1 1 1 1 1 1 0 1


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c nhiu khi dliu

Hnh 2.9: c nhiu khi dliu

Qu trnh c nhiu khi dliu

Tham s trong lnh CMD18 xc nh a ch bt u ca mt dy khi d liu lin

tip.Khi lnh CMD18 c chp nhn,hot ng c dliu sdin ra, dliu scgi n Host.

Sau khi Host nhn c Response thch hp, biu khin sbt u nhn dliu.

Hot ng nhn d liu chkt thc khi gi lnh CMD12, d liu nhn c theosau lnh CMD12 khng c ngha, do n cn c bqua trc khi nhn Resposecho lnh CMD12.


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2.3.3 Giao din SPI

2.3.3.1 Gii thiu giao din SPI

Trong ARM Cortex M3 dng high densi ty

, giao din SPI c ththc hin chcnng nh l mt giao thc SPI hay l giao thc m thanh I2S. Chc nng mc nh lSPI.

Giao din SPI ( ser ial per ipheral inter face) php truyn dliu ni tip ng bchai ch: haff duplexv ful l duplexvi thit bngoi.

Ngoi ra n cn c sdng cho nhiu mc ch khc nh Simplex transfer hayreli able communicationsdng m kim tra CRC.

Khi SPI cu hnh giao thc I2S, n cung cp mt giao din truyn dliu ni tip

ng b, c thcu hnh cc tiu chun m thanh khc nhau bao gm I 2S Phil ipsstandard, MSB- justif ied standard, LSB- justi f ied standard vPCM standard.

I2S chc thhot ng chhalf duplex.

2.3.3.2 c im ca giao din SPI

Truyn ng bFul duplextrn 3 ng.

Truyn ng bSimplextrn 2 ng. Dliu c thtruyn di dng khung 8 bit hay 16 bit.

C thcu hnh Masterhoc Slave Mode.

C khnng hot ng Mul timaster Mode.

C thhot ng nhiu tc khc nhau, ln nht ln n 18 Mhz.

C thlp trnh cc tnh v pha ca xung clock.

C thtruyn MSB hay LSB trc. Cung cp hai cchuyn dng cho vic truyn v nhn dliu km vi ngt.

Cbo hiu Bus SPI bn.

Tch hp Hardware CRCcho truyn thng tin cy.

HtrDMA cho vic truyn dliu tc cao.


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Hnh 2.10: S khi giao din SPI

2.3.3.3 SPI hot ng chMaster

Khi cu hnh SPI hot ng Master, giao din SPI cung cp xung Clock cho thitbSlaver gn vi n ( y l Micro SD Card).

Thttruyn dliu

Vic truyn dliu c thc hin khi dliu c ghi vo thanh ghi bm gi Txbuffer.

Dliu sau c chuyn song song vo thanh ghi dch trong khi truyn bit utin v sau c dch ni tip n chn MOSI c thMSB hay LSB trc ty vocu hnh. CTXE c t ln 1 khi dliu c chuyn tTx bufer sang thanh ghidch v mt ngt c to ra.

Thtnhn dliu

Khi nhn xong, dliu c chuyn tthanh ghi dch sang bm nhn Rx buffer,cRXNE c t ln 1 v mt ngt c to ra.


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2.3.3.4 Cu hnh giao din SPI giao tip vi Micro SD Card

Hnh 2.11: S kt ni Micro SD Card vi giao din SPI2

Micro SD Card kt ni vi giao din SPI2 qua 3 chn

1)SPI2_SCK ( PB13): xung clock SPI2 cp cho SD Card.

2)SPI2_MOSI ( PB15): dliu tSPI2 n SD Card.

3)SPI2_MISO (PB14): dliu tSD Card n SPI2

Ngoi ra cn c chn SD_SC ( PA3): cho php SD Card hot ng.

Cu hnh giao din SPI

Sdng giao din SPI2.

SPI1 hot ng Master Mode.

Full duplex.

Dliu truyn di dng khung 8 bit.

MSB trc.

Khng dng DMA truyn dliu.

Tc :

gi lnh 36 MHz / 128 = 281 KHz

c dliu 36 MHz / 2 = 18 MHz

Trng thi clock tnh nh bn di ( CPHA =0 : vic truyn v nhn xy ra cnh

u tin ca xung clock, CPOL =0: trng thi tnh ca clock l m) ( hay cn gi lSPI Mode 0)


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Hnh 2.12: Trng thi clock tnh ca SPI

2.3.4 Giao din DAC

2.3.4.1 c im chnh ca bchuyn i DAC:

Hai bchuyn i DAC: mi knh c mt ng ra ring.

Chuyn i dliu 8-bit hay 12-bit.

Canh ltri hay phi trong chuyn i 12-bit

Khnng cp nht ng b

C thto dng sng sin, tam gic hoc nhiu ng ra

Hot ng Dual vi chuyn i c lp hay ng thi

HtrDMA cho mi knh, yu cu c to ra khi c xung kch bn ngoi xuthin

C thto ra mt chuyn i bng xung kch bn ngoi hay kch bng phn mm

in p yu cu: 2.4 V3.6 V

Tm in c thchuyn i: 0V3.6V

Tm in p ng ra: 0 DAC_OUTx VREF+


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ln ca in p ng ra:

DOR: gi trca thanh ghi dliu

Khi DAC Channelx (x =1 or 2) c kch hot chn tng ng ca mi knh( PA4hay PA5) sc tng ni n chn DAC_OUTx ca bchuyn i DAC.

Hnh 2.13: S khi ca bchuyn i DAC


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Bng 2.8: Cc chn ca bDAC

2.3.4.2 Bm ng raBchuyn i DAC tch hp sn hai bm ng ra gim tng trng ra v li ti trc tip m khng cn mt mch khuch i.

Mi knh DAC c thkch hot hay khng kch hot bm ny.

Hnh 2.14: Ng ra khng m ( c ti v khng ti ng ra)

Hnh 2.15: Ng ra c m ( c ti v khng ti ng ra)

Tn Loi tn hiu M t

VREF+Input, in p tham chiu

2.4 V VREF+ VDDA(3.3 V)

VDDA Input, in p cung cp VDDA = 3.3 V

VSSA Input, mass ca ngun

DAC_OUx Tn hiu anolog ng ra 0 DAC_OUTx VREF+


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2.3.4.3 nh dng dliu cho bDAC

Ty thuc vo cu hnh c chn, dliu phi c ghi vo cc thanh ghi nh bndi:

Single mode:

8- bit canh phi: a d liu vo thanh ghi DAC_DHR8Rx[7 :0] bits (v d liuc lu trong thanh ghi DHRx[11:7] bits )

12- bit canh tri: a dliu vo thanh ghi DAC_DHR12Rx[15:4] bits

( c lu vo thanh ghi DHRx[11:0] bits )

12- bit canh phi: a dliu vo thanh ghi DAC_DHR12Rx[11:4] bits

( d liu c lu vo thanh ghi DHRx [11:0] )

Hnh 2.16: Thanh ghi dliu tng ng vi 3 trng hp Single mode Dual mode

Tng tnh trn nhng Dual mode th ghi dliu vo cng mt thanh ghi, sau dliu c lu vo thanh ghi DHRx tng ng ca mi knh nh Single mode

Hnh 2.17: Thanh ghi dliu tng ng vi 3 trng hp Dual mode

2.3.4.4 Qu trnh chuyn i

Khng thghi trc tip dliu vo thanh ghi DORx, mi dliu mun chuyn nDAC_ Channelx phi thc hin bng cch chuyn dliu vo thanh ghi ADC_DHRx


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( thng qua vic ghi dliu vo DAC_DHR8Rx, DAC_DHR12Lx, DAC_DHR12Rx,

DAC_DHR8RD, DAC_DHR12LD or DAC_DHR12LD).

Dliu lu trong DAC_DHRx sc tng chuyn n thanh ghi DAC_DORx

khi c xung kch n, in p analog ng ra sxut hin sau khong thi gian t tyvo in p ngun cung cp v ti ng ra.

Hnh 2.18 Qu tr nh chuyn i khng cn xung kch

2.3.4.5 Ngun xung kch ngoi

Mi knh DAC c 8 ngun xung kch bn ngoi, dng 3 bits TSEL[2:0] lachn.

BDAC c thchuyn i chkhng cn xung kch.

Xung kch tTIM6 v TIM7 c c bit dnh ring cho 2 knh DAC

Bng 2.9: Ngun xung kch ngoi

2.3.4.6 DMA dnh cho DAC

Mi knh DAC c mt knh DMA ring.


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Mt yu cu DAC DMA c to ra khi c mt xung kch ngoi ( khng phi xungkch bng phn mm) xut hin. Sau , gi tr ca thanh ghi DAC_DHRx cchuyn n thanh ghi DAC_DORx.

V yu cu DAC DMA khng c xp hng do nu mt xung kch xut hintrc xc nhn ca yu cu trc n skhng c phc vv coi nh khng cli trong trng hp ny.

DMA2_Channel3 dnh cho DAC_Channel1, DAM2_Channel4 dnh cho

DAC_Channel2.

2.3.4.7 Cu hnh DAC cho sn phm

Dng hai knh DAC Single mode .

Dliu dng 8-bit canh lphi.

Dng DMA phc v cho vic chuyn d liu t RAM n thanh ghiDAC_DHR8Rx.

TIM6 c cu hnh to xung kch ngoi choDAC_Channel1 theo ng tn sly mu ca m thanh.

TIM7 c cu hnh to xung kch ngoi cho DAC_Channel2 theo ng tn sly mu ca m thanh.

2.3.4.8 Hot ng ca bDAC

Stereo player

Knh phi ( knh 1):khi xung kch tTIM6 xut hin, DAC gi yu cu DMAn biu khin DMA, DMA2_Channel3chuyn d liu tbm cha d liuknh 1 n thanh ghi DAC_DHR8R1, sau gi tr ca thanh ghi DAC_DHR1 (c np bi gi tr ca thanh ghi DAC_DHR8R1) c chuyn vo thanh ghiDAC_DOR1 v tn hiu audio xut hin ng ra DAC_OUT1.

Knh tri ( knh 2):khi xung kch tTIM7 xut hin, DAC gi yu cu DMA nbiu khin DMA, DMA2_Channel4chuyn dliu tbm cha dliu knh

2n thanh ghi DAC_DHR8R2, sau gi trca thanh ghiDAC_DHR2 ( c npbi gi trca thanh ghi DAC_DHR8R2) c chuyn vo thanh ghi DAC_DOR2 v

tn hiu audio xut hin ng ra DAC_OUT2.

Mono player

Chc DAC_Channel 2 hot ng


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Khi xung kch tTIM7 xut hin, DAC gi yu cu DMA n biu khin DMA,DMA2_Channel4 chuyn d liu t b m cha d liu knh 1 n thanh ghiDAC_DHR8R2, sau gi trca thanh ghi DAC_DHR2 ( c np bi gi trca

thanh ghi DAC_DHR8R2 ) c chuyn vo thanh ghi DAC_DOR2 v tn hiu audioxut hin ng ra DAC_OUT2.

2.3.5 DMA ( Direct Memory Access)

2.3.5.1Gii thiu DMA

DMA (direct memory access) c sdng truyn dliu tc cao gia ngoi viv bnhcng nh gia bnhv bnhm khng cn n CPU. iu ny lm choCPU rnh thc hin tc vkhc.

Hai biu khin DMA bao gm 12 knh ( 7 knh cho DMA1, 5 knh cho DMA2)2.3.5.2 c im chnh

12 knh c thcu hnh c lp

C su tin gia cc yu cu, bao gm 4 mc ( very high, high, medium, low ) lptrnh bng phn mm hay su tin bng phn cng trong trng hp cng mc utin phn mm.

C thchuyn d liu theo tng n vbyte, haft word, word tngun bt k ti

ch bt k. a chngun v ch phi c canh ng vi n vdliu tngng.

Htrvic qun l bm vng. ( circular buffer management).

3 c s kin gip gim st qu trnh chuyn d liu (DMA haft transfer, DMAtransfer complete, DMA transfer error).

Htrchuyn dliu t: bnhn bnh, bnhn ngoi vi, ngoi vi n bnh, ngoi vi n ngoi vi.

ln dliu cn chuyn c thln n 65536 bytes.


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2.3.5.7 Cu hnh DMA cho sn phm

Stereo player

Knh phi:dng DMA2_Channel3chuyn dliu n DAC_Channel1

Cu hnh DMA2_Channel3:

Chuyn dliu tbnhn ngoi vi

n vdliu: byte

Kch thc bm: 512 bytes

a chngun: a chca bm cha dliu knh phi

a chch: a chthanh ghi DAC_DHR8R1ca DAC_Channel1

u tin ngt: high priority

DMA mode: normal ( khng dng bm vng)

Cho php ngt: Half-Transfer, Transfer complete

Knh tri: dng DMA2_Channel4chuyn dliu n DAC_Channel2



n vdliu: byte

Kch thc bm: 512 bytes

a chngun: a chca bm cha dliu knh tri

a chch: a chthanh ghi DAC_DHR8R2ca DAC_Channel2

u tin ngt: high priority

DMA mode: normal ( khng dng bm vng)

Khng cho php ngt

Mono player

Dng DMA2_Channel4chuyn dliu n DAC_Channel2



n vdliu: byte


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Hnh 2.21: S khi ca EXTI

2.3.6.2 nh vcc ngun ngt ngoi

Hnh 2.22: Cc ngun ngt ca EXTI0


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Hnh 2.23: Cc ngun ngt ca EXTI15

Mi ng ngt c thn tnhiu ngun khc nhau nh hai hnh trn. Do timi thi im chc mt ngun c tch cc trn mt ng ngt nht nh.

2.3.7 Khi iu khin ( cc nt nhn)

Khi iu khin hot ng da vo cc ngun ngt ngoi, 3 nt iu khin c ktni n 3 ngun ngt ngoi l EXTI1, EXTI9 v EXTI10 to tn hiu iu khin.

S khi ca khi iu khin

Pre Next

Pause/play

Hnh 2.24: S khi ca module iu khin

Cc nt nhn c ni vo cc ngun ngt ngoi tng ng

Nt nhn 1: Ni vi ngun ngt EXTI9

Nt nhn 2: Ni vi ngun ngt EXTI10

Nt nhn 3: ni vi ngun ngt EXTI1

4 3

1


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S nguyn l cc nt nhn

Hnh 2.25: S nguyn l cc nt nhn

Khi nhn nt sto ra mt xung cnh xung tc ng n ngun ngt ngoi tng ngc kt ni vi nt nhn .

Nhim vca cc ngt

EXTI1 : bt u chi nhc, pause, play

EXTI9 : chuyn n bi tip theo

EXTI10 : li li bi trc

Cu hnh cho cc ngt

PB9

PB1

PB10


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C 3 ngt trn u c cu hnh ging nhau ch khc nhau mc u tin. Tuynhin iu ny khng quan trng v trong thc tt c trng hp c2 ngt cng xyra.

Ngt theo cnh xung

Hot ng mode interrupt ( mode khc l mode event)

Hot ng ca cc nt iu khin

EXTI1: khi pht hin cnh xung chn PB1, chng trnh schuyn vo phcv ngt. i vi ngt EXTI1 ln ngt u tin s tm v pht file nhc. Cc lnngt sau th ty thuc vo trng thi trc m c cc tc vPausehay Playtng ng.

EXTI9: khi pht hin cnh xung chn PB9, chng trnh schuyn vo phcvngt. Chng trnh phc vngt c nhim vtm v pht file nhc tip theo.

EXTI10: khi pht hin cnh xung chn PB10, chng trnh schuyn vophc vngt. Chng trnh phc vngt c nhim vpht li file nhc trc.

2.3.8 Khi hin thLCD

Hnh 2.26: S nguyn l khLCD

PC2

R26

10K

R27

470

LCD

16X2

LCD 16X2

16 K

15 A

14 D713 D6

12 D5

11 D4

10 D3

9 D2

8 D1

6 EN

5 R/W

4 RS

3 Vee

2 VCC

1 VSS

7 D0

LCD

PC4

R28

100

PC1

R29

4.7K

PC0

PC5

PC6PC7

VCC 5V


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Giao tip tng tnh mode 8 bit, chcn ch mt skhc bit so vi mode 8 bitnh sau:

Chdng 4 ng dliu ( D4, D5, D6, D7), 4 ng kia btrng

4 bit cao c xl trc, sau n 4 bit thp.

Trc khi a LCD vo mode 4 bit cn to mt lnh gilp cho LCD hiu ta angmun giao tip vi n Mode 4 bit. Ngha l trc khi gi lnh 0x28 th cn gi lnhvi gi tr0x2- (- :ty nh). V iu ny cn ty vo loi LCD cng nh thi gianhin thch.

Hnh 2.27: S gii thut m ttrnh tgiao tip vi LCD


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2.3.9 Mch khuch i cng sut

S nguyn l mch khuch i cng sut

Hnh 2.28: S nguyn l mch khuch i cng sut

Dng IC TDA2822 khuch i tn hiu audio tbDAC

c im:

Cng sut b

Khng thcn chnh mch tbn ngoi

IC TDA2822 cha 2 bkhuch i ring bit

100K

VAR

100K

VAR

R34.7

R44.7

Load8

Load8

C1100u

C2100u

C3470u

C4470u

C5

100u

C60.1u

C70.1u

U1

TDA2822

OUTPUT1 1V

cc

2

NP25

NP18

INPUT26

GND

4

INPUT17

OUTPUT2 3

5 V

DAC_OUT2 (PA5)

DAC_OUT1 (PA4)


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LUN VN TT NGHIP Chng 3 M hnh phn mm

CHNG 3

M HNH PHN MM

3.1 nh dng file WAVEnh dng file WAV l mt tp con ca c t Microsoft's RIFF cho vic lu trnhng file aphng tin truyn thng. Mt file RIFF bt u vi mt header theosau bi mt thtca cc chunk dliu. Mtfile WAVE thng l mt file RIFF vimt chunk WAVE n trong bao gm hai chunk con: chunk fmt : xc nhnh dng d liu; chunk data cha cc mu d liu tht s. nh dng kiu nythng c gi nh l "Canonical form"

Hnh 3.1: nh dng file WAVE


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Header ca file WAVE:

Chunk ID: cha chui k t RIFF dng ASCII

Chunk size: 36 + Chunk2size, l kch thc ca ton bfile theo n vByte tri8 bytes cho 2 trng khng c bao gm l Chunk ID v Chunk size.

Format: Cha chui k tWAVE

Hai subchunk cn li:

Subchunk fmt m tnh dng dliu m thanh

Subchunk1ID cha chui k t fmt

Subchunk1Size kch thc phn cn li ca Chunk ny.AudioFormat PCM = 1, gi tr khc 1 ch ra mt dng nn khc NumChannels Mono = 1, Stereo = 2SampleRate 8000, 44100 vvByteRate = SampleRate * NumChannels * BitsPerSample/8BlockAlign = NumChannels * BitsPerSample/8BitsPerSample 8 bits = 8, 16 bits = 16 vv

Subchunk data cha kch thc d liu v d liu m thanh tht sSubchunk2ID cha chui k t data

Subchunk2Size == NumSamples * NumChannels * BitsPerSample/8y l s bytes ca d liu m thanh tht s

V dvmt file WAVE cth

di l 72 bytes ca mt file WAVE c vit di dng sHEX

52 49 46 46 24 08 00 00 57 41 56 45 66 6d 74 20 10 00 00 00 01 00 02 00

22 56 00 00 88 58 01 00 04 00 10 00 64 61 74 61 00 08 00 00 00 00 00 00

24 17 1e f3 3c 13 3c 14 16 f9 18 f9 34 e7 23 a6 3c f2 24 f2 11 ce 1a 0d


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Hnh 3.2: Minh ha nh dng ca file WAVE3.2 Cng chtrlp trnh

3.2.1 Trnh bin dch Keil uVerion4

y l trnh bin dch dnh cho cc vi iu khin, htrsn cc Startup code.

Cc bc to mt Project trong Keil uVersion4 :

Bc 1: To mt Project mi v chn ni lu.

Bc 2: Chn linh kin( y l STM32F103RC ca ST).

Bc 3: Add cc file ngi dng vo Project.

Bc 4: Chnh ng dn n th vin CMSIS.

Bc 5: Cu hnh Flash.

Bc 6: Tin hnh bin dch.

y ch l nhng bc cn phi lm c th bin dch thnh cng mt chngtrnh trong Keil, khng trnh by chi tit.

3.2.2 Trnh son tho Source Insight


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Hnh 3.3: Trang ci t kt ni

Hnh 3.4: Trang trng thi ca Flash


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Bc 3:Trang thng tin vthit b

Hin thtt ccc thng tin vthit bnh bn di ( hnh 3.5)

Bc 4: Trang chn tc vChn cc tc vtng ng nh Erase, Download, Upload or Disable/Enable

Flash protection or Edit option bytes

Cc tc vny l ty theo yu cu, c din tnh bn di ( hnh 3.6)Bc 5: Qu trnh np

Sau khi thc hin xong cc bc trn, ta chn ng dn ti file cha code cn np(file HEX)

Nhn Next v i ti khi hon thnh np nh bn di ( hnh 3.7)

trn chl nhng bc c bn nht thc hin tc vnp code vo cho STM32bng FLD, ngoi ra FLD cn cung cp nhiu tnh nng khc nhng khng trnh by y.

Hnh 3.5:Trang thng tin vthit b


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Hnh 3.6: Trang chn tc v

Hnh 3.7: Qu trnh np


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3.3 Gii thiu cc bth vin htrlp trnh

3.3.1 Bth vin chun CMSIS

( The Cortex Microcontroller Software Interface Standard)

y l bth vin chun c cung cp bi ST, gip ngi lp trnh c thgiaotip vi cc thit b phn cng chun ca cc dng Cortex-M3 do ST sn xut mtcch ddng.

Th vin c chia lm 2 phn chnh:

Phn htrnhn CortexM3:bao gm m giao tip vi nhn CPU, v onm start up code.

Phn htrcc thit bngoi vi: cha ton bcc hm th vin iu khin thitbngoi vi ca ST.

Cu trc th vin CMSIS nh sau:

Hnh 3.8:Tchc th vin CMSIS

3.3.2 Bth vin DOSFS

c vit bi Lewin A.R.W. Edwards ([email protected]), n l mt th vintng thch vi hthng FAT file.

C xu hng htrtrong cc hthng nhng

c im:

Htrcc a c nh dng FAT12, FAT16 v FAT32.

Library

+ CMSIS

+ CM3+ CoreSupport //th mc cha hm h tr nhn Cortex-

M3

+ DeviceSupport

+ ST+ STM32F10X //System startup code

+ startup //Start up code

+ Documentation //ti liu h tr+ STM32F10x_StdPeriph_Driver //th mc cha hm h tr thit b

ngoi vi+ inc //th mc cha header file+ src //th mc cha m ngun
mailto:[email protected]:[email protected]:[email protected]:[email protected]


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Htrcc a c dung lng ln n 2048Gb.

Htrcc a c hay khng c MBR.

Htra c nhiu phn vng vi MBR.

Htrth mc con.

Trong ng dng ny chdng 5 hm chnh ca bth vin DOSFS

1) uint32_t DFS_GetPtnStart(uint8_t unit, uint8_t *scratchsector, uint8_tpnum, uint8_t *pactive, uint8_t *pptype, uint32_t *psize)

Hm ly a chBoot Sectorca mt phn vng xc nh bi i sunit. Gi trtrvchnh l a chca Boot Sector.

2)

uint32_t DFS_GetVolInfo(uint8_t unit, uint8_t *scratchsector, uint32_tstartsector, PVOLINFO volinfo)

Hm ny ly tt ccc thng tin vphn vng da vo a chcaBoot Sector trn.

3) uint32_t DFS_OpenDir(PVOLINFO volinfo, PDIRINFO dirinfo)

Hm ny c chc nng mth mc.

4) uint32_t DFS_GetNext(PVOLINFO volinfo, PDIRINFO dirinfo, PDIRENT

dirent)

Hm ny chc nng tm file tip theo.

5) uint32_t DFS_GetFAT(PVOLINFO volinfo, uint8_t *scratch, uint32_t*scratchcache, uint32_t cluster)

Hm ny tm Cluster tip theo cha dliu ca file ang m.


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3.4 S gii thut

S gii thut chng trnh chnh

Hnh 3.9:S gii thut chng trnh chnh

Chngtrnh chnh chc nhim vcu hnh c bn cho cc module sdng c vpht file nhc. Nhim vchnh nh c v pht file nhc nm chng trnh phc vngt.


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Cc ngt EXTI1_IRQHandler, EXTI9_5_IRQHandler, EXTI9_5_IRQHandler lcc ngt ngoi thc hin nhim viu khin tng ng l pause/play, next, previous

Ngoi ra, ngt EXTI1_IRQHandler ln u tin xy ra thc hin nhim vkhi to

chng trnh nh ly file WAVE u tin, tm thng tin ( bao gm tn sly mu, sknh, cluster u tin cha file v bt u pht nhc nh s gii thut di.

Ngt DMA2_Channel3_IRQHandler dng pht file nhc Stereo

Ngt DMA2_Channel4_5_IRQHandler dng pht file nhc Mono

tng c v pht nhc qua DAC:

Mi knh dng 2 bm

Khi DMA chuyn c mt na bm thnhtn DAC ngt Haft transfer xyra, chng trnh phc vngt sc dliu tMicro SD Card vo bm thhai.

Khi DMA chuyn ht b m th nht n DAC ngt Transfer complete xy ra,chng trnh phc vngt scu hnh li DMA DMA chuyn d liu tbmthhai ti DAC thay v bm thnht.

Khi DMA chuyn c mt na bm thhain DAC, ngt Haft transfer xyra, chng trnh phc vngt sc dliu tMicro SD Card vo bm thnht.

Khi DMA chuyn ht b m th nht n DAC, ngt Transfer complete xy ra,chng trnh phc vngt scu hnh li DMA DMA chuyn d liu tbmthnht ti DAC thay v bm thhai.

Qu trnh ny c lp li lin tc cho n khi ht mt cluster (512 bytes)

Khi ht mt cluster, chng trnh skim tra xem ht file cha, nu cha th lycluster tip theo cha file v tip tc cng vic nh trn cho n khi ht file.

Khi ht file chng trnh sly file WAVE tip theo pht.

i vi Stereo hay Mono th tng l hon ton ging nhau . i vi Mono do chc mt knh nn ta dng 2 bm, i vi Stereo do c hai knh nn cn n 4 bm, cng thm mt bm phn chia dliu ca hai knh thnh ra cn 5 bm.

Phn sau l gii thut ca tng ngt


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S gii thut ca EXTI1_IRQHandler

0

0

0

Hnh 3.10: S gii thut ca EXTI1_IRQHandler

Clear pending bit

Bd = 1

Mth mc gc

Ly a ch BootSector ca partition0

EXTI1_IRQHandle

Bd = = 0

c d liu vo buff21,buff22

Ly thng tin ca fileWAV u tin

WAV_MONO_PLAYER()

c dliu vo buff21

Bd =2

Hin thLCD

Mono?

Bd =1

Diasable TIM6, TIM7,DAC1, DAC2, DMA1,DMA2, DMA choDAC1 v DAC2

WAV_STEREO_PLAYER()

Bd = = 1

Enable TIM6, TIM7,DAC1, DAC2, DMA1,DMA2, DMA choDAC1 v DAC2

END

Sc = 2


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S gii thut ca EXTI9_5_IRQHandler

0

Hnh 3.11:S gii thut ca EXTI9_5_IRQHandler

EXTI9_5_IRQHandler

Ly thng tin ca fileWAVE tip theo

Clear pending bit

Hin thLCD

Mono?

c dliu vo buff21 c d liu vo buff21,buff22

WAV_MONO_PLAYER() WAV_STEREO_PLAYER()

END

Sc = 2


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S gii thut ca EXTI15_10_IRQHandler

0

Hnh 3.12: S gii thut ca EXTI15_10_IRQHandler

EXTI15_10_IRQHandle

Ly thng tin ca fileWAVE trc.

Clear pending bit

Hin thLCD

Mono?

c dliu vo buff21 c d liu vo buff21,buff22

WAV_MONO_PLAYER() WAV_STEREO_PLAYER()

END

Sc = 2


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S gii thut ca DMA2_Channel3_IRQHandler

Hnh 3.13:S gii thut ca DMA2_Channel3_IRQHandler


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S gii thut ca DMA2_Channel4_5_IRQHandler

Hnh 3.14: S gii thut ca DMA2_Channel4_5_IRQHandler


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S gii thut ca hai hm pht nhc

WAV_STEREO_PLAYER()

void WAV_STEREO_PLAYER(uint8_t *buff_addr1, uint8_t *buff_addr2, uint16_t

sampl_scale);

WAV_MONO_PLAYER

voidWAV_MONO_PLAYER(uint8_t *buff_addr, uint16_t sampl_scale);

Hnh 3.15: S gii thut ca hm Hnh 3.16: S gii thut ca hm

WAV_STEREO_PLAYER WAV_MONO_PLAYER

WAV_STEREO_PLAYER()

Cu hnh DMA1 chuyn

dliu tbuff_addr1n DAC1

Cu hnh DMA2 chuyndliu tbuff_addr2n DAC2

Enable HT v TC caDMA1

Disable HT v TC caDMA2

Enable TIM6, TIM7, DAC1,DAC2, DMA1, DMA2, DMAcho DAC1 v DAC2

END

WAV_MONO_PLAYER()

Cu hnh DMA2 chuyn

dliu tbuff_addr1n DAC

Cu hnh TIM6, TIM7theo ng tn sly mu

Cu hnh TIM7 theong tn sly mu

Enable HT v TC caDMA2

Disable HT v TC ca

DMA2

Enable TIM6, TIM7, DAC1,DAC2, DMA1, DMA2, DMAcho DAC1 v DAC2

END


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LUN VN TT NGHIP Chng 4. Nhng hn chv hng pht trin

CHNG 4

NHNG HN CHV HNG PHT TRIN

4.1 Nhng hn chca sn phm

Chpht c file WAVE 8 bit /sample

Cha linh hot trong vic c file tMicro SD Card: nh chc file tthmcgc

Do dng th vin DOSFS nn cn mt shn chtrong vic htrlong_file_name.

Cc nt iu khin cn to ra nhiu

4.2 Hng pht trin tip theo

Dng IC decoder 16 bit nh STW5094A, PCM1772 pht c cc file c sbit/sample ln nh 16, 24 bit.

Pht trin thm phn DOSFS c file trong th mc gc.

Chuyn sang dng bth vin FATFS.

Nhng th vin Mp3 decoder ca cng ng helix vo chi thm nhc MP3.

Dng LCD graphic hin th


65/94

LUN VN TT NGHIP Ti liu tham kho

Ti liu tham kho

[1] Din n ARM Vit Nam.www.arm.vn.

[2]www.arm.com.(2005-2006) Cortex-M3 Technical Reference Manual.

[3] STMicroelectronics. (2008). STM32F103xx-Reference Manual.

[4] Th vin DOSFS.Lewin A.R.W. Edwards ([email protected]).

www.larwe.com/zws/products/dosfs/index.html.

[5]www.ccrma.stanford.edu.Microsoft WAVE soundfile format.

[6]www.en.wikipedia.org/wiki/File_Allocation_Table (FAT file)

[7] STMicroelctronics.www.st.com.

[8] Stm32circleos forum.www.stm32circle.org
http://www.arm.vn/http://www.arm.com/mailto:[email protected]://www.ccrma.stanford.edu/http://www.en.wikipedia.org/wiki/File_Allocation_Tablehttp://www.en.wikipedia.org/wiki/File_Allocation_Tablehttp://www.st.com/http://www.stm32circle.org/http://www.stm32circle.org/http://www.st.com/http://www.en.wikipedia.org/wiki/File_Allocation_Tablehttp://www.ccrma.stanford.edu/mailto:[email protected]://www.arm.com/http://www.arm.vn/


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1. TDA2822

DUAL POWER AMPLIFIER

.SUPPLY VOLTAGE DOWN TO 3 V. LOW CROSSOVER DISTORSION. LOW QUIESCENT CURRENT.BRIDGE OR STEREO CONFIGURATION

DESCRIPTION

The TDA2822 is a monolithic integrated circuit in12+2+2 powerdip, intended for use as dual audiopower amplifier in portable radios and TS sets.

POWERDIP(Plastic 12+2+2)

ORDERING NUMBER : TDA2822

TYPICAL APPLICATION CIRCUIT (STEREO)

LUN VN TT NGHIP Datasheet cc IC

SVTH: PHM VN VANG

Datasheet Cc IC

Trang 57


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THERMAL DATA

Symbol Parameter Value Unit

Rth j-amb

Rth j-case

Thermal Resistance Junction-ambient

Thermal Resistance Junction-pins

Max

Max

80

20

C/W

C/W

ELECTRICAL CHARACTERISTICS (Vs = 6 V, Tamb= 25C, unless otherwise specified)STEREO (test circuit of fig. 1)

Symbol Parameter Test Condition Min. Typ. Max. Unit

Vs Supply Voltage 3 15 V

Vc Quiescent Output Voltage Vs= 9 V

Vs= 6 V

4

2.7

V

V

Id Quiescent Drain Current 6 12 mA

Ib Input Bias Current 100 nA

Po Output Power

(each channel)

d = 10 % f = 1 kHz

Vs= 9 V RL= 4 Vs= 6 V RL= 4 Vs = 4.5 V RL= 4

1.30.45 1.70.65

0.32

WW

W

Gv Closed Loop Voltage Gain f = 1 kHz 36 39 41 dB

Ri Input Resistance f = 1 kHz 100 keN Total Input Noise Rs= 10 k

B = 22 Hz to 22 kHzCurve A

2.52

VV

SVR Supply Voltage Rejection f = 100 Hz 24 30 dB

CS Channel Separation Rg= 10 k f = 1 kHz 50 dB

BRIDGE (test circuit of fig. 2)

Vs Supply Voltage 3 15 V

Id Quiescent Drain Current RL= 6 12 mA

Vos Output Offset Voltage RL= 8 10 60 mV

Ib Input Bias Current 100 nA

Po Output Power d = 10 % f = 1 kHz

Vs= 9 V RL= 8 Vs= 6 V RL= 8

Vs = 4.5 V RL= 4

2.70.9

3.21.35

1

WW

W

d Distortion (f = 1 kHz) RL= 8 Po= 0.5 W 0.2 %

Gv Closed Loop Voltage Gain f = 1 kHz 39 dB

Ri Input Resistance f = 1 kHz 100 keN Total Input Noise Rs= 10 k

B = 22 Hz to 22 kHz

Curve A

3

2.5

V

VSVR Supply Voltage Rejection f = 100 Hz 40 dB

SVTH: PHM VN VANG Trang


59


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Figure 1 :Test Circuit (stereo).

Figure 2 : P.C. Board and Components Layout of the Circuit of Figure 1 (1:1 scale).

SVTH: PHM VN VANG Trang


60


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Figure 3 :Test Circuit (bridge).

Figure 4 : P.C. Board and Components Layout of the Circuit of Figure 3 (1:1 scale).


SVTH: PHM VN VANG Trang 61


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Figure 5 :Output Power vs. Supply Voltage(Stereo).

Figure 6 :Output Power vs. Supply Voltage(Bridge).

Figure 7 :Distorsion vs. Output Power (Bridge). Figure 8 :Distorsion vs. Output Power (Bridge).

Figure 9 : Supply Voltage Rejection vs.Frequency.

Figure 10 :Quiescent Current vs. Supply Voltage.


SVTH: PHMVN VANG Trang 62


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Figure 11 :Total Power Dissipation vs. Output Power (Stereo).

Figure 12 :Total Power Dissipation vs. Output Power (Bridge).

Figure 13 :Total Power Dissipation vs. Output Power (Bridge).




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Figure 14 :Application Circuit for Portable Radios.

MOUNTING INSTRUCTION

The Rth j-ambof the TDA2822 can be reduced by sol-dering the GND pins to a suitable copper area of theprinted circuit board (Figure 15) or to an externalheatsink (Figure 16).

The diagram of Figure 17 shows the maximum dis-sipable power Ptotand the Rth j-ambas a function of

the side "" of two equal square copper areas havinga thickness of 35 (1.4 mils).

During soldering the pins temperature must not ex-ceed 260 C and the soldering time must not belonger than 12 seconds.

The external heatsink or printed circuit copper areamust be connected to electrical ground.

Figure 15 :Example of P.C. Board Copper Areawhich is used as Heatsink.

Figure 16 :External Heatsink Mounting Example.


T 64


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Figure 6 :Maximum Dissipable Power andJunction to Ambient ThermalResistance vs. Side "".

Figure 7 :Maximum Allowable Power Dissipationvs. Ambient Temperature.


SVTH PHMVN VANG Trang 65


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POWERDIP 16 PACKAGE MECHANICAL DATA

DIM.mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

a1 0.51 0.020

B 0.85 1.40 0.033 0.055

b 0.50 0.020

b1 0.38 0.50 0.015 0.020

D 20.0 0.787

E 8.80 0.346

e 2.54 0.100

e3 17.78 0.700

F 7.10 0.280

I 5.10 0.201

L 3.30 0.130

Z 1.27 0.050



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2. LM1117/LM1117I

800mA Low-Dropout Linear Regulator

General DescriptionThe LM1117 is a series of low dropout voltage regulatorswith a dropout of 1.2V at 800mA of load current. It has thesame pin-out as National Semiconductors industry standardLM317.

The LM1117 is available in an adjustable version, which canset the output voltage from 1.25V to 13.8V with only twoexternal resistors. In addition, it is also available in five fixedvoltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V.

The LM1117 offers current limiting and thermal shutdown. Itscircuit includes a zener trimmed bandgap reference to as-sure output voltage accuracy to within 1%.

The LM1117 series is available in SOT-223, TO-220, andTO-252 D-PAK packages. A minimum of 10F tantalum ca-

pacitor is required at the output to improve the transientresponse and stability.

Featuresn Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and AdjustableVersions

n Space Saving SOT-223 Package

n Current Limiting and Thermal Protection

n Output Current 800mA

n Line Regulation 0.2% (Max)

n Load Regulation 0.4% (Max)

n Temperature Range LM1117 0C to 125C LM1117I 40C to 125C

Applicationsn 2.85V Model for SCSI-2 Active Termination

n Post Regulator for Switching DC/DC Converter

n High Efficiency Linear Regulators

n Battery Charger

n Battery Powered Instrumentation

Typical Application

Active Terminator for SCSI-2 Bus

DS100919-5

Fixed Output Regulator

DS100919-28




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Package Temperature

Range

Part Number Packaging Marking Transport Media NSC

Drawing

3-lead

SOT-223

0C to +125C LM1117MPX-ADJ N03A Tape and Reel MA04A

LM1117MPX-1.8 N12A Tape and Reel



LM1117MPX-3.3 N05A Tape and ReelLM1117MPX-5.0 N06A Tape and Reel

40C to +125C LM1117IMPX-ADJ N03B Tape and Reel

LM1117IMPX-3.3 N05B Tape and Reel

LM1117IMPX-5.0 N06B Tape and Reel

3-lead TO-220 0C to +125C LM1117T-ADJ LM1117T-ADJ Rails T03B

LM1117T-2.85 LM1117T-2.85 Rails

LM1117T-3.3 LM1117T-3.3 Rails

LM1117T-5.0 LM1117T-5.0 Rails

3-lead TO-252 0C to +125C LM1117DTX-ADJ LM1117DT-ADJ Tape and Reel TD03B

LM1117DTX-1.8 LM1117DT-1.8 Tape and Reel





40C to +125C LM1117IDTX-ADJ LM1117IDT-ADJ Tape and Reel

LM1117IDTX-3.3 LM1117IDT-3.3 Tape and Reel

LM1117IDTX-5.0 LM1117IDT-5.0 Tape and Reel

Block Diagram

DS100919-1




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Connection DiagramsSOT-223

DS100919-4

Top View

TO-220

DS100919-2

Top View

TO-252

DS100919-38

Top View




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Absolute Maximum Ratings (Note 1)If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Maximum Input Voltage (VIN to GND)

LM1117-ADJ, LM1117-1.8,

LM1117-2.5, LM1117-3.3,

LM1117-5.0, LM1117I-ADJ,

LM1117I-3.3, LM1117I-5.0 20V

Power Dissipation (Note 2) Internally Limited

Junction Temperature (TJ)

(Note 2) 150C

Storage Temperature Range -65C to 150C

Lead Temperature

TO-220 (T) Package 260C, 10 sec

SOT-223 (IMP) Package 260C, 4 sec

ESD Tolerance (Note 3) 2000V

Operating Ratings (Note 1)

Input Voltage (VIN to GND)

LM1117-ADJ, LM1117-1.8,

LM1117-2.5, LM1117-3.3,LM1117-5.0, LM1117I-ADJ,

LM1117I-3.3, LM1117I-5.0 15V

LM1117-2.85 10V

Junction Temperature Range (TJ)(Note 2)

LM1117 0C to 125C

LM1117I 40C to 125C

LM1117 Electrical CharacteristicsTypicals and limits appearing in normal type apply for TJ = 25C. Limits appearing inBoldface type apply over the entire junc-tion temperature range for operation, 0C to 125C.

Symbol Parameter Conditions Min

(Note 5)Typ

(Note 4)Max

(Note 5) Units

VREF Reference Voltage LM1117-ADJ

IOUT= 10mA, VIN-VOUT= 2V, TJ = 25C

10mA IOUT 800mA, 1.4V V IN-VOUT10V

1.238

1.225

1.250

1.250

1.262

1.270

V

V

VOUT Output Voltage LM1117-1.8

IOUT= 10mA, VIN= 3.8V, TJ = 25C

0 IOUT 800mA, 3.2V V IN 10V

1.782

1.746

1.800

1.800

1.818

1.854

V

V

LM1117-2.5

IOUT= 10mA, VIN= 4.5V, TJ = 25C


2.475

2.450

2.500

2.500

2.525

2.550

V

V

LM1117-2.85

IOUT= 10mA, VIN= 4.85V, TJ = 25C0 IOUT 800mA, 4.25V VIN 10V

0 IOUT 500mA, VIN= 4.10V

2.8202.790

2.790

2.8502.850

2.850

2.8802.910

2.910

VV

V

LM1117-3.3

IOUT= 10mA, VIN= 5V TJ= 25C

0 IOUT 800mA, 4.75VVIN 10V

3.267

3.235

3.300

3.300

3.333

3.365

V

V

LM1117-5.0

IOUT= 10mA, VIN= 7V, TJ= 25C


4.950

4.900

5.000

5.000

5.050

5.100

V

V

VOUT Line Regulation

(Note 6)

LM1117-ADJ

IOUT= 10mA, 1.5V VIN-VOUT

13.75V

0.035 0.2 %

LM1117-1.8

IOUT= 0mA, 3.2V V IN 10V

1 6 mV

LM1117-2.5

IOUT= 0mA, 3.9V V IN 10V

1 6 mV

LM1117-2.85

IOUT= 0mA, 4.25V VIN 10V 1 6 mV

LM1117-3.3


LM1117-5.0

IOUT= 0mA, 6.5V V IN 15V 1 10 mV




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Typicals and limits appearing in normal type apply for TJ = 25C. Limits appearing inBoldface type apply over the entire junc-tion temperature range for operation, 40C to 125C.

Symbol Parameter Conditions Min

(Note 5)Typ

(Note 4)Max

(Note 5) Units

VREF Reference Voltage LM1117I-ADJ

IOUT= 10mA, VIN-VOUT= 2V, TJ = 25C

10mA IOUT 800mA, 1.4V V IN-VOUT10V

1.238

1.200

1.250

1.250

1.262

1.290

V

V

VOUT Output Voltage LM1117I-3.3


0 IOUT 800mA, 4.75V VIN 10V

3.267

3.168

3.300

3.300

3.333

3.432

V

V

LM1117I-5.0



4.950

4.800

5.000

5.000

5.050

5.200

V

V

VOUT Line Regulation

(Note 6)

LM1117I-ADJ

IOUT= 10mA, 1.5V VIN-VOUT

13.75V

0.035 0.3 %

LM1117I-3.3


LM1117I-5.0

IOUT= 0mA, 6.5V V IN 15V 1 15 mV

VOUT Load Regulation

(Note 6)

LM1117I-ADJ

VIN-VOUT= 3V, 10 IOUT 800mA 0.2 0.5 %

LM1117I-3.3

VIN= 4.75V, 0 IOUT 800mA 1 15 mV

LM1117I-5.0

VIN= 6.5V, 0 IOUT 800mA 1 20 mV

VIN-V OUT Dropout Voltage

(Note 7)

IOUT= 100mA 1.10 1.30 V

IOUT= 500mA 1.15 1.35 V

IOUT= 800mA 1.20 1.40 V

ILIMIT Current Limit VIN-VOUT= 5V, TJ = 25C 800 1200 1500 mA

Minimum Load

Current (Note 8)

LM1117I-ADJ

VIN= 15V 1.7 5 mA

Quiescent Current LM1117I-3.3VIN 15V 5 15 mA

LM1117I-5.0

VIN 15V 5 15 mA

Thermal Regulation TA= 25C, 30ms Pulse 0.01 0.1 %/W

Ripple Regulation fRIPPLE =1 20Hz, VIN-VOUT= 3V

VRIPPL

May Nghe Nhac Su Dung Chip Arm Cortexm3 32bit GkCI8 20130514025321 97383 x6xY

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