Marketing Datasheet 4 -Lane 1 31.5 Gbps/lane Bit Error ...0.6 ps Deterministic Jitter @ 20G 6 ps...
Transcript of Marketing Datasheet 4 -Lane 1 31.5 Gbps/lane Bit Error ...0.6 ps Deterministic Jitter @ 20G 6 ps...
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ML4039B-EQL MDS rev0.3
MultiLane SAL, ML4039B-EQL Marketing Datasheet rev. 0.3 Advance Product information subject to change. Multilane SAL reserves the right to make changes to its product specifications at any time
without notice. The information furnished herein is believed to be accurate; however, no responsibility is assumed for its use.
Marketing Datasheet
ML4039B-EQL
4-Lane 1-31.5 Gbps/lane Bit Error Ratio Tester Uncorrelated Channels Independent Jitter Modulators Emulate any Channel with the Programmable Equalizer Vertical & Horizontal Eye Closure Bathtub Curve Measurement Eye Contour Measurement Receiver Sensitivity Jitter Tolerance Equalizer Sensitivity
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ML4039B-EQL MDS rev0.3
MultiLane SAL, ML4039B-EQL Marketing Datasheet rev. 0.3 Advance Product information subject to change. Multilane SAL reserves the right to make changes to its product specifications at any time
without notice. The information furnished herein is believed to be accurate; however, no responsibility is assumed for its use.
ML4039B-EQL
4 Channel 1-31.5 Gbps BERT
Summary The ML4039B-EQL series is a state of the art 4 Lane Pulse Pattern Generator and Error Detector with output signal shaper up to 31.5 Gbps. It has been conceived for the demanding applications such as compliance testing. It features 2 independent timebases for adding uncorrelated cross-talk and has four separate jitter modulators capable of SJ and RJ as well as RI. The 9-tap equalizer can emulate typical channels such as a high-loss ISI channel or a CTLE. The adaptive equalization wizard will take the s2p or s4p file for any channel and set the equalizer taps to emulate the desired channel, provided you have a DSO. S4p files for common channels such as the 10dB ISI channel required for CAUI4 compliance (IEEE802.3bm or OIF-CEI3.1) are readily available. Key Features Compact double slot, 6U cPCI form factor 1 to 31.5 Gbps data rate 4 independent lanes configurable with
different line rates Fully featured output signal conditioner, with
composite jitter generation, 9 tap transversal filter for pre-emphasis, and channel emulation
Continuous Linear Time Domain Equalizer with greater than 20dB dynamic Range
Integrated synthesizer Automated measurements on received signal
that include automated J2/J9, Dual Dirac, Mask Test
RX Tolerance Measurement Equalizer Tolerance with a programmable ISI, with a programmable channel emulator Jitter Tolerance, with a composite on-board random jitter, Sinusoidal Jitter, and external Phase noise emulator to 2GHz Receiver tolerance common differential mode interference Software Capabilities Windows based intuitive GUI Windows based APIs, and DLLs Python API wrapper Controlled by a Fast Ethernet port
Target Applications CAUI4 compliance testing Interconnect testing, SFP, SFP28, CFP, CFP2,
CFP4, QSFP and QSFP28 Backplane testing Interference and X-Talk testing Receiver sensitivity testing Receiver jitter tolerance testing Equalizer characterization Electro-Optical module testing Electrical stressed eye testing
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ML4039B-EQL MDS rev0.3
MultiLane SAL, ML4039B-EQL Marketing Datasheet rev. 0.3 Advance Product information subject to change. Multilane SAL reserves the right to make changes to its product specifications at any time
without notice. The information furnished herein is believed to be accurate; however, no responsibility is assumed for its use.
General Functionality Continuous Bit Rate coverage from 0.8Gbps
to 31.5Gbps PRBS (7, 9, 15, 23, 31), 80 bit user patter Complete signal measurement capability (eye
contour, mask test, and bathtub curve)
TX Jitter Generation Horizontal eye closure Integrated, Calibrated Stress Generation to
address the Stressed Receiver Sensitivity and Jitter Tolerance Test Requirements for a wide range of Standards. Phase Shift Sinusoidal Jitter Phase Modulation PM Random Jitter
TX Signal Shaping Function High output voltage Pre-emphasis with 20dB range Programmable channel emulation Large dynamic range tap weights Sinusoidal and random jitter generation 9 tap transversal filter output 128 step tap amplitude steps 20dB / tap dynamic range Programmable eye closure Pulse spreading to 140ps
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ML4039B-EQL MDS rev0.3
MultiLane SAL, ML4039B-EQL Marketing Datasheet rev. 0.3 Advance Product information subject to change. Multilane SAL reserves the right to make changes to its product specifications at any time
without notice. The information furnished herein is believed to be accurate; however, no responsibility is assumed for its use.
SerDes & CFP2 Test Application
Order Information
Order No. Description
ML4039B-EQL 4 Channels 30Gbps BERT with 9-tap transversal filter per channel for equalization tolerance testing
ML4000 6U cPCIChassis
Standard Warranty - 1 Year
For more information on this or other products, contact Multilane sales team by email at [email protected]
Electrical Specification
ML4039B-EQL Bit Rate 1-31.5Gbps
Data Format NRZ
PRBS Pattern 7, 9, 15, 23, 31
User Pattern Length 80 bits
TX Amplitude Differential 250-800mV
TX Amplitude Adjustment 12.5mV
Pre-Emphasis 20 dB
Pre-Emphasis Resolution 128 steps / tap
Equalizing Filter Spacing 17.5
Random Jitter RMS, measured with a 0101 pattern
0.6 ps
Deterministic Jitter @ 20G 6 ps
Rise/Fall Time (20–80%) 17 ps
Sinusoidal Phase Modulation 60 ps
Internal Sinusoidal Jitter Frequency 0.1 to 80 MHz
Random Jitter in Phase Modulation 30pS
Output Return Loss up to 10GHz -12 dB
Output Return Loss (16-25GHz) -8dB
TX Skew Control Range 140 pS
Lane to Lane Skew Resolution 0.5 pS
Error Detector Phase Margin 5ps
Error Detector Input Amplitude 1200 mVpp @25G
Error Detector Maximum Input 1200mV Diff
Error Detector Input Sensitivity 25 mVpp
Phase Scan Resolution 6bits
Vertical Scan Resolution 8 bits
Reference Clock Output Frequency 62.5-750MHz
Reference Clock Output Amplitude 550-850 mVpp
Reference Clock Input 62.5-750MHz
Reference Clock Input Amplitude 300-1900 mVpp
TX/RX and Clock Connectors in cPCI 2.92 K connector
Number of Timebases 4
cPCI Form Factor Slot Height 2
Power Requirements 40 Watt
ML4028 (CFP2 Break-Out) | ML4027 (CFP2 4x25G)
4TX Pairs
4RX Pairs
ML4000Signal IntegrityAnalyzer Chassis
SerDes DUT
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ML4039B-EQL MDS rev0.3
MultiLane SAL, ML4039B-EQL Marketing Datasheet rev. 0.3 Advance Product information subject to change. Multilane SAL reserves the right to make changes to its product specifications at any time
without notice. The information furnished herein is believed to be accurate; however, no responsibility is assumed for its use.
Worldwide MultiLaneSAL Houmal Technology Park 141 Main Road Houmal, Lebanon +961 5 941668 Website: www.multilaneinc.com Email: [email protected]
North America & Europe
MultiLaneInc 2000 Wyatt Drive, Suite 6 Santa Clara CA 95054 USA +1 408890 2234
About MultiLane SAL MultiLane SAL is leading developer of high speed instruments and interconnects test modules for 10, 40, and 100Gbps of SerDes and high speed IO for the semiconductor and cloud computing infrastructure. Products includes BERTs, Scopes, and a host of MSA Compliant development tools for CFP, CFP2, SFP, SFP28, QSFP, zQSFP modules. MultiLane’s products are used to test semiconductors, AOC, electro-optical modules and blades. MultiLane operates out of Houmal Technology Park in Lebanon, and has been offering leading edge technology and products to Tier-1 equipment suppliers globally. Visit www.multilaneinc.com
Datasheet History Rev 0.15: Initial Revision Rev 0.3: Jun 16