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makeautomating compilation

제 16 강 : make

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If I change a source file

1. Modified z in a.c 2. Compile only a .c? Compile all? (several hours!!)

1. Modified z in a.c 2. Compile only a .c? Compile all? (several hours!!)

Modified z in a.c

Now

Compile which files?

500 directories --- 8000 files

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How other files should changesymbol table:

file.c:add() { int x; char y; x++ y++ …. z-- ….

z++ }

add 077123 local

x 12345 global y 67890

z 777999 extern

Symbol Address Type

add() {

}

file.o:

074 777999

073 777999

(2) z is modified in a.c file

(3) Then follow link, modifying instructions that use z (address or opcode, …) gcc ALL files which #include z

z’s type z’s address

(1) z was defined in a,c other file (eg file.c) uses z

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Optimal compile procedure

(1) modify a.c (int z buf z;)(2) modify header file (extern buf z;)

(3) gcc a.c (new a.o)(4) gcc all files #including this header file (z) (new *.o files)

(5) re-link & re-build (new a.out)

src ---

obj----

a.out---

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#include z.h; z =0;

#include z.h; z = z -1;

#include z.h; z = z + 1;

Modified z? Modified z?

int z;

a.c:

d.c:

c.c

b.c:

recompileALL files using extern z

(files #including z)

recompileALL files using extern z

(files #including z)

Space is allocated for zAddress binding -- z

dependency relation between files

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dependency between files

a.c z.h c.c

a.o b.o c.o

a.out

a.o |a.c

“a.o depends on a.c”a.o (younger than) a.c

(a.c renewed?) (renew a.o)“action” to renew a (eg gcc)

b.c

notation -- makefile a.o : a.c tab action

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a.out: a.o b.o ld a.o b.o

makefile:

colon(:) “a.out depends on a.o ”

target must be younger

than source

TAB

[tab]run sh commandstarget becomes

younger than source

(1) Dependency Condition

(2) Action

“target”

“source”

makefile -- 2 kinds of lines

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automatic generation of makefile

(1) gcc –M *.c generates dependency relation b.c: a.c dependency line

gcc b.c action line a.out: a.o, b.o dependency line

ld a.o b.o action line

(3) After modifying source, run make command– make command checks makefile– recompiles minimum number of files – fastest build time

(2)save it inmakefile

cd linux-practicecd make_exrm *.ogcc –M *.c

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TAB

a.out: a.o b.o gcc a.o b.oa.o: a.c

gcc a.c b.o: b.c z.h

gcc bc. z.hlibmy.a: a.o b.o

ar libmy.a a.o b.o

TAB

TAB

typical content of makefile

a.c z.h c.c

a.o b.o c.o

a.out

b.c

libmy.a

TAB

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steps taken by makeTAB

a.out: a.o b.o gcc a.o b.oa.o: a.c a.h

gcc a.c a.hb.o: b.c b.h

gcc bc. b.h

TAB

TAB

% make ***if target is specified, start from ***else, start from 1st (top) target a.out--- at a.out ---compare times between (target-source)what is time of source? (source - a.o…)--- at a.o ---compare times between (target-source)what is time of source? (source - a.c …)recursively repeat down the treea.out

a.o

a.c

b.o

a.h b.hb.c

starts from 1st target

compare timewhat’ time of a.o?

compare timewhat’s time of a.c?

ex cd linux-practice cd make_ex make

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a.o: a.c gcc a.c

do_this : gcc x.c y.c

makefile:Dummy Target

Dummy target: targets which is not a file represent any activity names such as install, build, library … If you say eg “make do_this”Then start from “do_this” target Frequently used to install, library update, …

ex make –f makefile_plain # 1st target make ldo_this –f makefile_plain

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Multiple targets …

a.out: a.o b.o a.o: a.c a.hb.o: b.c b.hdo-this: gcc x.c y.clib: ar rc libk.a e.o

f.o

a.out

a.o

a.c

b.o

a.h b.hb.c

lib

e.o

e.c

f.o

e.h f.hf.c

do-this

x.o

x.c

y.o

y.c

% make default is 1st target (a.out)% make lib% make do-this

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makefile:

can abbreviate this

can abbreviate this makefile:

Implicit

ex cdcd make_excat makefile_implicittouch div.cmake –f

makefile_implicit

TAB

a.out: a.o b.o gcc a.o b.oa.o: a.c a.h

gcc a.c a.hb.o: b.c b.h

gcc bc. b.h

TAB

TAB

a.out: a.o b.oa.o: a.c a.h

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Macro• OBJ= add.o sub.o mul.o main.o /*long

string */Example: all : $(OBJ)

gcc -o all $(OBJ)

• Current target @all : $(OBJ) all : $(OBJ)

gcc -o all $(OBJ) gcc -o $@ $(OBJ)

• Also– $? $< $* ….

==

Internal macro

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special dependencies ::

• If source 1 changes target is created (or updated) by

action 1• If source 2 changes target is created (or updated) by

action 2 target :: source1

action1target ::

source2

action2

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directory hierarchy & make

• make usually works in a single directory

• In large projects, source files occupy a tree

• tree has many sub-directories …• let each sub-directory have its own

Makefile BA

src

Makefile a1.c a2.c

C

Makefile b1.c b2.c

Makefile

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Makefile OBJ= A/a1.o A/a2.o B/b1.o B/b2.ofinal: do_A do_B $(GCC) -o final $(OBJ)do_A:

cd A; make all;do_B:

cd B; make all;

cd srcmake1st target (final) depends on do_Ado_A is not a file (dummy target)it has no corresponding sourcejust take action in next line

BA

src

Makefile a1.c a2.c

all: $(GCC) –c a1.c a2.c

C

Makefile b1.c b2.c

all: $(GCC) –c b1.c b2.c

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Examplerecursive make

cd make_ex_recursive /* top level */cat makefile

make /* traverse below do_A, do_B see if any new files are found No new files are seen this time .. so ..*/

ls -Rtouch main_d/main.c

make /* now this time -- gcc main.c */

Not just for build, but forlibrary, source file, document, install

managements

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development platform environment

PC PC PCPC PC

PCPC

compilerlibrary

header filesenvironment variables

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macro & coding style• Macro

OBJ=add.o sub.o mul.o main.o /*long names*/GCC=/usr/bin/gcc /*commands*/PATH=/bin:/usr/bin:X11/bin /*environment*/INCL=/usr/src/include /*directories*/

Example: all : $(OBJ)$(GCC) -o all $(OBJ)

Never use simple command like “gcc”Always use full pathname for commands, directories.Also explicitly specify PATH within make if necessaryBecause directories, environments … can change so

easily.

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Makefile Macro & Software Quality

• Watch environment variables, alias etc– they depend on userid, …

• Use full pathname for every command in makefile– Also in shell script, crontab, ….– Different command may be invoked if

• userid, PATH, PWD, host, ….

• Provide full information for environments in makefile– PATH INCLUDE ….

Andrew Oram & Steve Talbott, Managing Projects with make, O’Reilly (p 65)

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Makefile Macro Conditional Compile

• Use single source file for many different situations?

#ifdef SMP struct buf buf={3, 1,2}#else struct buf buf={4, 4, 1}#endif

• To compile only those parts you want, • define compile time option in gcc command

– By editing makefile as follows (to cc for different hardware): CFLAGS = -DSMP $(GCC) $(CFLAGS) $(SRC)

makefile:

Inside C source“if defined”

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misc.

• imake– If target systems differ (source code / build process) may be different– Indicate system differences in .cf files

eg sun.cf : Coptions= … HasBSDsocket= …

– Then imake generates platform specific makefile for SUN, …

– imake use C preprocessor to edit makefile.

• Other related topics: nmake, makedepend, ….