M38 - DVT€¦ · angles 3. all crystals & oscillator values are in hertz. 2. all capacitance...
90
ANGLES 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. DATE APPD ENG DATE APPD CK ECN ZONE REV DO NOT SCALE DRAWING X.XXX X.XX XX DIMENSIONS ARE IN MILLIMETERS THIRD ANGLE PROJECTION D SIZE APPLICABLE NOTED AS MATERIAL/FINISH NONE SCALE DESIGNER MFG APPD DESIGN CK RELEASE QA APPD ENG APPD DRAFTER METRIC OF SHT DRAWING NUMBER TITLE NOTICE OF PROPRIETARY PROPERTY I TO MAINTAIN THE DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT AGREES TO THE FOLLOWING PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY Apple Computer Inc. 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 B C D A B C D A REV. DESCRIPTION OF CHANGE PDF 1 TABLE OF CONTENTS PCI-E - UNUSED PORTS 12/08/05 GPU - INTERNAL DISPLAY CONN’S SMC - H8S2116 PCI-E - AIRPORT MINI-PCIE CONN FIREWIRE - DECAPS DDR2 - VTT SUPPLY 18 SB - SMB,GPIO,PM,CLKS USB - FLASH CONN DDR2 - TERMINATION NB - CONFIG STRAPS NB - CPU INTERFACE FIREWIRE - CONN’S LAN - YUKON’S PCIE INTERFACE SB - SMB BUS CONNECTIONS SB - POWERS AND GROUNDS SB - RTC,LAN,AUDIO,ATA,CPU,LPC NB - DECAPS NB - GROUNDS NB - POWER 2 14 7 SMC - FANS GPU - EXTERNAL DISPLAY CONN’S GPU - M56 VIDEO INTERFACES GPU - M56 GPIO,DVO,MISC GPU - M56 FRAME BUFFER GPU - M56 CORE PWR JH JH 47 53 MS SMC - TPM AUDIO - DETECT TRANSLATORS 37 31 25 10 74 CPU - PWR & GND 72 18 JH JD 8 21 JH PS 19 15 CIRCUIT SMC - SMB BUSSES, MISC JD JD DRI JD JD JH MS MS MS JH MS MS MS GPU - TMDS,INVERTER,EXT VGA VR - "S0" 1.8V VR - "S0" 1.05V JD JD JD MS MS JD MS MS PT PT RT RT RT RT RT JD JD PT RT RT RT RT RT RT RT RT RT RT JH JH JH JH JH JH JH JH JH JH JH PAGE 54 60 RX 63 58 59 67 68 SO SO 65 77 76 75 73 RP RP RP SO 78 83 79 RP RP RP RP JH 84 M1 85 86 97 96 93 M1 92 91 M1 M1 M1 4 6 5 2 JD JD DRI 2 1 JD JD JD RT JD MS RT 5 4 JD RT JD NB - POWER 1 SB - MISC 16 17 JH JD JD JD JD MS MS MS 9 12 8 11 PS JH JH JH JH PS PS 17 PS PS PS 13 14 16 15 20 26 22 24 21 23 JD JD JH JH JH PS JD 19 20 PS JD JD 23 JD JD JD JD JD JD JD JD JD PS 26 27 24 25 JD (M42) (M42) M1 M1 M1 M1 M1 M1 28 28 29 36 34 38 35 32 33 30 JD JD RT JD JD 33 31 30 PS RT PS 29 JD JD 34 JD JD JD JD JD 41 43 JD 42 44 JD JD JD JD 42 41 40 39 JD JD JD JD JD JD 45 46 JD JD (M42) M1 M42 JH JH 87 M1 M1 JH JH JH JH JH JH JH JH JH JH 88 95 GPU - TP’S JH JH JH JH JH 12 M42 MS 9 3 LAN - CONN (M42) DDR2 - SO-DIMM CONN A M1 GPU - GDDR SDRAM B FUNC TEST M1 89 61 AUDIO - I/O CONN’S,EMC VR - "S3" 1.8V VR - "S0" 1.5V VR - "S3" 3.3V AND 5V GPU - M56 PCI-E GPU - VCORE SUPPLY NB - VIDEO INTERFACE RT CPU - THERMAL SENSOR USB - CONN’S 27 22 M1 GPU - MISC LAN - YUKON’S PWR, MISC CLOCKS - TERMINATIONS 71 69 70 68 72 74 75 76 73 77 78 55 54 56 60 59 58 61 65 63 64 62 45 46 50 51 48 53 52 44 43 FIREWIRE - FW323-06 CLOCKS - GENERATOR NB - DDR2 INTERFACE NB - MISC INTERFACES CPU - BUS INTERFACE SMC - LPC+ CONN ATA (SATA AND IDE) CONN’S SB - PCIE,SPI,USB,DMI,PCI PAGE 38 6 47 49 80 90 94 SMC - GPU/NB THERMAL SENSOR PDF POWER BLOCK DIAGRAM SYSTEM BLOCK DIAGRAM CIRCUIT POWER CONNECTOR / POWER ALIAS GPU - M56 CLOCKS 66 VR - "S0" 1.2V & 2.5V (GRAFIX) VR - CPU I-V SENSE CKT VR - CPU CORE 57 PT SMC - FANS 49 JD 67 RP JH 66 81 TABLE ITEMS & REVISION HISTORY RT SO GPU - GDDR SDRAM A CPU - ITP CONN SB - DECAPS M38 - DVT AUDIO - INTERNAL SPEAKER AMP AUDIO - CODEC,VREG,MIC BIAS SMC - SPI BOOTROM 11 13 10 7 3 CPU - DECAPS DDR2 - SO-DIMM CONN B (REVERSED) 111 1 09/16/05 06/22/04 SCHEM,M38 09 ENGINEERING RELEASED 09 051-6949 400372 www.vinafix.vn
Transcript of M38 - DVT€¦ · angles 3. all crystals & oscillator values are in hertz. 2. all capacitance...
ANGLES
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
DATE
APPDENG
DATE
APPDCK
ECNZONEREV
DO NOT SCALE DRAWING
X.XXX
X.XX
XX
DIMENSIONS ARE IN MILLIMETERS
THIRD ANGLE PROJECTIOND
SIZE
APPLICABLENOTED AS
MATERIAL/FINISH
NONE
SCALE
DESIGNER
MFG APPD
DESIGN CK
RELEASE
QA APPD
ENG APPD
DRAFTER
METRIC
OFSHT
DRAWING NUMBER
TITLE
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PARTII NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
Apple Computer Inc.
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B
C
D
A
B
C
D
A
REV.
DESCRIPTION OF CHANGE
PDF1 TABLE OF CONTENTS
PCI-E - UNUSED PORTS
12/08/05
GPU - INTERNAL DISPLAY CONN’S
SMC - H8S2116
PCI-E - AIRPORT MINI-PCIE CONN
FIREWIRE - DECAPS
DDR2 - VTT SUPPLY
18
SB - SMB,GPIO,PM,CLKS
USB - FLASH CONN
DDR2 - TERMINATION
NB - CONFIG STRAPS
NB - CPU INTERFACE
FIREWIRE - CONN’S
LAN - YUKON’S PCIE INTERFACE
SB - SMB BUS CONNECTIONS
SB - POWERS AND GROUNDS
SB - RTC,LAN,AUDIO,ATA,CPU,LPC
NB - DECAPSNB - GROUNDSNB - POWER 2
14
7
SMC - FANS
GPU - EXTERNAL DISPLAY CONN’S
GPU - M56 VIDEO INTERFACES
GPU - M56 GPIO,DVO,MISC
GPU - M56 FRAME BUFFERGPU - M56 CORE PWR
JH
JH
47
53
MS
SMC - TPM
AUDIO - DETECT TRANSLATORS
37
31
25
10
74
CPU - PWR & GND
72
18
JH
JD
8
21
JH
PS 19
15
CIRCUIT
SMC - SMB BUSSES, MISC
JD
JD
DRI
JD
JD
JH
MS
MS
MS
JH
MS
MS
MS
GPU - TMDS,INVERTER,EXT VGA
VR - "S0" 1.8V
VR - "S0" 1.05V
JD
JD
JD
MS
MS
JD
MS
MS
PT
PT
RT
RT
RT
RT
RT
JD
JDPT
RT
RT
RT
RT
RT
RT
RT
RT
RT
RT
JHJH
JH
JH
JH
JH
JH
JH
JH
JH
JH
PAGE
54
60
RX 63
5859
6768SO
SO
65
777675
73
RP
RP
RP
SO
78
83
79
RP
RP
RP
RP
JH 84
M1
8586
9796
93M1
9291
M1
M1
M1
4
65
2JD
JD
DRI
21
JD
JD
JD
RT
JD
MS
RT
54 JD
RT
JD
NB - POWER 1
SB - MISC
1617
JH
JD
JD
JD
JD
MS
MS
MS
9
12
8
11PS
JH
JH
JH
JHPS
PS
17 PS
PS
PS
1314
1615
20
26
22
24
21
23JD
JD
JH
JH
JHPS
JD
1920 PS
JD
JD23 JD
JD
JD
JD
JD
JD
JD
JD
JD
PS
2627
2425
JD
(M42)
(M42)
M1
M1
M1
M1
M1
M1
28 2829
36
34
38
35
3233
30
JD
JD
RT
JD
JD
333130 PS
RT
PS29
JD
JD34
JD
JD
JD
JD
JD
41
43
JD
42
44 JD
JD
JD
JD
42414039
JD
JD
JD
JDJD
JD
4546
JD
JD
(M42)
M1
M42
JH
JH
87M1
M1
JH
JH
JH
JH
JH
JH
JH
JH
JH
JH
88
95 GPU - TP’S JHJH
JH
JH
JH
12M42
MS 9
3
LAN - CONN
(M42)
DDR2 - SO-DIMM CONN A
M1
GPU - GDDR SDRAM B
FUNC TEST
M1
89
61
AUDIO - I/O CONN’S,EMC
VR - "S3" 1.8VVR - "S0" 1.5V
VR - "S3" 3.3V AND 5V GPU - M56 PCI-EGPU - VCORE SUPPLY
NB - VIDEO INTERFACE
RT
CPU - THERMAL SENSOR
USB - CONN’S
27
22
M1
GPU - MISC
LAN - YUKON’S PWR, MISC
CLOCKS - TERMINATIONS
71
6970
68
72
747576
73
7778
5554
56
605958
61
65
6364
62
4546
5051
48
5352
4443
FIREWIRE - FW323-06
CLOCKS - GENERATOR
NB - DDR2 INTERFACENB - MISC INTERFACES
CPU - BUS INTERFACE
SMC - LPC+ CONN
ATA (SATA AND IDE) CONN’S
SB - PCIE,SPI,USB,DMI,PCI
PAGE
38
6
4749
80
90
94
SMC - GPU/NB THERMAL SENSOR
POWER BLOCK DIAGRAMSYSTEM BLOCK DIAGRAM
CIRCUIT
POWER CONNECTOR / POWER ALIAS
GPU - M56 CLOCKS
66
VR - "S0" 1.2V & 2.5V (GRAFIX)VR - CPU I-V SENSE CKTVR - CPU CORE57
PT
SMC - FANS 49JD
67
RP
JH
66
81
TABLE ITEMS & REVISION HISTORY
RT
SO
GPU - GDDR SDRAM A
CPU - ITP CONN
SB - DECAPS
M38 - DVT
AUDIO - INTERNAL SPEAKER AMPAUDIO - CODEC,VREG,MIC BIAS
SMC - SPI BOOTROM
11
13
10
7
3
CPU - DECAPS
DDR2 - SO-DIMM CONN B (REVERSED)
1111
09/16/05 06/22/04
SCHEM,M38
09 ENGINEERING RELEASED
09051-6949
400372
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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A
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C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
U3301
CK410
PAGE 33
CLOCKS TERMS
PAGE 34
J6000
LPC+ CONNPAGE 60
TPMU6700
J2901 ALS+ATS TSENS
J6500,J6501,J6600 FAN CONNS
J6602 ODD TSENS
FANMLB
U1000 CPU TSENS
U6100 GPU+NB TSENS
J6601 HD TSENS
PAGE 11
J1101
CONNITP
PAGE 23
GPIOSPAGE 24
U6300/01
PAGE 63
SPIBOOTROM
RMT
U5800
J2800J2900DIMM’S CK410M
U3301
AIRPORT
J5300
J5300 (AIRPORT CONN)
PAGE 23
SMB
PAGE 22
USB
BTCONN
J4700
PAGE 48PAGE 48
CTLRFLASH
U4800
PAGE 49
6
CF
JE500MEDIA CARD CONNECTOR
SD
51
IR
CAMERA
732PAGE 47
INTERFACEBNDI
3,7
0,2,4
JE350
J5300
40 PAGE 47
USBCONNECTORS
JE310/JE320/JE330PAGE 67
SMCPAGE 58
JE000, JE001
4-BIT (3.3V/33MHZ)LPC
PAGE 21
PAGE 44
FW323-06
PAGE 21
SPI
PAGE 22PAGE 22
DMI
S/PDIF
INTERFACEBNDI
MIC IN
JE350
PAGE 73
J7300
CONNECTORLINE IN
PORT B
PORT APORT C
PAGE 68STA9221
AUDIO CODEC
PORT F
PAGE 73
J7301
AMPPAGE 72
J7303
U6800
SPEAKER
PAGE 153CONNECTORCOMBO OUT
OPTICAL OUT
LINE OUT
SPEAKERCONNECTOR
AZALIA
21
PCI
PAGE 22
PAGE 46CONNECTORSFIREWIRE A
0
FIREWIRE A
33MHZ32-BIT
2 Diff pairs
PORT
PORT
PAGE 21
PAGE 28-29
DIMM
J2800J2900
TERM
PARALLEL
PAGES 30
PAGE 41
U4101
PAGE 43
JD600
4 Diff pairs
CONNECTORETHERNET
GIG ETHERNET
YUKON
X1 - 1.5GHZ
X1 - 1.5GHZ
1.2V/1.5GHZ
AIRPORT
PAGE 53
MINI-PCIE
#1
PAGE 22
PCI-E
#2-5
#0
PORT
UATACONNECTOR
PAGE 38OPTICAL
3.3V/133MHZ
JC901
UATA UATA/133
SATA
PAGE 21
SATA0
HARD DRIVEPAGE 38
SATA2
SBCORE (1.05V)
CORE (1.05V)
93 93PAGE PAGE
13PAGEU8400
GPU
J9700 J9402
PAGE 94
LVDS(INTERNAL)(TMDS - VGA)
MINI-DVI
PAGE 97
GDDR364-BIT
64-BITGDDR3
1.8V/700MHZ(?)
1.8V/700MHZ(?)
U9000, U9050
U8900, U8950
PAGES 87
PAGES 87
PAGE 84
NB
CPUCORE (~1.2V)
PAGE 8
PAGE 7
(1.83/2.17GHZ)
DDR2 - DUAL CHAN1.8V/667MHZ
64-BIT
PAGE 16-17
PAGE 90
JC900
PAGE 89
MAIN MEMORY
PCIE X16
SATACONNECTOR
PCIE
CONTROL = 2.5V
BUFFER B
FRAMEBUFFER A
FRAME
MISC
CORE
1.2V/800MHZ
2.5GHZ
J0700
FSB64-BIT
667MHZ
PAGE 12
U1200
PAGE 15
PAGE 14
4-BIT
DMIPAGE 14
DMI
U2100
System Block Diagram
111
051-6949 09
2
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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C
D
A
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REV.
APPLE COMPUTER INC.SCALE
NONE
12V_S5
12V, 12A
12V_S0 5V_S5 5V_S0
5V, 4A
3_3V_S5
3.3V, 4A
3_3V_S0
12V, 180W, 15AS5
AC/DC POWER SUPPLY
DC/DC BOARD
PP1V05_S01.05V @ 8.9APAGE 81
PPVCORE_CPU_S01.3V @ 36APAGE 75
PP1V8_S01.8V @ 8APAGE 78
1.2V @ 15APAGE 85
PP1V0R1V2_S0_GPU
PAGE 791.8V @ 10APP1V8_S3
PP1V5_S01.5V @ 8APAGE 80
CPU_CORE
NB_CORE
DRAM_COREDRAM_IO
CPU_AVDDNB_PCIE
NB_DRAM
CPU_FSB
SB_CORENB_FSB
SB_IO
GPU_CORE
GPU_DRAMGDDR_IO
PANEL INVERTERFIREWIRE
FANSHARD DRIVELCDSPEAKER AMP
PAGE 83FETPP5V_S3
PP4V5_AUDIO_ANALOG
PAGE 684.5V @ ?A
OPTICAL
AUDIO
PAGE 83
PP3V3_S3FET
PAGE 77
PP1V2_S0
PAGE 77
PP1V2_S31.2V @ 2.5A
FET
ENET
ENET_CORE
PP2V5_S0
PAGE 772.5V @ 0.9A
NB_GPIOGPU_GPIO
GPU_PCIE
HARD DRIVE
USB
PP0V9_S00.9V @ 1APAGE 31
Power Block Diagram
051-6949 09
1113
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TABLE_ALT_ITEM
TABLE_ALT_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_5_ITEM
TABLE_5_ITEM
124-0338 124-0333 C7501,C8014 CAP,AL,EL,680UF,16V,RAD,10X12.5MM
COMMON
M38 / M39
M39 - CTO
(335S0384)
M39
(335S0384)
(335S0382)
M38
U8400338S0309 338S0266 IC,ATI,M56LP,GRAFIX CTLR,880PBGA,LF
SANYO 16SVP330M 330UF 16V SMD LF128S0078128S0080C7517,C7518,C7910
126S0076 C7801 SANYO W16CE680KX 680UF 16V LF126S0096
XTAL,25MHZ,50PPM,16PF,3.2X2.5 SMD,LFY4101197S0020197S0177
126S0078126S0086 SANYO W6CE330FS 330UF 6.3V LFC699,C940,C1900,C1901,C1968
1 U2100343S0385 CRITICALIC,SB,652BGA
1742-0048 BT2600 CRITICALBAT,COIN,3V,220MAH,CR2032
CRITICAL1 U3301359S0101 IC,CY28445-5,CLK GEN,68PIN QFN
IC,CPU-SKT,479BGA1 CRITICALJ0700511S0025
IC,SMC,HS8/2116,BLANK338S0274 CRITICAL1 U5800
CRITICAL1 LEMENU341S1789 U6700IC,TPM,TSSOP,28P
1 CRITICALU7500353S1235 IC,CPU VREG,IMVP,TWO PHASE
CAP,EL,AL,330UF,20%,16V,10X12.7MM,SMD,LF CRITICAL128S0078 3 C7517,C7518,C7910
1338S0270 U4101 CRITICALIC,88E8053,GIGABIT ENET XCVR,64P QFN,NO
M00-SPEED CPU (QINZ) CPU_M00337S3242 1 CRITICALCPU
1 U1200338S0269 CRITICALIC,945GM,NORTHBRIDGE
333S0354 U8900,U8950,U9000,U9050IC,SGRAM,GDDR3,8MX32,700MHZ,136FBGA ATI_FB_128M_SAMSUNG4 CRITICAL
CRITICALU8900,U8950,U9000,U9050IC,SGRAM,GDDR3,16MX32,700MHZ,136FBGA ATI_FB_256M_SAMSUNG333S0350 4
CRITICAL ATI_FB_256M_HYNIX333S0351 U8900,U8950,U9000,U90504 IC,SGRAM,GDDR3,16MX32,700MHZ,136FBGA
IC,SGRAM,GDDR3,8MX32,700MHZ,136FBGA ATI_FB_128M_HYNIX333S0358 CRITICAL4 U8900,U8950,U9000,U9050
IC,ATI,M56P,GRAFIX CTLR,880BGA,LF ATI_A24U84001 CRITICAL338S0305
CRITICALU4400338S0279 1 IC,FW32306,1394A LINK,TQFP
SCH11051-6950 20_INCH_LCDPCB,SCHEM,MLB,M39
CRITICALU63011 20_INCH_LCDEFI ROM,M39341T0004
PCB,SCHEM,MLB,M38 17_INCH_LCD051-6949 SCH11
820-1919 PCB,FAB,MLB,M38 MLB11 17_INCH_LCD
MLB11 20_INCH_LCD820-1888 PCB,FAB,MLB,M39
CPU_M38337S3241 CPU CRITICAL1 M38/M39 LOW-SPEED CPU (QINY)
U6301 CRITICAL341T0003 EFI ROM,M38 17_INCH_LCD1
R8522114S0287 5.11K,1%,1/16W,402,MF-LF1 17_INCH_LCD
337S3243 CPU_M39CPU CRITICAL1 M39 HI-SPEED CPU (QHJJ)
20_INCH_LCD4.02K,1%,1/16W,402,MF-LF114S0276 R85221
CRITICALU41021341S1797 IC,ENET LAN ROM
Table Items
051-6949
1114
09
U8400338S0266 1 CRITICAL ATI_B24IC,ATI,M56P,GRAFIX CTLR,880BGA,LF
MLB LABEL,48.0X4.8825-6447 1 X14 CRITICAL
www.vinafix.vn
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IN
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PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PLACE NEAR U8900
PLACE NEAR U8950
8 TESTPOINTS
LAYOUT NOTE: PLACE NEAR U2100
PLACE NEAR R1210 AND R1211
PLACE NEAR R2800 AND R2801
MISC GROUND VIAS
LAYOUT NOTE: PLACE NEAR U1200
PLACE NEAR U9050
PLACE NEAR U9000
LAYOUT NOTE: PLACE NEAR J0700 LAYOUT NOTE: PLACE NEAR U8400
PLACE NEAR R0705 AND R0706
LAYOUT NOTE: PLACE NEAR U4101
1PP600 OMITSMP4MM
1PP607 SM OMITP4MM
1PP697P4MMOMITSM
1PP698P4MMOMITSM
1PP699 SM OMITP4MM
1PP6A0P4MMOMITSM
1PP6A1 SM OMITP4MM
1PP6A3P4MM
SM OMIT
1PP6A2P4MMOMITSM
1PP6A4 SM OMITP4MM1PP6A5P4MMOMITSM
1PP6A6P4MMOMITSM
1PP608 SMP4MMOMIT
1PP6A7 SM OMITP4MM1PP6A8P4MMOMITSM
1PP6B1 SM OMITP4MM
1PP6A9 SM OMITP4MM1PP6B0P4MMOMITSM
1PP6B2P4MMOMITSM
1PP6B3 SM OMITP4MM1PP6B4P4MMOMITSM
1PP6B6 SMP4MMOMIT
1PP6B5 SM OMITP4MM
1PP609 SM OMITP4MM
1PP6B7P4MMOMITSM
1PP6B8P4MMOMITSM
1PP6C1 SM OMITP4MM
1PP6B9 SM OMITP4MM1PP6C0P4MMOMITSM
1PP6C2P4MMOMITSM
1PP6C3 SM OMITP4MM
1PP6C5 OMITSMP4MM
1PP6C4 SM OMITP4MM
1PP6C6 SM OMITP4MM
1PP610P4MMOMITSM
1PP6C8 SM OMITP4MM
1PP6C7 OMITP4MM
SM
1PP6D0 OMITP4MM
SM
1PP6D1P4MMOMITSM
1PP6D3P4MMOMITSM
1PP6D2 SM OMITP4MM
1PP6D4 SM OMITP4MM
1PP6D5 SM OMITP4MM1PP6D6 SM OMITP4MM
1PP611 SM OMITP4MM
1PP6D8 SM OMITP4MM
1PP6D7 SM OMITP4MM
1PP6D9 SM OMITP4MM1PP6E0P4MMOMITSM
1PP9000P4MM
SM OMIT1PP9001 SM
P4MMOMIT
1PP9006 SM OMITP4MM
1PP9005 OMITSMP4MM
1PP9004 SMP4MMOMIT
1PP612P4MMOMITSM
1PP9003P4MMOMITSM
1PP9002P4MMOMITSM
1PP9011 SM OMITP4MM
1PP9010P4MMOMITSM
1PP9009 SM OMITP4MM
1PP9008P4MMOMITSM
1PP9007P4MMOMITSM
1PP9015P4MM
SM OMIT1PP9016 SM OMIT
P4MM
1PP9014P4MMOMITSM
1PP613 SMP4MMOMIT
1PP9013 SM OMITP4MM
1PP9012P4MMOMITSM
1PP9022 SM OMITP4MM
1PP9021 SM OMITP4MM
1PP9020 SMP4MMOMIT
1PP8700P4MMOMITSM
1PP8701 SM OMITP4MM1PP8702 SMP4MMOMIT
1PP8703 OMITP4MM
SM
1PP8704 OMITP4MM
SM
1PP614P4MMOMITSM
1PP8705P4MMOMITSM
1PP8706 OMITSMP4MM1PP8707P4MM
SM OMIT1PP8708
P4MMSM OMIT1PP8709 SM
P4MMOMIT
1PP8711 OMITP4MM
SM
1PP8710 OMITSMP4MM
1PP8712 OMITP4MM
SM
1PP8713P4MM
SM OMIT1PP8714
P4MMOMITSM
1PP615 SM OMITP4MM
1PP8715 SM OMITP4MM1PP8716 SM OMITP4MM
1PP8720 SM OMITP4MM1PP8721P4MMOMITSM
1PP8722 OMITP4MM
SM
1PP9027P4MMOMITSM
1PP9026 SM OMITP4MM
1PP9025P4MMOMITSM
1PP9024 OMITSMP4MM
1PP9023 OMITP4MM
SM
1PP616P4MM
SM OMIT
1PP9032P4MMOMITSM
1PP9031 SM OMITP4MM
1PP9030P4MMOMITSM
1PP9029 SM OMITP4MM
1PP9028P4MMOMITSM
1PP9033 SM OMITP4MM1PP9034P4MMOMITSM
1PP9036P4MM
SM OMIT
1PP9035 SM OMITP4MM
1PP8723 OMITP4MM
SM
1PP601P4MMOMITSM
1PP617 SM OMITP4MM
1PP8724 SM OMITP4MM1PP8725 OMITSMP4MM1PP8726P4MM
SM OMIT1PP8727 SM
P4MMOMIT
1PP8728 SMP4MMOMIT
1PP8730 OMITSMP4MM
1PP8729 SMP4MMOMIT
1PP8732 SM OMITP4MM
1PP8731 SMP4MMOMIT
1PP8733 SMP4MMOMIT
1PP618 OMITSMP4MM
1PP8734 SMP4MMOMIT
1PP8735 SMP4MMOMIT
1PP8736 SMP4MMOMIT
1PP8900 SMP4MMOMIT
1PP8901 OMITSMP4MM1PP8902 SM OMITP4MM
1PP8904 SMP4MMOMIT
1PP8903P4MMOMITSM
1PP8905P4MM
SM OMIT1PP8906 SM OMIT
P4MM
1PP619 SM OMITP4MM
1PP8907P4MM
SM OMIT
1PP8909 SMP4MMOMIT
1PP8908 OMITSMP4MM
1PP8910 SMP4MMOMIT
1PP8911 SMP4MMOMIT
1PP8912 SMP4MMOMIT
1PP8913 SMP4MMOMIT
1PP8914P4MMOMITSM
1PP8915 SM OMITP4MM1PP8916 SM OMITP4MM
1PP632 OMITSMP4MM
1PP8920 SMP4MMOMIT
1PP8921P4MMOMITSM
1PP8922 SM OMITP4MM1PP8923P4MMOMITSM
1PP8924 SM OMITP4MM1PP8925P4MMOMITSM
1PP8926 SM OMITP4MM1PP8927P4MMOMITSM
1PP8928P4MMOMITSM
1PP8929 SM OMITP4MM
1PP631 OMITSMP4MM
1PP8930P4MMOMITSM
1PP8931 SM OMITP4MM1PP8932P4MMOMITSM
1PP8933 SM OMITP4MM1PP8934P4MMOMITSM
1PP8935 SM OMITP4MM1PP8936 SM OMITP4MM
1PP6E1 SM OMITP4MM
1PP634P4MM
SM OMIT
1PP1200SM-TP50-TOP
1PP1201SM-TP50-TOP
1PP1202SM-TP50-TOP
1PP700SM-TP50-TOP
1PP702SM-TP50-TOP
1PP701SM-TP50-TOP
1PP2800SM-TP50-TOP
1PP633 SM OMITP4MM
1PP2801SM-TP50-TOP
1PP2802SM-TP50-TOP
58 59 60
58 59 60
58 59 60
58 59 60
58 60
7 11 59
7 11 59
7 11 59
7 11 59
7 11 59
58 59 60
58 59 60
6 26 59 65 66 76 77 79 80 81 83
6 59 79 80 81 83
6 78 79 80 81 83 88
6 79
6 75 76
1PP635 SM OMITP4MM
21 24 25 26
59
59
26
1
ZH500HOLE-VIA
1
ZH501HOLE-VIA
1
ZH502HOLE-VIA
1
ZH503HOLE-VIA
1
ZH504HOLE-VIA
1
ZH505HOLE-VIA
1
ZH506HOLE-VIA
1
ZH507HOLE-VIA
1PP602P4MM
SM OMIT
1PP636P4MMOMITSM
1
ZH508HOLE-VIA
1
ZH509HOLE-VIA
1
ZH510HOLE-VIA
1
ZH511HOLE-VIA
1
ZH512HOLE-VIA
1PP637 SMP4MMOMIT
1
ZH513HOLE-VIA
1
ZH514HOLE-VIA
1
ZH515HOLE-VIA
1
ZH516HOLE-VIA
1PP638P4MMOMITSM
1
ZH517HOLE-VIA
1
ZH518HOLE-VIA
1
ZH519HOLE-VIA
1
ZH520HOLE-VIA
1
ZH521HOLE-VIA
1PP640P4MM
SM OMIT
1
ZH522HOLE-VIA
1
ZH523HOLE-VIA
1
ZH524HOLE-VIA
1
ZH525HOLE-VIA
1
ZH526HOLE-VIA
1PP639 SM OMITP4MM
1
ZH527HOLE-VIA
1
ZH528HOLE-VIA
1
ZH529HOLE-VIA
1PP8400 SM OMITP4MM1PP8401P4MMOMITSM
1PP4100 SM OMITP4MM1PP4101P4MMOMITSM
1PP641 SM OMITP4MM
1PP5E1P4MMOMITSM
1PP5E2 SM OMITP4MM
34
29
29
1PP642P4MMOMITSM
1PP643 SM OMITP4MM
1PP645 SM OMITP4MM
1PP644P4MMOMITSM
1PP603 SMP4MMOMIT
1PP648P4MMOMITSM
1PP646P4MMOMITSM
1PP647 SMP4MMOMIT
1PP650P4MMOMITSM
1PP649 SM OMITP4MM
1PP652P4MMOMITSM
1PP651 SM OMITP4MM
1PP653 SM OMITP4MM1PP654 SM OMITP4MM1PP655P4MMOMITSM
1PP620 SM OMITP4MM
1PP657P4MMOMITSM
1PP656P4MM
SM OMIT
1PP658 SM OMITP4MM
1PP660 SM OMITP4MM
1PP659P4MMOMITSM
1PP662 SM OMITP4MM
1PP661P4MM
SM OMIT
1PP663P4MMOMITSM
1PP623P4MMOMITSM
1PP622 SM OMITP4MM
1PP621P4MMOMITSM
1PP625P4MMOMITSM
1PP624 SM OMITP4MM
1PP626 SM OMITP4MM1PP627P4MMOMITSM
1PP628 SM OMITP4MM
1PP629P4MMOMITSM
1PP630 SM OMITP4MM
1PP664 SM OMITP4MM
1PP666 SM OMITP4MM
1PP665P4MMOMITSM
1PP604P4MMOMITSM
1PP667 SM OMITP4MM1PP668P4MMOMITSM
1PP673P4MMOMITSM
1PP674 SM OMITP4MM
1PP675 SM OMITP4MM
1PP677P4MMOMITSM
1PP605 OMITP4MM
SM
1PP676 SM OMITP4MM
1PP678 SM OMITP4MM1PP679P4MMOMITSM
1PP680 SM OMITP4MM
1PP682 SM OMITP4MM
1PP681P4MMOMITSM
1PP683P4MMOMITSM
1PP684 SM OMITP4MM1PP685P4MMOMITSM
1PP686P4MMOMITSM
1PP606 OMITP4MM
SM
1PP688P4MMOMITSM
1PP687 SM OMITP4MM
1PP689 SM OMITP4MM1PP690P4MMOMITSM
1PP691 SM OMITP4MM
1PP693 OMITSMP4MM
1PP692P4MMOMITSM
1PP694P4MMOMITSM
1PP695 SM OMITP4MM1PP696 SM OMITP4MM
095 111
051-6949
FUNC TEST 1 OF 2
FUNC_TEST=TRUE
NO_TEST=TRUETP_PCI_CLK_SPARE
NO_TEST=TRUETP_MEM_B_A<14>
NO_TEST=TRUETP_MEM_B_A<15>
FB_B_MA<3>
FB_A_WDQS<1>
FB_A_WE_L<1>
FB_A_WDQS<6>
DRAM_RST
FB_A_DQ<40>
FB_A_RAS_L<0>
FUNC_TEST=TRUESW_RST_BTN_L
FUNC_TEST=TRUEXDP_TDO
DMI_N2S_N<0>
PM_CLKRUN_L
FUNC_TEST=TRUEPP3V3_S5_SB_RTC
FUNC_TEST=TRUEPOWER_BUTTON_L
FUNC_TEST=TRUESMC_MANUAL_RST_L
FUNC_TEST=TRUESMC_RX_L
FUNC_TEST=TRUEXDP_TRST_LFUNC_TEST=TRUEXDP_TMS
FUNC_TEST=TRUEXDP_TDIFUNC_TEST=TRUEXDP_TCK
FUNC_TEST=TRUEPPVCORE_CPU
FUNC_TEST=TRUEPP3V3_S5
FUNC_TEST=TRUEPP5V_S5
FUNC_TEST=TRUEPP12V_S5
FUNC_TEST=TRUEPP1V8_S3
FUNC_TEST=TRUESMC_TX_L
FUNC_TEST=TRUESMC_TRST_LFUNC_TEST=TRUESMC_TMSFUNC_TEST=TRUESMC_TDOFUNC_TEST=TRUESMC_TDIFUNC_TEST=TRUESMC_TCK
=PP1V8_S3_MEM
CPU_GTLREF
DMI_S2N_P<0>
MEM_B_DQS_P<2>
MEM_A_DQ<39>
MEM_VREF_NB_0
FB_A_RDQS<1>
FB_A_DQ<56>
FB_A_RDQS<3>
FSB_ADSTB_L<0>
FSB_DSTBP_L<1>
FSB_DSTBP_L<2>FSB_DSTBN_L<2>
FSB_DSTBN_L<3>
FSB_DINV_L<2>FSB_D_L<59>
FSB_DINV_L<3>FSB_DSTBP_L<3>
FSB_LOCK_LFSB_CPURST_L
FSB_HITM_LFSB_HIT_L
FSB_BNR_L
CPU_STPCLK_LCPU_INTR
CPU_A20M_LCPU_IGNNE_L
CPU_INIT_L
FSB_DINV_L<3>FSB_DSTBP_L<3>
FSB_D_L<59>
FSB_D_L<41>FSB_DSTBN_L<2>
FSB_DSTBN_L<1>FSB_D_L<16>
VR_PWRGOOD_DELAYNB_RST_IN_L_R
NB_CLK100M_GCLKIN_P
FSB_REQ_L<3>FSB_REQ_L<2>
FSB_DPWR_LFSB_REQ_L<0>
FSB_DBSY_L
SB_CLK100M_SATA_P
FSB_REQ_L<1>
FSB_LOCK_L
FSB_A_L<6>
FSB_ADSTB_L<1>FSB_A_L<27>FSB_ADSTB_L<0>
FSB_CLK_CPU_NFSB_CLK_CPU_P
CPU_SMI_LCPU_NMI
FB_A_DQ<40>
FB_A_RDQS<7>
FSB_DINV_L<1>
FSB_CLK_NB_N
FSB_DSTBN_L<1>
FSB_D_L<41>
FSB_DSTBP_L<2>FSB_DINV_L<2>
FSB_DSTBN_L<0>
FSB_A_L<27>
FSB_DSTBP_L<1>
MEM_A_DQ<7>MEM_A_DQ<14>MEM_A_DQ<16>MEM_A_DQ<25>
MEM_A_DQ<47>MEM_A_DQ<54>MEM_A_DQ<59>MEM_A_DQS_P<0>MEM_A_DQS_N<0>MEM_A_DQS_P<1>MEM_A_DQS_N<1>MEM_A_DQS_P<2>MEM_A_DQS_N<2>MEM_A_DQS_P<3>MEM_A_DQS_N<3>
MEM_A_DQS_N<4>MEM_A_DQS_P<4>
MEM_A_DQS_P<5>MEM_A_DQS_N<5>MEM_A_DQS_P<6>MEM_A_DQS_N<6>MEM_A_DQS_P<7>MEM_A_DQS_N<7>
MEM_B_DQ<6>MEM_B_DQ<8>MEM_B_DQ<23>MEM_B_DQ<25>MEM_B_DQ<38>MEM_B_DQ<44>MEM_B_DQ<48>
MEM_B_DQS_P<0>MEM_B_DQ<62>
MEM_B_DQS_N<1>
MEM_B_DQS_N<0>MEM_B_DQS_P<1>
MEM_B_DQS_N<2>MEM_B_DQS_P<3>MEM_B_DQS_N<3>
MEM_B_DQS_N<4>MEM_B_DQS_P<5>MEM_B_DQS_N<5>
MEM_B_DQS_N<6>MEM_B_DQS_P<6>
MEM_B_DQS_P<7>MEM_B_DQS_N<7>
MEM_VREF_NB_1
MEM_B_DQS_P<4>
NB_CLK100M_GCLKIN_N
DMI_S2N_N<0>
NB_FSB_VREF
=PP1V05_S0_FSB_NB
FSB_DSTBP_L<0>
MEM_VREF
IDE_PDIORDY
PCI_CLK_SB
IDE_PDD<9>
SB_CLK100M_SATA_N
IDE_PDIOR_L
FSB_BREQ0_L
FB_A_DQ<24>
FB_A_DQ<48>
FB_A_RDQS<4>FB_A_RDQS<5>
FB_A_RDQS<0>
FB_A_RDQS<2>
FB_A_DQ<8>
FB_A_RDQS<6>
FB_A_CLK_P<1>
FB_A_CS_L<1>FB_A_CLK_N<1>
FB_A_CAS_L<1>FB_A_RAS_L<1>FB_A_MA<3>
FB_A_WDQS<5>
FB_A_WDQS<4>
FB_A_DQ<32>FB_A_WDQS<7>
FB_A_DQ<48>FB_A_DQ<56>
FB_A_CKE<0>FB_A_CLK_P<0>FB_A_CLK_N<0>
FB_A_WE_L<0>FB_A_CS_L<0>
FB_A_CAS_L<0>FB_A_MA<3>
FB_A_WDQS<0>DRAM_RST
FB_A_WDQS<3>FB_A_WDQS<2>
FB_A_DQ<8>FB_A_DQ<16>FB_A_DQ<24>
FB_B_CKE<1>
FB_B_CS_L<1>FB_B_CLK_N<1>FB_B_CLK_P<1>
FB_B_CAS_L<1>FB_B_WE_L<1>
FB_B_RAS_L<1>
DRAM_RSTFB_B_MA<3>
FB_B_WDQS<5>FB_B_WDQS<6>FB_B_WDQS<7>
FB_B_DQ<32>FB_B_WDQS<4>
FB_B_DQ<40>FB_B_DQ<48>FB_B_DQ<56>
FB_B_CKE<0>
FB_B_CLK_N<0>FB_B_CLK_P<0>
FB_B_WE_L<0>FB_B_CS_L<0>
FB_B_CAS_L<0>
FB_B_MA<3>FB_B_RAS_L<0>
DRAM_RSTFB_B_WDQS<0>FB_B_WDQS<1>
FB_B_WDQS<2>FB_B_WDQS<3>
FB_B_DQ<0>FB_B_DQ<8>FB_B_DQ<16>FB_B_DQ<24>
FB_B_DQ<0>FB_B_DQ<8>FB_B_DQ<16>
FB_B_DQ<40>FB_B_DQ<48>FB_B_DQ<56>
FB_B_RDQS<0>FB_B_RDQS<1>
FB_B_RDQS<3>FB_B_RDQS<2>
FB_B_RDQS<4>
FB_B_RDQS<6>FB_B_RDQS<5>
FB_B_RDQS<7>
GPU_CLK100M_PCIE_NGPU_CLK100M_PCIE_P
ENET_CLK100M_PCIE_NENET_CLK100M_PCIE_P
PCIE_A_D2R_NPCIE_A_D2R_P
PCIE_B_D2R_PPCIE_B_D2R_N
DMI_N2S_P<0>
SB_CLK100M_DMI_PSB_CLK100M_DMI_N
PM_SYSRST_L
SB_CLK14P3M_TIMERSB_CLK48M_USBCTLR
FB_A_DQ<16>
FB_A_MA<3>
FB_B_DQ<24>FB_B_DQ<32>
FB_A_DQ<32>FSB_ADSTB_L<1>
FSB_A_L<6>
FSB_D_L<16>
FSB_CLK_NB_P
FSB_REQ_L<4>
FSB_DSTBN_L<3>
FSB_D_L<0>
FSB_DINV_L<1>
FSB_DINV_L<0>
FSB_D_L<0>FSB_DSTBN_L<0>
FSB_DSTBP_L<0>FSB_DINV_L<0>
FB_A_DQ<0>
FB_A_CKE<1>
FB_A_DQ<0>
=PP1V05_S0_CPU59
67
11
90
60
90
90
90
9
90
89
89
58
29
89
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
75
12
12
12
12
12
89
12
12
12
12
12
12
12
12
19
12
89
89
89
89
89
89
89
89
89
89
89
89
89
90
90
90
90
90
90
89
90
90
90
90
90
90
90
90
90
90
58
89
89
90
90
89
12
12
12
12
12
12
12
12
12
12
12
89
89
8
87
89
89
89
88
87
89
22
44
28
22
29
28
19
89
87
89
7
7
7
7
7
7
7
7
7
7
11
12
12
12
21
21
21
21
21
7
7
7
7
7
7
7
26
34
12
12
12
12
12
34
12
7
7
7
7
7
34
34
21
21
87
89
7
34
7
7
7
7
7
7
7
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
19
29
34
22
12
7
29
38
34
38
34
38
12
87
87
89
89
89
89
87
89
89
89
89
89
89
87
89
89
87
89
87
87
89
89
89
89
89
89
87
89
88
89
89
87
87
87
90
90
90
90
90
90
90
88
87
90
90
90
87
90
87
87
87
90
90
90
90
90
90
87
90
88
90
90
90
90
87
87
87
87
87
87
87
87
87
87
90
90
90
90
90
90
90
90
84
84
41
41
41
41
53
53
22
34
34
26
34
34
87
87
87
87
87
7
7
7
34
12
7
7
7
7
7
7
7
7
87
89
87
7
5
87
87
87
5
5
87
14
23
6
7
14
15
15
14
87
5
87
5
5
5
5
5
5
5
5
5
5
7
7
7
7
7
7
7
7
7
5
5
5
5
5
5
5
14
14
14
7
7
7
7
7
21
7
5
5
5
5
5
7
7
7
7
5
87
5
12
5
5
5
5
5
5
5
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
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15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
14
15
14
14
12
6
5
28
21
22
21
21
21
7
5
5
87
87
87
87
5
87
87
87
87
87
87
5
87
87
5
87
5
5
87
87
87
87
87
87
5
87
5
87
87
5
5
5
87
87
87
87
87
87
87
5
5
87
87
87
5
87
5
5
5
87
87
87
87
87
87
5
87
5
87
87
87
87
5
5
5
5
5
5
5
5
5
5
87
87
87
87
87
87
87
87
34
34
34
34
22
22
22
22
14
22
22
23
23
23
5
5
5
5
5
5
5
5
12
7
5
5
5
5
5
5
5
5
5
87
5
6
www.vinafix.vn
125
125
125
125
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
IN
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
P/N 518-0189
"S0" RAILS
PU ON PAGE 76 IS USED
"S3" RAILSON IN RUN AND SLEEP
ONLY ON IN RUN
SILKSCREEN:2 SILKSCREEN:RUNSILKSCREEN:1
CHASSIS GND
GND RAILS
"S5" RAILSALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)
0
21
XW601NOSTUFFSM
21
XW602NOSTUFFSM
314
17
2
U600
TSSOP
CRITICAL
74LC125
2
1 C600
CERM10V20%
402
0.1UF
2
1
LED601DEVELOPMENT
GREEN-3.6MCD2.0X1.25MM-SM
21
XW604OMITSM
21
XW605OMITSM
9
87
65
43
2
1211
10
1
J600HM9606E-P2
M-RT-TH
CRITICAL
1
ZH6014P25R3P5
OMIT
1
ZH6024P25R3P5
OMIT
1
ZH6034P25R3P5
OMIT2
1 C601
402
16VCERM
0.01UF20%
NOSTUFF
2
1 C60220%16V
402CERM
0.01UF
NOSTUFF
2
1 C603
402
20%16VCERM
0.01UF
NOSTUFF
2
1R601
402
NOSTUFF
MF-LF1/16W5%10K
2
1R602
603MF-LF1/10W5%330
DEVELOPMENT
21
R603NOSTUFF
0
1/16WMF-LF402
5%
1
ZH6044P25R3P5
OMIT
2
1 C60416V
0.01UF20%
402CERM
NOSTUFF
1
ZH606160R138
OMIT
614
47
5
U600
TSSOP
CRITICAL
74LC125
814
107
9
U600CRITICAL
TSSOP
74LC125
1114
137
12
U600
TSSOP
CRITICAL
74LC125
21
R612
4025%
68
1/16WMF-LF
21
R611
4025%
68
MF-LF1/16W
21
R614
5%402
1/16WMF-LF
68
21
R615
4025%
68
MF-LF1/16W
21
R616
5%402
68
1/16WMF-LF
21
R617
4025%
68
MF-LF1/16W
4
5
3
2
U601
SOT23-5
74LVC1G04DBVG42
1 C610CERM
0.1UF20%
40210V
21
R618
4025% 1/16W
MF-LF
68
21
R619
1/16WMF-LF402
5%
68
2
1R600DEVELOPMENT
603MF-LF1/10W5%330
2
1
LED602DEVELOPMENT
GREEN-3.6MCD2.0X1.25MM-SM
2
1R6053305%1/10WMF-LF603
DEVELOPMENT
2
1
LED600DEVELOPMENT
2.0X1.25MM-SMGREEN-3.6MCD
2
1 C699330UF6.3VELECCASE-C1
20%
09
1116
051-6949
Power Conn / Alias
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
VOLTAGE=0
=PP1V5_S0_NB_PCIE=PP1V5_S0_CPU
=PP1V5_S0_SB_VCC1_5_A_USB_CORE=PP1V5_S0_SB_VCC1_5_A=PP1V5_S0_SB
=PP3V3_S0_NB_PM=PP3V3_S0_NB_VCC_HV
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.6MMVOLTAGE=1.5VMAKE_BASE=TRUE
PP1V5_S0
=PP2V5_S0_NB_VCCA_3GBG
VOLTAGE=1.05V
MIN_NECK_WIDTH=0.15MM
MAKE_BASE=TRUEPP1V05_S0
MIN_LINE_WIDTH=0.3MM
SYS_POWERFAIL_L
SYS_PWRUP_L
PP12V_S0
PP3V3_S5
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.15MM
VOLTAGE=3.3VMIN_LINE_WIDTH=0.6MM
PP2V5_S0
=PP1V5_S0_NB_VCCD_HMPLL
=PP1V5_S0_NB_3GPLL
PP5V_S5
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMVOLTAGE=5VMAKE_BASE=TRUE
PP3V3_S5
=PP3V3_S5_DEBUG
=PP5V_S0_DEBUG
GPU_PWM_RST_L
=PP3V3_S3_VGASYNC=PP3V3_S3_USB
=PP12V_S0_AUDIO_SPKRAMPMAKE_BASE=TRUE
PP12V_S0_AUDIO_SPKRAMP
MAKE_BASE=TRUEPP5V_S0_AUDIO =PP5V_S0_AUDIO
=PP3V3_S3_BT
VOLTAGE=5VMIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25MM
PP5V_S3=PP5V_S3_BNDI=PP5V_S3_USB
=PP3V3_S0_SB_PCI
=PP3V3_S0_2V5REG=PP3V3_S0_AIRPORT
=PP3V3_S0_AUDIO
=PP3V3_S0_CK410
=PP3V3_S0_FAN=PP3V3_S0_HD_TSENS
=PP3V3_S0_IMVP
=PP3V3_S0_NB
=PP3V3_S0_NB_TVDAC
=PP3V3_S0_ODD_TSENS
=PP3V3_S0_PATA
=PP3V3_S0_PCI
=PP3V3_S0_SB
=PP3V3_S0_SB_3V3_1V5_VCCHDA
=PP3V3_S0_SB_GPIO
=PP3V3_S0_SB_PM
=PP3V3_S0_SB_VCC3_3
=PP3V3_S0_SB_VCC3_3_IDE=PP3V3_S0_SB_VCC3_3_PCI
=PP3V3_S0_SB_VCCLAN3_3
=PP3V3_S0_TPM=PPSPD_S0_MEM
MIN_NECK_WIDTH=0.15MM
MAKE_BASE=TRUEVOLTAGE=3.3VMIN_LINE_WIDTH=0.6MM
PP3V3_S0
PP3V3_S0
=PP1V5_S0_SB_VCC1_5_A_ATX
=PP5V_S5_SB
=PP3V3_S5_SB_VCCSUS3_3_USB
=PP3V3_S5_FW
=PP1V05_S0_NB_VTT
=PP5V_S0_MEMVTT
=PP3V3_S3_TPM=PP3V3_S3_ENET
=PP1V8_S0_MEMVTT=PP1V8_S3_MEM=PP1V8_S3_MEM_NB=PP1V8_S3_MEM_NB
MIN_NECK_WIDTH=0.2MM
VOLTAGE=1.8VMIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUEPP1V8_S3
MAKE_BASE=TRUEVOLTAGE=1.8VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
PP1V2_S3 =PP1V2_S3_LAN
=PP12V_S0_FAN
=PP5V_S0_SB
=PP1V05_S0_CPU=PPVCORE_S0_NB
=PP1V5_S0_SB_VCCSATAPLL
=PP1V5_S0_NB_TVDAC=PP1V5_S0_NB
=PP1V5_S0_NB_VCCAUX
=PP1V05_S0_SB_CPU_IO=PP1V05_S0_NB
=PPVCORE_S0_CPUMAKE_BASE=TRUEVOLTAGE=1.25VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.15MM
PPVCORE_CPU
=PP1V05_S0_FSB_NB
=PP0V9_S0_MEMVTT_LDO=PP0V9_S0_MEM_TERM
ITS_RUNNINGITS_ALIVE
PP3V3_S3
ITS_PLUGGED_IN
PP5V_S5
VOLTAGE=0MIN_LINE_WIDTH=0.6MM
GND_CHASSIS_BNDI
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.2MM
GND_CHASSIS_AUDIO_INTERNAL
ZH703P1
ZH702P1
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMVOLTAGE=0MAKE_BASE=TRUE
GND_CHASSIS_IO_RIGHT
GND_CHASSIS_RJ45GND_CHASSIS_VGAGND_CHASSIS_FIREWIRE
GND_CHASSIS_IO_LEFTMAKE_BASE=TRUEVOLTAGE=0MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
GND_CHASSIS_USB
GND_CHASSIS_AUDIO_EXTERNAL
GND_AUDIO_SPKRAMP
GND_AUDIO
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMVOLTAGE=12VMAKE_BASE=TRUE
PP12V_S5=PP12V_S5_CPU=PP12V_S5_FW
=PP3V3_S5_SMC
=PP3V3_S5_SB_IO
=PP3V3_S5_SB=PP3V3_S5_SB_USB=PP3V3_S5_SB_PM=PP3V3_S5_SB_VCCSUS3_3
=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA
PM_SLP_S3_L
DEBUG_RST_L
AIRPORT_RST_L
TPM_LRESET_L
ENET_RST_L
PEG_RESET_L
NB_RST_IN_L
SMC_LRESET_L
PLT_RST_L
PP3V3_S5
U600_11
U600_8
U600_3
U600_6
=PP1V5_S0_NB_VCCAUX
=PPVCORE_S0_SB
MIN_NECK_WIDTH=0.15MM
MAKE_BASE=TRUEVOLTAGE=5VMIN_LINE_WIDTH=0.6MM
PP5V_S0=PP5V_S0_PATA
PP12V_S5
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.6MMVOLTAGE=12VMAKE_BASE=TRUE
PP12V_S0
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.3MM
MAKE_BASE=TRUEVOLTAGE=0.9V
PP0V9_S0
=PP3V3_S5_ROM
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMVOLTAGE=3.3VMAKE_BASE=TRUE
PP3V3_S5
=PP3V3_S3_1V2REGMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMVOLTAGE=3.3VMAKE_BASE=TRUE
PP3V3_S3
=PP1V5_S0_NB_PLL
=PP1V5_S0_SB_VCC1_5_A_ARX
=PP1V5_S0_SB_VCCUSBPLL
=PP1V5_S0_AIRPORT
ZH701P1
ZH704P1
PP5V_S5
PP3V3_S0
PP5V_S0
83
83
83
83
81
81
81
81
80
80
80
80
79
79
79
79
77
77
88
88
88
77
88
77
88
76
83
76
76
76 83
83
76
83
76
83
76
66
81
66
61
61
59
81
81
66
81
66
81
61
65
80
65
59
59
11
80
80
88
65
97
80
65
80
59
97
59
79
59
74
41
41
19
19
9
19
83 79
79
79
59
19
94
79
59
83
79
41
94
88
26
59
26
73
66
20
26
26
46
43
29
16
16
8
17
25
76 76
19
59 59
78
26
77
26
17
88
78
88
26
59
59
26
88
19
25
25
19
19
81
76
6
88
19
6
6
83
72
34
65
19
25
25
23
25
25
25
25
29
10
10
25
25
45
19 42
28
14
14 79
66
7
19
25
16
24
9 75
12
53 6
74
74
6
59
27
25
23
25
58
6
16
25
75
6
76
6
53
25
25
6
10
75
13
8
24
24
25
17
80
17
34 76
6
5
77
17
19
5
5
60
60
94
97
49
72
68
47
59
47
47
26
77
53
68
33
59
66
75
14
19
66
38
44
22
24
21
26
24
24
24
24
67
28
6
6
24
25
24
44
17
31
67
41
31
5
6
6 5
77 42
65
25
5
16
24
19
19
6
21
19
8 5
5
31
30
6 5
47
73
43
97
46
47
73
72
74
5
76
46
58
22
23
22
11
24
24
23
60
53
67
42
84
14
58
22
5
6
24
6
38
5
6
79
63
5
77
6
19
24
24
53
5
6
6
www.vinafix.vn
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IN
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
IN
IN
IN
IN
IN
IN
IN
IN
OUT
IN
A3*A4*
A5*
A6*
A8*
A10*
A11*A12*
A13*
A16*
A15*A14*
ADSTB0*
REQ2*
REQ0*REQ1*
REQ3*REQ4*
A17*
A18*
A19*A20*
A21*
A23*
A22*
A24*A25*
A26*
A29*
A28*A27*
A31*A30*
ADSTB1*
A20M*FERR*
IGNNE*
STPCLK*
LINT1LINT0
SMI*
RSVD10
RSVD9
RSVD5RSVD4
RSVD3RSVD2
RSVD1
RSVD8RSVD7
RSVD6
RSVD11
ADS*BNR*
BPRI*
DEFER*DRDY*
DBSY*
BR0*
IERR*
INIT*
LOCK*
RESET*RS0*
RS1*RS2*
TRDY*
HIT*
HITM*
BPM0*
BPM2*BPM1*
BPM3*
PRDY*PREQ*
TCKTDI
TDO
TMSTRST*
DBR*
PROCHOT*
THERMDA
THERMDC
THERMTRIP*
RSVD12
RSVD13
RSVD16
RSVD19
RSVD18RSVD17
RSVD20
BCLK0BCLK1
RSVD15RSVD14
A7*
A9*
ADDR GROUP0
XDP/ITP SIGNALS
CONTROL
ADDR GROUP1
RESERVED
HCLK
THERM
(1 OF 4)
PSI*SLP*
PWRGOOD
DPRSTP*
DPSLP*DPWR*
COMP2COMP3
COMP1
COMP0
DSTBP3*
DSTBN3*
DINV3*
D63*D62*
D61*D60*
D59*
D58*D57*
D56*
D55*D54*
D52*
D53*
D51*
D50*D49*
D48*
DINV2*
DSTBN2*
D47*
DSTBP2*
D45*D46*
D44*D43*
D42*
D41*D40*
D39*
D38*D37*
D36*
D35*D34*
D33*D32*
BSEL2
DSTBN1*
BSEL0BSEL1
TEST2
GTLREF
DINV1*DSTBP1*
D31*D30*
D29*
D26*
D27*
D28*
D24*
D25*
D23*
D21*
D22*
D20*D19*
D18*
D16*
D17*
DINV0*
DSTBP0*DSTBN0*
D15*
D14*D13*
D12*D11*
D10*
D9*D8*
D7*
D6*D5*
D4*
D3*D2*
D1*D0*
TEST1
NC
(2 OF 4)
MISC
DATA GRP0
DATA GRP2
DATA GRP1
DATA GRP3
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
LAYOUT NOTE: 0.5" MAX LENGTH
PIN ACTUALLY DRIVEN BY ITPDUMMY PINNOTE:
PLACE GND VIA W/IN 1000 MILS
SPARE[7-0],HFPLL:
ROUTE TO TP VIA AND
STUB)
WITHOUT T-ING (NO
ICH6-M AND GMCH
PM_THRMTRIP#
SHOULD CONNECT TO
PLACE TESTPOINT ON
0.1" AWAY
CPU SCH AND PCB
SYMBOL NEED TO CHECK
FSB_IERR# WITH A GND
ON ITP SIGNALS?
NO SPACE FOR ITP
CONNECTOR, NEED TERM
CPU_PROCHOT_L TO SMC
AND CPU VR TO INFORM
CPU IS HOT
TRACE LENGTH SHORTER THAN 0.5".
TRACE LENGTH SHORTER THAN 0.5".
COMP0,2 CONNECT WITH ZO=27.4OHM, MAKE
COMP1,3 CONNECT WITH ZO=55OHM, MAKE
LAYOUT NOTE:
2
1R0703
1/16W1%
402MF-LF
54.9
NOSTUFF
2
1R0704
MF-LF402
5%1/16W
68
2
1R07051K
MF-LF402
1%1/16W
2
1R07062.0K
MF-LF402
1%1/16W
21
R0720
1/16W1%
402MF-LF
54.9
21
R0721
1/16W
402MF-LF
54.9
1%
21
R0722
1/16W1%
402MF-LF
54.9
21R0719 54.94021%
21R0718 27.4
21R0717 54.94021%
21R0716402
27.4
21
R0730NOSTUFF
402
0
2
1R0712NOSTUFF
1/16W5%
402MF-LF
1K
2
1R070751
1/16W5%
402MF-LF
AB6
G2
AB5
C7
A25
A24
AB3
AA6
AC5
D5
A3
B2
V3
T2N5
M4
AA3AB2
C24
AA4
C23
D22
AF1C1
D3
F6D2
T22
B25
C3
AA1
G3
F4F3
B1
L5
J3K2
H2
K3
D21
AC1
AC2
H4
B4
C6
B3
C4
D20
E4G6
A5
F21
H5
E1
C20
F1
G5
AC4AD1
AD3AD4
E2
A21
A22
V4
L2
H1
J1
N2M1
K5
M3L4
Y1
W2
J4
Y4
W5
W3T3
T5
R4U2
Y5
U4
A6
W6
R3U5
Y2
R1P1
P4L1
P2
P5N3
J0700OMIT
YONAH-SKTCPUBGA
D25
C26
D7D6
AE6
A2
AD26
AE24
Y25
N25
G22
AD23
W24
M24
H23
D24
B5E5
AC20
V23
M26
J26
G24
K24E23
AF26
AF22AF25
AE25
E25
AD21
AE21
AD24AF23
AE22
AD20AC25
AB21
AA21AB22
G25
AC23AC22
AA24
AC26
Y22Y26
AA26
Y23W22
AB25
F23
U22
U25
U23W25
V26
V24AB24
AA23
N24
T25
H22
L26
R24T24
P23
P22P25
M23
L23L22
L25
E26
R23P26
K25N22
H25
K22
F26H26
J23
J24
F24
E22
V1
U1U26
R26
C21
B23
B22
J0700
OMIT
YONAH-SKTCPUBGA
2
1R0702
402
1/16W1%
MF-LF
54.9
CPU 1 OF 2-FSBSYNC_MASTER=MASTER
7
09051-6949
111
SYNC_DATE=05/03/2005
FSB_DINV_L<0>
XDP_BPM_L<3>
CPU_PWRGDXDP_TDI
XDP_TCK
XDP_TMS
=PP1V05_S0_CPU
=PP1V05_S0_CPU
FSB_A_L<3>FSB_A_L<4>FSB_A_L<5>FSB_A_L<6>
FSB_A_L<8>FSB_A_L<9>FSB_A_L<10>FSB_A_L<11>FSB_A_L<12>FSB_A_L<13>
FSB_A_L<16>FSB_A_L<15>FSB_A_L<14>
FSB_ADSTB_L<0>
FSB_REQ_L<2>
FSB_REQ_L<0>FSB_REQ_L<1>
FSB_REQ_L<3>FSB_REQ_L<4>
FSB_A_L<17>FSB_A_L<18>FSB_A_L<19>FSB_A_L<20>FSB_A_L<21>
FSB_A_L<23>FSB_A_L<22>
FSB_A_L<24>FSB_A_L<25>FSB_A_L<26>
FSB_A_L<29>FSB_A_L<28>FSB_A_L<27>
FSB_A_L<31>FSB_A_L<30>
FSB_ADSTB_L<1>
CPU_A20M_LCPU_FERR_LCPU_IGNNE_L
CPU_STPCLK_L
CPU_NMICPU_INTR
CPU_SMI_L
TP_CPU_APM1_LTP_CPU_APM0_L
TP_CPU_A36_LTP_CPU_A35_LTP_CPU_A34_LTP_CPU_A33_LTP_CPU_A32_L
TP_CPU_A39_LTP_CPU_A38_LTP_CPU_A37_L
TP_CPU_HFPLL
FSB_ADS_LFSB_BNR_L
FSB_BPRI_L
FSB_DEFER_LFSB_DRDY_LFSB_DBSY_L
FSB_BREQ0_L
CPU_INIT_L
FSB_LOCK_L
FSB_CPURST_LFSB_RS_L<0>FSB_RS_L<1>FSB_RS_L<2>FSB_TRDY_L
FSB_HIT_LFSB_HITM_L
XDP_BPM_L<0>
XDP_BPM_L<2>XDP_BPM_L<1>
XDP_BPM_L<4>XDP_BPM_L<5>
XDP_TCKXDP_TDIXDP_TDOXDP_TMS
XDP_TRST_LXDP_DBRESET_L
CPU_THERMD_PCPU_THERMD_N
PM_THRMTRIP_L
TP_CPU_EXTBREF
TP_CPU_SPARE0
TP_CPU_SPARE6TP_CPU_SPARE5
FSB_CLK_CPU_PFSB_CLK_CPU_N
TP_CPU_SPARE1
FSB_A_L<7>
CPU_TEST1
FSB_D_L<0>FSB_D_L<1>FSB_D_L<2>FSB_D_L<3>FSB_D_L<4>FSB_D_L<5>FSB_D_L<6>FSB_D_L<7>FSB_D_L<8>FSB_D_L<9>FSB_D_L<10>FSB_D_L<11>FSB_D_L<12>FSB_D_L<13>FSB_D_L<14>FSB_D_L<15>
FSB_DSTBN_L<0>
FSB_D_L<17>FSB_D_L<16>
FSB_D_L<18>FSB_D_L<19>FSB_D_L<20>
FSB_D_L<22>FSB_D_L<21>
FSB_D_L<23>
FSB_D_L<25>FSB_D_L<24>
FSB_D_L<28>FSB_D_L<27>FSB_D_L<26>
FSB_D_L<29>FSB_D_L<30>FSB_D_L<31>
FSB_DSTBP_L<1>FSB_DINV_L<1>
CPU_TEST2
CPU_BSEL<1>CPU_BSEL<0>
FSB_DSTBN_L<1>
CPU_BSEL<2>
FSB_D_L<32>FSB_D_L<33>FSB_D_L<34>FSB_D_L<35>FSB_D_L<36>FSB_D_L<37>FSB_D_L<38>FSB_D_L<39>FSB_D_L<40>FSB_D_L<41>FSB_D_L<42>FSB_D_L<43>FSB_D_L<44>
FSB_D_L<46>FSB_D_L<45>
FSB_DSTBP_L<2>
FSB_D_L<47>FSB_DSTBN_L<2>
FSB_DINV_L<2>
FSB_D_L<48>FSB_D_L<49>FSB_D_L<50>FSB_D_L<51>
FSB_D_L<53>FSB_D_L<52>
FSB_D_L<54>FSB_D_L<55>FSB_D_L<56>FSB_D_L<57>FSB_D_L<58>FSB_D_L<59>FSB_D_L<60>FSB_D_L<61>FSB_D_L<62>FSB_D_L<63>
FSB_DINV_L<3>
FSB_DSTBN_L<3>FSB_DSTBP_L<3>
CPU_COMP<0>CPU_COMP<1>
CPU_COMP<3>CPU_COMP<2>
FSB_DPWR_LCPU_DPSLP_L
CPU_DPRSTP_L
FSB_SLPCPU_LCPU_PSI_L
FSB_DSTBP_L<0>
FSB_IERR_L
=PP1V05_S0_CPU
CPU_GTLREF
=PP1V05_S0_CPU
TP_CPU_SPARE2TP_CPU_SPARE3TP_CPU_SPARE4
TP_CPU_SPARE7
CPU_PROCHOT_L
59
59
59
59
11
11
11
11
9
9
9
9
59
59
59
8
8
59
59
59
8
8
11
11
11
7
7
12
11
11
59
11
59
59
7
7
12
7
7
7
6
6
12
12
12
12
12
12
12
12
12
21
21
21
21
21
21
12
12
12
21
12
11
12
12
7
7
11
7
11
26
21
34
34
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
75
12
6
6
5
11
21 5
5
5
5
5
12
12
12
5
12
12
12
12
12
12
12
12
12
5
5
5
5
5
5
12
12
12
12
12
12
12
12
12
12
12
12
5
12
12
5
5
21
5
5
5
5
5
12
5
12
12
12
5
5
5
5
5
12
12
12
12
5
5
11
11
11
11
11
5
5
5
5
5
11
10
10
14
5
5
12
5
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
5
12
5
12
12
12
12
12
12
12
12
12
12
12
12
12
12
5
5
34
34
5
34
12
12
12
12
12
12
12
12
12
5
12
12
12
12
12
5
12
5
5
12
12
12
12
12
12
12
12
12
12
12
5
12
12
12
12
5
5
5
5
21
21
12
75
5
5
5
5
59
www.vinafix.vn
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
VCC_67
VCC_64
VCC_66VCC_65
VCC_63VCC_62
VCC_61
VCC_59VCC_60
VCC_58
VCC_57VCC_56
VCC_54VCC_55
VCC_53
VCC_51VCC_52
VCC_49
VCC_50
VCC_48
VCC_47
VCC_46
VCC_44
VCC_45
VCC_43
VCC_41
VCC_42
VCC_40
VCC_39
VCC_38
VCC_36
VCC_37
VCC_33
VCC_35VCC_34
VCC_31
VCC_32
VCC_29VCC_30
VCC_28
VCC_26VCC_27
VCC_23
VCC_25
VCC_24
VCC_22VCC_21
VCC_20
VCC_18VCC_19
VCC_17
VCC_16VCC_15
VCC_13
VCC_14
VCC_12
VCC_10VCC_11
VCC_8
VCC_9
VCC_7
VCC_6
VCC_5
VCC_3
VCC_4
VCC_2VCC_1 VCC_68
VCC_69
VCC_71
VCC_70
VCC_72
VCC_74
VCC_76
VCC_75
VCC_78VCC_77
VCC_79
VCC_81
VCC_80
VCC_84
VCC_82VCC_83
VCC_86VCC_85
VCC_87
VCC_89VCC_88
VCC_90VCC_91
VCC_92
VCC_94VCC_93
VCC_95
VCC_96VCC_97
VCC_99
VCC_98
VCC_100
VCCP_1
VCCP_2
VCCP_3VCCP_4
VCCP_5
VCCP_6VCCP_7
VCCP_9
VCCP_8
VCCP_11
VCCP_10
VCCP_12
VCCP_13
VCCP_14
VCCP_16
VCCP_15
VCCA
VID0
VID1VID2
VID3
VID4VID5
VID6
VSSSENSE
VCCSENSE
VCC_73(3 OF 4)
VSS_82
VSS_83
VSS_84VSS_85
VSS_87VSS_86
VSS_88
VSS_89VSS_90
VSS_92
VSS_91
VSS_93
VSS_94
VSS_95
VSS_97
VSS_96
VSS_100
VSS_98
VSS_99
VSS_102
VSS_101
VSS_105
VSS_103VSS_104
VSS_106VSS_107
VSS_110
VSS_109VSS_108
VSS_111VSS_112
VSS_115VSS_114
VSS_113
VSS_116
VSS_117VSS_118
VSS_120VSS_119
VSS_123
VSS_121
VSS_122
VSS_124
VSS_125
VSS_128
VSS_126
VSS_127
VSS_129
VSS_130
VSS_133
VSS_131
VSS_132
VSS_134
VSS_135
VSS_138
VSS_136VSS_137
VSS_139VSS_140
VSS_141
VSS_143
VSS_142
VSS_146
VSS_144VSS_145
VSS_147VSS_148
VSS_151VSS_150
VSS_149
VSS_152VSS_153
VSS_156VSS_155
VSS_154
VSS_157
VSS_158VSS_159
VSS_161
VSS_160
VSS_162
VSS_1
VSS_2
VSS_3
VSS_5
VSS_4
VSS_6
VSS_7
VSS_8
VSS_10
VSS_9
VSS_11VSS_12
VSS_15
VSS_13
VSS_14
VSS_16VSS_17
VSS_18
VSS_19VSS_20
VSS_23VSS_22
VSS_21
VSS_24
VSS_25
VSS_28VSS_27
VSS_26
VSS_29
VSS_30
VSS_33
VSS_32
VSS_31
VSS_34
VSS_35
VSS_38
VSS_37VSS_36
VSS_39
VSS_40
VSS_41VSS_42
VSS_43
VSS_46
VSS_44VSS_45
VSS_47VSS_48
VSS_51
VSS_49VSS_50
VSS_52VSS_53
VSS_56
VSS_54
VSS_55
VSS_57
VSS_58VSS_59
VSS_60VSS_61
VSS_63
VSS_62
VSS_64
VSS_65
VSS_66
VSS_69
VSS_68
VSS_67
VSS_70
VSS_71
VSS_74
VSS_73
VSS_72
VSS_75
VSS_76
VSS_79
VSS_78VSS_77
VSS_80VSS_81
(4 OF 4)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
VCCA=1.5 ONLY
LAYOUT NOTE: CONNECT R0802-03
TO VCCSENSE_P/N WITH NO STUB
PROVIDE A TEST POINT (WITH NO STUB)
BETWEEN VCCSENSE AND VSSSENSE AT THE
LOCATION WHERE THE TWO 54.9 OHM
RESISTORS TERMINATE THE 55 OHM
TRANSMISSION LINE
TO CONNECT A DIFFERENCTIAL PROBE
LAYOUT NOTE:
2
1C0800
16V20%
402CERM
0.01UF
2
1 C0801
6.3V20%
603X5R
10UF
2
1R0803100
MF-LF402
1%1/16W
2
1R0802100
MF-LF402
1%1/16W
AE7
AE2AF2
AE3
AF4AE5
AF5
AD6
AF7
N21
M21K21
J21
M6K6
J6
G21
W21V21
T6
T21R6
R21
N6
V6
B26
AF18
AF17AF15
AF14
AF12AF10
AF9
AE20AE18
AE17
A20
AE15AE13
AE12AE10
AE9
AD18AD17
AD15
AD14AD12
A18
AD10
AD9AD7
AC18AC17
AC15
AC13AC12
AC9
AC7
A17
AB7
AB20
AB18
AB17AB15
AB14AB12
AB10
AC10AB9
A15
AA20
AA18AA17
AA15
AA13AA12
AA10AA9
AA7
F20
A13
F18
F17
F15F14
F12
F10F9
F7E20
E18
A12
E17E15
E13
E12E10
E9
E7D18
D17D15
A10
D14
D12D10
D9
C18C17
C15
C13C12
C10
A9
C9
B20
B18B17
B15
B14B12
B10
B9
AF20
B7
A7 J0700OMIT
CPUBGA
YONAH-SKT
V22
V5
V2U24
U21U6
U3
T26T23
T4B6
T1R25
R22
R5R2
P24P21
P6
P3
N26
A26
N23
N4
N1M25
M22
M5M2
L24
L21L6
A23
L3K26
K23
K4K1
J25
J22J5
J2
H24
A19
H21
H6H3
G26
G23G1
G4
F25F22
F2
A16
F19F16
F13F11
F8
F5E24
E21
E19E16
A14
E14
E11E8
E6E3
D26
D23D19
D16
D13
A11
D11
D8
D4D1
C25C22
C2
C19C16
C14
A8
C11C8
C5
AF24
AF21AF19
B24
AF16
AF13AF11
AF8
AF6AF3
AE26
AE23AE19
AE16
B21
AE14
AE11
AE8AE4
AE1
AD25AD22
AD19
AD16AD13
B19
AD11AD8
AD5
AD2AC24
AC21
AC19AC16
AC14
AC11
B16
AC8
AC6AC3
AB26
AB23AB19
AB16
AB13AB11
AB8
B13
AB4AB1
AA25AA22
AA19
AA16AA14
AA11
AA8AA5
B11
AA2
Y24Y21
Y6Y3
W26
W23W4
W1
V25
B8
A4 J0700OMIT
CPUYONAH-SKT
BGA
SYNC_DATE=05/03/2005
1118
09051-6949
SYNC_MASTER=MASTER
CPU 2 OF 2-PWR/GND
=PP1V5_S0_CPU
=PPVCORE_S0_CPU
=PP1V5_S0_CPU
CPU_VCCSENSE_N
CPU_VCCSENSE_P
=PPVCORE_S0_CPU=PPVCORE_S0_CPU
=PP1V05_S0_CPU
CPU_VID<0>CPU_VID<1>CPU_VID<2>CPU_VID<3>CPU_VID<4>CPU_VID<5>CPU_VID<6>
59 11
76
76 76
9
9
9 9
7
8
8
8
8 8
6
6
6
6
75
75
6 6
5
75
75
75
75
75
75
75
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PLACE INSIDE SOCKET CAVITYON L8 (NORTH SIDE SECONDARY)
VCCP CORE DECOUPLING
PRIMARY)
SOUTH SIDE SECONDARY
CAVITY ON L1 (SOUTH SIDEPLACE 6 INSIDE SOCKET
PRIMARY)
SECONDARY)
SECONDARY)
CAVITY ON L1 (NORTH SIDEPLACE 6 INSIDE SOCKET
PLACE 8 INSIDE SOCKET
CAVITY ON L8 (SOUTH SIDEPLACE 8 INSIDE SOCKET
VCC CORE DECOUPLING
CAVITY ON L8 (NORTH SIDE
CPU HEATSINK MOUNTING HOLES
2
1 C9006.3V20%22UF
X5R805
2
1 C90120%6.3V
22UF
X5R805
2
1 C9026.3V20%22UF
X5R805
2
1 C9046.3V20%22UF
X5R805
2
1 C905NOSTUFF
6.3V20%22UF
805X5R
2
1 C906
805
NOSTUFF
20%22UF6.3VX5R
2
1 C90720%6.3V
22UF
X5R805
2
1 C9086.3V20%22UF
X5R805
2
1 C90920%6.3V
22UF
X5R805
2
1 C91020%6.3V
22UF
X5R805
2
1 C91120%6.3V
22UF
X5R805
2
1 C9126.3V20%22UF
X5R805
2
1 C91320%22UF
X5R6.3V
805
2
1 C914
805
20%6.3V
22UF
X5R
2
1 C915
805
NOSTUFF
20%22UF
X5R6.3V
2
1 C916
805
NOSTUFF
20%6.3VX5R
22UF
2
1 C917
805
NOSTUFF
20%22UF6.3VX5R
2
1 C91820%6.3V
22UF
X5R805
2
1 C919
805
20%6.3V
22UF
X5R
2
1 C9206.3V20%22UF
X5R805
2
1 C921
805
NOSTUFF
20%22UF
X5R6.3V2
1 C922
805
20%22UF
X5R6.3V
2
1 C92320%22UF
X5R805
6.3V
2
1 C92420%6.3VX5R805
22UF
2
1 C925
805
NOSTUFF
20%6.3V
22UF
X5R
2
1 C92620%0.1UF
40210VCERM
2
1 C92820%6.3V
22UF
X5R805
2
1 C92920%6.3V
22UF
X5R805
2
1 C9306.3V20%22UF
X5R805
2
1 C9316.3V20%22UF
X5R805
2
1 C932
805
20%22UF
X5R6.3V
2
1 C934
CERM10V402
0.1UF20%
2
1 C93520%
40210VCERM
0.1UF2
1 C936
CERM10V402
0.1UF20%
2
1 C93720%0.1UF
40210VCERM 2
1 C938
CERM10V402
0.1UF20%
2
1 C93920%6.3V
22UF
X5R805
2
1 C903
805
20%
X5R6.3V
22UF
NOSTUFF
2
1 C940330UF20%6.3VELECCASE-C1
CRITICAL
3 2
1 C9412.5VTANTD2T
470UF20%
CRITICAL
3 2
1 C942CRITICAL
D2TTANT2.5V20%470UF
3 2
1 C943
D2TTANT2.5V
470UF20%
CRITICAL
3 2
1 C944
D2TTANT2.5V
470UF20%
CRITICAL
3 2
1 C945
D2TTANT2.5V
470UF20%
CRITICAL
3 2
1 C946
D2TTANT2.5V
470UF20%
CRITICAL
1
ZH6074P75R4
OMIT
2
1C950
16V20%
CERM
0.01UF
402
1
ZH6084P75R4
OMIT
2
1C951
16V20%
CERM
0.01UF
402
1
ZH6094P75R4
OMIT
2
1C952
16V20%
CERM
0.01UF
402
1
ZH6104P75R4
OMIT
2
1C953
16V20%
CERM
0.01UF
402
09051-6949
9 111
CPU DECAPS & VID<>
=PP1V05_S0_CPU
=PP1V05_S0_CPU
CPU_HS_ZH608 CPU_HS_ZH609CPU_HS_ZH607 CPU_HS_ZH610
=PPVCORE_S0_CPU
59
59
11
11
9
9
8
8
7
7
76
6
6
8
5
5
66
6
www.vinafix.vn
D+D-
ALERT*/
THM*
SCLKSDATA
VDD
GND
THM2* IO
IO
IO
IN
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TEMPORARILY REMOVED BOMOPTION=CPU_TSENS_EXT
CPU THERMAL SENSOR
NOTE: SYMBOL SHOULD BE SHOWN ADT7461A
THEN THIS SHOULD BE S5IF CPU T DIODE TO BE READ IN OFF STATE, NOTE:
ROUTE ON SAME LAYER WITH 0.254MM TRACE WIDTH & SPACING.
ADD GND GUARD TRACES FOR CPU_THERMD_P/N
LAYOUT NOTE:
LAYOUT NOTE:PLACE R1002 AND R1018 SUCH THAT THEY SHARE ONE PADPLACE R1017 AND R1019 SUCH THAT THEY SHARE ONE PAD
1
4
7
8
5
3
2
6
U1000ADT7461
MSOP
CRITICAL
21
R1002CPU_TSENS_INT
1/16W
402MF-LF
1%
499
2
1 C1000NOSTUFF
0.001UF50V20%
402CERM
2
1 C1001
16V10%
402X5R
0.1UF
21
R1017CPU_TSENS_INT
1/16W
402MF-LF
1%
499
2
1R100110K
MF-LF1/16W
402
5%
2
1R1000
1/16W5%
402MF-LF
10K
2
1
4
3
J1000SM-2MT-BLK-LF
CRITICAL
21
R1018CPU_TSENS_EXT
402
1/16W5%
MF-LF
0
21
R1019CPU_TSENS_EXT
402
0
MF-LF
5%1/16W
21
R1005NOSTUFF
0
MF-LF402
5%1/16W
11110
09051-6949
CPU TEMP SENSOR
PP3V3_S0
THRM_THM
=SMB_THRM_CLK
THRM_ALERT_L PM_THRM_L
THERM_DX_PTHERM_DX_N
CPU_THERMD_P
CPU_THERMD_N
THERM_DX_PTHERM_DX_N
CPU_THERMD_EXT_PCPU_THERMD_EXT_N
=SMB_THRM_DATA
88 76 61 59 41 26
58
6
59
23
10
10
7
7
10
10
59
www.vinafix.vn
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IO
IO
IO
IO
IO
IO
OUT
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ITP TCK SIGNAL LAYOUT NOTE:
CONNECTOR’S FBO PIN.TCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEXROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTOR’S TCK PIN TO CPU’S
518S0320
(TCK)
(FBO)
CPU ITP700FLEX DEBUG SUPPORT
(DEBUG PORT ACTIVE)(DBR#)
(DBA#)
NC
NC
NCINDICATE THAT ITP IS USING TAP I/F, NC IN 945GM CHIPSET SYSTEM.
TO ICH7M SYS_RST*, AND WITH SYSTEM RESET LOGIC(AND WITH RESET BUTTON)(DEBUG PORT RESET)
(FROM CK410M HOST 133/167MHZ)
21
R1100
MF-LF
22.6
1%1/16W
402
ITP
21
R1102ITP
402
1%
22.6
1/16WMF-LF
2
1R110354.91/16W1%
402MF-LF
ITP
2
1 C110016V402X5R10%0.1UF
ITP
2
1R1104240
402MF-LF
5%1/16W
ITP
9
8
7
6
5
4
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J1101F-RT-SM
52435-2872
ITP
2
1R11011/16W
402
54.91%
MF-LF
2
1R1106680
402
5%1/16WMF-LF
CPU ITP700FLEX DEBUGSYNC_DATE=5/23/05
051-6949 09
11 111
SYNC_MASTER=MASTER
XDP_DBRESET_L
XDP_TRST_L
ITPRESET_L
XDP_BPM_L<0>
XDP_BPM_L<1>
XDP_BPM_L<3>
XDP_TCK
CPU_XDP_CLK_NCPU_XDP_CLK_P
XDP_TCK
XDP_TMSXDP_TDI
XDP_TDO
=PP1V05_S0_CPU
XDP_BPM_L<2>
XDP_BPM_L<4>
XDP_BPM_L<5>
ITP_TDO
=PP1V05_S0_CPU
=PP3V3_S5_SB_PM
FSB_CPURST_L
59
59
11
11
9
9
59
59
8
8
11
11
59
59
7
7
12
26
7
7
7
7
6
6
23
7
7
7
7
7
5
34
34
5
5
5
5
7
7
7
5
6
5
www.vinafix.vn
IO
IO
IO
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
IO
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IN
IO
IN
IO
IO
HD4*
HD6*
HD16*
HTRDY*HSLPCPU*
HRS1*HRS0*
HHITM*HLOCK*
HHIT*
HDSTBP2*HDTSBP3*
HDSTBP1*HDSTBP0*
HDSTBN3*
HDSTBN1*HDSTBN2*
HDSTBN0*
HDINV2*HDINV3*
HDINV1*HDINV0*
HDVREFHDRDY*HDPWR*
HDEFER*HDBSY*
HCPURST*HBREQ0*HBPRI*HBNR*HAVREF
HCLKIN*HCLKIN
HYSWING
HYRCOMPHYSCOMP
HXSWINGHXSCOMPHXRCOMP
HA13*
HADS*HADSTB0*
HD3*HD2*HD1*HD0*
HD63*HD62*HD61*HD60*HD59*HD58*HD57*HD56*HD55*HD54*HD53*HD52*HD51*HD50*HD49*HD48*HD47*HD46*HD45*HD44*HD43*HD42*HD41*HD40*HD39*HD38*HD37*HD36*HD35*HD34*HD33*HD32*HD31*
HD29*HD28*HD27*HD26*HD25*HD24*HD23*HD22*HD21*HD20*HD19*HD18*HD17*
HD15*
HD10*HD11*HD12*HD13*HD14*
HD5*
HD7*HD8*HD9*
HA30*HA29*HA28*HA27*HA26*HA25*HA24*HA23*
HA31*
HA20*HA19*HA18*
HA16*HA15*HA14*
HA21*HA22*
HA17*
HA9*HA8*HA7*HA6*HA5*HA4*HA3*
HA10*HA11*HA12*
HADSTB1*
HREQ0*HREQ1*HREQ2*HREQ3*
HD30*
HREQ4*
HRS2*
(1 OF 10)
HOST
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
2
1C1211
402X5R16V10%
0.1uF
2
1R12112001%1/16WMF-LF402
2
1R12101001%1/16WMF-LF402
2
1R122054.9
1%1/16WMF-LF402
2
1R1221
402MF-LF1/16W
1%24.9
2
1R12252211%1/16WMF-LF402
2
1R12261%1/16WMF-LF402
100
2
1 C12260.1uF
402X5R16V10%
2
1 C1236
402X5R16V10%0.1uF
2
1R12352211%1/16WMF-LF4022
1R123054.9
1%1/16WMF-LF402
2
1R12361%1/16WMF-LF402
100
2
1R1231
402MF-LF1/16W
1%24.9
W1
U1
Y1
E4
E2
E1
E7
E3
D6
E6
B4
A8
F8
B8
G8
D8
B3
D4
D3
K13
AC5
AA5
T6
K3
AC4
Y5
T7
K4
H8
J9
AB10
U3
W8
J7
C3
A7
K1
K9
G2
AC8
AD4
AD10
AB5
G1
AC6
AD7
AC1
AD9
AD1
AC2
AB3
AC11
AB11
AC9
K2
AB4
AA1
Y8
AA10
AA6
AA2
AA7
AA4
W2
AB8
H3
Y10
W5
Y7
Y3
W3
W4
AA9
AB7
T5
W6
J6
T9
U5
W7
T4
T8
T1
W9
T11
U11
U9
H1
U7
T3
W11
T10
G4
K11
J3
H4
J8
K7
J1
F1
B7
AG1
AG2
C7
F6
C6
J13
C13
B9
E8
F9
G12
F11
G11
E11
C9
D14
C14
H9
A14
C12
B14
B12
F12
G13
E13
A13
A12
C11
A11
D12
F14
J15
H13
J14
D9
G14
J12
H11
U1200
OMIT
BGA
NB
945GM
SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
NB CPU Interface
09
12 111
051-6949
FSB_D_L<17>
FSB_DSTBN_L<2>FSB_DSTBN_L<3>
FSB_DSTBP_L<1>FSB_DSTBP_L<2>FSB_DSTBP_L<3>
FSB_DINV_L<0>
FSB_DSTBN_L<0>
FSB_DINV_L<1>FSB_DINV_L<2>
NB_FSB_VREF
FSB_D_L<1>FSB_D_L<2>
FSB_D_L<4>FSB_D_L<5>FSB_D_L<6>
FSB_D_L<10>FSB_D_L<9>FSB_D_L<8>FSB_D_L<7>
FSB_D_L<3>
FSB_D_L<0>
FSB_D_L<16>
FSB_TRDY_LFSB_SLPCPU_L
FSB_RS_L<1>FSB_RS_L<0>
FSB_HITM_LFSB_LOCK_L
FSB_HIT_L
FSB_DSTBP_L<0>
FSB_DSTBN_L<1>
FSB_DINV_L<3>
FSB_DRDY_LFSB_DPWR_LFSB_DEFER_LFSB_DBSY_L
FSB_CPURST_LFSB_BREQ0_LFSB_BPRI_LFSB_BNR_L
FSB_CLK_NB_NFSB_CLK_NB_P
NB_FSB_YSWING
NB_FSB_YRCOMPNB_FSB_YSCOMP
NB_FSB_XSWINGNB_FSB_XSCOMP
FSB_A_L<13>
FSB_ADS_LFSB_ADSTB_L<0>
FSB_D_L<63>FSB_D_L<62>FSB_D_L<61>FSB_D_L<60>FSB_D_L<59>FSB_D_L<58>FSB_D_L<57>FSB_D_L<56>FSB_D_L<55>FSB_D_L<54>FSB_D_L<53>FSB_D_L<52>FSB_D_L<51>FSB_D_L<50>FSB_D_L<49>FSB_D_L<48>FSB_D_L<47>FSB_D_L<46>FSB_D_L<45>FSB_D_L<44>FSB_D_L<43>FSB_D_L<42>FSB_D_L<41>FSB_D_L<40>FSB_D_L<39>FSB_D_L<38>FSB_D_L<37>FSB_D_L<36>FSB_D_L<35>FSB_D_L<34>FSB_D_L<33>FSB_D_L<32>FSB_D_L<31>
FSB_D_L<29>FSB_D_L<28>FSB_D_L<27>FSB_D_L<26>FSB_D_L<25>FSB_D_L<24>FSB_D_L<23>FSB_D_L<22>FSB_D_L<21>FSB_D_L<20>FSB_D_L<19>FSB_D_L<18>
FSB_D_L<15>
FSB_D_L<11>FSB_D_L<12>FSB_D_L<13>FSB_D_L<14>
FSB_A_L<30>FSB_A_L<29>FSB_A_L<28>FSB_A_L<27>FSB_A_L<26>FSB_A_L<25>FSB_A_L<24>FSB_A_L<23>
FSB_A_L<31>
FSB_A_L<20>FSB_A_L<19>FSB_A_L<18>
FSB_A_L<16>FSB_A_L<15>FSB_A_L<14>
FSB_A_L<21>FSB_A_L<22>
FSB_A_L<17>
FSB_A_L<9>FSB_A_L<8>FSB_A_L<7>FSB_A_L<6>FSB_A_L<5>FSB_A_L<4>FSB_A_L<3>
FSB_A_L<10>FSB_A_L<11>FSB_A_L<12>
FSB_ADSTB_L<1>
FSB_REQ_L<0>FSB_REQ_L<1>FSB_REQ_L<2>FSB_REQ_L<3>
FSB_D_L<30>
FSB_REQ_L<4>
FSB_RS_L<2>
=PP1V05_S0_FSB_NB
=PP1V05_S0_FSB_NB
=PP1V05_S0_FSB_NB
NB_FSB_XRCOMP
19
19
19
11
12
12
12
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
34
34
7
7
7
7
7
7
7
7
7
7
7
6
6
6
7
5
5
5
5
5
5
5
5
5
5
7
7
7
7
7
7
7
7
7
7
5
5
7
7
7
7
5
5
5
5
5
5
7
5
7
5
5
5
7
5
5
5
7
7
5
7
7
7
7
5
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
5
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
5
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
5
7
7
7
7
7
7
5
5
5
5
5
7
5
7
5
5
5
www.vinafix.vn
CRT_BLUE*
CRT_BLUE
CRT_GREEN*CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_RED*
HSYNC
CRT_DDC_DATA
CRT_VSYNCCRT_IREF
TV_IRTNC
TV_IRTNB
TV_IREF
TV_IRTNA
TV_DACB_OUT
TV_DACC_OUT
TV_DACA_OUT
LB_DATA2LB_DATA1
LB_DATA0
LB_DATA2*
LB_DATA1*LB_DATA0*
LA_DATA2
LA_DATA1
LA_DATA0
LA_DATA2*LA_DATA1*
LA_DATA0*
LB_CLKLB_CLK*
LA_CLK
LA_CLK*
L_VDDEN
L_VREFLL_VREFH
L_VBGL_IBG
L_DDC_CLKL_DDC_DATA
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN0EXP_A_RXN1
EXP_A_RXN2
EXP_A_RXN3EXP_A_RXN4
EXP_A_RXN5EXP_A_RXN6
EXP_A_RXN7
EXP_A_RXN8EXP_A_RXN9
EXP_A_RXN10
EXP_A_RXN11EXP_A_RXN12
EXP_A_RXN13
EXP_A_RXN15EXP_A_RXN14
EXP_A_RXP0
EXP_A_RXP1EXP_A_RXP2
EXP_A_RXP4
EXP_A_RXP3
EXP_A_RXP5
EXP_A_RXP6
EXP_A_RXP7
EXP_A_RXP10EXP_A_RXP9
EXP_A_RXP8
EXP_A_RXP11
EXP_A_RXP12
EXP_A_RXP14
EXP_A_RXP13
EXP_A_RXP15
EXP_A_TXN1EXP_A_TXN0
EXP_A_TXN3
EXP_A_TXN2
EXP_A_TXN6EXP_A_TXN5
EXP_A_TXN4
EXP_A_TXN7
EXP_A_TXN8EXP_A_TXN9
EXP_A_TXN10
EXP_A_TXN11EXP_A_TXN12
EXP_A_TXN14
EXP_A_TXN13
EXP_A_TXN15
EXP_A_TXP0
EXP_A_TXP2EXP_A_TXP1
EXP_A_TXP3
EXP_A_TXP4EXP_A_TXP5
EXP_A_TXP7
EXP_A_TXP6
EXP_A_TXP8
EXP_A_TXP9EXP_A_TXP10
EXP_A_TXP12
EXP_A_TXP11
EXP_A_TXP13
EXP_A_TXP14
EXP_A_TXP15
L_CLKCTLB
L_BKLTENL_CLKCTLA
L_BKLTCTL
(3 OF 10)
LVDS
TV
VGA
PCI-EXPRESS GRAPHICS
IN
IN
OUT
IN
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
OUT
OUT
IN
OUT
OUT
IO
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SDVO_FLDSTALL#
SDVO Alternate Function
SDVO_TVCLKIN#SDVO_INT#
SDVO_TVCLKINSDVO_INTSDVO_FLDSTALL
SDVOB_GREENSDVOB_RED
SDVOC_CLKNSDVOC_BLUE#SDVOC_GREEN#SDVOC_RED#SDVOB_CLKNSDVOB_BLUE#SDVOB_GREEN#SDVOB_RED#
SDVOB_CLKPSDVOB_BLUE
SDVOC_REDSDVOC_GREENSDVOC_BLUESDVOC_CLKP
Otherwise, tie VCCD_LVDS to GND also.
LVDS Disable
VCCD_LVDS must remain powered with proper decoupling.
Tie R/R#/G/G#/B/B# and IREF to VCC Core rail, tie
filtering components. Unused DAC outputs should
Tie DACx_OUT, IRTNx, and IREF to 1.5V power rail.
VCCA_TVBG to 1.5V power rail. Tie VSSA_TVBG to GND.
rail, and tie VSSA_CRTDAC and VCC_SYNC to GND.
Component: DACA, DACB & DACC
Tie VCCD_TVDAC, VCCD_QTVDAC, VCCA_TVDACx, and
connect to GND through 75-ohm resistors.
S-Video: DACB & DACC only
Unused DAC outputs must remain powered, but can omit
HSYNC and VSYNC to GND. Tie VCCA_CRTDAC to VCC Core
TV-Out Signal Usage:
Composite: DACA only
TV-Out Disable
CRT Disable
Can leave all signals NC if LVDS is not implementedTie VCC_TXLVDS and VCCA_LVDS to GND. If SDVO is used
B19
B18
B16
J20
A19
C18
A16
F29
F28
D30
D29
G30
F30
E27
E26
A37
A36
B35
B34
C37
B37
A33
A32
C32
C33
F32
C35
B38
G25
G26
H29
H30
J30
D32
G23
R40
P36
N40
M36
L40
J36
H40
G36
AB40
AA36
Y40
W36
V40
T36
F40
D36
T40
R36
P40
N36
M40
L36
J40
H36
AC40
AB36
AA40
Y36
W40
V36
G40
F36
R38
P34
N38
M34
L38
J34
H38
G34
AB38
AA34
Y38
W34
V38
T34
F38
D34
T38
R34
P38
N34
M38
L34
J38
H34
AC38
AB34
AA38
Y34
W38
V34
G38
F34
D38
D40
H23
B21
A21
J22
B22
C22
C25
C26
D23
E23
U1200
OMIT
BGA
945GMNB
2
1R1310
402MF-LF1/16W1%24.9
051-6949 09
11113
SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
NB PEG / Video Interfaces
=PP1V5_S0_NB_PCIE
LVDS_BKLTCTL
LVDS_CLKCTLALVDS_BKLTEN
LVDS_CLKCTLB
PEG_R2D_C_P<15>PEG_R2D_C_P<14>PEG_R2D_C_P<13>
PEG_R2D_C_P<11>PEG_R2D_C_P<12>
PEG_R2D_C_P<10>PEG_R2D_C_P<9>PEG_R2D_C_P<8>
PEG_R2D_C_P<6>PEG_R2D_C_P<7>
PEG_R2D_C_P<5>PEG_R2D_C_P<4>PEG_R2D_C_P<3>
PEG_R2D_C_P<1>PEG_R2D_C_P<2>
PEG_R2D_C_P<0>
PEG_R2D_C_N<15>
PEG_R2D_C_N<13>PEG_R2D_C_N<14>
PEG_R2D_C_N<12>PEG_R2D_C_N<11>PEG_R2D_C_N<10>PEG_R2D_C_N<9>PEG_R2D_C_N<8>PEG_R2D_C_N<7>
PEG_R2D_C_N<4>PEG_R2D_C_N<5>PEG_R2D_C_N<6>
PEG_R2D_C_N<2>PEG_R2D_C_N<3>
PEG_R2D_C_N<0>PEG_R2D_C_N<1>
PEG_D2R_P<15>
PEG_D2R_P<13>PEG_D2R_P<14>
PEG_D2R_P<12>PEG_D2R_P<11>
PEG_D2R_P<8>PEG_D2R_P<9>PEG_D2R_P<10>
PEG_D2R_P<7>PEG_D2R_P<6>PEG_D2R_P<5>
PEG_D2R_P<3>PEG_D2R_P<4>
PEG_D2R_P<2>PEG_D2R_P<1>PEG_D2R_P<0>
PEG_D2R_N<14>PEG_D2R_N<13>PEG_D2R_N<12>PEG_D2R_N<11>PEG_D2R_N<10>
PEG_D2R_N<8>
PEG_D2R_N<6>PEG_D2R_N<5>PEG_D2R_N<4>PEG_D2R_N<3>PEG_D2R_N<2>PEG_D2R_N<1>PEG_D2R_N<0>
PEG_COMP
LVDS_DDC_DATALVDS_DDC_CLK
LVDS_IBGTP_LVDS_VBG
LVDS_VREFHLVDS_VREFL
LVDS_VDDEN
LVDS_A_CLK_NLVDS_A_CLK_PLVDS_B_CLK_NLVDS_B_CLK_P
LVDS_A_DATA_N<0>LVDS_A_DATA_N<1>LVDS_A_DATA_N<2>
LVDS_A_DATA_P<0>LVDS_A_DATA_P<1>LVDS_A_DATA_P<2>
LVDS_B_DATA_N<0>LVDS_B_DATA_N<1>LVDS_B_DATA_N<2>
LVDS_B_DATA_P<0>LVDS_B_DATA_P<1>LVDS_B_DATA_P<2>
TV_DACA_OUT
TV_DACC_OUTTV_DACB_OUT
TV_IRTNATV_IREF
TV_IRTNBTV_IRTNC
CRT_IREFCRT_VSYNC_R
CRT_DDC_DATACRT_HSYNC_R
CRT_RED_L
CRT_DDC_CLK
CRT_RED
CRT_GREENCRT_GREEN_L
CRT_BLUECRT_BLUE_L
PEG_D2R_N<15>
PEG_D2R_N<9>
PEG_D2R_N<7>
19 6
19
19
19
19
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
84
84
84
www.vinafix.vn
SM_CS0*RSVD15
RSVD14
SM_CKE2
RSVD2RSVD3
RSVD6
RSVD4RSVD5
RSVD8RSVD7
RSVD9
RSVD1
RSVD10RSVD11
RSVD12
RSVD13
CFG1CFG0
CFG2
CFG3CFG4
CFG6
CFG5
CFG7
CFG8
CFG9CFG10
CFG11CFG12
CFG13
CFG14
CFG17
CFG16
CFG15
CFG18
CFG19
CFG20
PM_BM_BUSY*
PM_EXTTS0*
PM_EXTTS1*PW_THRMTRIP*
PWROK
RSTIN*
SDVO_CTRLCLKSDVO_CTRLDATA
ICH_SYNC*
CLK_REQ*
NC2NC3
NC4
NC5NC6
NC7
NC8NC9
NC0
NC1
NC13
NC12
NC11NC10
NC18
NC17NC16
NC15
NC14
SM_CK0
SM_CK1SM_CK2
SM_CK0*
SM_CK3
SM_CK1*
SM_CK2*
SM_CK3*
SM_CKE0SM_CKE1
SM_CKE3
SM_CS1*
SM_CS2*SM_CS3*
SMOCDCOMP0
SMOCDCOMP1
SM_ODT1
SM_ODT0
SM_ODT2
SMRCOMP*
SM_ODT3
SMRCOMP
SMVREF0
SMVREF1
G_CLKIN*
G_CLKIND_REFCLKIN*
D_REFCLKIN
D_REFSSCLKIN*D_REFSSCLKIN
DMI_RXN0
DMI_RXN1DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1DMI_RXP2
DMI_RXP3
DMI_TXN0
DMI_TXN1DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP2
DMI_TXP1
DMI_TXP3
DDR MUXING
CFG
NC
PM
CLK
DMI
MISC
(2 OF 10)
RSVD
IN
IN
IN
IN
IN
OUT
OUT
IN
IN
IN
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(VSS_MCHDETECT) NC
NCNCNCNCNC
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
NCNC
IPU
(LB_DATAP3)(LB_DATAN3)(LA_DATAP3)(LA_DATAN3)
(TV_DCONSEL1)(TV_DCONSEL0)
(TESTIN#)
(H_PLLMON1)
(H_PCREQ#)(H_EDRDY#)(D_PLLMON1)(D_PLLMON1#)
IPDIPDIPDIPU
IPU
IPUIPU
IPUIPUIPUIPUIPUIPUIPUIPUIPUIPU
NCNC
(H_PROCHOT#)
(H_PLLMON1#)NC
AK41
AK1
AV9
AT9
AF10
AL20
AU21
AY20
BA12
BA13
AW21
AY21
AW12
AW13
AY29
BA29
AT20
AU20
AY40
AW40
AY7
AW7
AT1
AR1
AW35
AY35
H27
H28
K30
J19
H7
AF11
AG11
F7
F3
R32
D27
D28
A34
A35
A41
J29
T32
AH34
AH33
G6
H26
F25
G28
B41
BA1
BA2
BA3
BA39
BA40
BA41
C1
A3
A39
A4
A40
AW1
AW41
AY1
AY41
B2
C41
D1
K28
AF33
AG33
AG41
AF37
AE41
AC37
AH41
AG37
AF41
AE37
AG39
AF35
AE39
AC35
AH39
AG35
AF39
AE35
C40
D41
A27
A26
H32
G16
D16
D19
E18
F15
E15
F18
J26
J18
K27
J25
H15
G18
H16
C15
K15
G15
D15
E16
K18
K16
U1200
OMIT
945GMNBBGA
21
R1430
5%1/16WMF-LF402
100
2
1R144110K
402MF-LF1/16W5%
2
1R144010K
402MF-LF1/16W
5%
2
1R141080.6
MF-LF402
1%1/16W
2
1R141180.6
MF-LF402
1%1/16W
2
1R142010K
MF-LF402
5%1/16W
14 111
09051-6949
SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
NB Misc Interfaces
TP_NB_XOR_LVDS_D27TP_NB_XOR_LVDS_D28TP_NB_XOR_LVDS_A34TP_NB_XOR_LVDS_A35
TP_NB_TESTIN_LTP_NB_XOR_FSB2_H7
NB_TV_DCONSEL0
MEM_VREF_NB_1MEM_VREF_NB_0
MEM_RCOMP
NB_RST_IN_L
=PP1V8_S3_MEM_NB
DMI_N2S_P<3>
DMI_N2S_P<1>DMI_N2S_P<2>
DMI_N2S_P<0>
DMI_N2S_N<3>DMI_N2S_N<2>DMI_N2S_N<1>DMI_N2S_N<0>
DMI_S2N_P<3>DMI_S2N_P<2>DMI_S2N_P<1>DMI_S2N_P<0>
DMI_S2N_N<3>DMI_S2N_N<2>DMI_S2N_N<1>DMI_S2N_N<0>
NB_CLK_DREFSSCLKIN_PNB_CLK_DREFSSCLKIN_NNB_CLK_DREFCLKIN_PNB_CLK_DREFCLKIN_NNB_CLK100M_GCLKIN_PNB_CLK100M_GCLKIN_N
MEM_ODT<3>
MEM_RCOMP_L
MEM_ODT<2>
MEM_ODT<0>MEM_ODT<1>
MEM_CS_L<3>MEM_CS_L<2>MEM_CS_L<1>
MEM_CKE<3>
MEM_CKE<1>MEM_CKE<0>
MEM_CLK_N<3>MEM_CLK_N<2>MEM_CLK_N<1>
MEM_CLK_P<3>
MEM_CLK_N<0>
MEM_CLK_P<2>MEM_CLK_P<1>MEM_CLK_P<0>
CLK_NB_OE_LNB_SB_SYNC_LSDVO_CTRLDATASDVO_CTRLCLK
NB_RST_IN_L_RVR_PWRGOOD_DELAYPM_THRMTRIP_L
PM_EXTTS_L<0>PM_BMBUSY_L
NB_CFG<20>NB_CFG<19>NB_CFG<18>
NB_CFG<15>NB_CFG<16>NB_CFG<17>
NB_CFG<14>NB_CFG<13>NB_CFG<12>NB_CFG<11>NB_CFG<10>NB_CFG<9>NB_CFG<8>NB_CFG<7>
NB_CFG<5>NB_CFG<6>
NB_CFG<4>NB_CFG<3>NB_BSEL<2>
NB_BSEL<0>NB_BSEL<1>
NB_TV_DCONSEL1
MEM_CKE<2>
MEM_CS_L<0>
=PP3V3_S0_NB
=PP3V3_S0_NB
PM_DPRSLPVR
20
20
19
75
19
19
19
19
16
22
22
22
22
34
34
30
30
30
30
30
30
30
30
30
30
26
59
30
30
14
14
75
5
5
6
6
22
22
22
5
22
22
22
5
22
22
22
5
22
22
22
5
19
19
19
19
5
5
29
29
28
28
29
29
28
29
28
28
29
29
28
29
28
29
28
28
33
22
19
19
5
5
58
23
20
20
20
20
20
20
20
34
34
34
29
28
6
6
23
www.vinafix.vn
SA_DQ1
SA_DQ0
SA_DQ2
SA_DQ3SA_DQ4
SA_DQ5
SA_DQ6SA_DQ7
SA_DQ8
SA_DQ9SA_DQ10
SA_DQ12
SA_DQ11
SA_DQ13
SA_DQ14SA_DQ15
SA_DQ16
SA_DQ17SA_DQ18
SA_DQ19
SA_DQ20SA_DQ21
SA_DQ22
SA_DQ23SA_DQ24
SA_DQ25SA_DQ26
SA_DQ27
SA_DQ29SA_DQ28
SA_DQ30
SA_DQ31SA_DQ32
SA_DQ33
SA_DQ35SA_DQ34
SA_DQ36SA_DQ37
SA_DQ38
SA_DQ39SA_DQ40
SA_DQ41
SA_DQ42SA_DQ43
SA_DQ44
SA_DQ46SA_DQ45
SA_DQ47SA_DQ48
SA_DQ49
SA_DQ50SA_DQ51
SA_DQ52
SA_DQ53SA_DQ54
SA_DQ55
SA_DQ56SA_DQ57
SA_DQ58SA_DQ59
SA_DQ60
SA_DQ61SA_DQ62
SA_DQ63
SA_BS1
SA_BS0
SA_BS2
SA_CAS*
SA_DM0SA_DM1
SA_DM2
SA_DM3
SA_DM5
SA_DM4
SA_DM7SA_DM6
SA_DQS0
SA_DQS2
SA_DQS1
SA_DQS3
SA_DQS5
SA_DQS4
SA_DQS6
SA_DQS7
SA_DQS3*SA_DQS2*
SA_DQS4*
SA_DQS5*SA_DQS6*
SA_DQS7*
SA_MA1
SA_MA0
SA_MA2SA_MA3
SA_MA5SA_MA4
SA_MA6
SA_MA7
SA_MA9
SA_MA8
SA_MA10SA_MA11
SA_MA12
SA_MA13
SA_RAS*SA_RCVENIN*
SA_RCVENOUT*
SA_WE*
SA_DQS1*SA_DQS0*
(4 OF 10)
DDR SYSTEM MEMORY A
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
IO
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
SB_DQ1
SB_DQ0
SB_DQ2
SB_DQ3SB_DQ4
SB_DQ5
SB_DQ6SB_DQ7
SB_DQ8
SB_DQ9SB_DQ10
SB_DQ12
SB_DQ11
SB_DQ13
SB_DQ14SB_DQ15
SB_DQ16
SB_DQ17SB_DQ18
SB_DQ19
SB_DQ20SB_DQ21
SB_DQ22
SB_DQ23SB_DQ24
SB_DQ25SB_DQ26
SB_DQ27
SB_DQ29SB_DQ28
SB_DQ30
SB_DQ31SB_DQ32
SB_DQ33
SB_DQ35SB_DQ34
SB_DQ36SB_DQ37
SB_DQ38
SB_DQ39SB_DQ40
SB_DQ41
SB_DQ42SB_DQ43
SB_DQ44
SB_DQ46SB_DQ45
SB_DQ47SB_DQ48
SB_DQ49
SB_DQ50SB_DQ51
SB_DQ52
SB_DQ53SB_DQ54
SB_DQ55
SB_DQ56SB_DQ57
SB_DQ58SB_DQ59
SB_DQ60
SB_DQ61SB_DQ62
SB_DQ63
SB_BS1
SB_BS0
SB_BS2
SB_CAS*
SB_DM0SB_DM1
SB_DM2
SB_DM3
SB_DM5
SB_DM4
SB_DM7SB_DM6
SB_DQS0
SB_DQS2
SB_DQS1
SB_DQS3
SB_DQS5
SB_DQS4
SB_DQS6
SB_DQS7
SB_DQS3*SB_DQS2*
SB_DQS4*
SB_DQS5*SB_DQS6*
SB_DQS7*
SB_MA1
SB_MA0
SB_MA2SB_MA3
SB_MA5SB_MA4
SB_MA6
SB_MA7
SB_MA9
SB_MA8
SB_MA10SB_MA11
SB_MA12
SB_MA13
SB_RAS*SB_RCVENIN*
SB_RCVENOUT*
SB_WE*
SB_DQS1*SB_DQS0*
(5 OF 10)
DDR SYSTEM MEMORY B
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NCNC
NCNC
AY14
AK24
AK23
AW14
AT16
AW17
AU17
AV17
AU16
BA17
BA16
AW16
AV12
AV20
AT17
AU13
AU14
AY16
AH5
AG5
AN3
AP3
AL8
AN8
AM12
AN12
AM21
AM22
AN27
AN28
AU33
AT33
AK32
AK33
AP33
AN35
AH31
AF8
AF4
AH6
AG9
AJ32
AF6
AG4
AF9
AG7
AL2
AN1
AT3
AV2
AN2
AP1
AK35
AW2
AY2
AL5
AT5
AN9
AP9
AK7
AK8
AN7
AK9
AJ36
AL12
AL14
AT12
AT13
AP12
AP13
AR14
AR12
AT21
AP20
AM33
AP24
AL23
AN20
AP21
AL22
AP23
AP26
AM24
AL28
AK28
AM31
AN24
AM26
AL27
AK26
AN33
AM34
AM36
AN38
AP31
AR31
AJ34
AJ35
AH4
AR3
AL9
AM14
AN22
AL26
AM35
AJ33
AY13
BA20
AV14
AU12
U1200
OMIT
BGA
945GMNB
AR27
AK18
AK16
AU23
AW27
AV27
AV28
AU27
AT28
AT27
AR28
AY24
AR23
AY27
BA27
AV24
AW24
AY23
AP5
AN5
AT7
AR7
AT10
AR10
AP16
AR16
AP29
AR29
AT35
AU35
AU39
AT39
AM40
AM39
AV41
AT40
AP41
AJ3
AJ5
AK5
AT4
AN41
AK3
AK4
AR5
AV4
AY5
AW5
AY9
AY10
AW4
BA4
AK38
AW10
BA10
AJ8
AK10
AH11
AK13
AN10
AJ9
AH10
AJ11
AJ38
AL15
AP15
AM16
AN17
AN14
AP14
AL19
AM19
AW29
AV29
AR41
AW31
AU31
AU29
AT31
BA33
AY33
AP34
AP35
AU36
BA36
AP39
AP36
AR36
AV36
BA38
AY38
AW38
AR40
AP38
AV38
AU38
AJ37
AK39
AN4
BA5
AH8
AL17
BA31
AT36
AR38
AK36
AR24
AY28
AV23
AT24
U1200
OMIT
BGA
945GMNB
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
NB DDR2 Interfaces
051-6949 09
11115
MEM_A_DQS_N<0>MEM_A_DQS_N<1>
MEM_A_WE_L
MEM_A_RAS_L
MEM_A_A<13>MEM_A_A<12>MEM_A_A<11>MEM_A_A<10>
MEM_A_A<8>MEM_A_A<9>
MEM_A_A<7>MEM_A_A<6>
MEM_A_A<4>MEM_A_A<5>
MEM_A_A<3>MEM_A_A<2>
MEM_A_A<0>MEM_A_A<1>
MEM_A_DQS_N<7>MEM_A_DQS_N<6>MEM_A_DQS_N<5>MEM_A_DQS_N<4>
MEM_A_DQS_N<2>MEM_A_DQS_N<3>
MEM_A_DQS_P<7>MEM_A_DQS_P<6>
MEM_A_DQS_P<4>MEM_A_DQS_P<5>
MEM_A_DQS_P<3>
MEM_A_DQS_P<1>MEM_A_DQS_P<2>
MEM_A_DQS_P<0>
MEM_A_DM<6>MEM_A_DM<7>
MEM_A_DM<4>MEM_A_DM<5>
MEM_A_DM<3>MEM_A_DM<2>MEM_A_DM<1>MEM_A_DM<0>MEM_A_CAS_L
MEM_A_BS<2>
MEM_A_BS<0>MEM_A_BS<1>
MEM_A_DQ<63>MEM_A_DQ<62>MEM_A_DQ<61>MEM_A_DQ<60>MEM_A_DQ<59>MEM_A_DQ<58>MEM_A_DQ<57>MEM_A_DQ<56>MEM_A_DQ<55>MEM_A_DQ<54>MEM_A_DQ<53>MEM_A_DQ<52>MEM_A_DQ<51>MEM_A_DQ<50>MEM_A_DQ<49>MEM_A_DQ<48>MEM_A_DQ<47>
MEM_A_DQ<45>MEM_A_DQ<46>
MEM_A_DQ<44>MEM_A_DQ<43>MEM_A_DQ<42>MEM_A_DQ<41>MEM_A_DQ<40>MEM_A_DQ<39>MEM_A_DQ<38>MEM_A_DQ<37>MEM_A_DQ<36>
MEM_A_DQ<34>MEM_A_DQ<35>
MEM_A_DQ<33>MEM_A_DQ<32>MEM_A_DQ<31>MEM_A_DQ<30>
MEM_A_DQ<28>MEM_A_DQ<29>
MEM_A_DQ<27>MEM_A_DQ<26>MEM_A_DQ<25>MEM_A_DQ<24>MEM_A_DQ<23>MEM_A_DQ<22>MEM_A_DQ<21>MEM_A_DQ<20>MEM_A_DQ<19>MEM_A_DQ<18>MEM_A_DQ<17>MEM_A_DQ<16>MEM_A_DQ<15>MEM_A_DQ<14>MEM_A_DQ<13>
MEM_A_DQ<11>MEM_A_DQ<12>
MEM_A_DQ<10>MEM_A_DQ<9>MEM_A_DQ<8>MEM_A_DQ<7>MEM_A_DQ<6>MEM_A_DQ<5>MEM_A_DQ<4>MEM_A_DQ<3>MEM_A_DQ<2>
MEM_A_DQ<0>MEM_A_DQ<1>
MEM_B_DQS_N<0>MEM_B_DQS_N<1>
MEM_B_WE_L
MEM_B_RAS_L
MEM_B_A<13>MEM_B_A<12>MEM_B_A<11>MEM_B_A<10>
MEM_B_A<8>MEM_B_A<9>
MEM_B_A<7>MEM_B_A<6>
MEM_B_A<4>MEM_B_A<5>
MEM_B_A<3>MEM_B_A<2>
MEM_B_A<0>MEM_B_A<1>
MEM_B_DQS_N<7>MEM_B_DQS_N<6>MEM_B_DQS_N<5>MEM_B_DQS_N<4>
MEM_B_DQS_N<2>MEM_B_DQS_N<3>
MEM_B_DQS_P<7>MEM_B_DQS_P<6>
MEM_B_DQS_P<4>MEM_B_DQS_P<5>
MEM_B_DQS_P<3>
MEM_B_DQS_P<1>MEM_B_DQS_P<2>
MEM_B_DQS_P<0>
MEM_B_DM<6>MEM_B_DM<7>
MEM_B_DM<4>MEM_B_DM<5>
MEM_B_DM<3>MEM_B_DM<2>MEM_B_DM<1>MEM_B_DM<0>MEM_B_CAS_L
MEM_B_BS<2>
MEM_B_BS<0>MEM_B_BS<1>
MEM_B_DQ<63>MEM_B_DQ<62>MEM_B_DQ<61>MEM_B_DQ<60>MEM_B_DQ<59>MEM_B_DQ<58>MEM_B_DQ<57>MEM_B_DQ<56>MEM_B_DQ<55>MEM_B_DQ<54>MEM_B_DQ<53>MEM_B_DQ<52>MEM_B_DQ<51>MEM_B_DQ<50>MEM_B_DQ<49>MEM_B_DQ<48>MEM_B_DQ<47>
MEM_B_DQ<45>MEM_B_DQ<46>
MEM_B_DQ<44>MEM_B_DQ<43>MEM_B_DQ<42>MEM_B_DQ<41>MEM_B_DQ<40>MEM_B_DQ<39>MEM_B_DQ<38>MEM_B_DQ<37>MEM_B_DQ<36>
MEM_B_DQ<34>MEM_B_DQ<35>
MEM_B_DQ<33>MEM_B_DQ<32>MEM_B_DQ<31>MEM_B_DQ<30>
MEM_B_DQ<28>MEM_B_DQ<29>
MEM_B_DQ<27>MEM_B_DQ<26>MEM_B_DQ<25>MEM_B_DQ<24>MEM_B_DQ<23>MEM_B_DQ<22>MEM_B_DQ<21>MEM_B_DQ<20>MEM_B_DQ<19>MEM_B_DQ<18>MEM_B_DQ<17>MEM_B_DQ<16>MEM_B_DQ<15>MEM_B_DQ<14>MEM_B_DQ<13>
MEM_B_DQ<11>MEM_B_DQ<12>
MEM_B_DQ<10>MEM_B_DQ<9>MEM_B_DQ<8>MEM_B_DQ<7>MEM_B_DQ<6>MEM_B_DQ<5>MEM_B_DQ<4>MEM_B_DQ<3>MEM_B_DQ<2>
MEM_B_DQ<0>MEM_B_DQ<1>
28
28
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
28
28
28
28
28
28
28
28
28
28
28
28
28
28
30
30
30
30
28
28
28
28
28
28
28
28
29
29
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
30
30
30
29
29
29
29
29
29
29
29
5
5
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
5
5
5
5
5
5
5
5
5
5
5
5
5
5
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
5
28
28
28
28
5
28
28
28
28
28
28
5
28
28
28
28
28
28
28
5
28
28
28
28
28
28
28
28
28
28
28
28
28
5
28
28
28
28
28
28
28
28
5
28
5
28
28
28
28
28
28
5
28
28
28
28
28
28
28
5
5
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
5
5
5
5
5
5
5
5
5
5
5
5
5
5
29
29
29
29
29
29
29
29
29
29
29
29
29
5
29
29
29
29
29
29
29
29
29
29
29
29
29
5
29
29
29
5
29
29
29
29
29
5
29
29
29
29
29
29
29
29
29
29
29
29
5
29
5
29
29
29
29
29
29
29
29
29
29
29
29
29
29
5
29
5
29
29
29
29
29
29
www.vinafix.vn
VCC_SM19
VCC_SM107
VCC_SM105
VCC_SM106
VCC_SM102
VCC_SM104
VCC_SM103
VCC_SM100
VCC_SM101
VCC_SM98
VCC_SM99
VCC_SM97
VCC_SM95
VCC_SM96
VCC_SM93
VCC_SM94
VCC_SM92
VCC_SM91
VCC_SM90
VCC_SM89
VCC_SM88
VCC_SM86
VCC_SM87
VCC_SM85
VCC_SM84
VCC_SM83
VCC_SM81
VCC_SM80
VCC_SM82
VCC_SM79
VCC_SM78
VCC_SM77
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM73
VCC_SM72
VCC_SM70
VCC_SM71
VCC_SM68
VCC_SM67
VCC_SM69
VCC_SM65
VCC_SM66
VCC_SM64
VCC_SM63
VCC_SM62
VCC_SM61
VCC_SM60
VCC_SM59
VCC_SM58
VCC_SM56
VCC_SM57
VCC_SM55
VCC_SM53
VCC_SM54
VCC_SM52
VCC_SM50
VCC_SM51
VCC_SM49
VCC_SM48
VCC_SM46
VCC_SM47
VCC_SM44
VCC_SM45
VCC_SM43
VCC_SM41
VCC_SM42
VCC_SM40
VCC_SM39
VCC_SM37
VCC_SM38
VCC_SM36
VCC_SM34
VCC_SM35
VCC_SM32
VCC_SM33
VCC_SM30
VCC_SM31
VCC_SM28
VCC_SM29
VCC_SM27
VCC_SM26
VCC_SM25
VCC_SM23
VCC_SM24
VCC_SM22
VCC_SM21
VCC_SM20
VCC_SM18
VCC_SM16
VCC_SM17
VCC_SM15
VCC_SM13
VCC_SM14
VCC_SM11
VCC_SM12
VCC_SM10
VCC_SM9
VCC_SM8
VCC_SM7
VCC_SM6
VCC_SM5
VCC_SM4
VCC_SM3
VCC_SM0
VCC_SM1
VCC_SM2
VCC_110
VCC_109
VCC_108
VCC_105
VCC_106
VCC_107
VCC_104
VCC_103
VCC_101
VCC_100
VCC_102
VCC_98
VCC_99
VCC_96
VCC_97
VCC_95
VCC_94
VCC_93
VCC_92
VCC_91
VCC_90
VCC_88
VCC_89
VCC_87
VCC_86
VCC_85
VCC_83
VCC_84
VCC_82
VCC_80
VCC_81
VCC_79
VCC_78
VCC_76
VCC_77
VCC_74
VCC_73
VCC_75
VCC_72
VCC_71
VCC_70
VCC_69
VCC_68
VCC_67
VCC_66
VCC_65
VCC_64
VCC_62
VCC_63
VCC_61
VCC_60
VCC_59
VCC_57
VCC_58
VCC_55
VCC_56
VCC_53
VCC_54
VCC_52
VCC_50
VCC_51
VCC_49
VCC_46
VCC_47
VCC_48
VCC_44
VCC_45
VCC_43
VCC_42
VCC_41
VCC_40
VCC_39
VCC_38
VCC_37
VCC_36
VCC_34
VCC_35
VCC_33
VCC_32
VCC_31
VCC_30
VCC_28
VCC_29
VCC_25
VCC_26
VCC_27
VCC_24
VCC_23
VCC_21
VCC_20
VCC_22
VCC_13
VCC_14
VCC_12
VCC_16
VCC_15
VCC_17
VCC_18
VCC_19
VCC_11
VCC_10
VCC_9
VCC_8
VCC_7
VCC_4
VCC_5
VCC_6
VCC_2
VCC_3
VCC_0
VCC_1
(6 OF 10)
VCC
VCCAUX_NCTF57VCCAUX_NCTF56
VCCAUX_NCTF55
VCCAUX_NCTF54VCCAUX_NCTF53
VCCAUX_NCTF52
VCCAUX_NCTF51VCCAUX_NCTF50
VCCAUX_NCTF49
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF45
VCCAUX_NCTF44
VCCAUX_NCTF46
VCCAUX_NCTF40VCCAUX_NCTF39
VCCAUX_NCTF37VCCAUX_NCTF38
VCCAUX_NCTF36
VCCAUX_NCTF34VCCAUX_NCTF35
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF31
VCCAUX_NCTF30
VCCAUX_NCTF29
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF26
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF22
VCCAUX_NCTF21
VCCAUX_NCTF23
VCCAUX_NCTF42VCCAUX_NCTF43
VCCAUX_NCTF41
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF18VCCAUX_NCTF17
VCCAUX_NCTF16
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF13VCCAUX_NCTF12
VCCAUX_NCTF11
VCCAUX_NCTF9VCCAUX_NCTF10
VCCAUX_NCTF8
VCCAUX_NCTF7VCCAUX_NCTF6
VCCAUX_NCTF5VCCAUX_NCTF4
VCCAUX_NCTF3
VCCAUX_NCTF1
VCCAUX_NCTF0
VCCAUX_NCTF2
VSS_NCTF12VSS_NCTF11
VSS_NCTF10
VSS_NCTF9
VSS_NCTF7
VSS_NCTF8
VSS_NCTF5VSS_NCTF6
VSS_NCTF4
VSS_NCTF2VSS_NCTF3
VSS_NCTF0VSS_NCTF1
VCC_NCTF72VCC_NCTF71
VCC_NCTF70
VCC_NCTF69VCC_NCTF68
VCC_NCTF67VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF60
VCC_NCTF57VCC_NCTF58
VCC_NCTF59
VCC_NCTF56VCC_NCTF55
VCC_NCTF53
VCC_NCTF54
VCC_NCTF52
VCC_NCTF50
VCC_NCTF51
VCC_NCTF49
VCC_NCTF48
VCC_NCTF46VCC_NCTF47
VCC_NCTF45VCC_NCTF44
VCC_NCTF43
VCC_NCTF41
VCC_NCTF40
VCC_NCTF42
VCC_NCTF38VCC_NCTF39
VCC_NCTF36
VCC_NCTF37
VCC_NCTF34
VCC_NCTF35
VCC_NCTF33
VCC_NCTF31
VCC_NCTF32
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28VCC_NCTF27
VCC_NCTF26
VCC_NCTF25VCC_NCTF24
VCC_NCTF23VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF18
VCC_NCTF19
VCC_NCTF17VCC_NCTF16
VCC_NCTF15
VCC_NCTF13VCC_NCTF14
VCC_NCTF11VCC_NCTF12
VCC_NCTF10
VCC_NCTF8VCC_NCTF9
VCC_NCTF7
VCC_NCTF6VCC_NCTF5
VCC_NCTF4
VCC_NCTF3VCC_NCTF2
VCC_NCTF0VCC_NCTF1
(7 OF 10)
NCTF
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NCTF balls are Not Critical To Function
These connections can break withoutimpacting part performance.
Layout Note:Place near pin BA23
Place near pin BA15Layout Note:
1.05V or 1.5V
(Need to better define cavity)
Layout Note:Place in cavity
AT6
AV6
AW6
AY6
BA6
AP8
AR8
AT8
AV8
AW8
AT34
AY8
BA8
AK11
AG12
AH12
AJ12
AK12
AH13
AJ13
AJ14
AU34
AJ15
AR15
AT15
AU15
AV15
AW15
AY15
BA15
AH16
AJ16
AV34
AH17
AJ17
AJ18
AJ19
AK19
AP19
AR19
AT19
AU19
AV19
AW34
AW19
AY19
BA19
AK20
AK21
AJ22
AK22
AP22
AR22
AT22
AY34
AU22
AV22
AW22
AY22
BA22
AJ23
BA23
AH24
AJ24
AH25
BA34
AJ25
AH26
AJ26
AR26
AT26
AU26
AV26
AW26
AY26
BA26
AU40
AH27
AJ27
AH28
AJ28
AH29
AJ29
AK29
AL29
AM29
AM30
AM41
AN30
AP30
AR30
AT30
AU30
AV30
AW30
AY30
BA30
AJ1
AV1
AJ6
AK6
AL6
AN6
AP6
AR6
AR34
AT41
AU41
N19
Y19
AA19
AB19
L20
M20
N20
P20
W20
Y20
V32
AB20
AC20
L21
M21
N21
W21
AA21
AC21
L22
M22
W32
N22
P22
W22
Y22
AB22
AC22
L23
M23
N23
P23
Y32
Y23
AA23
AB23
M24
N24
P24
L25
M25
N25
L26
AA32
N26
P26
L27
M27
N27
P27
L28
M28
N28
P28
J33
R28
T28
U28
V28
Y28
AA28
AB28
L29
M29
P29
L33
R29
U29
V29
W29
Y29
AA29
L30
M30
N30
P30
N33
R30
T30
U30
V30
W30
Y30
AA30
M31
N31
P31
P33
R31
T31
V31
W31
AA31
J32
L32
M32
L16
N32
M16
N16
M17
N17
P17
L18
M18
N18
L19
M19
P32
W33
AA33
U1200
OMITBGA
NB
945GM
2
1 C161020%0.47uF
CERM-X5R6.3V
402
2
1 C162110uF6.3VX5R
20%
603
2
1C1620
603
20%
X5R6.3V
10uF
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
U17
Y17
AC17
AE26
AE27
AF23
AG23
AF24
AG24
R15
T15
U15
V15
W15
Y15
AA15
AB15
AF25
AC15
AD15
AE15
AF15
AG15
R16
T16
U16
V16
W16
AG25
Y16
AA16
AB16
AC16
AD16
AE16
AF16
AG16
R17
T17
AF26
V17
W17
AA17
AB17
AD17
AE17
AF17
AG17
R18
AF18
AG26
AG18
R19
AF19
AG19
AF20
AG20
AF21
AG21
AF22
AG22
AF27
AG27
R27
T27
T18
U18
V18
U27
W18
Y18
AA18
AB18
AC18
AD18
T19
U19
V19
AD19
V27
R20
T20
U20
V20
AD20
R21
T21
U21
V21
AD21
W27
R22
T22
U22
V22
AD22
R23
T23
U23
V23
AD23
Y27
R24
T24
U24
V24
W24
Y24
AA24
AB24
AC24
AD24
AA27
R25
T25
U25
V25
W25
Y25
AA25
AB25
AC25
AD25
AB27
R26
T26
U26
V26
W26
Y26
AA26
AB26
AC26
AD26
AC27
AD27
U1200
OMIT
BGA
NB945GM
2
1 C161120%0.47uF
CERM-X5R6.3V
402
2
1C161220%
0.47uF
CERM-X5R6.3V
402
2
1 C16130.47uF20%
CERM-X5R6.3V
402
2
1C16140.47uF
20%
CERM-X5R6.3V
402
2
1 C16150.47uF20%
CERM-X5R6.3V
402
16 111
09051-6949
SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
NB Power 1
=PP1V5_S0_NB_VCCAUX
=PPVCORE_S0_NB
NB_VCCSM_LF1NB_VCCSM_LF2
NB_VCCSM_LF5NB_VCCSM_LF4
=PPVCORE_S0_NB
=PP1V8_S3_MEM_NB
19
19
19
19
17
16
16
14
6
6
6
6
www.vinafix.vn
VTT0
VTT1VTT2
VTT3VTT4
VTT5
VTT6VTT7
VTT8
VTT9VTT10
VTT11
VTT12VTT13
VTT15VTT14
VTT16
VTT18VTT17
VTT19
VTT20VTT21
VTT22
VTT23VTT24
VTT25
VTT27
VTT26
VTT28VTT29
VTT31
VTT30
VTT32
VTT34
VTT33
VTT35
VTT36VTT37
VTT39
VTT38
VTT40
VTT41
VTT42VTT43
VTT44
VTT45
VTT48
VTT46
VTT47
VTT49
VTT50
VTT52
VTT51
VTT53
VTT55
VTT54
VTT57VTT56
VTT58VTT59
VTT60
VTT61VTT62
VTT64
VTT63
VTT65
VTT66
VTT67
VTT69
VTT68
VTT70
VTT71
VTT73VTT72
VTT74
VTT76VTT75
VCCSYNC
VCC_TXLVDS0VCC_TXLVDS1
VCC_TXLVDS2
VCC3G0
VCC3G1
VCC3G3
VCC3G2
VCC3G4
VCC3G6
VCC3G5
VCCA_3GPLLVCCA_3GBG
VSSA_3GBG
VCCA_CRTDAC0VCCA_CRTDAC1
VSSA_CRTDAC
VCCA_DPLLB
VCCA_DPLLA
VCCA_HPLL
VSSA_LVDS
VCCA_LVDS
VCCA_MPLL
VCCA_TVBGVSSA_TVBG
VCCA_TVDACC0
VCCA_TVDACC1
VCCA_TVDACB0VCCA_TVDACB1
VCCA_TVDACA0
VCCA_TVDACA1
VCCD_HMPLL0
VCCD_HMPLL1
VCCD_LVDS2
VCCD_LVDS0
VCCD_LVDS1
VCCD_TVDAC
VCC_HV1
VCC_HV2
VCC_HV0
VCCD_QTVDAC
VCCAUX19
VCCAUX18
VCCAUX17VCCAUX16
VCCAUX14
VCCAUX15
VCCAUX13
VCCAUX12
VCCAUX11VCCAUX10
VCCAUX0
VCCAUX1
VCCAUX2VCCAUX3
VCCAUX4
VCCAUX6VCCAUX5
VCCAUX9VCCAUX8
VCCAUX7
VCCAUX21
VCCAUX20
VCCAUX23
VCCAUX24
VCCAUX22
VCCAUX25
VCCAUX26
VCCAUX29
VCCAUX28VCCAUX27
VCCAUX30VCCAUX31
VCCAUX33VCCAUX32
VCCAUX34
VCCAUX35VCCAUX36
VCCAUX38
VCCAUX37
VCCAUX39
VCCAUX40
POWER
(8 OF 10)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
L14
M14
M1
N1
P1
R1
AB1
D2
M2
N14
P2
R2
M3
N3
P3
R3
M4
N4
P4
M5
P14
N5
P5
R5
A6
M6
P6
R6
M7
N7
P7
R14
M8
N8
P8
R8
M9
N9
P9
M10
N10
P10
T14
R10
M11
N11
P11
R11
L12
M12
N12
P12
R12
V14
T12
U12
V12
W12
Y12
AA12
AB12
L13
M13
N13
W14
R13
T13
U13
V13
W13
Y13
AA13
AB13
AC13
AD13
AB14
AC14
G20
B39
G21
H41
H22
D21
H19
C28
B28
A28
AH2
AH1
AF30
AG30
AH30
AJ30
AK30
AD12
AL30
AE12
AF12
AE13
AF13
Y14
AE14
AF14
AG14
AH14
P15
AC31
AH15
P16
P19
AH19
AH20
AJ20
AH21
AJ21
AH22
AE28
AE31
AF28
AG28
AC29
AD29
AE29
AF29
AG29
AC30
AD30
AE30
AF31
AK31
F20
E20
D20
C20
F19
E19
H20
AF2
A38
AF1
C39
B26
E21
F21
AC33
G41
A30
B30
C30
B25
B23
A23
L41
N41
R41
V41
Y41
AB41
AJ41
U1200
OMIT
BGANB
945GM
2
1C1711
402CERM-X5R
6.3V
0.47uF20%
2
1 C1712
402
6.3V20%
X5R
0.22UF
2
1C1713
402
6.3VCERM-X5R
20%0.47uF
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
NB Power 2
051-6949 09
11117
PP2V5_S0_NB_VCCA_CRTDAC
=PP1V5_S0_NB_VCCAUX
PP1V5_S0_NB_VCCD_QTVDAC
=PP3V3_S0_NB_VCC_HV
PP1V5_S0_NB_VCCD_TVDAC
=PP1V5_S0_NB_VCCD_LVDS
=PP1V5_S0_NB_VCCD_HMPLL
PP3V3_S0_NB_VCCA_TVDACA
PP3V3_S0_NB_VCCA_TVDACB
PP3V3_S0_NB_VCCA_TVDACC
GND_NB_VSSA_TVBGPP3V3_S0_NB_VCCA_TVBG
PP1V5_S0_NB_VCCA_MPLL
=PP2V5_S0_NB_VCCA_LVDSGND_NB_VSSA_LVDS
PP1V5_S0_NB_VCCA_HPLL
PP1V5_S0_NB_VCCA_DPLLA
GND_NB_VSSA_CRTDAC
GND_NB_VSSA_3GBG=PP2V5_S0_NB_VCCA_3GBGPP1V5_S0_NB_VCCA_3GPLL
PP1V5_S0_NB_VCC3G
=PP2V5_S0_NB_VCC_TXLVDS
=PP2V5_S0_NB_VCCSYNC
NB_VTTLF_CAP3
PP1V5_S0_NB_VCCA_DPLLB
NB_VTTLF_CAP1
=PP1V05_S0_NB_VTT
NB_VTTLF_CAP2
19 16
19
19
19
19
19
6
19
6
19
19
6
19
19
19
19
19
19
19
19
19
19
19
19
6
19
19
19
19
19
6
www.vinafix.vn
VSS_1
VSS_0
VSS_2
VSS_3
VSS_4VSS_5
VSS_6VSS_7
VSS_9
VSS_8
VSS_10
VSS_11
VSS_12VSS_13
VSS_14
VSS_15VSS_16
VSS_17
VSS_19
VSS_18
VSS_20VSS_21
VSS_22
VSS_23VSS_24
VSS_25
VSS_26
VSS_28
VSS_27
VSS_29
VSS_30
VSS_31VSS_32
VSS_33
VSS_34VSS_35
VSS_37
VSS_36
VSS_39
VSS_38
VSS_40
VSS_41
VSS_42VSS_43
VSS_44
VSS_45VSS_46
VSS_47
VSS_49VSS_48
VSS_50VSS_51
VSS_52
VSS_53VSS_54
VSS_55
VSS_57VSS_56
VSS_59
VSS_58
VSS_61
VSS_60
VSS_64
VSS_63
VSS_62
VSS_65
VSS_66
VSS_67VSS_68
VSS_69
VSS_70VSS_71
VSS_73VSS_72
VSS_74
VSS_75VSS_76
VSS_77
VSS_78VSS_79
VSS_82
VSS_80
VSS_81
VSS_84VSS_83
VSS_85
VSS_87VSS_86
VSS_89
VSS_88
VSS_91
VSS_90
VSS_92VSS_93
VSS_94
VSS_96
VSS_95
VSS_97
VSS_98VSS_99
VSS_100
VSS_101VSS_102
VSS_103VSS_104
VSS_105
VSS_106VSS_107
VSS_108
VSS_109VSS_110
VSS_111
VSS_112
VSS_114
VSS_113
VSS_115
VSS_117
VSS_116
VSS_118
VSS_119
VSS_120VSS_121
VSS_122
VSS_123VSS_124
VSS_125
VSS_127
VSS_126
VSS_128VSS_129
VSS_130
VSS_131VSS_132
VSS_133
VSS_134VSS_135
VSS_137VSS_136
VSS_138
VSS_139VSS_140
VSS_141
VSS_143VSS_142
VSS_144
VSS_145VSS_146
VSS_147VSS_148
VSS_149
VSS_150VSS_151
VSS_152
VSS_153VSS_154
VSS_155
VSS_156
VSS_158
VSS_157
VSS_159
VSS_160
VSS_161VSS_162
VSS_164
VSS_163
VSS_165
VSS_166
VSS_167VSS_168
VSS_169VSS_170
VSS_172
VSS_171
VSS_173
VSS_174
VSS_175VSS_176
VSS_177
VSS_178VSS_179
VSS
(9 OF 10)
VSS_272
VSS_271
VSS_269
VSS_270
VSS_268
VSS_266
VSS_267
VSS_265VSS_264
VSS_263
VSS_261VSS_262
VSS_260VSS_259
VSS_258
VSS_256VSS_257
VSS_255
VSS_254VSS_253
VSS_251
VSS_252
VSS_250
VSS_248VSS_249
VSS_247
VSS_246VSS_245
VSS_243
VSS_244
VSS_242
VSS_241
VSS_240
VSS_238
VSS_239
VSS_237
VSS_236
VSS_235
VSS_233
VSS_234
VSS_232VSS_231
VSS_230
VSS_228VSS_229
VSS_227
VSS_225
VSS_226
VSS_224VSS_223
VSS_222
VSS_220VSS_221
VSS_219
VSS_218VSS_217
VSS_215VSS_216
VSS_214
VSS_213VSS_212
VSS_210
VSS_211
VSS_209
VSS_207
VSS_208
VSS_205
VSS_206
VSS_204
VSS_202
VSS_203
VSS_201
VSS_200
VSS_199
VSS_197
VSS_198
VSS_196VSS_195
VSS_194
VSS_192
VSS_193
VSS_191VSS_190
VSS_189
VSS_187VSS_188
VSS_186
VSS_184VSS_185
VSS_183VSS_182
VSS_180
VSS_181
VSS_273
VSS_274
VSS_276VSS_275
VSS_277
VSS_279
VSS_278
VSS_281VSS_280
VSS_282
VSS_283VSS_284
VSS_286
VSS_285
VSS_287
VSS_288VSS_289
VSS_291
VSS_290
VSS_293
VSS_292
VSS_294
VSS_296
VSS_295
VSS_297
VSS_299
VSS_298
VSS_301
VSS_302
VSS_300
VSS_304
VSS_303
VSS_305VSS_306
VSS_307
VSS_309VSS_308
VSS_311VSS_310
VSS_312
VSS_313VSS_314
VSS_315
VSS_317VSS_316
VSS_318
VSS_319VSS_320
VSS_322VSS_321
VSS_323
VSS_324VSS_325
VSS_327
VSS_326
VSS_328
VSS_329
VSS_330
VSS_332
VSS_331
VSS_334
VSS_333
VSS_335
VSS_337
VSS_336
VSS_338VSS_339
VSS_340
VSS_342
VSS_343
VSS_341
VSS_345
VSS_344
VSS_346VSS_347
VSS_348
VSS_350VSS_349
VSS_352
VSS_351
VSS_353
VSS_354VSS_355
VSS_356
VSS_357VSS_358
VSS_359
VSS_360
VSS
(10 OF 10)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
AF34
AG34
AK34
AN34
D35
F35
G35
H35
J35
L35
AP40
M35
N35
P35
R35
T35
V35
W35
Y35
AA35
AB35
AV40
AH35
AR35
AV35
BA35
B36
C36
AC36
AE36
AF36
AG36
F41
AH36
AN36
AW36
AY36
D37
F37
G37
H37
J37
L37
J41
M37
N37
P37
R37
T37
V37
W37
Y37
AA37
AB37
M41
AH37
AK37
C38
AE38
AF38
AG38
AH38
AM38
AT38
D39
P41
F39
G39
H39
J39
L39
M39
N39
P39
R39
T39
T41
V39
W39
Y39
AA39
AB39
AC39
AJ39
AN39
AR39
AV39
W41
AW39
AY39
AW23
AL24
AU24
BA24
A25
D25
E25
H25
K25
P25
B40
AK25
D26
F26
K26
M26
AN26
B27
C27
F27
G27
AE40
J27
AK27
AM27
AP27
E28
J28
W28
AC28
AD28
AM28
AF40
AP28
AU28
AW28
BA28
A29
B29
C29
E29
G29
K29
AG40
N29
T29
AB29
AN29
AT29
E30
AB30
Y31
AB31
AG31
AH40
AJ31
AN31
AV31
AY31
B32
G32
AB32
AC32
AE32
AF32
AJ40
AG32
AH32
B33
D33
F33
G33
H33
M33
R33
T33
AK40
V33
Y33
AB33
AE33
AR33
AV33
AW33
C34
AC34
AE34
AN40
AA41
AC41
U1200
OMIT
NB
945GM
BGA
AL1
C2
F2
H2
J2
N2
T2
U2
Y2
AB2
AD2
AJ2
AK2
AP2
AR2
AT2
G3
AA3
AC3
AD3
AF3
AG3
AH3
AL3
AV3
AW3
AY3
C4
F4
J4
R4
U4
Y4
AJ4
AL4
AP4
AR4
AY4
AD5
AF5
AV5
B6
H6
K6
N6
U6
Y6
AB6
AD6
AG6
D7
G7
R7
AC7
AF7
AH7
AJ7
AL7
AP7
AV7
BA7
C8
K8
U8
AA8
AD8
AG8
A9
E9
G9
R9
Y9
AB9
AH9
AR9
AW9
BA9
U10
W10
AC10
AG10
AJ10
AL10
AP10
AV10
B11
D11
J11
Y11
AA11
AD11
E12
H12
K12
AC12
AY12
B13
D13
F13
P13
AG13
AL13
AM13
AN13
AR13
AV13
E14
H14
K14
U14
AA14
AD14
AK14
AT14
BA14
A15
B15
L15
M15
N15
AK15
AM15
AN15
C16
F16
J16
AL16
AN16
AV16
AK17
AM17
AP17
AR17
AY17
A18
D18
H18
P18
AH18
C19
G19
K19
W19
AC19
AN19
A20
B20
K20
AA20
AM20
AR20
AW20
C21
H21
J21
K21
P21
Y21
AB21
AL21
AN21
AR21
AV21
BA21
A22
D22
E22
F22
G22
K22
AA22
C23
F23
J23
K23
W23
AC23
AH23
AM23
AN23
AT23 U1200
OMIT
NB945GM
BGA
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
NB Grounds
051-6949 09
11118
www.vinafix.vn
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
OUT
OUT
OUT
IO
IO
IO
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IO
IO
IO
IN
IN
IN
IN
IN
IN
OUT
OUT
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
close to MCHPlace L and C
1uH, 20%
3GPLL 10uF cap should
DISPLAY DISABLE
TVOUT DISABLE
be within 5 mm of NB edge
be close to MCH
Place on the edge
Layout Note:
TVOUT DISABLE
Layout Note:Place in cavity
Layout Note:
10uF caps should
on opposite side.
Layout Note: Route to caps, then GND
Layout Note:
Layout Note:
LVDS DISABLE
Power Interface
be placed in cavity
Should be 1%
These 4 0.1uF caps shouldLayout Note:
These are the power signals that leave the NB "block"
Layout Note:within 6.35 mm of NB edgeTHESE 2 CAPS SHOULD BE
2
1 C197020%220UF
SMB2POLY2.5V
2
1 C1968
ELECCASE-C1
330UF20%6.3V2
1 C1967
X5R
20%6.3V
402
0.22uF
2
1 C196610%
603
6.3V
2.2UF
CERM12
1 C1965
CERM6.3V20%4.7uF
603
2
1 C19760.1uF10VCERM402
20%
2
1C1975
6.3V20%
10uF
X5R603
21
R1975
1/16WMF-LF402
1%
0.5121
L1975
0805
1.0UH-220MA-0.12-OHM
2
1 C191820%
402CERM10V
0.1uF
2
1 C1915
10VCERM402
20%0.1uF
2
1 C1914
603X5R6.3V20%10uF
2
1 C19160.1uF20%
402CERM10V
2
1 C198120%
CERM603
16V
0.1UF
21
R19801K
1/16WMF-LF402
5%
2
1R19811K5%1/16WMF-LF402
2
1 C198220%
CERM603
16V
0.1UF
2
1R19831K5%1/16W
402MF-LF
21
R19821K
1/16WMF-LF402
5%
14
14
14
14
21
L197091NH
1210
21
L1934
0603
FERR-120-OHM-0.2A
31
2
C192116V
NFM18
22000pF-1000mA
CRITICAL
2
1 C19070.22uF20%6.3VX5R402
2
1C192020%
402CERM10V
0.1uF
2
1 C1972
603X5R6.3V20%10uF
2
1 C1971
X5R
20%10uF6.3V
603
2
1 C19060.22uF20%6.3VX5R402
2
1 C1905
402
6.3V
0.22uF20%
X5R2
1 C19041UF
CERM
10%6.3V
402
2
1 C19370.1uF20%
CERM10V
402
2
1 C193520%10VCERM402
0.1uF
2
1C1934
X5R
22uF
805
20%6.3V
21
L1936FERR-120-OHM-0.2A
0603
2
1C193620%6.3V
805
22uF
X5R
2
1 C1903
X5R6.3V20%
603
10uF
2
1 C1902
X5R6.3V20%
603
10uF
2
1 C1901
ELEC
330UF
CASE-C1
6.3V20%
2
1 C1900
ELEC
330UF20%6.3V
CASE-C1
NB (GM) DecouplingSYNC_MASTER=(MASTER)
051-6949 09
11119
SYNC_DATE=(MASTER)
=PP1V5_S0_NB_3GPLL
MIN_LINE_WIDTH=1.0 mmMIN_NECK_WIDTH=0.2 MM
PP1V5_S0_NB_VCC3GVOLTAGE=1.5V
TP_NB_VCCA_DPLLA TRUE
CRT_VSYNC_R
=PP2V5_S0_NB_VCCSYNC
=PP1V5_S0_NB_VCCAUX
=PP1V8_S3_MEM_NB
MIN_LINE_WIDTH=1.0 mmMIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.5VPP1V5_S0_NB_VCCA_3GPLL
MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=1.0 mm
PP1V5_S0_NB_3GPLL_FVOLTAGE=1.5V
=PP1V5_S0_NB_PLL PP1V5_S0_NB_VCCA_HPLLVOLTAGE=1.5V
MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=1.0 mm
TRUE TP_LVDS_A_CLK_N
TRUE TP_LVDS_A_CLK_PLVDS_A_CLK_P
GND_NB_VSSA_3GBG
NB_CLK_DREFSSCLKIN_PNB_CLK_DREFSSCLKIN_N
NB_CLK_DREFCLKIN_NNB_CLK_DREFCLKIN_P
TRUETP_NB_VCCA_DPLLB PP1V5_S0_NB_VCCA_DPLLBPP1V5_S0_NB_VCCA_DPLLA
TRUETP_CRT_DDC_DATA CRT_DDC_DATA
GND_NB_VSSA_CRTDAC
CRT_HSYNC_R
TRUETP_CRT_DDC_CLK CRT_DDC_CLK
PP2V5_S0_NB_VCCA_CRTDAC
TP_LVDS_VREFLTRUE
TP_LVDS_B_DATA_P<0>TRUE
TP_LVDS_B_DATA_N<2>TRUE
TP_LVDS_B_DATA_N<1>TRUE
TP_LVDS_B_DATA_P<2>TRUE
LVDS_A_CLK_N
LVDS_B_CLK_P
TP_LVDS_B_DATA_P<1>TRUELVDS_B_DATA_P<1>LVDS_B_DATA_P<0>
TP_LVDS_DDC_CLKTRUE
TP_LVDS_CLKCTLBTRUE
TP_LVDS_BKLTENTRUETP_LVDS_VDDENTRUE
TP_GND_NB_VSSA_LVDSTRUE
TP_LVDS_IBGTRUE
LVDS_BKLTENLVDS_VDDENLVDS_IBGGND_NB_VSSA_LVDS
TP_LVDS_VREFHTRUE
GND_NB_VSSA_TVBG
PP1V5_S0_NB_VCCD_QTVDAC
TV_IRTNC
TV_IREF
TV_IRTNBTV_IRTNA
TV_DACB_OUTTV_DACC_OUT
PP3V3_S0_NB_VCCA_TVBG
TV_DACA_OUT
PP3V3_S0_NB_VCCA_TVDACC
PP3V3_S0_NB_VCCA_TVDACAPP3V3_S0_NB_VCCA_TVDACB
=PP1V5_S0_NB
=PP1V5_S0_NB_TVDAC
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.5VMIN_LINE_WIDTH=1.0 mm
PP1V5_S0_NB_VCCD_TVDAC
=PP2V5_S0_NB_VCCA_LVDS
LVDS_B_DATA_P<2>
LVDS_A_DATA_P<1> TP_LVDS_A_DATA_P<1>TRUE
=PP2V5_S0_NB_VCC_TXLVDS
=PP3V3_S0_NB_TVDAC
=PP1V05_S0_FSB_NB
=PP2V5_S0_NB_VCCA_3GBG
TP_LVDS_A_DATA_N<0>TRUE
TP_LVDS_A_DATA_N<2>TRUE
TP_LVDS_A_DATA_N<1>TRUE
TP_LVDS_A_DATA_P<0>TRUE
TP_LVDS_A_DATA_P<2>TRUE
TP_LVDS_B_DATA_N<0>TRUE
LVDS_B_CLK_N
LVDS_A_DATA_N<0>LVDS_A_DATA_N<1>LVDS_A_DATA_N<2>
LVDS_B_DATA_N<0>
LVDS_A_DATA_P<2>
LVDS_B_DATA_N<2>LVDS_B_DATA_N<1>
LVDS_VREFH
=PP1V5_S0_NB_VCCD_LVDS=PP1V5_S0_NB_VCCD_HMPLL
=PP3V3_S0_NB
=PP1V05_S0_NB
=PPVCORE_S0_NB
=PP1V05_S0_NB_VTT
=PP1V5_S0_NB_PCIE
=PP2V5_S0_NB_VCCA_3GBG
MEM_VREF_NB_0MEM_VREF_NB_1
=PP3V3_S0_NB_VCC_HV
LVDS_A_DATA_P<0>
TRUE TP_LVDS_B_CLK_N
TRUE TP_LVDS_B_CLK_P
LVDS_VREFL
=PP1V5_S0_NB_VCCD_LVDS
TP_LVDS_DDC_DATATRUE
TP_LVDS_CLKCTLATRUE
TP_LVDS_BKLTCTLTRUE
TP_SDVO_CTRLCLKTP_SDVO_CTRLDATASDVO_CTRLDATA
SDVO_CTRLCLK
=PP2V5_S0_NB_VCC_TXLVDS
LVDS_BKLTCTLLVDS_CLKCTLALVDS_CLKCTLBLVDS_DDC_CLKLVDS_DDC_DATA
=PP1V5_S0_NB_3GPLL
=PP1V05_S0_NB_VTT
=PPVCORE_S0_NB
CRT_BLUECRT_GREEN_L
CRT_RED_LCRT_RED
=PP3V3_S0_NB_VCC_HV
=PP2V5_S0_NB_VCCA_LVDS
=PP1V5_S0_NB
=PP1V5_S0_NB_TVDAC
=PP1V5_S0_NB_VCCAUX
=PP1V8_S3_MEM_NB
=PP1V5_S0_NB_PLL
=PP2V5_S0_NB_VCCSYNC
=PPVCORE_S0_NB
CRT_IREFCRT_BLUE_L
CRT_GREEN
VOLTAGE=1.5VPP1V5_S0_NB_VCCA_MPLL
MIN_LINE_WIDTH=1.0 mmMIN_NECK_WIDTH=0.2 MM
19
19
19
19
17
16
12
19
20
19
19
19
19
19
19
19
17
16
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16
14
19
13
13
13
13
13
13
13
13
17
13
13
13
13
13
13
13
19
19
19
13
13
19
6
17
13
13
13
13
13
13
13
13
13
19
17
14
16
17
13
17
14 14
17
13
13
19
14
14
19
13
13
13
13
13
19
17
16
17
19
19
19
16
14
19
19
16
6 17
13
17
6
6
17
6 17
17
17
17
13
17
13
13
17
17
17
17
17
17
17
6
6 17
17
17
6
5
6
17
6
6
6
6
6
6
6
5 5
6
17
17
6
6
6
13
13
13
13
6
17
6
6
6
6
6
17
6
13
13
13
17
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Internal pull-ups
Internal pull-up
RESERVED
RESERVED
NB_CFG<11>
NB_CFG<10>
High = Mobile CPUNB_CFG<7>
RESERVED
Internal pull-up
DMI x2 Select
PROBABLY NOT NEEDED
PROBABLY NOT NEEDED
Lane Reversal
NB_CFG<4>
NB_CFG<3>
RESERVED
NB_CFG<13:12>
NB_CFG<14>
NB_CFG<5>NB_CFG<15>
NB_CFG<16>NB_CFG<6>
NB_CFG<17>
NB_CFG<18>NB_CFG<8>
NB_CFG<9> NB_CFG<19>
NB_CFG<20>
Low = DMIx2
High = DMIx4
Low = RESERVED
High = NormalPCIE Graphics
RESERVED
CPU Strap
RESERVED
Low = Reversed
Internal pull-up
11 = Normal Operation10 = All-Z Mode Enabled01 = XOR Mode Enabled00 = Partial Clock Gating Disable
RESERVED
Internal pull-up
RESERVED
High = Enabled
Low = Disabled
RESERVED
FSB DynamicODT
or PCIe x1Low = Only SDVO
High = Both active
945 External Design Spec says reserved
Internal pull-down
Internal pull-down
Internal pull-down
Low = 1.05V
High = 1.5V
Low = Normal
High = ReversedDMI LaneReversal
VCC Select
Interop. ModePCIe Backward
2
1R2075NBCFG_DMI_X2
MF-LF1/16W
2.2K5%
402
2
1R2085NBCFG_DYN_ODT_DISABLE
402MF-LF1/16W5%2.2K
2
1R2058
MF-LF
NBCFG_VCC_1V5
2.2K5%1/16W
402
2
1R2059NBCFG_DMI_REVERSE
2.2K5%1/16WMF-LF402
2
1R20602.2K5%1/16WMF-LF402
NBCFG_SDVO_AND_PCIE
2
1R2077NO STUFF
2.2K5%1/16WMF-LF402
2
1R2079NBCFG_PEG_REVERSE
2.2K5%1/16WMF-LF402
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
NB Config Straps
051-6949 09
11120
NB_CFG<9>
NB_CFG<7>
NB_CFG<5>
NB_CFG<16>
NB_CFG<20>
NB_CFG<19>
NB_CFG<18>
=PP3V3_S0_NB
=PP3V3_S0_NB
=PP3V3_S0_NB
20
20
20
19
19
19
14
14
14
14
14
14
14
14
14
14
6
6
6
www.vinafix.vn
IO
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IO
IO
IO
IO
IN
IO
DDACK*
SATARBIASNSATARBIASP
SATA_CLKNSATA_CLKP
SATA_2TXPSATA_2TXN
SATA_2RXNSATA_2RXP
SATA_0TXPSATA_0TXNSATA_0RXPSATA_0RXN
SATALED*
ACZ_SDOUT
ACZ_SDIN1ACZ_SDIN2
ACZ_SDIN0
ACZ_SYNCACZ_BIT_CLK
LAN_TXD2
LAN_TXD0LAN_TXD1
LAN_RXD1LAN_RXD2
LAN_RSTSYNC
LAN_RXD0
LAN_CLK
EE_SHCLKEE_CS
INTVRMENINTRUDER*
RTCRST*
RTCX2RTCX1
THRMTRIP*
STPCLK*
NMISMI*
RCIN*
INTRINIT*
INIT3_3V*IGNNE*
GPIO49/CPUPWRGD
FERR*
TP1/DPRSTP*TP2/DPSLP*
A20M*
CPUSPL*
A20GATE
LFRAME*
LDRQ1*/GPIO23LDRQ0*
LAD3LAD2
LAD0LAD1
EE_DOUTEE_DIN
ACZ_RST*
DIOR*
IDEIRQ
DIOW*
IORDYDDREQ
DD0DD1
DD3DD2
DD5DD4
DD6DD7DD8
DD11
DD9DD10
DD12DD13DD14DD15
DA0DA1DA2
DCS3*DCS1*
AC-97/
AZALIA
RTC
LPC
LAN
CPU
IDE
SATA
(1 OF 6)
OUT
OUT
OUT
IN
OUT
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
OUT
IN
IN
IN OUT
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(WEAK INT PU)
NOTE: ALL IDE PINS HAVE INTERNAL 33-OHM SERIES R’S
LAYOUT NOTE: PLACE R2101 & R2194 WHERE ACCESSIBLE
NOTE: DDREQ HAS INTERNAL 11.5K PD
NOTE: LAD<0-3> HAVE INTERNAL 20K PU
INTEL HIGH DEFINITION AUDIO
ACZ_SDOUT
ACZ_SYNC
ACZ_BIT_CLK
ACZ_RST#
ACZ_SDIN[0-2]
INTERNAL 20K PD ENABLED WHEN
INTERNAL 20K PD
AC ’07
- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR
- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED
- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR
- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED
INTERNAL 20K PD ENABLED DURING RESET AND WHEN
INTERNAL 20K PD
INTERNAL 20K PD ENABLED WHEN
- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR
NONE
INTERNAL 20K PD
INTERNAL 20K PD ONLY ENABLED IN S3COLD
NOTE: ENABLE INTERNAL 1.05V SUSPEND REG
NOTE: DD<7> HAS INTERNAL 11.5K PD
(HSTROBE)(STOP)
20K PD
20K PD
20K PD
(DSTROBE)
< 2 IN OF R2107 W/O STUBLAYOUT NOTE: R2108 TO BE
CHANGED TO 54.9 FOR
LAYOUT NOTE: R2107 TO BE< 2 IN OF SB
BOM CONSOLIDATIONNOTE: RISING-EDGE TRIGGERED AT CPU
NOTE: KEYBOARD CONTROLLER RESET CPU
POR IS SMC WILL PUT LAN INT’FNOTE:
INTO RESET STATE TO SAVE PWR.
- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED
INTEL CONFIRMS OK TO LEAVE PINS AS NC
NOTE: LDRQ<0-1># HAVE INTERNAL 20K PU
NOTE: PULLED UP PER INTELNOTE: R2110=56 IN CV. CHANGED TO 54.9 FORBOM CONSOLIDATION
NOTE: R2108=56 IN CV.
(WEAK INT PD)
(INT PU)
(INT PU)
NOTE: EE_CS HAS INTERNAL PD, ONLY ENABLED WHEN LAN_RST#=L
21
R2100
4025%
0
MF-LF1/16W
NOSTUFF
21
R2101
MF-LF1/16W5%
2.2K
402
NOSTUFF
21R21951/16W
402 39
5%
MF-LF
21R2198 39
21R2197 39
21R2196 39
2
1R2199
MF-LF1/16W5%10K
402AH25AF24
AF26
AH22
AF23
AG10AH10
AF18
AE1AF1
AH6AG6AE7AF7
AH2AG2AE3AF3
AB2AB1
AA3
AG23
AH24
AB3
AA5AC3
V7V6U7
T5V4U5
U3
V3
Y6AC4AB5AA6
AG16
W4Y5
AF25
AG21AF22
AG22
AH16
AG24
AG26
Y1Y2W3
W1
AH15AF15
AE15
AF16
AF12AE12AC12AD12AC13AD14AF13AG13
AC15AH14AH13AF14AC14AB13
AE14AB15
AD16AE16
AF17AE17AH17
AG27
R6
T4
T1T3T2R5
U1
AH28AE22
U2100OMIT
ICH7-MSBBGA
2
1R2194
MF-LF1/16W5%10K
402
2
1
R2105MF-LF
1/16W 1%402332K
21
R2107
4021%1/16W
MF-LF
24.9
2
1
R210854.9
1%1/16WMF-LF 402
21
R2110
1%
54.9402
1/16WMF-LF
SB: 1 OF 4SYNC_DATE=N/ASYNC_MASTER=N/A
051-6949
11121
09
IDE_PDD<3>IDE_PDD<2>
TP_SB_XOR_V3
TP_SB_XOR_W3
TP_SB_XOR_T5TP_SB_XOR_V4TP_SB_XOR_U5
TP_SB_XOR_U3
PP3V3_S5_SB_RTC
ACZ_RST_L
ACZ_BITCLK
SB_RTC_RST_L
SB_RTC_X2
LPC_FRAME_L
TP_SB_GPIO23TP_SB_DRQ0_L
LPC_AD<3>LPC_AD<2>LPC_AD<1>LPC_AD<0>
=PP3V3_S0_SB_GPIO
=PP3V3_S0_SB_GPIO
IDE_PDD<6>
ACZ_SDATAOUTPM_THRMTRIP_L
=PP1V05_S0_SB_CPU_IO
SMC_RCIN_LACZ_SYNC
IDE_PDCS1_LIDE_PDCS3_L
IDE_PDA<2>IDE_PDA<1>IDE_PDA<0>
IDE_PDD<15>IDE_PDD<14>IDE_PDD<13>IDE_PDD<12>
IDE_PDD<10>IDE_PDD<9>
IDE_PDD<11>
IDE_PDD<8>IDE_PDD<7>
IDE_PDD<4>IDE_PDD<5>
IDE_PDD<1>IDE_PDD<0>
IDE_PDDREQIDE_PDIORDY
IDE_PDIOW_L
IDE_IRQ14
IDE_PDIOR_L
SB_ACZ_RST_L
TP_CPU_CPUSLP_L
CPU_A20M_L
CPU_DPSLP_LCPU_DPRSTP_L
CPU_PWRGD
CPU_IGNNE_LFWH_INIT_LCPU_INIT_L
CPU_INTR
CPU_SMI_LCPU_NMI
CPU_STPCLK_L
CPU_THERMTRIP_R
SB_RTC_X1
SB_SM_INTRUDER_L
SB_ACZ_BITCLKSB_ACZ_SYNC
ACZ_SDATAIN<0>
TP_SB_ACZ_SDIN2TP_SB_ACZ_SDIN1
SB_ACZ_SDATAOUT
TP_SB_SATALED_L
SATA_A_D2R_NSATA_A_D2R_PSATA_A_R2D_C_NSATA_A_R2D_C_P
SATA_C_D2R_N
SATA_C_R2D_C_NSATA_C_R2D_C_P
SB_CLK100M_SATA_PSB_CLK100M_SATA_N
SATA_RBIAS_PSATA_RBIAS_N
IDE_PDDACK_L
SATA_C_D2R_P
CPU_RCIN_L
SB_A20GATE
CPU_FERR_L
=PP1V05_S0_SB_CPU_IO
SB_INTVRMEN
TP_SB_XOR_W1TP_SB_XOR_Y1TP_SB_XOR_Y2
TP_SB_XOR_U7TP_SB_XOR_V6TP_SB_XOR_V7
26
25
25
25
67
67
67
67
67
23
23
59
24
24
24
60
60
60
60
60
21
21
14
21
38
38
38
7
75
7
60
7
7
7
7
7
34
34
21
38
38
5
68
68
26
26
58
58
58
58
58
6
6
38
68 7
6
58 68
38
38
38
38
38
38
38
38
38
38
5
38
38
38
38
38
38
38
38
5
38
38
5
5
7
7
7
5
59
5
5
5
5
5
26
26
68
38
38
38
38
38
38
38
5
5
38
38
38
38
7
6
www.vinafix.vn
IN
IO
IO
IO
IO
IO
IO
IN
IN
IN
IN
IN
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
DMI_ZCOMP
DMI_CLKP
DMI_IRCOMP
USBRBIAS*USBRBIAS
DMI0RXNDMI0RXPDMI0TXNDMI0TXP
DMI2TXNDMI2TXP
DMI3RXN
DMI3TXPDMI3TXNDMI3RXP
USBP0NUSBP0PUSBP1NUSBP1PUSBP2NUSBP2PUSBP3NUSBP3P
USBP4PUSBP5NUSBP5PUSBP6NUSBP6PUSBP7NUSBP7P
USBP4N
OC0*OC1*OC2*OC3*OC4*
OC6*/GPIO30OC5*/GPIO29
SPI_CLKSPI_CS*
SPI_MOSISPI_MISO
SPI_ARB
DMI_CLKN
DMI2RXPDMI2RXN
DMI1TXPDMI1TXN
DMI1RXNDMI1RXP
PERN1PERP1PETN1PETP1
PERN2PERP2PETN2PETP2
PERN3PERP3PETN3PETP3
PERN4PERP4PETN4PETP4
PERN5PERP5PETN5PETP5
PERN6PERP6PETN6PETP6
OC7*/GPIO31
PCI-EXP
(3 OF 6)
DMI
SPI
USB
REQ4*/GPIO22
REQ0*
MCH_SYNC*RSVD8RSVD7RSVD6RSVD5
RSVD4
GPIO5/PIRQH*GPIO4/PIRQG*GPIO3/PIRQF*GPIO2/PIRQE*
GPIO17/GNT5*GPIO1/REQ5*GNT4*/GPIO48
C/BE0*C/BE1*
DEVSEL*PERR*
STOP*
PCIRST*PME*
PLTRST*
TRDY*
FRAME*
IRDY*
PCICLKPAR
PLOCK*SERR*
AD0AD1AD2AD3AD4AD5AD6AD7AD8AD9AD10AD11AD12AD13AD14AD15AD16AD17AD18AD19AD20AD21AD22AD23AD24AD25AD26AD27AD28AD29AD30AD31
C/BE2*C/BE3*
GNT0*REQ1*GNT1*REQ2*GNT2*REQ3*GNT3*
PIRQA*PIRQB*PIRQC*PIRQD*
RSVD0RSVD1RSVD2RSVD3
MISC
INT I/F
PCI
(2 OF 6)
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IO
IO
IO
IO
OUT
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NOTE: R2210 WAS PD ON PIN A14 = FWH_TBL_L
BOM NOTE FOR PD ON PCI_GNT3_L:
IR
BT
CF/SD
CAMERA
AIRPORT (MINI-PCIE)
EXTERNAL 2
EXTERNAL 1
EXTERNAL 0
AND PWROK=H
NOTE:
STUFF - A16 SWAP OVERRIDE
GNT[0-3]# HAVE INT 20K PU
NO STUFF - DEFAULT
(STRAPPED TO TOP-BLOCK SWAP MODEIE SB INVERTS A16 FOR ALL CYCLESTARGETING FWH BIOS SPACE)
SB BOOT BIOS SELECTGNT4#GNT5#
TO RSVD[1-9]NOTE: CHANGE SYMBOL
(INT 20K PU)
R2210STRAP
11
10
01 STUFF
UNSTUFF
UNSTUFF UNSTUFF
STUFF
UNSTUFFSPI
PCI
LPC (DEFAULT)
NOTE:
LAYOUT NOTE:PLACE R2203 < 1/2 IN FROM SB
LAYOUT NOTE:PLACE R2204 < 1/2 IN FROM SB
GNT4# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H
(AKA TP3, INTERNAL 20K PU)
(INT PD)
(INT PD)
GNT5# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)
NOTE: USBP[0-7]P/N HAVE INTERNAL 15K PD
NOTE: FWH_WP_L NOT USED
R2211
ENABLED ONLY WHEN PCIRST#=0
21
R2203
1%MF-LF
24.9
4021/16W
2
1R2222
402
5%
MF-LF1/16W
10K
21
R2204
MF-LF1/16W1%
22.6
402
2
1R2223
402MF-LF
10K5%1/16W
2
1R2225
402MF-LF1/16W5%10K
2
1R22265%10K1/16WMF-LF402
2
1R2299
402MF-LF1/16W5%10K
D2D1
N3N4M2M1L5L4K2K1J3J4H2H1G3G4F2F1
P5P2
P6R2
P1
R27
N27
L27
J27
G27
E27
R28
N28
L28
J28
G28
E28
T24
P25
M25
K25
H25
F25
T25
P26
M26
K26
H26
F26
B3A2C3E5D4D5C4D3
C25D25
AE27AE28
AC27AC28AD24AD25
AA27AA28AB25AB26
W27W28Y25Y26
U27U28V25V26
U2100ICH7-M
SBBGA
OMIT
F14F15B10
F21AH8AG8AE9
AD9AH4AG4AD5AE5
A13
E13
C17
C16
D7
B19
C26
E11
B5C5B4A3
C9
B18
A9E10
AH20
A7
G7F8F7G8
D8C8A14
F13
D17
D16
E7
F16
A12
C15D12C12B15
C14A15A17E17A18E16
D6E6
F18
B6C7A6A8B9D9E9F10F11A10
A16
A11D11C11E12G13G15C13B12D14E14
C18E18
U2100SB
ICH7-M
BGA
OMIT
2
1R2200
402
10K5%1/16WMF-LF
2
1R2250USB_C_OC_PU
10K5%1/16WMF-LF402 2
1R2251USB_E_OC_PU
402MF-LF1/16W5%10K
2
1R2255USB_D_OC_PU
402
10K5%1/16WMF-LF
2
1R229810K5%1/16WMF-LF402
2
1
R2205
1/16W
10K
5%402
MF-LF
2
1
R2206NOSTUFF
1/16W5%
MF-LF10K
402
2
1
R2207
5%402
10K1/16WMF-LF
VOLTAGE=0
2
1 R2211
402
1K5%
MF-LF1/16W
051-6949
11122
09
SYNC_MASTER=N/A SYNC_DATE=N/A
SB: 2 OF 4
SB_GPIO31
SPI_SO
SPI_SCLK
ODD_PWR_EN_L
TP_PCI_GNT4_L
TP_PCI_GNT2_L
SPI_SI
BOOT_LPC_SPI_L
PCI_GNT3_L
=PP3V3_S5_SB_USB
USB_D_OC_L
USB_B_OC_L
USB_E_OC_L
USB_A_OC_L
SB_GPIO31
SPI_CE_L
PCI_REQ0_L
NB_SB_SYNC_LTP_SB_RSVD9
SB_GPIO4SB_GPIO3SB_GPIO2
PCI_C_BE_L<0>PCI_C_BE_L<1>
PCI_DEVSEL_LPCI_PERR_L
PCI_STOP_L
PCI_RST_LTP_PCI_PME_L
PLT_RST_L
PCI_TRDY_L
PCI_FRAME_L
PCI_IRDY_L
PCI_CLK_SBPCI_PAR
PCI_LOCK_LPCI_SERR_L
PCI_AD<0>PCI_AD<1>PCI_AD<2>PCI_AD<3>PCI_AD<4>PCI_AD<5>PCI_AD<6>PCI_AD<7>PCI_AD<8>PCI_AD<9>PCI_AD<10>PCI_AD<11>PCI_AD<12>PCI_AD<13>PCI_AD<14>PCI_AD<15>PCI_AD<16>PCI_AD<17>PCI_AD<18>PCI_AD<19>PCI_AD<20>PCI_AD<21>PCI_AD<22>PCI_AD<23>PCI_AD<24>PCI_AD<25>PCI_AD<26>PCI_AD<27>PCI_AD<28>PCI_AD<29>PCI_AD<30>PCI_AD<31>
PCI_C_BE_L<2>PCI_C_BE_L<3>
TP_PCI_GNT0_LPCI_REQ1_L
TP_PCI_GNT1_LPCI_REQ2_L
INT_PIRQA_LINT_PIRQB_LINT_PIRQC_L
DMI_IRCOMP_R
SB_CLK100M_DMI_P
USB_RBIAS_PN
DMI_N2S_N<0>DMI_N2S_P<0>DMI_S2N_N<0>DMI_S2N_P<0>
DMI_S2N_N<2>DMI_S2N_P<2>
DMI_N2S_N<3>
DMI_S2N_P<3>DMI_S2N_N<3>DMI_N2S_P<3>
USB_A_NUSB_A_PUSB_B_NUSB_B_PUSB_C_NUSB_C_PUSB_D_NUSB_D_P
USB_E_PUSB_F_NUSB_F_PUSB_G_NUSB_G_PUSB_H_N
USB_E_N
SB_GPIO30SB_GPIO29
SB_CLK100M_DMI_N
DMI_N2S_P<2>DMI_N2S_N<2>
DMI_S2N_P<1>DMI_S2N_N<1>
DMI_N2S_N<1>DMI_N2S_P<1>
PCIE_A_D2R_NPCIE_A_D2R_PPCIE_A_R2D_C_NPCIE_A_R2D_C_P
PCIE_B_D2R_NPCIE_B_D2R_PPCIE_B_R2D_C_NPCIE_B_R2D_C_P
PCIE_C_D2R_NPCIE_C_D2R_PPCIE_C_R2D_C_NPCIE_C_R2D_C_P
PCIE_D_D2R_NPCIE_D_D2R_PPCIE_D_R2D_C_NPCIE_D_R2D_C_P
PCIE_E_D2R_NPCIE_E_D2R_PPCIE_E_R2D_C_NPCIE_E_R2D_C_P
PCIE_F_D2R_NPCIE_F_D2R_PPCIE_F_R2D_C_NPCIE_F_R2D_C_P
PP1V5_S0_SB_VCC1_5_B=PP3V3_S5_SB_IO
USB_C_OC_L
USB_A_OC_LUSB_B_OC_L
USB_E_OC_LUSB_D_OC_LUSB_C_OC_L
SB_GPIO29SB_GPIO30
SPI_ARB
USB_H_P
INT_PIRQD_L
TP_SB_XOR_AD5TP_SB_XOR_AG4TP_SB_XOR_AH4TP_SB_XOR_AD9
TP_SB_XOR_AE5 TP_SB_XOR_AE9TP_SB_XOR_AG8TP_SB_XOR_AH8
PCI_REQ3_L
=PP3V3_S0_SB
SB_CRT_TVOUT_MUX
PCI_PME_FW_L
63
63
63
60
47
47
47
47
63
44
44
44
44
44
44
34
44
34
14
14
14
14
34
41
41
53
53
25 27
47
47
47
47
47
47
44
44
25
22
58
58
26
58
58
44
6
22
22
22
22
22
58
26
14
26
26
26
44
44
26
26
26
44
6
26
26
26
5
44
26
26
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
26
26
26
26
26
5
5
5
5
5
14
14
14
14
14
14
47
47
53
53
47
47
47
47
47
49
49
47
47
47
47
22
22
5
14
14
14
14
14
14
5
5
41
41
5
5
53
53
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
24 6
22
22
22
22
22
22
22
22
58
47
26
26
6
44
www.vinafix.vn
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
IN
IN
IO
IO
OUT
OUT
OUT
IN
IN
IO
IN
IN
IO
IN
IN
IN
IN
OUT
IO
IO
IN
OUT
IN
OUT
IN
OUT
GPIO19/SATA1GPGPIO21/SATA0GP
GPIO36/SATA2GP
CLK48
GPIO37/SATA3GP
CLK14
SUSCLK
SLP_S3*SLP_S4*SLP_S5*
PWROK
TP0/BATLOW*
GPIO16/DPRSLPVR
PWRBTN*
LAN_RST*
RSMRST*
GPIO10GPIO9
GPIO12
GPIO14GPIO13
GPIO24GPIO15
GPIO25GPIO35GPIO38GPIO39
SMBCLKSMBDATALINKALERT*
SMLINK1SMLINK0
RI*
SYS_RST*
SPKRSUS_STAT*
GPIO0/BM_BUSY*
GPIO18/STPPCI*
GPIO11/SMBALERT*
GPIO20/STPCPU*
GPIO26
GPIO28GPIO27
GPIO32/CLKRUN*
GPIO33/AZ_DOCK_EN*
WAKE*
GPIO34/AZ_DOCK_RST*
SERIRQTHRM*
GPIO7GPIO6
VRMPWRGD
GPIO8
(4 OF 6)
SMB
GPIO
PWR MNGT
SYS GPIO
CLKS
SATA GPIO
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
HI = PRESENTLO = NOT PRESENT
SV_SET_UP IS LINDACARD DETECTNOTE:
NOTE:SMC WILL DRIVE 0-1-0 TO KEEP LAN INT’FIN RESET STATE TO SAVE PWR
DEF=GPI
DEF=GPI
DEF=GPI
OD
(INT 20K PU)
NOTE FOR GPIO25:
NOTE: DPRSLPVR HAS INT 20K PD, ENABLED AT BOOT/RESET FOR STRAPPING FCN
PLACE R2306-14 WHERE PHYSICALLY ACCESSIBLE
LAYOUT NOTE:
(INT WEAK PD)
NOTE: RESERVED FOR FUTURE
NOT USED
NOTE FOR R2323 (DEF=NOSTUFF)
SB WILL DISABLE TCO TIMERSTRAPPING @ PWROK RISING:
SYSTEM REBOOT FEATURE
RESERVED FOR MOBILEAZALIA DOCKING INT’F
- CAN NOT BE LOW FOR 35US AFTER RSMRST# ON BOOT (DMI AC COUPLING MODE STRAP)- HAS INTERNAL 20K PU, ENABLED DURING RSMRST# AND DISABLED WITHIN 100MS AFTER RSMRST# DEASSERTS
21 R230210021 R2303100
21 R2305100
2
1
R230610K1/16W
MF-LF5%
402
NOSTUFF
2
1
R23071/16W
MF-LF5%
402
10K
2
1
R230810K
5%MF-LF
1/16W402
2
1
R2309NOSTUFF
402
01/16W
MF-LF5%
2
1
R231010K1/16W
MF-LF5%
402
2
1
R231110K402
NOSTUFF
5%MF-LF
1/16W
2
1
R2313402
5%MF-LF
1/16W10K
2
1
R2314
5%MF-LF
1/16W0
NOSTUFF
402
2
1
R2316
5%MF-LF
1/16W10K4022
1
R2317
5%MF-LF
1/16W10K402
2
1
R2318
5%MF-LF
1/16W402
10K
2
1
R2319402
5%MF-LF
1/16W10K
2
1
R232010K1/16W
MF-LF5%
402
5678
4321
RP2300
SM-LF
10K5%1/16W
21R2399 100K
1/16WMF-LF402
5%
2
1
R23981K402
5%MF-LF
1/16W
2
1
R2397
402
8.2K1/16W
MF-LF5%
2
1
R2396
402
10K1/16W
5%MF-LF2
1
R2395
5%
402MF-LF
1/16W8.2K
F20
AD22
C21
AF20
A22
C20A27A19
A25B25
B22C22
F22D23B24
AH21
Y4
A28
AA4
C23
A26
C19
E20
E21AC18AC21
AE20AD20
AE19AH19
AD21
U2AC19
AG18
E23B21
A21
D20R3
AF19
AF21
AH18
AC20AC22
E22R4E19F19
B23
A20
AB18
B2AC1
U2100ICH7-M
SBBGA
OMIT
2
1R2390
MF-LF1/16W5%10K
402
2
1R238810K5%
MF-LF1/16W
402
2
1
R2323NO_REBOOT_MODE
1/16W1K
5%
402MF-LF2
1
R2326
5%402MF-LF1/16W10K
NOSTUFF
2
1
R232710K4021/16W
MF-LF5%
NOSTUFF
2
1
R2343
MF-LF1/16W
8.2K
402
5%
09
23 111
051-6949
SYNC_MASTER=N/A SYNC_DATE=N/A
SB: 3 OF 4
SV_SET_UP
PM_RSMRST_L
SMB_CLK
SATA_C_DET_LSB_GPIO19SB_GPIO21
SB_CLK48M_USBCTLR
SB_GPIO37
SB_CLK14P3M_TIMER
SUS_CLK_SB
PM_SLP_S3_LPM_SLP_S4_LPM_SLP_S5_L
PM_SB_PWROK
PM_BATLOW_L
PM_DPRSLPVR
PM_PWRBTN_L
PM_LAN_ENABLE
SV_SET_UP
TP_SB_GPIO25_DO_NOT_USESB_CLK100M_SATA_OE_L
SATA_C_PWR_EN_L
SMB_LINK_ALERT_L
SMLINK<1>SMLINK<0>
PM_RI_L
PM_SYSRST_LPM_SUS_STAT_L
BIOS_REC
TP_AZ_DOCK_EN_L
VR_PWRGD_CK410
=PP3V3_S5_SB
=PP3V3_S5_SB_PM
=PP3V3_S5_SB
IDE_RESET_L
TP_SB_GPIO6TP_SB_GPIO38
CRB_SV_DET
=PP3V3_S5_SB
FWH_MFG_MODEBIOS_REC
=PP3V3_S0_SB_GPIO
SMC_SB_NMIPATA_PWR_EN_L
SMS_INT_L
SMC_WAKE_SCI_L
CRB_SV_DET
=PP3V3_S0_SB_GPIO
SATA_C_PWR_EN_L
=PP3V3_S5_SB
PATA_PWR_EN_L
PM_STPPCI_L
TP_AZ_DOCK_RST_L
FWH_MFG_MODE
PM_STPCPU_L
PM_BMBUSY_L
SB_SPKR
SMB_DATA
=PP3V3_S5_SB
INT_SERIRQPCIE_WAKE_L
PM_CLKRUN_L
SMB_ALERT_L
SB_GPIO26
PM_THRM_L
SMC_EXTSMI_LSMC_RUNTIME_SCI_L
88
67
79
26
26
26
26
26
60
77 58
67
25
25
25
23
23
25
25
67
58
60
34
34
58
77
75
60
26
60
23
11
23
23
21
58
21
23
23
60
53
44
58
23
58
27
38
5
5
59
6
58
58
26
58
14
58
58
23
33
23
5
58
23
26
6
6
6
38
23
6
23
23
6
58
23
26
58
23
6
23
6
23
33
23
33
14
27
6
58
41
5
10
58
58
www.vinafix.vn
(6 OF 6)
VSS
V5REF_SUS
VCC3_3
VCCDMIPLL
VCCSATAPLL
VCC3_3
VCCRTC
VCCUSBPLL
VCCSAUS1_5
VCC PAUX
USB COREVCC1_5_A
ARXUSB
PCI
IDE
VCCA3GP
CORE
ATX
VCC1_5_A
VCC3_3
VCC3_3
VCCSUS3_3
VCC1_5_A
VCCSUS3_3
VCCSUS3_3
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCCLAN1_5
V_CPU_IO
VCC3_3/VCCHDAVCCSUS3_3/VCCSUSHDA
VCCLAN_3_3
VCC1_05
V5REF
VCC1_5_B
(5 OF 6)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CODEC IC’S CONSIDERED SO FAR ARE 3.3VDEPENDING ON VIO OF AZALIA INTERFACEVCCHDA AND VCCSUSHDA CAN BE 1.5V OR 3.3VNOTE:
VOLTAGE GENERATED INTERNALLYSO NO CONNECT HERE
VOLTAGE GENERATED INTERNALLYSO NO CONNECT HERE
CHANGE SYMBOL TO 1.05
CHANGE SYMBOL TO 1.05
S0 OR S3 IF NOTS3 IF INTERNAL LAN IS USEDNOTE FOR VCCLAN_3_3:
0 0
AE21AE18AE13AE11AE8AE4AE2AD23AD19AD15
AD11
AD8AD7AD4AD3
AD1AC11AC9AC5AC2
AB28
AB27
AB24AB21AB19AB16AB14AB11AB6AB4
AA26AA25
AA24
AA1Y28Y27Y24Y3W26W25W24W6V28
V27
V24V15V13V2U26U25U24U17U16U15
U14
U13U12U4T17T16T15T14T13T12T6
R18
R17R16R15R14R13R12R11R1P28P27
P24
P17P16P15P14P13P12P4P3N26N25
N24
AH27AH23AH12AH7
N18
AH3AH1AG25AG20AG17AG14AG11
AG7AG3AG1
N17
AF28AF27AF11AF8AF4AF2
AE25AE24
N16N15
N14
N13N12N11N6N5N2N1M28M27M24
M17
M16M15M14M13M12M5M4M3L26L25
L24
L15L13K28K27K24J26J25J24J5J2
J1
H28H27H24H5H4H3G26G25G24G21
G18
G14G9G6G5G2G1F28F27F12F5
F4
F3E15E8E4E2E1D24D21D18D13
D10
C27C6C2B28B26B20B17B14B11B8
B1
A23A4
U2100SB
ICH7-M
BGA
OMIT
C1
K6K5K4K3
G19D22D19C24
E3
N7M7M6L7L6L3L2L1
A24
P7
R7
G20C28
K7
AD2
W5
W7W2V1V5
Y7AA2
AG28
AG15AG12AD18AD13AC16AB20AB12
G16
AA7
G12G11F9D15C10B7B16B13A5
AG19
AH11
B27
U6
AD27AD26AC26AC25
Y23Y22W23
AC24
W22V23V22U23U22T28T27T26T23T22
AC23
R26R25R24R23R22P23P22N23N22M23
AB23
M22L23L22K23K22J23J22H23H22G23
AB22
G22F24F23E26E25E24D28D27D26
AD28
AA23AA22
AB10
AH5AG5AF6AF5AE6AD6
J7J6H7H6A1
AC8AB8
G17F17T7
AC7
AC17AB17
AH9AG9AF9
AF10AE10AD10AC10AB9
AC6AB7
P11M18M11L18L17L16L14
V18
L12
V17V16V14V12V11U18U11T18T11P18
L11
AH26AE26AE23
F6
AD17G10
U2100ICH7-MSBBGA
OMIT
051-6949
11124
09
SYNC_MASTER=N/A SYNC_DATE=N/A
SB: 4 OF 4
PP1V5_S0_SB_VCC1_5_B
PP5V_S0_SB_V5REF
PP5V_S5_SB_V5REF_SUS
=PPVCORE_S0_SB
=PP3V3_S0_SB_VCCLAN3_3
=PP3V3_S0_SB_3V3_1V5_VCCHDA=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA
=PP1V05_S0_SB_CPU_IO
=PP3V3_S0_SB_VCC3_3
PP1V5_S0_SB_VCCDMIPLL
=PP1V5_S0_SB_VCC1_5_A_ARX
=PP1V5_S0_SB_VCCSATAPLL
=PP3V3_S0_SB_VCC3_3
=PP1V5_S0_SB_VCC1_5_A_ATX
=PP3V3_S5_SB_VCCSUS3_3
=PP3V3_S0_SB_VCC3_3_IDE
=PP3V3_S0_SB_VCC3_3_PCI
PP3V3_S5_SB_RTC
=PP3V3_S5_SB_VCCSUS3_3
=PP3V3_S5_SB_VCCSUS3_3_USB
=PP1V5_S0_SB_VCC1_5_A
=PP1V5_S0_SB_VCC1_5_A_USB_CORE
=PP1V5_S0_SB_VCCUSBPLL
26
25
25
25
25
25
25
25
25
25
25
21
24
25
25
24
25
24
25
25
21
24
25
25
25
25
22
25
25
6
6
6
6
6
6
25
6
6
6
6
6
6
6
5
6
6
6
6
6
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
100-OHM,4A,0805155S0247
PLACEMENT NOTE:
3.56MM ON PRIMARY NEAR PINS A1 ... J7 PLACE < 2.54MM OF SB ON SECONDARY ORPLACEMENT NOTE:
3.56MM ON PRIMARY NEAR PINS AA7 ... AG19
PLACEMENT NOTE:PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN U6 PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AG5PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AD2 PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AH11 PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AG9 PLACE < 2.54MM OF SB ON SECONDARY OR
ON SECONDARY SIDE OR 3.56MM ON PRIMARYPLACE C2500 & C2505-07 < 2.54MM OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARYPLACE C2504 < 2.54MM OF PIN F6 OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARYPLACE C2503 < 2.54MM OF PIN AD17 OF SBPLACEMENT NOTE:
NEAR PINS D28, T28, AD28
PLACEMENT NOTE:
PLACEMENT NOTE:PLACE C2509 NEAR PIN B27 OF SB
PLACEMENT NOTE:
PLACEMENT NOTE:
PLACEMENT NOTE:
PLACEMENT NOTE:
PLACEMENT NOTE:PLACE CAP UNDER SB NEAR PINS V1,V5, W2, OR W7
PLACE C2520 NEAR PIN E3 OF SBPLACEMENT NOTE:
PLACEMENT NOTE:
PLACEMENT NOTE:
NEAR PINS A5 ... G16 DISTRIBUTE IN PCI SECTION OF SBPLACEMENT NOTE:
PLACE C2520 NEAR PIN C1 OF SBPLACEMENT NOTE:
PLACE CAPS NEAR PIN W5 OF SBPLACEMENT NOTE:
PLACE CAPS AT EDGE OF SBPLACEMENT NOTE:
PLACE CAPS NEAR PINSPLACEMENT NOTE:
A24 ... G19 AND P7 OF SB
PLACE CAPS NEAR PINSPLACEMENT NOTE:
K3 ... N7 OF SB
PLACE CAPS NEAR PINSPLACEMENT NOTE:
AB8 AND AC8 OF SB
PLACE NEAR PINS AE23, AE26 & AH26 OF SB
1UH,0.5A,20%,1206152S0315
SECONDARY SIDE OR 3.56MM ON PRIMARY
PLACEMENT NOTE:PLACE < 2.54MM OF SB ON
2
1 C2500
SMB2
2.5VPOLY
20%220UF
2
1 C2510
X5R16V10%0.1UF
402
0
2
1 C2512
402
0.1UF10%16VX5R
0
21
R2500
1/10W603
1
5%MF-LF
3
1D2501BAT54E3SOT23
3
1D2500BAT54E3SOT23
2
1 C2524
603CERM6.3V20%4.7UF
2
1 C250316V
0.1UF
402
10%
X5R
0
2
1 C2504
X5R16V10%0.1UF
402
0
21
R2501
5%
MF-LF1/16W
402
10
21
L2500SM-3
100-OHM-EMI
0
2
1 C25050.1UF10%16VX5R402
2
1 C2506
X5R16V10%0.1UF
4022
1 C25070.1UF10%16VX5R402
21
L25070.28-OHM
1206
2
1 C25010.01UF10%16VCERM402
2
1 C2508
X5R
10UF
603
6.3V20%
0
2
1 C25090.1UF10%16VX5R402
0
2
1 C2511
402X5R16V10%0.1UF
0
2
1 C25170.1UF
402X5R16V10%
0
2
1 C25130.1UF10%16VX5R402
0
0
2
1 C2514
402
6.3VCERM
10%1UF
0
2
1 C25200.1UF10%16VX5R402
2
1 C2515
402X5R16V10%0.1UF
0
0
2
1 C2516
CASE-C2POLY
330UF20%2.5V
2
1
R2502
5%
1/16W
402MF-LF
100
2
1 C2502
402
6.3VCERM
10%1UF
2
1 C2518
402
0.1UF10%16VX5R
0
2
1 C2519
X5R16V10%0.1UF
402
0
2
1 C2521
402
0.1UF10%16VX5R
0
2
1 C25220.1UF16VX5R402
10%2
1 C2523
X5R16V10%0.1UF
402
0
2
1 C2525
X5R16V10%0.1UF
402
0
2
1 C2526
X5R16V10%0.1UF
4022
1 C2527
X5R16V10%0.1UF
4022
1 C2528
X5R16V10%0.1UF
402
2
1 C2529
402
0.1UF10%16VX5R
0
2
1 C2530
402
0.1UF10%16VX5R
2
1 C2534
402
0.1UF10%16VX5R
0
2
1 C2531
402
0.1UF10%16VX5R
2
1 C2532
402
0.1UF10%16VX5R
0
2
1 C2533
402
0.1UF10%16VX5R
SB:DECOUPLINGSYNC_MASTER=N/A
09
25 111
051-6949
SYNC_DATE=N/A
PP1V5_S0_SB_VCC1_5_B
VOLTAGE=1.5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.15MM
=PP1V05_S0_SB_CPU_IO
=PP3V3_S0_SB
=PP5V_S0_SB
=PP3V3_S5_SB
=PP5V_S5_SB
=PP1V5_S0_SB
=PP3V3_S0_SB_VCC3_3
VOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.15MM
PP5V_S5_SB_V5REF_SUS
=PP1V5_S0_SB_VCC1_5_A_ARX
=PP1V5_S0_SB_VCCSATAPLL
=PP1V5_S0_SB_VCC1_5_A_ATX
=PP3V3_S0_SB_VCC3_3
=PP3V3_S5_SB_VCCSUS3_3
=PP1V5_S0_SB_VCCUSBPLL
=PPVCORE_S0_SB
=PP3V3_S0_SB_VCCLAN3_3
=PP3V3_S0_SB_3V3_1V5_VCCHDA
=PP3V3_S0_SB_VCC3_3_IDE
PP3V3_S5_SB_RTC
=PP3V3_S0_SB_VCC3_3_PCI
=PP1V5_S0_SB_VCC1_5_A
=PP3V3_S5_SB_VCCSUS3_3
=PP3V3_S5_SB_VCCSUS3_3_USB
=PP1V5_S0_SB_VCC1_5_A_USB_CORE
VOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.15MM
PP5V_S0_SB_V5REF
=PP1V5_S0_SB
PP1V5_S0_SB_VCCDMIPLL
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.6MMVOLTAGE=1.5V
PP1V5_S0_SB_R
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.6MMVOLTAGE=1.5V
26
24
26
25
25
25
24
25
24
21
22
23
25
24
24
24
24
24
24
24
24
24
24
24
21
24
24
24
24
24
25
22
6
6
6
6
6
6
6
24
6
6
6
6
6
6
6
6
6
6
5
6
6
6
6
6
24
6
24
www.vinafix.vn
OUT
IO
IO
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
IN
IN
OUT
OUTIN
VCC
GND
IN
OUT
IN
IN
OUT
OUT
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NOTE: R2696 CAN’T EXIST WITH BOTH ITP & DEVELOPMENTSHOULD BE STUFFED WITH ITP & NO DEVELOPMENT
NOTE: ISL6262 SPEC (P 5) SAID TO USE 1.9K
RESET
0
21
R260020K
MF-LF1/16W 5%402
31
D2600
BAT54E3
SOT23
31
D2601
BAT54E3
SOT23
4
5
3
2
U2603
SOT23-5
74LVC1G04DBVG4
21
C2611
402
20%10VCERM
0.1UF
2
1 C26051UF10%6.3VCERM402
43
21
SW2600SPSTSM-LF
DEVELOPMENT
2
1R2699
MF-LF
DEVELOPMENT
10K5%1/16W
402
0
4
32
1
U2699DEVELOPMENT
SOT143
MAX6816
2
1 C2699DEVELOPMENT
20%10VCERM402
0.1UF
2
1R2698DEVELOPMENT
402MF-LF1/16W5%100K
2
1 C2698DEVELOPMENT
20%10VCERM402
0.1UF2
1
R2606MF-LF
1/16W 5%
1M402
2
1R2697SB_SYSRST_4_PVT
402MF-LF1/16W5%10K
21
R2696NOSTUFF
MF-LF1/16W5%
0
402
41 Y2600
CRITICAL
32.768KSM-LF
5
4
1
2
3
U2601SOT23-5-LF
MC74VHC1G08
5
4
1
2
3
U2698
MC74VHC1G08SOT23-5-LF
DEVELOPMENT
21
R2650DEVELOPMENT
MF-LF1/16W5%
1K
402
2
1R2651
402
10K5%1/16WMF-LF
2
1
R2607MF-LF
1/16W 5%4021K
0
1
2
J2600BB10209-A5TH
2
1
R260940210M
MF-LF1/16W 5%
21
R2611
402MF-LF1/16W
5%
1.8K21
C2607
402
0.1UF
CERM10V20%
21
R2612
402 5%MF-LF1/16W10K
0
21
C260815PF
CERM402 5%
50V
21R2622
10K
21
C260915PF
50V5%402
CERM
21R2623 8.2K21R2624 8.2K21R2625 8.2K21R2626 8.2K
0
21R2627 8.2K21R2628 8.2K
21R2629 8.2K
21R2630 8.2K
21R2631 8.2K21R2632 8.2K
21R2633 8.2K21R2634 8.2K
21R2636 8.2K
21R2637 8.2K
21R2638 8.2K21R2639 8.2K21R2640 8.2K
21R2641 8.2K
21R2642 8.2K
21R2643 8.2K
2
1 C2610
CERM6.3V10%1UF
402
051-6949 09
26 111
SYNC_MASTER=N/A SYNC_DATE=N/A
SB: MISC
MAKE_BASE=TRUESB_GPIO5ODD_PWR_EN_L
U2698_4
SMS_INT_L
PP3V3_S5
=PP3V3_S0_SB_PCI
PP3V3_S5
PCI_PERR_L
PCI_IRDY_LPCI_FRAME_L
PCI_TRDY_LPCI_STOP_L
PCI_REQ0_L
PCI_REQ2_L
SW_RST_BTN_L
ALL_SYS_PWRGD
VR_PWRGOOD_DELAY
SW_RST_DEBNC
MIN_LINE_WIDTH=0.6MM
PP3V3_S5_SB_RTC
XDP_DBRESET_L
PP3V3_S5
PM_SB_PWROK
=PP3V3_S0_SB_PM
SB_RTC_X2
SB_GPIO2SB_GPIO3SB_GPIO4
INT_PIRQC_LINT_PIRQD_L
INT_PIRQB_LINT_PIRQA_L
PCI_REQ3_L
PCI_REQ1_L
PCI_LOCK_L
PCI_DEVSEL_LPCI_SERR_L
PP3V3_S0
PP3V3_S0
CK410_PD_VTT_PWRGD_L
BAT_1MIN_LINE_WIDTH=0.6MM
BAT_2
MIN_LINE_WIDTH=0.6MM
SB_SM_INTRUDER_L
=PP3V3_S5_SB
VR_PWRGD_CK410_LVR_PWRGD_CK410
SB_RTC_RST_L
PM_SYSRST_L
SB_RTC_X1
83
83
83
81
81
81
80
80
80
79
79
79
77
77
77 88
88
76
76
76 76
76
66
66
66 61
61
65
65
65 59
59
59
59
25
59 41
41
26
26
75
24
26 26
26
25
58
58
6
6
44
44
44
44
44
77
14
21
11
6
44
44
44
44
10
10
33
23
23
22
23
5
6
5
22
22
22
22
22
22
22
58
5
5
7
5
23
6
21
22
22
22
22
22
22
22
22
22
22
22
22
6
6
21
6
75 23
21
5
21
www.vinafix.vn
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SB I2C BUSSES
21R2719 2.2K21R2718 2.2K
11127
09051-6949
SYNC_MASTER=N/A SYNC_DATE=N/A
SB: SMB HUB
SMB_CK410_DATASMB_CK410_CLK
=I2C_MEM_SDA=I2C_MEM_SCL
=SMB_AIRPORT_CLK=SMB_AIRPORT_DATA
MAKE_BASE=TRUESMB_DATA
=PP3V3_S5_SB_IO
SMB_DATASMB_CLK
MAKE_BASE=TRUESMB_CLK
29
29
27
27
33
33
28
28
53
53
23
22
27
27
23
6
23
23
www.vinafix.vn
DQ58DQ59
SA1GNDVDDSPD
SDASCL
DQ4
VSS11
VSS13
DQ14
VSS2
DQ5
SA0VSS58
DQ63
DQ62VSS56
DQS7DQS7*
VSS54
DQ60
VSS52
DQ54
VSS50
VSS48
CK1*CK1
VSS46
DQ53DQ52
VSS44
VSS42
DQS5DQS5*
VSS39DQ45
DQ44
VSS37DQ39
DQ38
VSS35DM4
VSS34
DQ37DQ36
VSS32NC3
VDD11
NC/A13ODT0
VDD9
S0*RAS*
BA1
VDD7A0
A2A4
VDD5
A6A7
A11
VDD3NC/A14
NC/A15
VDD1NC/CKE1
VSS30DQ31
DQ30
VSS28DQS3
DQS3*
VSS26DQ29
DQ28
VSS24DQ23
DQ22VSS22
DM2
NC0VSS19
DQ21
DQ20VSS17
VSS15
DQ15
CK0*CK0
DQ13
VSS7
VSS5
DM0
VSS0
DM1
DQ12
DQ6
DQ47DQ46
DQ61
DQ55
DM6
VSS57
DM7
VSS53
DQ56
VSS51
DQ50
VSS49
DQS6*
VSS47NC_TEST
VSS45
DQ49DQ48
VSS43
VSS41
DM5VSS40
DQ41
VSS38
DQ35
VSS36
DQS4DQS4*
VSS33
DQ33DQ32
VSS31NC/ODT1
VDD10
NC/S1*CAS*
VDD8
WE*BA0
A10/AP
VDD6A1
A3A5
VDD4
A8A9
A12
VDD2BA2
NC2
VDD0CKE0
VSS29DQ27
DQ26
VSS27NC1
DM3
VSS25DQ25
DQ24
VSS23DQ19
DQ18VSS21
DQS2
DQS2*VSS18
DQ17
DQ16VSS16
VSS14
DQ11DQ10
VSS12
DQS1DQS1*
VSS10
DQ9DQ8
VSS8
DQ3DQ2
VSS6DQS0
DQS0*
VSS4
VSS1VREF
DQ0
DQ1
DQ34
DQ40
DQ42DQ43
DQS6
DQ51
DQ57
KEY
VSS9
DQ7
VSS55
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Yellow uses 10K divider and TLV2463
DDR2 VRefOne 0.1uF per connector
- =PPSPD_S0_MEM (2.5V - 3.3V)- =PP1V8_S3_MEM
ADDR=0xA0(WR)/0xA1(RD)
NC
Page Notes
Signal aliases required by this page:
BOM options provided by this page:
- =I2C_MEM_SDA- =I2C_MEM_SCL
(NONE)
DDR2 Bypass Caps(For return current)
Power aliases required by this page:
NC
NC
NC
(See Capell Valley pg 47)
to drive MCH and DIMM connectors.
ALL NC’S516S0403
2
1 C281320%
402CERM
0.1uF10V
2
1 C281220%
402CERM
0.1uF10V
2
1 C281120%
402CERM
0.1uF10V
2
1 C281020%
402CERM
0.1uF10V
2
1 C2819
10V
0.1uF
CERM402
20%
2
1 C2818
10V
0.1uF
CERM402
20%
2
1 C2817
10V
0.1uF
CERM402
20%
2
1 C2816
10V
0.1uF
CERM402
20%
2
1 C2821
10V
0.1uF
CERM402
20%
2
1 C28200.1uF10VCERM402
20%
2
1 C2815
10V
0.1uF
CERM402
20%
2
1 C2814
10V
0.1uF
CERM402
20%
2
1C2800
10VCERM402
20%0.1uF
2
1 C280420%10UF6.3VX5R603
2
1 C280320%10UF6.3VX5R603
2
1 C280220%10UF6.3VX5R603
2
1 C280120%10UF6.3VX5R603
109
24
21
18
15
196
193
190
187
184183
178177
172
12
171
168
165
162161
156155
150149
145
9
144
139
138
133
132
128127
122121
7877
7271
6665
6059
5453
8
4847
4241
4039
3433
2827
3
21
199
112111
104103
9695
8887
118117
8281
195
197
200
198
110
108
114
163
120
83
69
50
115
119
80
84
86
116
205
204
203
202
201
186
188
167
169
146
148
129
131
68
70
49
51
29
31
11
13
25
23
16
194
192
182
180
14
191
189
181
179
176
174
160
158
175
173
6
159
157
154
152
142
140
153
151
143
141
4
136
134
126
124
137
135
125
123
76
74
19
64
62
75
73
63
61
58
56
46
44
17
57
55
45
43
38
36
22
20
37
35
7
5
185
170
147
130
67
52
26
10
79
166
164
32
30
113
85
106
107
91
93
92
94
97 98
99 100
89 90
105
101 102
J2800
DDR2-SODIMM-STD
CRITICAL
F-RT-SM1
2
1C2850
603CERM16.3V
2.2UF20%
2
1C2852
402
10VCERM
20%0.1uF
2
1C2851
603CERM16.3V
2.2UF20%
2
1R2800
MF-LF402
1K1%1/16W
2
1R2801
1/16W1%
402MF-LF
1K
28 111
09051-6949
DDR2 SO-DIMM Connector ASYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
MEM_VREF
MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm
VOLTAGE=0.9V
MEM_A_DQS_N<2>
MEM_A_DQS_P<1>
=PP1V8_S3_MEM
=PP1V8_S3_MEM
MEM_CLK_P<0>
MEM_A_DQ<52>
MEM_A_DQ<31>
MEM_A_DQ<63>MEM_A_DQ<62>
MEM_A_DQS_P<7>MEM_A_DQS_N<7>
MEM_A_DQ<60>
MEM_A_DQ<54>
MEM_CLK_N<1>MEM_CLK_P<1>
MEM_A_DQ<53>
MEM_A_DQS_P<5>MEM_A_DQS_N<5>
MEM_A_DQ<45>MEM_A_DQ<44>
MEM_A_DQ<39>MEM_A_DQ<38>
MEM_A_DM<4>
MEM_A_DQ<37>MEM_A_DQ<36>
MEM_A_A<13>MEM_ODT<0>
MEM_CS_L<0>MEM_A_RAS_LMEM_A_BS<1>
MEM_A_A<0>MEM_A_A<2>MEM_A_A<4>
MEM_A_A<6>MEM_A_A<7>MEM_A_A<11>
TP_MEM_A_A<14>TP_MEM_A_A<15>
=PP1V8_S3_MEM
MEM_A_DQ<46>MEM_A_DQ<47>
MEM_A_DM<6>
MEM_A_DQ<55>
MEM_A_DQ<61>
MEM_CKE<1>
MEM_A_DQ<30>
MEM_A_DQS_P<3>MEM_A_DQS_N<3>
MEM_A_DQ<29>MEM_A_DQ<28>
MEM_A_DQ<23>MEM_A_DQ<22>
MEM_A_DM<2>DIMM_OVERTEMP_L
MEM_A_DQ<21>MEM_A_DQ<20>
MEM_A_DQ<15>MEM_A_DQ<14>
MEM_CLK_N<0>
MEM_A_DQ<13>
MEM_A_DQ<7>
MEM_A_DM<0>
MEM_A_DQ<5>MEM_A_DQ<4>
MEM_A_DQ<6>
MEM_A_DQ<12>
MEM_A_DQ<43>
=I2C_MEM_SCL=I2C_MEM_SDA
MEM_A_DQ<59>MEM_A_DQ<58>
MEM_A_DM<7>
MEM_A_DQ<50>
MEM_A_DQ<49>
MEM_A_DQ<41>
MEM_A_DQ<35>
MEM_A_DQS_P<4>MEM_A_DQS_N<4>
MEM_A_DQ<33>MEM_A_DQ<32>
MEM_CS_L<1>
MEM_A_WE_LMEM_A_BS<0>MEM_A_A<10>
MEM_A_A<1>MEM_A_A<3>MEM_A_A<5>
MEM_A_A<8>MEM_A_A<9>MEM_A_A<12>
MEM_A_BS<2>
=PP1V8_S3_MEM
MEM_CKE<0>
MEM_A_DQ<27>MEM_A_DQ<26>
MEM_A_DM<3>
MEM_A_DQ<25>MEM_A_DQ<24>
MEM_A_DQ<19>MEM_A_DQ<18>
MEM_A_DQS_P<2>
MEM_A_DQ<17>MEM_A_DQ<16>
MEM_A_DQ<11>MEM_A_DQ<10>
MEM_A_DQS_N<1>
MEM_A_DQ<9>MEM_A_DQ<8>
MEM_A_DQ<3>MEM_A_DQ<2>
MEM_A_DQS_N<0>
MEM_A_DQ<1>MEM_A_DQ<0>
MEM_A_DQ<40>
MEM_A_DQ<42>
MEM_A_DQ<51>
MEM_A_DQ<57>
MEM_A_DQS_P<0>
MEM_A_DM<1>
MEM_A_DQS_P<6>
MEM_A_DQ<48>
MEM_A_DQ<34>
MEM_ODT<1>
MEM_A_CAS_L
MEM_A_DQ<56>
MEM_A_DQS_N<6>
MEM_A_DM<5>
=PPSPD_S0_MEM
MEM_VREF
29
29
29 29
29
28
28
28 28
29
28
15
15
6
6
15
15
15
15
15
15
30
30
30
30
30
30
30
30
30
30
30
6
15
30
15
15
59
15
15
29
29
15
15
15
30
30
30
30
30
30
30
30
30
30
30
6
30
15
15
15
15
15
15
15
30
30
15
29
28
5
5
5
5
5
14
15
15
15
15
5
5
15
5
14
14
15
5
5
15
15
5
15
15
15
15
15
14
14
15
15
15
15
15
15
15
15
5
15
5
15
15
15
14
15
5
5
15
15
15
15
15
29
15
15
15
5
14
15
5
15
15
15
15
15
15
27
27
5
15
15
15
15
15
15
5
5
15
15
14
15
15
15
15
15
15
15
15
15
15
5
14
15
15
15
5
15
15
15
5
15
5
15
15
5
15
15
15
15
5
15
15
15
15
15
15
5
15
5
15
15
14
15
15
5
15
6
5
www.vinafix.vn
DQ58DQ59
SA1GNDVDDSPD
SDASCL
DQ4
VSS11
VSS13
DQ14
VSS2
DQ5
SA0VSS58
DQ63
DQ62VSS56
DQS7DQS7*
VSS54
DQ60
VSS52
DQ54
VSS50
VSS48
CK1*CK1
VSS46
DQ53DQ52
VSS44
VSS42
DQS5DQS5*
VSS39DQ45
DQ44
VSS37DQ39
DQ38
VSS35DM4
VSS34
DQ37DQ36
VSS32NC3
VDD11
NC/A13ODT0
VDD9
S0*RAS*
BA1
VDD7A0
A2A4
VDD5
A6A7
A11
VDD3NC/A14
NC/A15
VDD1NC/CKE1
VSS30DQ31
DQ30
VSS28DQS3
DQS3*
VSS26DQ29
DQ28
VSS24DQ23
DQ22VSS22
DM2
NC0VSS19
DQ21
DQ20VSS17
VSS15
DQ15
CK0*CK0
DQ13
VSS7
VSS5
DM0
VSS0
DM1
DQ12
DQ6
DQ47DQ46
DQ61
DQ55
DM6
VSS57
DM7
VSS53
DQ56
VSS51
DQ50
VSS49
DQS6*
VSS47NC_TEST
VSS45
DQ49DQ48
VSS43
VSS41
DM5VSS40
DQ41
VSS38
DQ35
VSS36
DQS4DQS4*
VSS33
DQ33DQ32
VSS31NC/ODT1
VDD10
NC/S1*CAS*
VDD8
WE*BA0
A10/AP
VDD6A1
A3A5
VDD4
A8A9
A12
VDD2BA2
NC2
VDD0CKE0
VSS29DQ27
DQ26
VSS27NC1
DM3
VSS25DQ25
DQ24
VSS23DQ19
DQ18VSS21
DQS2
DQS2*VSS18
DQ17
DQ16VSS16
VSS14
DQ11DQ10
VSS12
DQS1DQS1*
VSS10
DQ9DQ8
VSS8
DQ3DQ2
VSS6DQS0
DQS0*
VSS4
VSS1VREF
DQ0
DQ1
DQ34
DQ40
DQ42DQ43
DQS6
DQ51
DQ57
KEY
VSS9
DQ7
VSS55
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ADDR=0XA4(WR)/0XA5(RD)
BOM options provided by this page:
- =PPSPD_S0_MEM (2.5V - 3.3V)- =PP1V8_S3_MEMPower aliases required by this page:
Page Notes
NC
NC
NC
Signal aliases required by this page:
NC
(For return current)
DDR2 Bypass Caps
- =I2C_MEM_SCL- =I2C_MEM_SDA
(NONE)
NOTE: This page does not supply VREF.
by another page.The reference voltage must be provided
Resistor prevents pwr-gnd short
516S0404 ALL NC’S
2
1 C2908
6.3V
402CERM
10%1UF
2
1C29000.1uF
10VCERM402
20%
2
1R2900
402MF-LF1/16W5%10K
2
1 C2909
402
6.3VCERM
10%1UF
2
1 C29101UF10%
CERM6.3V
4022
1 C29111UF10%
CERM6.3V
402
2
1 C29151UF10%
CERM6.3V
4022
1 C29141UF10%
CERM6.3V
4022
1 C2913
6.3VCERM
10%1UF
4022
1 C2912
6.3VCERM
10%1UF
402
2
1 C29191UF10%
CERM6.3V
4022
1 C29181UF10%
CERM6.3V
4022
1 C2917
6.3VCERM
10%1UF
4022
1 C2916
6.3VCERM
10%1UF
402
2
1 C29231UF10%
CERM6.3V
4022
1 C29221UF10%
CERM6.3V
4022
1 C2921
6.3VCERM
10%1UF
4022
1 C2920
6.3VCERM
10%1UF
402
109
24
21
18
15
196
193
190
187
184183
178177
172
12
171
168
165
162161
156155
150149
145
9
144
139
138
133
132
128127
122121
7877
7271
6665
6059
5453
8
4847
4241
4039
3433
2827
3
21
199
112111
104103
9695
8887
118117
8281
195
197
200
198
110
108
114
163
120
83
69
50
115
119
80
84
86
116
205
204
203
202
201
186
188
167
169
146
148
129
131
68
70
49
51
29
31
11
13
25
23
16
194
192
182
180
14
191
189
181
179
176
174
160
158
175
173
6
159
157
154
152
142
140
153
151
143
141
4
136
134
126
124
137
135
125
123
76
74
19
64
62
75
73
63
61
58
56
46
44
17
57
55
45
43
38
36
22
20
37
35
7
5
185
170
147
130
67
52
26
10
79
166
164
32
30
113
85
106
107
91
93
92
94
97 98
99 100
89 90
105
101 102
J2900
DDR2-SODIMM-REV
F-RT-SM1
CRITICAL
2
1C295020%
6.3VCERM1
603
2.2UF
2
1C2952
402
10VCERM
20%0.1uF
2
1C2951
603CERM16.3V
2.2UF20%
11129
051-6949 09
SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
DDR2 SO-DIMM Connector B
MEM_B_DM<5>
MEM_B_DQ<41>
MEM_B_DQ<48>
=PPSPD_S0_MEM
=PP1V8_S3_MEM
MEM_CLK_P<3>
MEM_B_DQ<52>
MEM_B_DQ<31>
MEM_B_SPD_SA1
MEM_B_DQ<63>MEM_B_DQ<62>
MEM_B_DQS_P<7>MEM_B_DQS_N<7>
MEM_B_DQ<60>
MEM_B_DQ<54>
MEM_CLK_N<2>MEM_CLK_P<2>
MEM_B_DQ<53>
MEM_B_DQS_P<5>MEM_B_DQS_N<5>
MEM_B_DQ<45>MEM_B_DQ<44>
MEM_B_DQ<39>MEM_B_DQ<38>
MEM_B_DM<4>
MEM_B_DQ<37>MEM_B_DQ<36>
MEM_B_A<13>MEM_ODT<2>
MEM_CS_L<2>MEM_B_RAS_LMEM_B_BS<1>
MEM_B_A<0>MEM_B_A<2>MEM_B_A<4>
MEM_B_A<6>MEM_B_A<7>MEM_B_A<11>
TP_MEM_B_A<14>TP_MEM_B_A<15>
=PP1V8_S3_MEM
MEM_B_DQ<46>MEM_B_DQ<47>
MEM_B_DM<6>
MEM_B_DQ<55>
MEM_B_DQ<61>
MEM_CKE<3>
MEM_B_DQ<30>
MEM_B_DQS_P<3>MEM_B_DQS_N<3>
MEM_B_DQ<29>MEM_B_DQ<28>
MEM_B_DQ<23>MEM_B_DQ<22>
MEM_B_DM<2>DIMM_OVERTEMP_L
MEM_B_DQ<21>MEM_B_DQ<20>
MEM_B_DQ<15>MEM_B_DQ<14>
MEM_CLK_N<3>
MEM_B_DQ<13>
MEM_B_DQ<7>
MEM_B_DM<0>
MEM_B_DQ<5>MEM_B_DQ<4>
MEM_B_DQ<6>
MEM_B_DQ<12>
MEM_B_DQ<43>
=I2C_MEM_SCL=I2C_MEM_SDA
MEM_B_DQ<59>MEM_B_DQ<58>
MEM_B_DM<7>
MEM_B_DQ<56>
MEM_B_DQ<50>
MEM_B_DQS_N<6>
MEM_B_DQ<49>
MEM_B_DQ<35>
MEM_B_DQS_P<4>MEM_B_DQS_N<4>
MEM_B_DQ<33>MEM_B_DQ<32>
MEM_ODT<3>
MEM_CS_L<3>MEM_B_CAS_L
MEM_B_WE_LMEM_B_BS<0>MEM_B_A<10>
MEM_B_A<1>MEM_B_A<3>MEM_B_A<5>
MEM_B_A<8>MEM_B_A<9>MEM_B_A<12>
MEM_B_BS<2>
MEM_CKE<2>
MEM_B_DQ<27>MEM_B_DQ<26>
MEM_B_DM<3>
MEM_B_DQ<25>MEM_B_DQ<24>
MEM_B_DQ<18>
MEM_B_DQS_P<2>MEM_B_DQS_N<2>
MEM_B_DQ<11>MEM_B_DQ<10>
MEM_B_DQS_P<1>MEM_B_DQS_N<1>
MEM_B_DQ<9>MEM_B_DQ<8>
MEM_B_DQ<3>MEM_B_DQ<2>
MEM_B_DQS_N<0>
MEM_B_DQ<1>MEM_B_DQ<0>
MEM_B_DQ<34>
MEM_B_DQ<40>
MEM_B_DQ<42>
MEM_B_DQS_P<6>
MEM_B_DQ<51>
MEM_B_DQ<57>
MEM_B_DQS_P<0>
MEM_B_DM<1>
=PP1V8_S3_MEM
MEM_VREF
MEM_B_DQ<16>
MEM_B_DQ<19>
MEM_B_DQ<17>
=PPSPD_S0_MEM
29
29 29
29
28
28 28
29
15
28
6
15
15
15
15
15
15
15
30
30
30
30
30
30
30
30
30
30
30
6
30
15
15
15
59
15
28
28
15
15
15
30
30
30
30
30
30
30
30
30
30
30
30
30
30
15
15
15
15
15
15
15
15
15
6
28
28
15
15
5
6
5
14
15
15
15
5
5
5
15
15
14
14
15
5
5
15
5
15
5
15
15
15
15
14
14
15
15
15
15
15
15
15
15
5
5
5
15
15
15
15
15
14
15
5
5
15
15
5
15
15
28
15
15
15
15
14
15
15
15
15
15
5
15
15
27
27
15
15
15
15
15
5
15
15
5
5
15
15
14
14
15
15
15
15
15
15
15
15
15
15
15
14
15
15
15
5
15
15
5
5
15
15
5
5
15
5
15
15
5
15
15
15
15
15
5
15
15
5
15
5
5
15
15
15
6
www.vinafix.vn
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
One cap for each side of every RPAK, one cap for every two discrete resistors
BOMOPTION shown at the top of each group applies to every part below it
21R3001402MF-LF1/16W5%
56
21R3009 56402MF-LF1/16W5%
21R3011 565% 402MF-LF1/16W
21R3025 565% 1/16W MF-LF 402
21R3035 56402MF-LF1/16W5%
0
2
1
15 29
15 29
15 29
15 29
2
1 C30040.1uF
402CERM10V20%
2
1 C300620%10VCERM402
0.1uF
2
1 C30080.1uF
402CERM10V20%
2
1 C30090.1uF
402CERM10V20%
2
1 C30130.1uF
402CERM10V20%
2
1 C301420%10VCERM402
0.1uF
2
1 C301520%10VCERM402
0.1uF
63RP3000 56SM-LF1/16W5%
54RP3000 56SM-LF1/16W5%
81RP3000 56SM-LF1/16W5%
72RP3000 56SM-LF1/16W5%
72RP30011/16W
56SM-LF5%
81RP3001 56SM-LF1/16W5%
54RP3001 56SM-LF1/16W5%
63RP3001 56SM-LF1/16W5%
54RP30021/16W
56SM-LF5%
81RP3002 56SM-LF1/16W5%
72RP3002 56SM-LF1/16W5%
63RP3002 56SM-LF1/16W5%
81RP3003 565% 1/16W SM-LF
72RP30035% 1/16W
56SM-LF
63RP3003 561/16W5% SM-LF
54RP3003 561/16W5% SM-LF
81RP3004 561/16W5% SM-LF
63RP30045% 1/16W
56SM-LF
54RP30045% 1/16W
56SM-LF
81RP30055% 1/16W
56SM-LF
72RP30055% 1/16W
56SM-LF
63RP3005 561/16W5% SM-LF
54RP3005 561/16W5% SM-LF
81RP30065% 1/16W
56SM-LF
72RP30065% 1/16W
56SM-LF
63RP3006 561/16W5% SM-LF
54RP3007SM-LF5% 1/16W
56
63RP3007 561/16W5% SM-LF
72RP30075% 1/16W
56SM-LF
81RP30075% 1/16W
56SM-LF
54RP3008 561/16W5% SM-LF
63RP30085% 1/16W
56SM-LF
72RP3008 561/16W5% SM-LF
81RP3008 561/16W5% SM-LF
81RP3009 561/16W5% SM-LF
72RP30095% 1/16W
56SM-LF
63RP3009 561/16W5% SM-LF
54RP3009 561/16W5% SM-LF
63RP30105% 1/16W
56SM-LF
72RP3010 561/16W5% SM-LF
81RP30105% 1/16W
56SM-LF
54RP3010 561/16W5% SM-LF
81RP30115% 1/16W
56SM-LF
72RP3011 561/16W5% SM-LF
54RP30115% 1/16W
56SM-LF
54RP3006 561/16W5% SM-LF
63RP3011 561/16W5% SM-LF
15 29
15 29
15 29
15 29
15 29
15 29
15 29
15 29
15 29
15 29
15 29
15 29
15 29
15 29
0
1
0
1
1
0
2
0
1
2
3
4
5
6
7
10
11
9
8
13
12
14 28 29
14 28 29
15 28
15 28
15 28
15 28
15 28
2
3
2
3
2
1 C303320%10VCERM402
0.1uF
2
1 C303020%10VCERM402
0.1uF
2
1 C3011
CERM402
20%10V
0.1uF
2
1 C30100.1uF
402CERM10V20%
2
1 C300720%10VCERM402
0.1uF
2
1 C30050.1uF
402CERM10V20%
2
1 C303520%10VCERM402
0.1uF
0
1
2
3
14 28 29
30 111
09051-6949
Memory Active Termination
MEM_A_A<13..0>
MEM_CS_L<3..0>
MEM_A_BS<2..0>
MEM_B_BS<2..0>
MEM_CKE<3..0>
MEM_ODT<3..0>
=PP0V9_S0_MEM_TERM
MEM_A_CAS_LMEM_A_WE_L
MEM_B_CAS_LMEM_B_WE_L
MEM_B_RAS_L
MEM_A_RAS_L
MEM_B_A<0>MEM_B_A<3>MEM_B_A<2>MEM_B_A<10>MEM_B_A<4>MEM_B_A<5>MEM_B_A<6>MEM_B_A<7>MEM_B_A<8>MEM_B_A<9>MEM_B_A<1>MEM_B_A<11>MEM_B_A<12>MEM_B_A<13>
6
www.vinafix.vn
VREF
VTT
GND
VTT_IN
ENVTTS
VDDQ VCC
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
If power inputs are not S0,
Page Notes
disable MEMVTT in sleep.MEMVTT_EN can be used to
- =PP0V9_S0_MEMVTT_LDO- =PP1V8_S0_MEMVTT- =PP5V_S0_MEMVTT
BOM options provided by this page:
Signal aliases required by this page:
Power aliases required by this page:
(NONE)
(NONE)
?Can 5V be S0 if 1V8 is S3?
DDR2 Vtt Regulator
2
1C3101
6.3V20%
X5R603
10uF
3
7
8
4
5 6
1
2
U3100
MSOP-8
BD3533FVM
CRITICAL
2
1R31005%
1/16WMF-LF402
1K
MEMVTT_EN_PU
C3105
6.3VPOLY
20%150UF
SMC-LF
CRITICAL
2
1C3102
6.3V20%
X5R
10uF
603
21
R3101
402MF-LF1/16W5%
220
2
1C3109
6.3V
2.2UF10%
CERM1603
2
1C311020%
0.1UF10VCERM402
2
1 C3100
402CERM
1uF10%6.3V
31 111
09051-6949
Memory Vtt SupplySYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
=PP1V8_S0_MEMVTT
=PP0V9_S0_MEMVTT_LDO
MEMVTT_VREF
=PP5V_S0_MEMVTT
MEMVTT_EN
U3100_VDDQ6
6
6
79
www.vinafix.vn
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
IO
OUT
IN
IO
IO
OUT
OUT
IN
IN
IN
IN
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
VTT_PWRGD*/PD
DOT96T/27MHZ_NON-SPREAD
SRCT_0/LCD100MT
CPUC2_ITP/SRCC_10
VDD48
XIN
VDD_PCI1
VDD_SRC0
VDD_REF
VDD_SRC1
VDD_SRC2
VDD_SRC3
REF1/FCTSEL0REF0/FSC
FSA/48M
DOT96C/27MHZ_SPREAD
CLKREQ_8*
SRCT_8
SRCC_8
SRCT_7SRCC_7
CLKREQ_6*
CPUT2_ITP/SRCT_10
IREF
SDATASCLK
VSS_REF
VSS_PCI1
VSS_PCI0
VSS_CPU
VSS48
VSS_SRC
PCIF1
PCI1
SRCT_5
THRML_PAD
PCI4
PCI2
FSB
CLKREQ_4*
SRCC_5
SRCC_4
SRCT_4
SRCT_3CLKREQ_3*
SRCC_3
SRCC_2SRCT_2
SRCC_1
CLKREQ_1*
SRCT_1
SRCC_0/LCD100MC
CPUC1CPUT1
CPUC0
CPUT0
PCI_STP*
CPU_STP*
SRCC_6
CLKREQ_5*
SRCT_6
PCIF0/ITP_SEL
PCI5/FCTSEL1
PCI3
XOUT
VDDA
VSSA
VDD_PCI0
VDD_CPU
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(INT PU)
(INT PU)
(INT PU)
(INT PU)
FCTSEL0
SRCC0
SRCC0
SRCC0
SRCT0
100MT_SSTDOT96C
TBD
SPREAD27M
SPREAD27M NON
OFF LOW11
1
1
0
0
0 0
FCTSEL1
100MC_SST
PIN 11PIN 10PIN 7
DOT96T
DOT96T DOT96C
SRCT0
SRCT0
(FW PCI 33MHZ)
* FOR INT. GRAPHIC SYSTEM
* FOR EXT. GRAPHIC SYSTEM
(FROM ICH7 GPIO20 STPCPU* )
PIN 6
(INT PD)
(INT PU)
(FROM ICH7 GPIO18 STPPCI* )(INT PU)(INT PU)
(ICH SM BUS)
(GMCH HOST 133/167MHZ)
(ITP HOST 133/167MHZ)
(INT PD)
(INT PU)
(NOT USED)(INT PD)
(PLACED 0.1UF NEAR THE RELATIVE POWER PIN)(EACH POWER PIN PLACED ONE 0.1UF)
(GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)
(CPU HOST 133/167MHZ)
(FOR PCI-E CARD)
(ICH7M DMI 100 MHZ )
(GPU PCI-E 100 MHZ )
(FROM ICH7 GPIO35)
(WIRELESS PCI-E 100 MHZ )
NEED TO DECIDE THE CLKREQ CONNECTION,TO GPIO?
(ICH7M,SIO,LPC REF. 14.318MHZ)(ICH7M USB 48MHZ)(FROM CPU VCORE PWR GOOD)
(GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)
(GIGA LAN PCI-E 100 MHZ )
(NOT USED )
(TPM LPC 33MHZ)
(FROM GMCH CLK_REQ*)(GMCH G_CLKIN 100 MHZ )
(ICH SATA 100 MHZ)
(PULL UP PIN 68 TO ENABLE ITP HOST CLK)(ICH7M PCI 33MHZ)
(PORT80 LPC 33MHZ)
(SMC LPC 33MHZ)
2
1 C3309NOSTUFF
6036.3V20%10UF
X5R
21
L3302
0402
FERR-120-OHM-1.5A
2
1 C33050.1UF
40216VX5R10%
2
1 C3306
X5R16V0.1UF10%
402
2
1 C3307
402
10%0.1UF
X5R16V
2
1 C3308
X5R16V10%
402
0.1UF
2
1 C339018PF
CERM402
5%50V
21
Y330114.31818
5X3.2-SM
CRITICAL
2
1 C338918PF
CERM402
5%50V
2
1R3300
MF-LF1%475
4021/16W
2
1 C3312
X5R6.3V20%10UF
6032
1 C331116VX5R402
10%0.1UF
2
1 C33040.1UF
X5R16V10%
4022
1 C330310%0.1UF
40216VX5R2
1 C3302
402X5R16V10%0.1UF
2
1 C330110%0.1UF
40216VX5R
2
1 C3310
402
6.3V
1UF10%
CERM
2
1 C3316
603X5R20%6.3V10UF
2
1 C33150.1UF10%
40216VX5R
21
L3301
0402
FERR-120-OHM-1.5A
2
1 C3314
402
6.3VCERM
10%1UF
21
R33022.2
5%1/16WMF-LF402
21
R33031
MF-LF
5%1/16W
402
2
1 C331710UF
X5R20%6.3V603
21
R3304
MF-LF1/16W5%
2.2
402
2
1R33011/16W10K
402MF-LF5%
5051
2
39
31
52
66
62
46
5
38
3528
17
12
49
6761
43
3
69
33
29
26
23
21
18
15
13
10
32
30
27
24
22
19
16
14
11
4847
5354
168
56
6564635857
40
8
4
67
37
42
45
36
41
44
55
34
25
60
20
59
9
U3301
OMIT
QFNCY284455
SYNC_MASTER=CLOCK
CLOCKSSYNC_DATE=06/03/2005
11133
051-6949 09
CK410_PCIF1_ITP_EN
CK410_PD_VTT_PWRGD_L
CK410_DOT96_27M_NONSPREAD_P
CK410_LVDS_P
CK410_CPU2_ITP_SRC10_N
PP3V3_S0_CK410_VDD48
CK410_XTAL_IN
PP3V3_S0_CK410_VDD_PCI
PP3V3_S0_CK410_VDD_REF
CK410_REF1_FCTSEL0CK410_CLK14P3M_TIMERCK410_USB48_FSA
CK410_DOT96_27M_SPREAD_N
CK410_SRC_CLKREQ8_LCK410_SRC8_PCK410_SRC8_N
CK410_SRC7_PCK410_SRC7_N
CK410_SRC_CLKREQ6_L
CK410_CPU2_ITP_SRC10_P
CK410_IREF
SMB_CK410_DATASMB_CK410_CLK
CK410_PCI1_CLK
CK410_SRC5_P
CK410_PCI4_CLK
CK410_PCI2_CLK
CK410_FSB_TEST_MODE
SB_CLK100M_SATA_OE_L
CK410_SRC5_N
CK410_SRC4_NCK410_SRC4_P
CK410_SRC3_PCK410_SRC_CLKREQ3_L
CK410_SRC3_N
CK410_SRC2_NCK410_SRC2_P
CK410_SRC1_N
CK410_SRC_CLKREQ1_LCK410_SRC1_P
CK410_LVDS_N
CK410_CPU1_NCK410_CPU1_P
CK410_CPU0_NCK410_CPU0_P
PM_STPPCI_LPM_STPCPU_L
CK410_SRC6_N
CLK_NB_OE_L
CK410_SRC6_P
CK410_PCI3_CLK
PP3V3_S0_CK410_VDDA
=PP3V3_S0_CK410
=PP3V3_S0_CK410
CK410_PCIF0_CLK
CK410_PCI5_FCTSEL1
PP3V3_S0_CK410_VDD_CPU_SRC
CK410_XTAL_OUT
=PP3V3_S0_CK410
34
34
34
33
33
33
34
26
34
34
34
34
34
34
34
34
34
34
34
34
53
34
27
27
34
34
34
34
34
23
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
23
23
34
14
34
34
6
6
34
34
6
www.vinafix.vn
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
OUTIN
OUTIN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
667MHZ
533MHZ
(166MHZ CPU CLK) R3461R3452R3461R3457R3452R3463R3459R3454
NO STUFF
R3454R3459R3463R3457
R3463
R3452R3457R3461R3454R3459
STUFF
(133MHZ CPU CLK)
CPU DRIVEN
FSB FREQUENCY SELECT:
(GPU CLK OE*)
(SPARE CLK OE*)
(YUKON CLK OE*)
NOTE: USE THESE PULL-DOWNS IF NOT CONNECTED TO GPIO’S
5 21 34
5 14 34
5 34 41
5 34 41
34 53
34 53
21R3400402
33
1/16W 5% MF-LF
21R3401 33
21R3402 33
21R3403 3321R3404 3321R3405 33
21R3406 33
21 R34073321 R340833
21 R34093321 R341033
21 R34113321 R341233
21 R34133321 R341433
21 R34153321 R341633
21 R34173321 R341833
21 R34193321 R342033
21 R34213321 R342233
21 R34233321 R342433
21R3429 MF-LF1/16W4021%
49.921R3430 49.9
21R3431 49.921R3432 49.9
21R3433 49.921R3434 49.9
21R3435 49.921R3436 49.9
21R3437 49.921R3438 49.9
21R3439 49.921R3440 49.9
21R3441 49.921R3442 49.9
21R3443 49.921R3444 49.9
21R3445 49.921R3446 49.9
60
5 22
44
67
58
5
5 23
21
R3462
402MF-LF1/16W
1K
5%
2
1R3460
402MF-LF1/16W5%1K
21
R34512.2K
5%1/16WMF-LF402
2
1R34635%1/16WMF-LF
0
402
2
1R34610
MF-LF1/16W5%
402
NOSTUFF
2
1R34570
MF-LF1/16W5%
402
NOSTUFF
2
1R3456
MF-LF1/16W5%1K
402
2
1R345905%1/16WMF-LF402
21
R3458
1/16W
1K
MF-LF5% 402
2
1R34521/16W5%
MF-LF
56
402
NOSTUFF
2
1R34540
MF-LF1/16W5%
402
21
R3453
5%
1K
1/16W MF-LF 402
21
R34551K5%1/16W MF-LF 402
92
92 21 R34713321 R347033
21R3499MF-LF5%
1K
4021/16W
5 23
21
R3497
402MF-LF1/16W5%
2.2K
21R3498MF-LF
33
1/16W 5% 402
21R3496 33
21R3495 1K
21R3494 1K
21R3493 1K
21 R349233
21 R34893321 R349033
21 R349133 21R3487 49.921R3488 49.9
21R3486 49.921R3485 49.9
5 12 34
5 12 34
5 7 34
5 7 34
5 14 34
5 21 34
5 22 34
5 22 34
5 34 84
5 34 84
09051-6949
34 111
SYNC_MASTER=N/A SYNC_DATE=N/A
CLOCKS: TERMINATIONS
SB_CLK100M_DMI_P
CK410_FSA
NB_BSEL<0>
CPU_BSEL<0>
PP1V05_S0
CPU_BSEL<2>
NB_BSEL<2>
NB_BSEL<1>
FSB_CLK_CPU_N
AIRPORT_CLK100M_PCIE_P
FSB_CLK_XDP_NFSB_CLK_XDP_P
NB_CLK100M_GCLKIN_PNB_CLK100M_GCLKIN_N
AIRPORT_CLK100M_PCIE_N
SB_CLK100M_DMI_PSB_CLK100M_DMI_N
SB_CLK100M_SATA_NSB_CLK100M_SATA_P
GPU_CLK100M_PCIE_P
ENET_CLK100M_PCIE_NENET_CLK100M_PCIE_P
GPU_CLK100M_PCIE_N
PP1V05_S0
PP1V05_S0
CK410_FSB_TEST_MODE
CPU_BSEL<1>
CK410_FSC
PCI_CLK_SMC
PCI_CLK_TPM
PCI_CLK_FW
PCI_CLK_SB
PCI_CLK_PORT80
AIRPORT_CLK100M_PCIE_P
NB_CLK100M_GCLKIN_PNB_CLK100M_GCLKIN_N
SB_CLK100M_SATA_PSB_CLK100M_SATA_N
SB_CLK100M_DMI_N
ENET_CLK100M_PCIE_PENET_CLK100M_PCIE_N
GPU_CLK100M_PCIE_P
CK410_PCI2_CLK
CK410_PCI3_CLK
CK410_PCI1_CLK
CK410_PCIF1_ITP_EN
CK410_PCIF0_CLK
CK410_CPU2_ITP_SRC10_P
CK410_SRC6_P
CK410_CPU2_ITP_SRC10_N
CK410_SRC4_PCK410_SRC4_N
CK410_SRC5_NCK410_SRC5_P
CK410_SRC8_P
CK410_SRC2_P
CK410_SRC1_P
CK410_USB48_FSA SB_CLK48M_USBCTLR
CK410_FSA
SB_CLK14P3M_TIMER
CK410_FSC
CK410_CLK14P3M_TIMER
CK410_PCI4_CLK TP_PCI_CLK_SPARE
CK410_REF1_FCTSEL0 TP_CLK14P3M_SPARE
CK410_SRC_CLKREQ3_L
CK410_SRC_CLKREQ1_L
CK410_SRC_CLKREQ8_L
AIRPORT_CLK100M_PCIE_N
CK410_CPU0_N
CK410_CPU1_N
CK410_CPU0_P
CK410_CPU1_P
FSB_CLK_CPU_N
FSB_CLK_NB_N
FSB_CLK_CPU_P
FSB_CLK_NB_P
SPARE_SRC3_PCK410_SRC3_PSPARE_SRC3_NCK410_SRC3_N
SPARE_SRC7_PCK410_SRC7_PSPARE_SRC7_N
MAKE_BASE=TRUEFSB_CLK_XDP_P
MAKE_BASE=TRUEFSB_CLK_XDP_N
CPU_XDP_CLK_PCPU_XDP_CLK_N
CK410_SRC1_N
CK410_SRC2_N
CK410_SRC8_N
CK410_SRC6_N
CK410_DOT96_27M_SPREAD_N CK410_27M_SPREADCK410_DOT96_27M_NONSPREAD_P CK410_27M_NONSPREAD
CK410_LVDS_NCK410_LVDS_P
TP_CK410_LVDS_NTP_CK410_LVDS_P
FSB_CLK_CPU_P
FSB_CLK_NB_PFSB_CLK_NB_N
CK410_SRC7_N
CK410_PCI5_FCTSEL1
=PP3V3_S0_CK410
GPU_CLK100M_PCIE_N
81
34
34
34
34
34
34
34
84
41
41
84
81
81
34
34
34
34
7
53
14
14
53
22
22
21
21
34
34
34
34
34
34
33
33
7
12
12
33
34
14
7
6
7
14
14
5
34
34
34
5
5
34
5
5
5
5
5
5
5
5
6
6
33
7
34
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
34
34
33
33
33
33
33
33
33
33
33
33
33
33
33
34
34
11
11
33
33
33
33
33
33
5
5
5
33
33
6
www.vinafix.vn
OUT
OUT
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PLACE < 0.5 IN FROM BALL OF U2100
PLACE SHORT AT PACKAGE
FROM SB WITHIN EACH PAIRCAPS TO BE SAME DISTANCE
VALUE=3900PF IN REFERENCE SCHEM
SATA PORT 0 IS NOT USED
NOTE: GO TO SB AND SMC
PATA CONNECTOR
SATA CONNECTOR
518S0251
SATA DIFF PAIR GND VIAS
"IDE ACTIVE"
PER ATA7 SPEC
516S0327
NC NC
NC
NCNCNC
Obsolete
MIN_NECK & MIN_LINE WIDTHPLACE C3805-06 CLOSE TO JC901 FOR PP5V_S0_PATA.APPLY A WIDE TRACE SHAPE FROM JC901 TO C3805-06.ARE CONTROLLED BY PP5V_S0 1MM / 0.6MM.
NOTE: ATA-2, NOW OBSOLETE
Per ATA Spec
Per ATA Spec
STUFFED PER LARRYNOTE: ???
2
1
R3852NO STUFF
10K
2
1
R38531K
2
1R38514.7K
2
1C38045%50V
CERM402
NO STUFF
10pF
2
1R3859
402
1/16W
6.2K5%
MF-LF2
1R38585%1/16WMF-LF402
0
2
1
R3857DEVELOPMENT
1/16WMF-LF402
1%499
7
6
5
4
3
2
1
JC900M-ST-SM
EP00-081-91
21
LED3800
GREEN-3.6MCD
DEVELOPMENT
2.0X1.25MM-SM
9
87
6
50
5
49
4847
4645
4443
4241
40
4
39
3837
3635
3433
3231
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
52
51
JC901F-ST-SM
CRITICAL
804RVS-0501S5RGM
2
1 C3805
402
10V
CERM
20%0.1uF
1
GV3808HOLE-VIA-P5RP25
1
GV3806HOLE-VIA-P5RP25
1
GV3801HOLE-VIA-P5RP25
1
GV3803HOLE-VIA-P5RP25
1
GV3805HOLE-VIA-P5RP25
1
GV3807HOLE-VIA-P5RP25
1
GV3802HOLE-VIA-P5RP25
1
GV3804HOLE-VIA-P5RP25
0
2
1 C3806
805-2
10V
10UF20%
CERM
21 C3800402
0.0047UF
21 C38010.0047UF402
21 C38020.0047UF402
21 C38034020.0047UF
2
1
R3824NOSTUFF
10K
2
1R3899100
MF-LF1/16W5%
402
21
R389724.91/16WMF-LF
1%402
0
2
1R23891K
402MF-LF1/16W5%
38 111
051-6949 09
Disk ConnectorsSATA_A_R2D_C_P
MAKE_BASE=TRUESATA_RBIAS
SATA_RBIAS_P
SATA_RBIAS_N
=PP5V_S0_PATA
IDE_PDDREQ
IDE_PDIORDYIDE_IRQ14
IDE_PDD<2>IDE_PDD<3>IDE_PDD<4>
IDE_PDCS3_LIDE_DASP_LIDE_PDCS1_L
IDE_PDD<5>
IDE_PDD<1>IDE_PDD<0>
IDE_PDD<7>IDE_PDD<6>
IDE_PDD<13>
IDE_PDDACK_L
IDE_PDD<14>
SATA_C_DET_L
SATA_A_D2R_N
SATA_A_D2R_P
TP_SATA_A_D2R_NMAKE_BASE=TRUE
TP_SATA_A_D2R_PMAKE_BASE=TRUE
TP_SATA_A_R2D_PMAKE_BASE=TRUE
TP_SATA_A_R2D_NMAKE_BASE=TRUE
=PP3V3_S0_PATA
SATA_C_D2R_C_PSATA_C_D2R_C_N
SATA_C_R2D_NSATA_C_R2D_P
SATA_C_D2R_N
SATA_C_R2D_C_N
SATA_C_D2R_P
SATA_C_R2D_C_P
IDE_DASP_L_DS
IDE_PDA<2>IDE_PDA<0>IDE_PDA<1>
IDE_PDIOW_LIDE_PDIOR_L
IDE_PDD<15>
IDE_PDD<12>IDE_PDD<11>IDE_PDD<10>IDE_PDD<9>IDE_PDD<8>
IDE_CSEL_PD
IDE_IOCS16_PU
=PP5V_S0_PATA
IDE_RESET_L
SATA_A_R2D_C_N
IDE_RESET_L
21
21
21
38
21
21
21
21
21
38
38
21
38
6
21
5
21
21
21
21
21 21
21
21
21
21
21
21
21
21
23
6
21
21
21
21
21 21
21
21
5
21
21
21
21
5
21
6
23 23
www.vinafix.vn
OUT
OUT
AVDDL0
AVDDL4
AVDD
THRML_PAD
VDDO_TTL0
AVDDL6
VDDO_TTL1
RX_N
TESTMODE
TSTPT
LINK*
LED_LINK10/100*LED_LINK1000*
LED_ACT*
RSET
CTRL25CTRL12
HSDACN
HSDACP
SWITCH_VAUXSWITCH_VCC
VMAIN_AVLBL
VAUX_AVLBLLOM_DISABLE*
XTALO
XTALI
SPI_DO
SPI_CLKSPI_CS
SPI_DI
VPD_CLK
VPD_DATA
MDIP3MDIN3
MDIN2
MDIP2
MDIN1MDIP1
MDIN0
MDIP0
WAKE*
REFCLKN
TX_N
VDDO_TTL3
VDDO_TTL2
VDDO_TTL4
VDD0
VDD1
VDD3
VDD2
VDD6
VDD5
VDD4
VDD7
AVDDL1
AVDDL2
AVDDL5
VDD25
PERST*
REFCLKP
RX_P
AVDDL3
TX_P
PU_VDDO_TTL0
PU_VDDO_TTL1TEST
TESTTWSI
SPI
MAIN CLK
PCI EXPRESSANALOG
MEDIALED
E2
WC*
NC0NC1
VCC
VSS
SCL
SDA
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IN
IN
IN
OUT
OUT
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
LAYOUT NOTE: PLACE C4110-11 AT U4101
NC
NCNC
NC
LAYOUT NOTE: PLACE C4112-13 AT U2100
OPTIONAL EXTERNAL LDO
2
1 C411627PF
CERM402
5%50V
21R4122
4.7K
1/16W
402
MF-LF
5%
21R4123
1/16W
5%
402
4.7K
MF-LF
2
1 C41010.1UF16V402X5R10%
14
15
6
41
38
47
6145
40
8 158
4844
39
33
64
13
7 2
12
49
50
29
65
46
11
9
34
35
36
37
54
53
16
55
56
4342
5
30
26
20
17
31
27
21
18
10
6362
60
59
2425
4
3
57
5251
32
2822
19
23
U4101QFN
88E8053
OMIT
7
4
8
5
6
2
1
3
U4102OMIT
SO8M24C08
2
1 C41400.1UF
X5R402
10%16V
3 1
Y4101CRITICAL
25.0000M
SM-3
21
C411020% 10V
402CERM
0.1UF
21
C4111
402
0.1UF20% 10VCERM
21
C4112
402
0.1UFCERM
10V20%
21
C4113
402CERM10V20%
0.1UF
21R4102
4.75K
1/16W
1%
402
MF-LF
21 R41304.7K21 R41314.7K
21R4151
NOSTUFF
1/16W
5%
402
MF-LF
0
21R4150
5%0
1/16W
402
MF-LF
21R4119
49.9
1%1/16W
MF-LF
402
21R4118
49.9
1%1/16W
MF-LF
402
21R4120
49.9
1%1/16W
MF-LF
402
21R4117
49.9
1%1/16W
MF-LF
402
21R4103
1%
MF-LF
49.9
1/16W
402
21R4104
MF-LF
1/16W
1%
402
49.9
21R4105
49.9
402
1%
1/16W
MF-LF
21R4106
49.9
402
1%
1/16W
MF-LF
21R4101
MF-LF
402
5%
1/16W
4.7K
2
1 C41060.001UF50V10%
402CERM 2
1 C410750V10%
402CERM
0.001UF
2
1 C411750V0.001UF
CERM402
10%2
1 C41180.001UF
CERM402
10%50V
2
1 C4105
CERM402
10%50V0.001UF
2
1 C410410%0.1UF
40216VX5R2
1 C41030.1UF
X5R402
10%16V2
1 C41020.1UF
X5R402
10%16V 2
1 C4150
CERM402
10%50V0.001UF
2
1 C412816V402X5R
0.1UF10%
2
1 C413310%
402
0.001UF50VCERM 2
1 C413450V402CERM
0.001UF10%
2
1 C413110%
402
0.001UF
CERM50V
2
1 C4132
402CERM
0.001UF10%50V2
1 C412716V10%X5R402
0.1UF2
1 C412616V402X5R10%0.1UF
2
1 C412916V402X5R
0.1UF10%
2
1 C413010%
402X5R
0.1UF16V
2
1 C413950V10%0.001UF
402CERM2
1 C413850V10%
402CERM
0.001UF
2
1 C413716V10%
402X5R
0.1UF2
1 C41360.1UF16V10%X5R402
2
1 C413516V10%
402X5R
0.1UF
2
1 C411527PF
402
5%50VCERM
ETHERNET CONTROLLERSYNC_DATE=06/22/2005SYNC_MASTER=ENET
41 111
051-6949 09
=PP1V2_S3_ENET
=PP3V3_S3_ENETENET_PU_VDDO_TTL1ENET_PU_VDDO_TTL0
=PP1V2_S3_ENET
ENET_MDI_N<3>ENET_MDI_P<3>
ENET_MDI_N<2>ENET_MDI_P<2>
ENET_MDI_P<0>
ENET_VPD_DATA
ENET_XTALI
=PP3V3_S3_ENET
=PP3V3_S3_ENET
ENET_VPD_DATA
ENET_VPD_CLK
ENET_CLK100M_PCIE_P
ENET_GATED_RST_L
ENET_CLK100M_PCIE_N
PCIE_WAKE_L
ENET_XTALO
ENET_CTRL12ENET_CTRL25
=PP3V3_S3_ENET
=PP2V5_S3_ENET
ENET_LED_LINK_L
ENET_RSET
ENET_VPD_CLK
PCIE_A_D2R_PPCIE_A_D2R_C_P
PCIE_A_D2R_NPCIE_A_D2R_C_N
PCIE_A_R2D_P PCIE_A_R2D_C_PPCIE_A_R2D_C_NPCIE_A_R2D_N
ENET_LED_LINK1000_LENET_LED_LINK10_100_L
PP3V3_S0
VMAIN_AVLBL
ENET_C4117_1 ENET_C4118_1
ENET_MDI_N<1>ENET_MDI_P<1>
ENET_MDI_N<0>
ENET_C4107_2ENET_C4106_2
=PP3V3_S3_ENET
ENET_LED_ACT_L
ENET_LOM_DIS_L
=PP2V5_S3_ENET
88 76 61
43
43
43
43
59
43
42
42
42
42
26
42 42
41
42
41
41
34
34
53
41
42
22
22
10
41
42
41
6
41
43
43
43
43
43
41
6
6
41
41
5
42
5
23
42
42
6
41
43
41
5
5
22
22
43
43
6
43
43
43
6
43
41
www.vinafix.vn
IN
IN
IN
DS
G
IN
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
2
1R420010K
NOSTUFF
2
1 C4202
16VX7R1210
22UF20%
2
1 C4203
1206-1CERM16V20%4.7UF
2
1 C4204
X5R402
10%16V
0.1UF
2
1R42024.7K
MF-LF1/16W5%
402
2
1 C42054.7UF20%
CERM1210
10V 2
1 C4206
16V10%
X5R
0.1UF
402
2
1 C4210
16V10%
402X5R
0.1UF
2
1 C4209
CERM
20%4.7UF6.3V
603
21
L4201FERR-330-OHM
SM
21
L4200FERR-330-OHM
SM2
1
3
Q42002N7002SOT23-LF
NOSTUFF
21R4201
0
3
4 2
1
Q4201
SOT223
PBSS5540Z
CRITICAL
2
1 C4200
16VX7R1210
22UF20%
2
1 C4201
16V10%
402X5R
0.1UF
42 111
051-6949 09
ETHERNET MISC
ENET_CTRL25
=PP3V3_S3_ENET
=PP3V3_S3_ENET
=PP2V5_S3_ENET
=PP1V2_S3_LAN
PP1V2_S3_ENETMAKE_BASE=TRUE
=PP1V2_S3_ENET
TP_ENET_CTRL12MAKE_BASE=TRUE
ENET_CTRL12
PP2V5_S3_ENETMAKE_BASE=TRUE
ENET_GATED_RST_L
SMC_RSTGATE_L
ENET_RST_L
Q4201_3
43
43
42
42
41
41
41
58
41
6
6
41
6
41
43
41
44
6
www.vinafix.vn
IO
IO
IO
IO
IO
IO
IO
IO
1CT:1CT
1CT:1CT
MDI_3-
ENET_CTAP
MDI_0+
75 OHM
MDI_0-
MDI_1-MDI_2+
MDI_2-75 OHM
RJ45CABLE SIDE
SECONDARY
J4
J8
J7
J6J5
J1
J2
J3
1CT:1CT
RJ45CHIP SIDE
ENET_CTAP
MDI_1+
MDI_3+
PRIMARY
SHIELD 1000PF, 2000V
1CT:1CT
75 OHM
75 OHM
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_5_ITEM
(514-0253)
21
L4300
SM
FERR-EMI-600-OHM
NOSTUFF
2
1 C4300
402
20%10VCERM
0.1UF2
1 C4301
402CERM
20%50V
0.001UF
2
1C4304
402CERM
10%0.001UF
50V
2
1 C430550V10%
CERM402
0.001UF
21
R4300
402MF-LF1/16W5%
0
9
8
7
6
5
4
3
2
10
1
13
12
11
JD600JFM38V10-0112-4F
OMIT
F-ANG-TH
2
1R43015%1/10WMF-LF603
330
DEVELOPMENT
2
1
LED4300GREEN-3.6MCD
2.0X1.25MM-SM
DEVELOPMENT
2
1R4302DEVELOPMENT
330
MF-LF1/10W5%
603
2
1LED4301DEVELOPMENT
GREEN-3.6MCD2.0X1.25MM-SM
2
1R4303DEVELOPMENT
330
MF-LF1/10W5%
603
2
1LED4302DEVELOPMENT
GREEN-3.6MCD2.0X1.25MM-SM
2
1R4304DEVELOPMENT
330
MF-LF1/10W5%
603
2
1LED4303DEVELOPMENT
GREEN-3.6MCD2.0X1.25MM-SM
21 R4350021 R4351021 R4352021 R4353021 R4354021 R4355021 R4356021 R43570
111
051-6949 09
43
ETHERNET CONNECTOR
JD600CON,RJ-45 7 DEGRESS 17_INCH_LCDCRITICAL1514-0300
CRITICALCON,RJ-45 7 DEGRESS 20_INCH_LCD1 JD600514-0301
ENET_MDI_R_N<3>ENET_MDI_R_P<3>ENET_MDI_R_N<2>ENET_MDI_R_P<2>ENET_MDI_R_N<1>ENET_MDI_R_P<1>ENET_MDI_R_N<0>ENET_MDI_R_P<0>
ENET_MDI_N<3>ENET_MDI_P<3>ENET_MDI_N<2>ENET_MDI_P<2>ENET_MDI_N<1>ENET_MDI_P<1>ENET_MDI_N<0>ENET_MDI_P<0>
VOLTAGE=2.5VMIN_NECK_WIDTH=0.38mmMIN_LINE_WIDTH=0.50mmPP2V5_ENET_CTAP
ENET_LED_LINK_LMAKE_BASE=TRUE
ENET_LED_LINK1000_LMAKE_BASE=TRUE
ENET_LED_LINK10_100_LMAKE_BASE=TRUE
LED4303_1
=PP3V3_S3_ENET
LED4301_1 LED4302_1LED4300_1
MAKE_BASE=TRUEENET_LED_ACT_L
GND_CHASSIS_RJ45
PP2V5_S3_ENET
42 41
41
41
41
41
41
41
41
41
41
41
41
6
41
6
42
www.vinafix.vn
IO
IO
G
S D
IO
OUT
PCI_AD1
VDD6
PCI_AD24
PCI_AD27
VDD5
XI
XO
RESET*
R1
R0
TPBIAS0
TPA0_P
TPA0_NTPB0_P
TPB0_N
TPBIAS1TPA1_P
TPA1_N
TPB1_PTPB1_N
TPBIAS2TPA2_P
TPA2_N
TPB2_PTPB2_N
LPSCPS
LKON
CNANANDTREE
CONTENDER
PC1
PC2
PC0
VAUX_PRESENT
NU2
NU1
MPCIACT*
SESM
TEST0TEST1
PTEST
ROM_CLK
ROM_AD
PLLVSS
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS8
VSS7
VSS9
VSS10
VSS11
VSS13
VSS12
VSSA0
VSSA1
VSSA2
VSSA3
CARDBUS*
PCI_INTA*
PCI_RST*
PCI_PME/CSTSCHG*
CLKRUN*
PCI_CLK
PCI_SERR*PCI_PERR*
PCI_GNT*PCI_REQ*
PCI_IDSEL
PCI_STOP*
PCI_DEVSEL*PCI_TRDY*
PCI_IRDY*
PCI_FRAME*PCI_PAR
PCI_CBE3*
PCI_CBE0*
PCI_CBE1*PCI_CBE2*
PCI_AD31
PCI_AD30PCI_AD29
PCI_AD26
PCI_AD28
PCI_AD25
PCI_AD21PCI_AD22
PCI_AD23
PCI_AD20
PCI_AD19PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD13
PCI_AD15
PCI_AD14
PCI_AD11
PCI_AD12
PCI_AD8
PCI_AD10
PCI_AD9
PCI_AD6
PCI_AD7
PCI_AD3
PCI_AD5PCI_AD4
PCI_AD2
PCI_AD0
PCI_VIOS
VDD10
VDD9
VDD8
VDD7
VDD4
VDD3
VDD1
VDD2
VDD0
PLLVDD
VDDA0
VDDA1
VDDA2
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
IN
IO
IO
IN
IO
IO
IO
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NOTE: 1% FOR BOM CONSOLIDATION
T1: TP (?)
THESE POWER PLANES SHOULD BE MOSTLY ISOLATED??? CHECK YELLOW EDS
21
R440910K
21
R440210K
2
1R4416
402
10K5%1/16WMF-LF
2
1
3
Q4400BSS138
SOT23
NOSTUFF
122
121
95
115
103
102
6156504438322721
81777166212
96
116
104
8272554943372619
93
111
128
101
109
114
9897
106105
111110
10099
108107
113112
710
125126
8
9
123
118
117
124
120
119
85
52
54
58
15
17
18
57
59
51
14
34
16
48
53
20
33476073
697074757678
2223
79
24252829303135363940
80
41424546626364656768
8384
878889
1274
6
92
9190
94
86
5
13
3
U4400TQFP
FW32306
OMIT
21
L4409600-OHM-300MA
0402
21 R445010K
21 R445110K21 R445210K
21 R445310K21 R445410K21 R445510K
21R44030
2
1R440410K
NOSTUFF
21R44071501%
1/16WMF-LF402
21
R4411
5%1/16W
0
402MF-LF
NOSTUFF
2
1 C44100.1UF20%
402
10VCERM
2
1 Y440024.576MHC49-USMD
CRITICAL
21
R4410
MF-LF1/16W1%
412
402
21
C441227PF
50V 4025% CERM
21
C440127PF
CERM50V 5% 402
21
C44020.1UF
402CERM20%10V
21
R4412
402MF-LF5%1/16W
510K
21
R4413
1/16W 1% MF-LF 402
2.49K
21
R4414
402MF-LF1/16W 5%
390K
051-6949 09
44 111
SYNC_MASTER=N/A SYNC_DATE=N/A
FW: FW323-06
FW_SMFW_SE
FW_TEST
FW_CONTENDERFW_PC2FW_PC1
PCI_AD<7>
PCI_PAR
=PP3V3_S5_FW
FW_A_TPA_N
FW_XTAL_XR
FW_XTAL_XI
PCI_RST_FW_LPCI_RST_L
=PP3V3_S5_FW
SMC_RSTGATE_L
FW_RESET_L
=PP3V3_S5_FW
=PP12V_S5_FW_PHY
FW_XTAL_X0
=PP3V3_S0_PCI
PCI_AD<0>
PCI_AD<2>
PCI_AD<4>PCI_AD<5>
PCI_AD<3>
PCI_AD<6>
PCI_AD<9>PCI_AD<10>
PCI_AD<8>
PCI_AD<12>PCI_AD<11>
PCI_AD<14>PCI_AD<15>
PCI_AD<13>
PCI_AD<16>PCI_AD<17>PCI_AD<18>
PCI_AD<19>PCI_AD<20>
PCI_AD<23>PCI_AD<22>PCI_AD<21>
PCI_AD<25>
PCI_AD<28>
PCI_AD<26>
PCI_AD<29>PCI_AD<30>PCI_AD<31>
PCI_C_BE_L<2>PCI_C_BE_L<1>PCI_C_BE_L<0>
PCI_C_BE_L<3>
PCI_FRAME_LPCI_IRDY_LPCI_TRDY_LPCI_DEVSEL_LPCI_STOP_LPCI_IDSEL
PCI_REQ3_LPCI_GNT3_LPCI_PERR_LPCI_SERR_L
PCI_CLK_FWPM_CLKRUN_L
PCI_PME_FW_L
PCI_RST_FW_LINT_PIRQD_L
FW_CARDBUS_L
TP_FW_ROM_AD
FW_ROM_CLK
TP_FW_MPCIACT_L
NC_FW_NU1NC_FW_NU2
TP_FW_VAUX_PRES
FW_PC0TP_FW_NANDTREE
TP_FW_CNATP_FW_LKON
FW_CPSTP_FW_LPS
FW_C_TPB_NFW_C_TPB_PFW_C_TPA_NFW_C_TPA_P
FW_C_TPBIASFW_B_TPB_NFW_B_TPB_PFW_B_TPA_NFW_B_TPA_P
FW_B_TPBIASFW_A_TPB_NFW_A_TPB_P
FW_A_TPA_PFW_A_TPBIAS
FW_R0
FW_R1
FW_RESET_L
FW_XTAL_X0
FW_XTAL_XI
PCI_AD<27>
PCI_AD<24>
PCI_AD<1>
=PP3V3_S5_FW PP3V3_S5_FW_VDDA
=PP3V3_S5_FW
67
46
46
46
60
46
46
45
45
45
58
45
45
44
44
58
44
26
26
26
26
26
26
26
26
23
26
44
44
22
22
6
46
44
44 22
6
42
44
6
46
44
6
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
34
5
22
44
22
46
46
46
46
46
46
46
46
46
46
46
46
46
46
44
44
44
22
22
22
6 45
6
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
2
1 C45000.01UF20%16VCERM402
2
1 C45010.01UF20%16VCERM402
2
1 C45020.01UF20%16VCERM402
2
1 C45040.01UF20%16VCERM402
2
1 C4505
402CERM16V20%0.01UF
2
1 C45060.1UF10V
402CERM
20%2
1 C45070.1UF10V20%
CERM402
2
1 C45080.1UF10V20%
CERM402
2
1 C4521
CERM
20%10V
0.1UF
4022
1 C452020%
CERM10V
0.1UF
4022
1 C45230.01UF20%16VCERM402
2
1 C45220.01UF20%16VCERM402
2
1 C4515
X5R6.3V20%10UF
603
2
1 C450310UF20%6.3VX5R603
2
1 C450920%
CERM402
10V
0.1UF2
1 C4510
402CERM
20%10V
0.1UF
051-6949 09
45 111
SYNC_MASTER=N/A SYNC_DATE=N/A
FW: DECAPS
=PP3V3_S5_FW
PP3V3_S5_FW_VDDA
46 44 6
44
www.vinafix.vn
TPI
VGND
VP
TPI#
TPO#
TPO
TPI
VGND
VP
TPI#
TPO#
TPO
SYM_VER-1
SYM_VER-1
SYM_VER-1
SYM_VER-1
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
FW_VP MAX IS 33V
FW_VP MAX IS 33V
TO FW CDS PIN (CABLE POWER DETECT)
514-0251 20_INCH_VERSION SHOWN
514-0251 20_INCH_VERSION SHOWN
"Snapback" & "Late VG" Protection
"Snapback" & "Late VG" Protection
8 WATTS MAX12 VOLTS
3rd TPA/TPB pair unused
Place close to FireWire PHY
(TPB-)
PORT 01394A
(TPA+)
(TPA-)
(TPB+)
(TPB-)
1394A
(TPA+)
(TPB+)
PORT 1
CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V
ESD Rail
[ LATE VG NOTES ]
IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A .5V DROP
(TPA-)
Termination
DESIGNED WITH INTENTION TO RESIZE FUSE LIMITS EQUAL FW SPEC 1.5A LIMIT
POSSIBLE CURRENT SHARING SCENARIOKCL = CABLE POWER + SYSTEM POWER = > 1.5 AMPS
R4690 VALUE WAS RECOMMENDED BY COLIN
21
D4600MURS320XXG
SMC
21
R4656
1W
0.025
1%
MF2512-1
21
R4602
1W
CRITICAL
0.025
1%
MF2512-1
2
1C462620%16V
CERM402
0.01uF
3
5
4
DP4620SOT-363
BAV99DW-X-F
6
2
1
DP4620BAV99DW-X-F
SOT-363
1
2
5
6
3
4
987 10
JE001CRITICAL
F-ST-THUF01613-M33-4F
OMIT
1
2
5
6
3
4
987 10
JE000
F-ST-TH
CRITICAL
UF01613-M33-4F
OMIT
2
1C46160.01uF
402CERM
20%16V
3
5
4
DP4610BAV99DW-X-F
SOT-363
3
5
4
DP4611SOT-363
BAV99DW-X-F
6
2
1
DP4610BAV99DW-X-F
SOT-363
6
2
1
DP4611SOT-363
BAV99DW-X-F
2
1 C46600.33UF
CERM-X5R
10%6.3V
402
2
1R46611/16W1%
402
56.2
MF-LF2
1R4660
402
1/16W1%
56.2
MF-LF
2
1 C46500.33UF
CERM-X5R
10%
402
6.3V
2
1R4651
402
1/16W1%56.2
MF-LF2
1R4650
MF-LF1/16W
402
1%56.2
2
1R4663
402
1/16W1%56.2
MF-LF2
1R4662
402MF-LF1/16W
1%56.2
2
1R46644.99K1%1/16W
402MF-LF
2
1C4664220PF
5%25V
CERM402
2
1R4653
402MF-LF1/16W1%56.2
2
1R4652
402MF-LF1/16W
56.21%
2
1R46544.99K
MF-LF1/16W1%
4022
1C4654220PF
402CERM
5%25V
21
L4690
SM-1
400-OHM-EMI
31
D4690BZX84C2V7-X-F
SOT23
CRITICAL
4
32
1
FL46102012
120-OHM
CRITICAL
4
32
1
FLE0112012
120-OHMCRITICAL
4
32
1
FL4620120-OHM2012
CRITICAL
4
32
1
FLE0212012
120-OHMCRITICAL
2
1
L46101206-LF
FERR-160-OHM
2
1
L46201206-LF
FERR-160-OHM
21
F4600
SM-LF
1.5AMP-33V
CRITICAL
21
F4602
MINISMD-LF
0.75AMP-13.2V
CRITICAL
3
5
4
DP4621SOT-363
BAV99DW-X-F
6
2
1
DP4621BAV99DW-X-F
SOT-363
I443
21
R4690374
402MF-LF
1%1/16W
2
1 C460950V
0.1UF10%
X7R603-1
2
1 C4615
603-1X7R
10%0.1UF50V
2
1 C462550V
0.1UF10%
X7R603-1
2
1C462350V
0.001UF10%
CERM402
2
1C4622
402CERM
10%0.001UF
50V
2
1C4612
402CERM
10%0.001UF
50V 2
1C4613
402CERM
10%0.001UF
50V
2
1C462150V
0.001UF10%
CERM402
2
1C46200.001UF
50V10%
CERM402
2
1C4610
402CERM
10%0.001UF
50V 2
1C4611
402CERM
10%0.001UF
50V
21
F4601
SM-LF
1.5AMP-33V
CRITICAL
FIREWIRE CONNECTORS
46 111
09051-6949
1514-0248 CRITICAL 17_INCH_LCDJE001CON,1394A 7 DEGREES
1 CRITICALJE000514-0251 20_INCH_LCDCON,1394A 7 DEGREES
514-0248 1 CRITICALJE000 17_INCH_LCDCON,1394A 7 DEGREES
1 CRITICAL514-0251 20_INCH_LCDJE001CON,1394A 7 DEGREES
MAKE_BASE=TRUEFW_PORT1_TPA_N
MAKE_BASE=TRUEFW_PORT1_TPB_P
MAKE_BASE=TRUEFW_PORT1_TPB_N
FW_B_TPA_P
FW_A_TPB_N
FW_PORT1_TPB_P
GND_CHASSIS_FIREWIRE
VOLTAGE=33V
PPFW_PORT1_VP_FLMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
VOLTAGE=33VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm
PPFW_PORT0_VP_FL
GND_CHASSIS_FIREWIRE
VOLTAGE=33VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.8MM
FW_VPPP12V_FW
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.8MMMIN_NECK_WIDTH=0.25MMVOLTAGE=12V
PP3V3_FW_ESD
PP3V3_FW_ESD
PP3V3_FW_ESD
FW_PORT1_TPB_N
FW_PORT1_TPA_P
FW_PORT1_TPA_N
FW_PORT1_TPB_FL_N
FW_PORT1_TPB_FL_P
FW_PORT1_TPA_FL_N
FW_PORT1_TPA_FL_P
FW_PORT0_TPA_N
FW_PORT0_TPB_N
FW_PORT0_TPB_P
FW_PORT0_TPA_P
PP3V3_FW_ESD
FW_PORT0_TPA_FL_N
FW_PORT0_TPA_FL_P
FW_PORT0_TPB_FL_N
FW_PORT0_TPB_FL_P
=PP12V_S5_FW_PHY
MAKE_BASE=TRUEMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.8MMFW_VP_R
VOLTAGE=24V
=PP12V_S5_FW
FW_C_TPB_N
FW_C_TPB_P
FW_C_TPA_N
TP_FW_C_TPB_NMAKE_BASE=TRUE
TP_FW_C_TPB_PMAKE_BASE=TRUE
TP_FW_C_TPA_NMAKE_BASE=TRUE
FW_C_TPA_P
FW_C_TPBIAS TP_FW_C_TPBIASMAKE_BASE=TRUE
TP_FW_C_TPA_PMAKE_BASE=TRUENO_TEST=TRUE
FW_PORT1_TPA_PMAKE_BASE=TRUE
FW_A_TPB_PMAKE_BASE=TRUE
FW_PORT0_TPB_PFW_PORT0_TPB_N
MAKE_BASE=TRUE
FW_A_TPA_N FW_PORT0_TPA_NMAKE_BASE=TRUE
FW_A_TPA_PMAKE_BASE=TRUE
FW_PORT0_TPA_P
FW_TPA_C<0>VOLTAGE=0V
VOLTAGE=1.86VFW_A_TPBIAS
FW_TPA_C<1>VOLTAGE=0V
PPFW_PORT1_VP
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmVOLTAGE=3.3VPP3V3_FW_ESD
PP3V3_FW_ESD_F
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmVOLTAGE=3.3V
=PP3V3_S5_FW
VOLTAGE=1.86V
FW_B_TPBIAS
PPFW_PORT1_VPMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=33V
PPFW_PORT0_VP
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm
VOLTAGE=33V
PPFW_PORTS_VP
FW_B_TPB_NFW_B_TPB_PFW_B_TPA_N
45
46
46
44
44
44
44
44
44
46
46
46
44
44
46
6
6
46
46
46
46
46
46
46
46
46
46
46
44
6
46
44 46
46
44 46
44 46
44
46
46
6
44
46
44
44
44
www.vinafix.vn
SYM_VER-1
SYM_VER-1
SYM_VER-1
EN*
GND
IN_0
IN_1
OC*
OUT_2
OUT_1
OUT_0
SYM_VER-2
SYM_VER-2
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
NOTE: STANDOFFS FOR J4700
SB HAS INTERNAL 15K PULL-DOWNS
BLUETOOTH
514-0247
740S0032
SB HAS INTERNAL 15K PULL-DOWNS
SB HAS INTERNAL 15K PULL-DOWNS
SB HAS INTERNAL 15K PULL-DOWNS
D+GND
PORT 2
D-VDD
GND
514-0247
PORT 1
VDDD-
D+GND
514-0247
PORT 0
VDDD-
TO M13D SLOT
NEAR JE350 PIN 14 IN THEORDER LISTED, AND NOT ONBOTH SIDES OF THE PIN.
LAYOUT NOTE:PLACE C4743, C4797 & L4740
PLACE C4742 CLOSED TO JE350.
518S0324
FHB CONNECTOR
SB HAS INTERNAL 15K PULL-DOWNS
SB HAS INTERNAL 15K PULL-DOWNS
D+
External USB Ports
4
32
1
L4712120-OHM2012
CRITICAL 2
1C4713
CERM402
16V
0.01uF20%
2
1C4712
CERM
20%
402
0.01uF16V
2
1 C4710150UF
SMD2
6.3VPOLY
20%
NOSTUFF
21
L4710
SM
FERR-250-OHM
2
1C472316V
CERM402
0.01uF20%
2
1C472216V
CERM
0.01uF
402
20%
2
1 C4720
SMD
20%
POLY6.3V
330UF
NOSTUFF
21
L4720
SM
FERR-250-OHM
4
32
1
L4722CRITICAL
2012120-OHM
4
32
1
L4732120-OHM2012
CRITICAL2
1C473316V
0.01uF
CERM402
20%2
1C4732
402
16V20%
0.01uF
CERM
21
L4730FERR-250-OHM
SM
21R4712 0
402
NOSTUFF
21R4713402
0NOSTUFF
21R4722402
0NOSTUFF
21R4723402
0NOSTUFF
21R4732402
0NOSTUFF
21R4733 0
402
NOSTUFF
9
8
7
6
5
4
3
2
14
13
12
11
10
1
16
15
JE350M-RT-SM
53261-1498
CRITICAL
6
7
8
5
3
2
1
4
U4700OMIT
TPS2024SOI
21
R4734
5%MF-LF1/8W805
0
21
R4735
MF-LF
0
1/8W
5%
805
21
R4736
5%
1/8W
0
805
MF-LF
21
R47420
402
NOSTUFF
21
R4743
402
0
NOSTUFF
4
32
1
L47522012
CRITICAL120-OHM
21
R47550
402
NOSTUFF
21
R4754
402
0
NOSTUFF
2
1C47430.01uF
20%
402
16VCERM2
1C4742
CERM402
0.01uF20%16V
21
L4740FERR-250-OHM
SM
21
R4746
5%MF-LF1/8W805
0
4
32
1
L47422012
120-OHMCRITICAL
21
F4701
MINISMD-LF
0.75AMP-13.2V
CRITICAL
2
1 C4797
CERM
20%10UF10V
805-2
9
87
65
43
2
10
1
J4700QT800101-1210S-8F
F-ST-SM
CRITICAL
2
1 C4798
10V20%CERM402
0.1UF
4
3
2
1
7
6
5
JE310F-ST-TH
UB01123M23-4F
OMIT
4
3
2
1
7
6
5
JE320OMIT
UB01123M23-4FF-ST-TH
4
3
2
1
7
6
5
JE330F-ST-TH
OMIT
UB01123M23-4F
21
R22520
21
R22540
21
R22530
2
1 C4799
CERM
20%10UF10V
805-2
1
SDF4700STDOFF-4OD4.5H-1.35-TH
1
SDF4701STDOFF-4OD4.5H-1.35-TH
2
1
3
D4700
RCLAMP0502BSC-75
CRITICAL
2
1
3
D4701
RCLAMP0502BSC-75
2
1
3
D4702
RCLAMP0502BSC-75
2
1
3
D4705RCLAMP0502B
SC-75
NOSTUFF
2
1
3
D4706NOSTUFF
RCLAMP0502BSC-75
2
1
3
D4707NOSTUFF
RCLAMP0502BSC-75
USB Device Interfaces
11147
051-6949 09
USB RECEPTACLE,4P,UB1123-M23-4F3 JE310,JE320,JE330 CRITICAL 17_INCH_LCD514-0294
514-0295 CRITICAL3 JE310,JE320,JE330 20_INCH_LCDUSB RECEPTACLE,4P,UB1123-M33-4F
IC,TPS2023DG4,ANALOG SW,8 PIN SOIC U47001353S1370 CRITICAL
USB_PORT0_N
VOLTAGE=5VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
PP5V_USB2
=PP3V3_S3_BT
PP5V_S3_BNDI
VOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
USB_A_OC_L
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
VOLTAGE=0V GND_USB_PORT1
USB_BT_NMAKE_BASE=TRUEUSB_BT_PMAKE_BASE=TRUE
PP5V_BNDI_LE340
=PP5V_S3_USB
MIN_NECK_WIDTH=0.25MMVOLTAGE=0VMIN_LINE_WIDTH=0.6MM
GND_USB_PORT2
VOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
PP5V_USB2_PORT1_F
VOLTAGE=0VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
GND_BNDI
GND_CHASSIS_BNDI
=PP5V_S3_BNDI
USB_G_PUSB_G_N
USB_A_OC_L USB_C_OC_L
USB_B_OC_L USB_D_OC_L
USB_C_OC_L USB_E_OC_L
NC_JE350_13
VOLTAGE=0V GND_USB_PORT0
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
GND_CHASSIS_USB
AUD_MIC_IN_P_CONNGND_AUDIO_MIC_CONNAUD_MIC_IN_N_CONN
GND_BNDI
PP5V_S3_BNDI
USB_PORT0_P
USB_PORT1_NUSB_PORT1_P
USB_A_P
USB_A_N
USB_PORT2_P
USB_C_P
USB_C_N
USB_E_N
USB_E_P
VOLTAGE=0
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
GND_CHASSIS_USB
GND_CHASSIS_BNDI
USB_IR_PUSB_IR_N
USB_H_P
USB_H_N
MIN_LINE_WIDTH=0.6MMVOLTAGE=5VMIN_NECK_WIDTH=0.25MM
PP5V_USB2_PORT2_F
GND_CHASSIS_USB
VOLTAGE=5VMIN_NECK_WIDTH=0.25MM
PP5V_USB2_PORT0_F
MIN_LINE_WIDTH=0.6MM
USB_D_N
USB_D_P
GND_CHASSIS_BNDI
USB_CAMERA_PUSB_CAMERA_N
USB_PORT2_N
47
47
22
22
47 47
47
47
47
47
47
47
6
47
22
6
47
6
6
22 22
22 22
22 22
6
73
73
73
47
47
22
22
22
22
22
22
6
6
22
22
6
22
22
6
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
BLANK
11148
09051-6949
www.vinafix.vn
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CARD-READER USB CONN
SB HAS INTERNAL 15K PULL-DOWNS2
1 C49510.1UF
402CERM20%10V
NOSTUFF
2
1 C4950
805-2
10V
10UF20%
CERM
NOSTUFF
4
3
2
1
6
5
J495053261-0498
M-RT-SM
NOSTUFF
2
1
3
D4900CRITICAL
RCLAMP0502BSC-75
NOSTUFF
051-6949 09
49 111
Flash Connector
USB_FLASH_PMAKE_BASE=TRUE
USB_FLASH_NMAKE_BASE=TRUE
=PP3V3_S3_USB
USB_F_NUSB_F_P
22
22
6
www.vinafix.vn
IN
IN
OUT
OUT
KEY
SYM_VER-2
IO
IO
IN
IN
IN
IO
IO
OUT
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NOTE: STANDOFFS FOR J5300
PLACE R5302-03 SUCH THAT STUB LENGTH ISMINIMIZED IF THE RESISTORS ARE NOT STUFFED
LAYOUT NOTE:
SB HAS INTERNAL 15K PULL-DOWNSPLACE CAPS < 250 MILS FROM U2100
1
SDF5300STDOFF-4OD5.6H-1.35-TH
1
SDF5301STDOFF-4OD5.6H-1.35-TH
21C5300
0.1UF21
C5301
0.1UF
9
87
6
5251
50
5
49
4847
4645
4443
4241
40
4
39
3837
3635
3433
3231
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
54
53
J5300CRITICAL
F-RT-SMASOB226-S80N-7F
21
R5300
402
0
NOSTUFF
21
R5301NOSTUFF
0
402
4
3 2
1
L5300CRITICAL
2012
120-OHM
2
1 C5304
402
10V
0.1UF20%
CERM 2
1 C5305
402
20%0.1UF
CERM10V 2
1 C53060.1UF20%10VCERM402
2
1 C5307
402CERM10V
0.1UF20%
2
1 C5308
402
20%0.1UF10VCERM 2
1 C531010V
402CERM
0.1UF20%
2
1 C5309
CERM402
20%0.1UF10V
21R5302 0
21R5303 0
2
1 C5311
603
10UF6.3VX5R
20%
21
R53040
2
1 C5312
603
10UF6.3VX5R
20%
2
1 C5314
603
20%
X5R6.3V
10UF2
1 C5313
402CERM10V20%0.1UF
051-6949
11153
09
SYNC_MASTER=N/A SYNC_DATE=N/A
AIRPORT CONN
AIRPORT_WAKE_LPP3V3_S3
=PP1V5_S0_AIRPORT
USB_AIRPORT_N
=PP3V3_S0_AIRPORT
AIRPORT_CLK100M_PCIE_N
PCIE_WAKE_L
PCIE_B_D2R_NPCIE_B_D2R_P
USB_AIRPORT_P
AIRPORT_CONN_CLK =SMB_AIRPORT_CLKAIRPORT_CONN_DATA =SMB_AIRPORT_DATA
PCIE_B_R2D_C_P
AIRPORT_CLK100M_PCIE_P
CK410_SRC_CLKREQ6_L
AIRPORT_RST_L
USB_B_P
USB_B_NPCIE_B_R2D_C_NPCIE_B_R2D_PPCIE_B_R2D_N
83 59 41
22
22
6
6
6
34
23
5
5
27
27
22
34
33
6
22
22 22
www.vinafix.vn
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 11154
09051-6949
SYNC_MASTER=N/A SYNC_DATE=N/A
PCIE UNUSED PORTS
MAKE_BASE=TRUETP_PCIE_C_R2D_C_P
PCIE_F_D2R_N
PCIE_F_D2R_PMAKE_BASE=TRUE
TP_PCIE_F_D2R_N
MAKE_BASE=TRUETP_PCIE_F_D2R_P
PCIE_F_R2D_C_P
PCIE_F_R2D_C_N
TP_PCIE_F_R2D_C_PMAKE_BASE=TRUE
TP_PCIE_F_R2D_C_NMAKE_BASE=TRUE
PCIE_E_D2R_P
PCIE_E_D2R_NMAKE_BASE=TRUE
TP_PCIE_E_D2R_N
MAKE_BASE=TRUETP_PCIE_E_D2R_P
PCIE_E_R2D_C_N
PCIE_E_R2D_C_P TP_PCIE_E_R2D_C_PMAKE_BASE=TRUE
TP_PCIE_E_R2D_C_NMAKE_BASE=TRUE
PCIE_D_D2R_N
PCIE_D_D2R_P TP_PCIE_D_D2R_PMAKE_BASE=TRUE
TP_PCIE_D_D2R_NMAKE_BASE=TRUE
PCIE_D_R2D_C_P
PCIE_D_R2D_C_N TP_PCIE_D_R2D_C_NMAKE_BASE=TRUE
TP_PCIE_D_R2D_C_PMAKE_BASE=TRUE
PCIE_C_D2R_P TP_PCIE_C_D2R_PMAKE_BASE=TRUE
PCIE_C_D2R_N TP_PCIE_C_D2R_NMAKE_BASE=TRUE
PCIE_C_R2D_C_PMAKE_BASE=TRUE
TP_PCIE_C_R2D_C_NPCIE_C_R2D_C_N
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
www.vinafix.vn
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
IN
IN
OUT
OUT
OUT
P16
P51P50
P42/SDA1
P97/IRQ15*/SDA0
P95/IRQ14*
P94/IRQ13*
P93/IRQ12*P92/IRQ0*
P91/IRQ1*
P86/IRQ5*/SCK1/SCL1
P83/LPCPD*
P82/CLKRUN*
P80/PME*
P35/LRESET*
P34/LFRAME*
P10
P12
P13P14
P15
P17
P31/LAD1P30/LAD0
P32/LAD2
P33/LAD3
P36/LCLKP37/SERIRQ
P44/TMO1
P77/AN7
P76/AN6
P81/GA20
P96/EXCL
P11
P47/PWX1/PWM1
P45
P46/PWX0/PWM0
P40/TMIO
P43/TMI1/EXSCK1
P27
P26
P25P24
P23P22
P21
P20
P41/TMO0
P52/SCL0
P60/KIN0*
P61/KIN1*P62/KIN2*
P63/KIN3*P64/KIN4*
P65/KIN5*
P66/IRQ6*/KIN6*P67/IRQ7*/KIN7*
P70/AN0
P71/AN1
P72/AN2P73/AN3
P74/AN4P75/AN5
P84/IRQ3*/TXD1
P85/IRQ4*/RXD1
P90/IRQ2*
(1 OF 4)
PA2/KIN10*/PS2ACPA3/KIN11*/PS2AD
PA5/KIN13*/PS2BDPA4/KIN12*/PS2BC
PB2
PB3PB4
PE0
PG6/EXIRQ14*/EXSDAB
PG5/EXIRQ13*/EXSCLA
PH1/EXIRQ7*PH0/EXIRQ6*
PG7/EXIRQ15*/EXSCLB
PG4/EXIRQ12*/EXSDAA
PH3/EXEXCLPH2/FWE
PB5
PF4/PWM4
PF2/IRQ10*/TMOY
PG2/EXIRQ10*/SDA2
PG0/EXIRQ8*/TMIX
PF7/PWM7
PC3/TIOCD0/TCLKB/WUE11*
PH5
PB7
PB6
PH4
PF5/PWM5
PF6/PWM6
PG1/EXIRQ9*/TMIY
PA6/KIN14*/PS2CC
PA7/KIN15*/PS2CD
PD0/AN8
PD1/AN9
PD2/AN10PD3/AN11
PD4/AN12
PD5/AN13PD6/AN14
PD7/AN15
PF0/IRQ8*/PWM2PF1/IRQ9*/PWM3
PB0/LSMI*PB1/LSCI
PC0/TIOCA0/WUE8*
PC1/TIOCB0/WUE9*PC2/TIOCC0/TCLKA/WUE10*
PC4/TIOCA1/WUE12*PC5/TIOCB1/TCLKC/WUE13*
PC6/TIOCA2/WUE14*
PC7/TIOCB2/TCLKD/WUE15*
PG3/EXIRQ11*/SCL2
PF3/IRQ11*/TMOX
PA1/KIN9*/PA2DD
PA0/KIN8*/PA2DC
PE1*/ETCK
PE2*/ETDIPE3*/ETDO
PE4*/ETMS
(2 OF 4)
VCL
AVREF
VCC
VCC
VCC
AVCC
XTAL
EXTAL
AVCC
VCC
MD1
MD2
NMI
RES*
ETRST*
AVREF
AVSSVSS
(3 OF 4)
NC22NC21
NC20
NC19NC18
NC17NC16
NC15
NC14NC13
NC12
NC9
NC6
NC11
NC10
NC8
NC7
NC5NC4
NC3
NC2NC1
NC0
(4 OF 4)
OUT
OUT
IO
OUT
IN
IN
IN
OUT
IN
IO
IN
IO
OUT
OUT
IN
IN
OUT
OUT
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
IN
IN
IN
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
OUT
IN
IN
OUT
OUT
IN
OUT
OUT
ININ
OUT
OUT
IO
IO
IO
IO
IN
IN
IN
OUT
OUT
OUT
IO
IN
IN
IN
IN
IO
IO
IN
IN
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SMC_XXX WHERE XXX IS THE PORT NUMBER.
CAN BE LEFT NO-CONNECTED.DRIVEN OUTPUTS ALWAYS SO THEYTHEY ARE SET BY SOFTWARE TO BEUNUSED PINS HAVE THE FORMAT
LAYOUT NOTE:PLACE R5899 AND C5820 NEAR SMC PIN N14,N15
VCL IS INTERNAL RAIL
LAYOUT NOTE:PLACE C5807 NEAR PIN F1
2
1 C580222UF
X5R6.3V20%
805
2
1 C5807
CERM-X5R6.3V20%0.47UF
402
2
1 C5803
402CERM
20%0.1UF10V
2
1 C5820
402
10VCERM
20%0.1UF
21
R5899
MF-LF402
4.7
5%1/16W
2
1 C5804
402CERM10V20%0.1UF
21
XW5800SM
2
1 C5805
CERM
0.1UF20%10V
4022
1 C58060.1UF
402CERM10V20%
G2
H1
H2J4
J3
J1J2
K4
B6
A6C6
D6B7
A7
C7
P15N13
R15
P14R14
P13R13
N12
J13
J12K14
K13
K12L15
L14
L13
F2G4
G1
C1D3
C2
B1C3
D5
B5A5
D7
A8
C8D8
B9A9
C9
D9
F14E13
E15
E14E12
D15D14
D13
C15
D12C14
B15
B14A15
C13
B12 U5800OMIT
SMC_H8S2116BGA
B3D4
C4
K2F3
E1
R7P7
M8
R8P8
N9
R9P9
N5
P5R5
M6
N6R6
P6
M7
L2L4
M1
M2M3
M10
N10
R10P10
N11
R11P11
M11
H12
H13H15
H14G12
G13
G15G14
D11
A12
C11B11
A11D10
A10
B10
N1M4
N2
R1N3
R2
P3R3 U5800
OMIT
SMC_H8S2116BGA
A2
D2
B4
A4
A13
B13
F13
F12
R4
P4
D1
F1
A1
J15
P1
P2
E3
F4
K1
E2
B2
L1
R12P12
M15
M14
N15
N14
U5800OMIT
SMC_H8S2116BGA
L12M13
M12
N7M5
N4
L3
N8
M9H4
K3
E4
B8A3
C5
C10C12
A14F15
J14
K15
H3G3
U5800
OMIT
SMC_H8S2116BGA
2
1R580910K1/16W402
5%MF-LF
2
1R58011/16W10K5%
402MF-LF
2
1R5802
402MF-LF
10K5%1/16W
2
1R580305%1/16WMF-LF402
NOSTUFF
2
1R5898
4021/16W5%MF-LF
10K
11158
09051-6949
SYNC_MASTER=N/A SYNC_DATE=N/A
SMC
SMC_THRMTRIP
SMC_XDP_TDO_3_3_L
SMC_EXCARD_CP
SMC_RUNTIME_SCI_L
SMC_XDP_TCK_3_3SPI_CE_L
SMC_SYS_VSETSMC_SYS_ISET
SMC_CPU_RESET_3_3_LSMC_BATT_ISET
SMC_LIDSMC_PF1SMC_PF0
SMC_TDOSMC_TMS
SMB_BSA_DATA
SMS_ONOFF_L
SMC_FAN_0_TACHSMC_FAN_1_TACHSMC_FAN_2_TACHSMC_FAN_3_TACH
SMS_X_AXISSMS_Y_AXISSMS_Z_AXISSMC_ANALOG_IDSMC_NB_ISENSESMC_MEM_ISENSE
SMC_XDP_TMS_L
SMC_DCIN_ISENSE
=PP3V3_S5_SMC
PM_SLP_S3_L
SMC_XDP_TCKSMC_SYS_LED
SMC_TX_LSMC_RX_LSMC_SMB_0_CLK
PM_SLP_S5_LPM_SLP_S4_L
SMC_BS_ALRT_L
SMC_ADAPTER_EN
SMS_INT_L
SMC_CPU_ISENSESMC_CPU_VSENSE
SPI_SOSPI_SI
SMC_PROCHOT_3_3_L
ALL_SYS_PWRGDRSMRST_PWRGDSMC_SB_NMIPM_RSMRST_LIMVP_VR_ONPM_PWRBTN_L
SMB_A_S3_CLKSMB_B_S0_DATASMB_B_S0_CLK
ALS_GAIN
SMC_FAN_3_CTLSMC_FAN_2_CTLSMC_FAN_1_CTLSMC_FAN_0_CTL
SMC_EXCARD_PWR_OC_LSMC_EXCARD_PWR_EN
SYS_ONEWIRE
SMC_TPM_RESET_LPM_EXTTS_L<0>PM_THRM_L
BOOT_LPC_SPI_LSMC_RCIN_L
SMC_WAKE_SCI_L
SMC_PM_G2_EN
LPC_AD<2>
PCI_CLK_SMC
SMC_SYS_KBDLED
SMC_P22SMC_P21SMC_P20
SMC_GPU_ISENSE
SMC_PBUS_VSENSE
PM_BATLOW_L
SMC_EXTSMI_L
PM_SYSRST_L
SMC_XTALSMC_EXTAL
SMC_VCL
MIN_NECK_WIDTH=0.20 MM
PP3V3_AVCC_SMCMIN_LINE_WIDTH=0.25 MM
SMC_RST_L
=PP3V3_S5_SMC
KBC_MDE
ALS_LEFT
SMC_MD1
PP3V3_AVREF_SMC
ALS_RIGHT
SMC_PROCHOT
SMC_TRST_L
SMC_NMI
GND_SMC_AVSS
SPI_ARBSMC_RSTGATE_LPM_LAN_ENABLE
SMC_GPU_VSENSE
SMC_BATT_CHG_ENSMC_P26SMC_P27
LPC_AD<0>LPC_AD<1>
LPC_AD<3>LPC_FRAME_LSMC_LRESET_L
INT_SERIRQ
SMB_BSB_DATASMC_TPM_PPSMC_XDP_TRST_L
SMC_ODD_DETECTISENSE_CAL_EN
SMC_XDP_TDI_L
GND_SMC_AVSS
=PP3V3_S5_SMC
SPI_SCLK
SMC_CPU_INIT_3_3_L
SMC_TPM_GPIO
SC_TX_LSC_RX_L
SMC_BATT_TRICKLE_EN_LSMC_P23
SMB_A_S3_DATASMB_BSA_CLK
SMC_BATT_VSET
SMC_TDISMC_TCKSMC_CASE_OPEN
SMC_SMB_0_DATASMC_SUS_CLK
SMC_BC_ACOKSMC_ONOFF_L
SMB_BSB_CLK
PM_SUS_STAT_LPM_CLKRUN_L
SMC_BATT_ISENSESMC_FWIRE_ISENSE
SMC_FWE
88
67
79
85
85
60
60
60
59
77
60
60
67
26
59
76
67
67
67
67
67 76
59
60
60
67
44
63
59
59
66
66
58
23
59
59
77
26
63
63
77
66
66
67
59
23
60
60
23
60
58
59
44
60
60
60
60
60 59
58
63
59
59
60
23
59
59
59
23
59
22
59
59
59
59
59
59
59
5
5
59
59
65
65
65
59
59
59
59
59
59
59
59
76
6
6
59
59
5
5
59
23
23
59
59
23
76
76
22
22
59
26
76
23
23
75
23
59
59
59
59
59
65
65
65
59
59
59
59
14
10
22
21
23
59
21
34
59
59
59
59
59
76
23
23
5
59
59
59
6
59
60
59
59
59
60
58
22
42
23
59
59
59
59
21
21
21
21
6
23
59
59
59
59
76
59
58
6
22
59
59
59
59
59
59
59
59
59
5
5
59
59
59
59
59
59
23
5
59
59
59
www.vinafix.vn
G
D
S
G
D
S
GND
V+
GND
V+ GND
V+
IO
IO
IN OUT
GND
GND
V+
NCCD
GND
OUT
VDD
G
D
S G
D
S
G
D
S
D
GS
OUT
IO
IO
IO
IO
IO
IO
IN
IO
IO
IO
IO
OUT
IO
IO
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SMC 3.3V -> CPU 1.05V SHIFTER
DEBUG TESTPOINTS ON SELECTED INPUTS/OUTPUTS
SMC ALIASES, PULLUPS, AND TESTPOINTS
SMC PULL-UPS
SENSE GPU VCORE
WIRE-OR DIMM OVERTEMP TO SMC
SENSE GPU REGULATOR OUTPUT CURRENT
CPU 1.05V -> SMC 3.3V SHIFTER
518S0328
LAYOUT NOTE: PLACE CAPACITORS BETWEEN CRYSTAL AND SMC/TPM
518S0327
TPM CRYSTAL
POWER BUTTON HEADER(REF DES PRESERVED FOR PLACEMENT PURPOSE)
(REF DES PRESERVED FOR PLACEMENT PURPOSE)
SMC I2C BUS PULLUPS (INCLUDING UNUSED ONES)
SYS POWER BUTTON
SMC RESET BUTTON
I2C ADDR:72(1001000)
AMBIENT LIGHT SENSOR CONNECTOR
TURN ON 3.3V VREF ONLY AFTER SMC
TI
PINS ON PORT 7.PULLDOWN UNUSED ANALOG SENSE
WIRE SMC TO SB PINS
PULLUPS FOR SYSTEM STATE PINS
SMC CRYSTAL
GENERATE 0.48V MID-VREF
PULLDOWNS FOR SYSTEM STATE PINS
(PULLUP ON CPU PAGE)
ALIAS SENSORS INTO SMC I2C BUSSES
PCB: RUN A TRACE FROM EACHANALOG OPAMP PSEUDO-DIFFERENTIALLYTIE INTO DIGITAL GND VERY CLOSE TOSMC’S XW5800. PLACE XW5900 NEAR XW5800.NEXT TO THIS GND TRACE AND
R5925 VALUE SUBJECT TO CHANGE.(PULLDOWN ON CPU PAGE)
PRECISION 3.3V AVREF FOR SMC
(PULLUP ON CPU PAGE)
SMC-CPU JTAG LEVEL-SHIFTERSELECT TPM GPIO
R5927 VALUE SUBJECT TO CHANGE.(PULLDOWN ON ITP CONNECTOR PAGE)
TIE ANALOG SENSOR OPAMP GROUNDS TO SMC GROUND
3.3V RAIL AND AVCC RAIL IS UP.
NO-CONNECT UNUSED PINS
TPM RESET PULLUP
NC OR PULLDOWN UNUSED ANALOG SENSE PINS
PCB: ENSURE FSB_CPURST_L FANS OUT FROM U1200AND MINIMIZE ROUTE LENGTH TO U5999.
WHITE SYSLED
4
3
2
1
6
5
J290153398-0476
F-ST-SM
CRITICAL
21 R591710K
21 R59200SMC_TPM_GPIO1
21 R5921
1/16W
SMC_TPM_GPIO20
5%
MF-LF402
21 R5922DEVELOPMENT_SMC
0
21 R5923DEVELOPMENT_SMC
0
402MF-LF1/16W5%
1
2
6
Q5901SOT-3632N7002DW-X-F
4
5
3
Q59012N7002DW-X-FSOT-363
3
2
5
4
12
U5999
LMV339TSSOP
2
1C590320% 10V
402CERM
0.1uF
2
1R59305%
402MF-LF1/16W
6.2K
2
1
4
3
J290353398-0276
M-ST-SM
2
1R59311/16WMF-LF402
5%1K
2
1R5933
MF-LF1/16W
1K5%
4023
1
7
6
12
U5999
LMV339TSSOP
3
14
9
8
12
U5999
LMV339TSSOP
2 1
LED2901
3X2MM-SMWHITE-500MCD
21 R591610K
2
1R590156.21%
MF-LF402
1/16W
17_INCH_LCD
2
1
3
Q5900FDV301NSOT23-LF
21R5830 10K21R5829 10K21R5808 10K402
5%
MF-LF1/16W
21R5832 10KNOT_DEVELOPMENT_SMC
21R5831 10K
21R5817 10K21R5815 10K
2
1R59024.7K5%
402MF-LF
NOSTUFF
1/16W
21R5833NOT_DEVELOPMENT_SMC
10K
21R5819 10K21R5821 10K
21R5818 100K
21R5822 10K21R5823 10K21R5824 10K21R5825 10K21R5826 10K21R5828 10K
21R5827 10K
21
R5995
402
SMC_TPM_PP
0
5%1/16WMF-LF
2
1 C59410.01uF
CERM402
20%16V
2
1C59426.3VX5R
10uF
603
20%
21
3
U5940REF3133SOT23-3
CRITICAL
2
1 C5940
4026.3V20%CERM-X5R
0.47uF
3
13
11
10
12
U5999
LMV339TSSOP
2
1 C590110V20%
402
0.1uF
CERM
2
1R5932
402
1K
MF-LF1/16W5%
21 R5924
MF-LF
10K5%
1/16W
21
XW5900SM
21
R5940
MF-LF1/16W5%
NOSTUFF
0
402
2
1
4
3
5
U5900RN5VD30A-F
SOT23-5
CRITICAL
2
1 C59196.3VX5R402
20%0.22UF
21
R5919
MF-LF1/16W
402
1%
4.53K
1
2
6
Q5902SOT-3632N7002DW-X-F
NOSTUFF
4
5
3
Q59022N7002DW-X-FSOT-363
NOSTUFF
1
6
2 Q5903MMDT3904XFSOT-363-LF
NOSTUFF
21
R59251K
5%1/16W
402MF-LF
NOSTUFF
4
3
5 Q5903SOT-363-LFMMDT3904XF
NOSTUFF
21
R5927
1/16WMF-LF
5%
402
1K
NOSTUFF
21
R594110K
MF-LF402
5%1/16W
2
1 C5943
402
1UF10%6.3VCERM
2
1
3
Q5911SOT23-LF2N7002
2
1
3
Q5910SOT-23
NTR4101P2
1R594210K5%1/16WMF-LF402
21
R5934
1/16WMF-LF
5%
402
1K
21
R5935
1/16WMF-LF
5%
402
1K
43
21
SW5901SM-LFSPST
21 R59032.2K
21 R59042.2K
21 R59052.2K
21 R59062.2K
2
1R59001/16W5%1KMF-LF402
21
R59071K
MF-LF1/16W402
5%
2
1 Y5800SM-320.000M
OMIT
21
C580022PF
40250V5%CERM
21
C580122PF
CERM50V
5%402
41 Y6700
SM-LF32.768K
CRITICAL
21
C670415PF
5%
402CERM50V
21
C670515PF
402 CERM50V 5%
2
1C59000.01UF
16V10%
402CERM
2
1 C59020.1uF
402CERM
20% 10V
21 R591010K
21 R591110K43
21
SW5900DEVELOPMENT
SPSTSM-LF
21 R591310K
21 R591210K
21 R591410K
21 R591510K
RES,LF,MTL FILM,39.2 OHM,1%,402 20_INCH_LCDR59011114S0081
Y5800XTAL,20.00,80PPM,HC49,SMD,LF1197S0165 CRITICAL
051-6949 09
59 111
SMC & TPM SUPPORT
TP_U5999_P14
TP_U5999_P13
=PP3V3_S5_SMC
SMC_XDP_TCK_3_3
SMC_XDP_TDO_3_3_L
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
SYS_LED_DRV_K
TP_SMC_PB7MAKE_BASE=TRUE FUNC_TEST=TRUE
TP_SMC_PF1MAKE_BASE=TRUE
TP_ALS_RIGHTMAKE_BASE=TRUE
TP_ALS_LEFTMAKE_BASE=TRUE FUNC_TEST=TRUE
TP_SMC_ADAPTER_ENMAKE_BASE=TRUE FUNC_TEST=TRUE
TP_PM_G2_EN FUNC_TEST=TRUEMAKE_BASE=TRUESMC_PM_G2_ENSMC_PF0SMC_SYS_KBDLED TP_SMC_SYS_KBDLED
MAKE_BASE=TRUE FUNC_TEST=TRUE
MAKE_BASE=TRUETP_SMC_PF0
NC_ALS_GAIN
NC_SMC_BATT_CHG_ENMAKE_BASE=TRUE
MAKE_BASE=TRUENC_SMC_BATT_TRICKLE_EN_L
MAKE_BASE=TRUENC_SMC_SYS_ISETSMC_SYS_ISET
SMC_BATT_VSET
SMC_P23 NC_SMC_P23MAKE_BASE=TRUE
NC_SMC_P22MAKE_BASE=TRUE
NC_SMC_P21MAKE_BASE=TRUE
NC_SMC_P20MAKE_BASE=TRUE
SMC_PB7
SC_TX_L
SMC_TMS
SMC_BC_ACOK
SMC_TPM_RESET_L
SMC_XDP_TMS_L
SMC_XDP_TRST_L_R
=PP3V3_S5_SMC
=PP3V3_S0_FAN
P0V48_SMC_LSREF
GND_NEXT_TO_SMC
MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=0V
GND_SMC_AVSS
SMC_MEM_ISENSE
SMC_TCKSMC_TDI
SMC_EXTAL
SMC_THRMTRIP
SMC_PROCHOT
CPU_PROCHOT_L
PM_THRMTRIP_LPM_EXTTS_L<0>
SMS_Y_AXIS
SMC_ONOFF_L
SMC_ANALOG_ID
SMC_NB_ISENSE
GPUVCORE_IOUT
SMC_SUS_CLKMAKE_BASE=TRUE
FWH_INIT_L
MAKE_BASE=TRUENC_SMS_Y_AXIS
MAKE_BASE=TRUENC_SMS_Z_AXIS
MAKE_BASE=TRUENC_SMC_NB_ISENSE
MAKE_BASE=TRUENC_SMS_X_AXIS
SMC_PF1
SMC_ODD_DETECT
SMS_ONOFF_L
SMC_FAN_3_TACH
ALS_GAINMAKE_BASE=TRUE
MAKE_BASE=TRUENC_SMC_ANALOG_ID
ALS_LEFT
SMC_P26
SMC_BATT_ISETSMC_P27
NC_SMC_P26MAKE_BASE=TRUE
NC_SMC_SYS_VSETMAKE_BASE=TRUE
NC_SMC_P27MAKE_BASE=TRUE
SMB_A_S3_CLK
TP_SMC_SMB_0_CLK FUNC_TEST=TRUEMAKE_BASE=TRUE
SMC_XTAL
TPM_XTALO
SMC_SYS_LED
SMB_B_S0_CLK
SMB_B_S0_DATA
TP_SMC_SMB_0_DATA FUNC_TEST=TRUEMAKE_BASE=TRUE
PP3V3_S3
SMC_SMB_0_CLK
UNUSED_SMC_SENSEMAKE_BASE=TRUE
UNUSED_SMC_SENSEMAKE_BASE=TRUE
SMS_Z_AXIS
I2C_ALS_SDA
SMC_P20
SMC_MANUAL_RST_L SMC_RST_L
ALS_RIGHT
SMC_ADAPTER_EN
TPM_GPIO2
SMC_BS_ALRT_L
SMC_TX_L
SMC_CPU_INIT_3_3_L
NC_SMC_MEM_ISENSEMAKE_BASE=TRUE
TPM_PP
SMC_LID
=PP3V3_S5_SMC
=I2C_ODD_TEMP_SCL
=I2C_HD_TEMP_SCL=I2C_HD_TEMP_SDA
SMB_GPU_NB_THRM_CLKSMB_GPU_NB_THRM_DATA
SMC_P21SMC_P22
PP1V0R1V2_S0_GPU
TPM_GPIO1
SMC_ONOFF_L
POWER_BUTTON_L
XDP_TMS
XDP_TRST_L
=PP1V05_S0_CPUSMC_XDP_TCK_R
SMC_TPM_GPIO
PP3V3_S3
SMC_BATT_ISENSESMC_FWIRE_ISENSE
UNUSED_SMC_SENSE
SMC_RX_L
SMC_TX_L
SMC_REF_GATE1
SC_TX_L
SC_RX_L
MAKE_BASE=TRUEDIMM_OVERTEMP_L
TP_SMC_FAN_3_TACH FUNC_TEST=TRUEMAKE_BASE=TRUE
SMC_BATT_CHG_EN
NC_SMC_BATT_ISETMAKE_BASE=TRUE
SMB_BSA_CLK
SMB_BSA_DATA
SMC_SMB_0_DATA
SMB_BSB_DATA
SMB_BSB_CLK
SMB_A_S3_DATA
PP3V3_S0
SUS_CLK_SBMAKE_BASE=TRUE
MAKE_BASE=TRUESMC_GPU_ISENSE
I2C_ALS_SCL
SMC_FWE
SMS_X_AXIS
GND_SMC_AVSS
MAKE_BASE=TRUESMB_A_S3_DATA MAKE_BASE=TRUESMB_A_S3_CLK
MAKE_BASE=TRUESMB_B_S0_DATA MAKE_BASE=TRUESMB_B_S0_CLK
=SMB_THRM_DATA
SMC_CASE_OPEN
SMC_EXCARD_CPSMC_EXCARD_PWR_OC_L
SYS_ONEWIRE
SMC_TPM_PP
SMC_GPU_VSENSE
TPM_XTALI
SMC_REF_GATE2MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MM
SMC_TDO
SMC_RX_L
PP3V3_TPM_3VSB
SMC_PB7
NC_SMC_BATT_VSETMAKE_BASE=TRUE
I2C_ALS_SDA
=SMB_THRM_CLK
=I2C_ODD_TEMP_SDA
SC_RX_L
I2C_ALS_SCL
XDP_TDI
PP3V3_AVREF_SMC
VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MM
XDP_TCK
SMC_REF_IN
MIN_NECK_WIDT=0.2 MMMIN_LINE_WIDTH=0.4 MM
SMC_FAN_3_CTL TP_SMC_FAN_3_CTLMAKE_BASE=TRUE
FUNC_TEST=TRUE
TP_SMC_EXCARD_PWR_ENMAKE_BASE=TRUE
FUNC_TEST=TRUESMC_EXCARD_PWR_EN
MAKE_BASE=TRUETP_SMC_PB7 FUNC_TEST=TRUE
=PP1V05_S0_CPU
SMC_XDP_TDI_L
SMC_XDP_TRST_L
=PP3V3_S5_SMC
XDP_TDO
P0V48_SMC_LSREF
XDP_TCK
SMC_XDP_TCK
=PP3V3_S5_SMC
PP5V_S5
CPU_PROCHOT_L
SMC_SYS_VSETSMC_BATT_TRICKLE_EN_L
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
SYS_LED_DRV_C
SMC_PROCHOT_3_3_L
SMC_CPU_RESET_3_3_L
TP_U5999_P1
P0V48_SMC_LSREF
=PP3V3_S0_FANPP3V3_S5
PP5V_S3
83 81 80 79
59
88
59
77
11
76
11
83
76
9
61
9
81
66
66
85
83
60
8
83
60
60
41
85
60
59
8
59
80
66
65 59
60
59
65
76
60
60
21
59
59
59
11
11
7
59
59
59
26
76
59
59
59
59
60
59
11
11
7
59
11
11
59
79
65
26 58
59
58
67
58
59
59
58
58
59
14
58
59
60
59
59
59
53
60
58
58
66
66
66
61
61
7
7
6
53
58
58 59
59
29
59
10
59
58
58
58
58
10
58
58
59
10
66
59
59
7
7
6
58
7
7
58
6
59
59
6
83
6
58
58
58
58
58
58
58
58
59
58
5
58
58
58
6
6
59
76
58
58
5
5
58
58
58
7
7
14
58
58
58
58
85
58
21
58
58
58
58
58
58
58
58
58
58
58
67
58
58
58
6
58
59
59
58
59
58
5 58
58
58
67
58
5
58
67
58
6
58
58
88
67
5
5
5
5
58
6
58
58
59
5
5 58
58
28
58
58
58
58
58
58
58
6
23
58
59
58
58
58
58
58
58
58
58
58
67
5
5
67
59
58
5
58
5
58
58
5
58
58
6
5
59
5
58
6
5
7
58
58
58
58
59
6
5
6
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
3029
2827
2625
2423
2221
2019
1817
1615
1413
1211
109
87
65
43
21
J6000SM1
F-ST-5047
2
1 C600010%1UF
CERM6.3V
4022
1 C60010.1UF20%10VCERM402
2
1 C6003
CERM402
10V20%0.1UF
2
1 C60021UF
CERM6.3V
402
10%
11160
09051-6949
SYNC_MASTER=N/A SYNC_DATE=N/A
LPC+ CONN
=PP3V3_S5_DEBUG
=PP5V_S0_DEBUG
SMC_TX_LSV_SET_UP
LPC_AD<0>LPC_AD<1>
SMC_MD1 SMC_RX_L
LPC_AD<3>
INT_SERIRQ
SMC_TDI
SMC_RST_LSMC_NMI
BOOT_LPC_SPI_LSMC_TMS
DEBUG_RST_L
PM_CLKRUN_L
SMC_TDOSMC_TRST_L
LPC_FRAME_L
LPC_AD<2>
PM_SUS_STAT_L
SMC_TCK
PCI_CLK_PORT80FWH_INIT_L
67 58
59
67
67
59
67
67
59 59
44
59
67
67
67
59
58
58
58
58
58
58
58
59
58
58
23
58
58
58
58
58
58
59
6
6
5
23
21
21
58 5
21
23
5
58
58
22
5
6
5
5
5
21
21
23
5
34
21
www.vinafix.vn
SMBDATA
SMBCLK
ALERT*
OT2*
DXP2
OT1*
DXN
DXP1
GND
VCC
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
I2C ADDR:30(0011000)
21
R6100
1/16W5%
MF-LF
47
402
21
R6103NOSTUFF
4020MF-LF
1/16W5%
21
R6104NOSTUFF
402
0MF-LF
5% 1/16W
21
R6101
MF-LF402
5%1/16W
0
GPU_INT_THERM_DIODE
21
R61020
MF-LF5%
1/16W402
GPU_INT_THERM_DIODE
1
97
10
5
6
4
2
38
U6100
CRITICAL
UMAXMAX6695AUB
2
1 C610050V
0.001UF
CERM
20%
402
2
1 C6101
CERM402
20%50V
0.001UF
2
1
4
3
J2
CRITICALNOSTUFF
SM-2MT-BLK-LF
2
1
4
3
J3CRITICAL
SM-2MT-BLK-LF
11161
09051-6949
SYNC_MASTER=N/A SYNC_DATE=N/A
GPU+NB THERMAL
TSENSE_NB_GPU_DXN
TSENSE_NB_DXP
PP3V3_S0
SMB_GPU_NB_THRM_DATA
ATI_TDIODE_N
ATI_TDIODE_P
U6100_VCC
SMB_GPU_NB_THRM_CLKGPU_EXT_TDIODE_NGPU_EXT_TDIODE_P
TSENSE_GPU_DXP
88 76 59 41 26 10 6
59
91
91
59
www.vinafix.vn
SCK
SOWP*
SI
VDD
CE*
HOLD*VSS
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
R6303 SHOULD BE PLACED LESS THAN 2.54MM FROM U6301
R6306-07 SHOULD BE PLACED LESS THAN 2.54MM FROM U2100
IS SHARED WITH SB AND SMCR6309 NOT NEEDED SINCE SPI ROM
2
1 C6312
402CERM10V0.1UF20%
2
1R63011/16W
402
5%3.3K
MF-LF2
1R63021/16W
5%3.3K
MF-LF402
2
1 C630150V5%
402CERM
33PF
21
R6307
1/16WMF-LF402
47
5%
2
1 C630833PF
40250V5%CERM
2
1 C6309
402
5%CERM
33PF50V
21
R6303
5%
402
47
MF-LF1/16W
21
R6306
5%1/16WMF-LF402
47
2
1 C6311
CERM5%33PF50V402
3
4
8
2
56
7
1
U6301
OMIT
SOI16MBIT
SST25VF016B
2
1R6399
402
10K1/16W
5%MF-LF
2
1R630910K
1/16W5%
MF-LF402
NOSTUFF
SYNC_DATE=5/23/05SYNC_MASTER=MASTER
111
09051-6949
SPI BOOTROM
63
SPI_SI
SPI_HOLD_L
SPI_SCLK_RSPI_SCLK
SPI_SO
=PP3V3_S5_ROM
SPI_SI_R
SPI_SO_RSPI_CE_LSPI_WP_L
58 58
58 58
22 22
22
6
22
www.vinafix.vn
G
D
S
G
D
S
G
D
S
G
D
S
IN
OUT
OUT
OUT
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TACH
518S0193
12V DCGND
GND
FAN 0
12V DC
TACHMOTOR CONTROL
M38: ODD FAN
M39: ODD FAN
M38: HD FANM39: CPU FAN
NOTE: ADDED TO PROTECT SMC
FAN 1
MOTOR CONTROL
518S0326
2
1R6500MF-LF4021/16W
10K5%
2
1R650110K5%1/16WMF-LF402
2
1 C6500NOSTUFF
CERM25V20%0.1UF
6032
1R65021.5K5%1/4WMF-LF1206 5
4
876321
Q6500
1206A-03-LFNTHS5443T1
2
1R65031/8W
5%MF-LF
805
1.5K
3
1
D6500SOT23MMBD914XXG
21
R6504
MF-LF1/8W5%
0
805
2
1 C65010.47UF10%
805X7R16V
R65053.9K5%
1/8WMF-LF805
4
5
3
Q6502SOT-3632N7002DW-X-F
CRITICAL
2
1R6506
402
10K5%MF-LF1/16W
1
2
6
Q6502SOT-3632N7002DW-X-F
5
4
876321
Q6503NTHS5443T11206A-03-LF
2
1 C6502NOSTUFF
25V603
0.1UF20%CERM
2
1R65071/8W
1.5K5%
MF-LF805
21
R6508
805MF-LF1/8W
05%
2
1 C650310%
805
0.47UFX7R16V
R65093.9K5%
1/8W805
MF-LF
3
1
D6501MMBD914XXGSOT23
2
1R6510
MF-LF5%
1206
1.5K1/4W
4
5
3
Q65052N7002DW-X-FSOT-363
CRITICAL
2
1R6511
402
10K5%MF-LF1/16W
1
2
6
Q6505SOT-3632N7002DW-X-F
2
1C6504120UF
6.3X11-TH-LF
20%16VELEC
CRITICAL
2
1 C6505
6.3X11-TH-LF16V20%ELEC
120UF
CRITICAL
2
1R6512NOSTUFF
MF-LF1/8W5%1.0K
805
2
1R6513NOSTUFF
1.0K5%1/8WMF-LF805 21
R6514
1/8W5%
MF-LF
0
805
21
R6515
805
05%
MF-LF1/8W
21
D6502
B130LBT01XF
NOSTUFF
SMB
21
D6503SMB
B130LBT01XF
NOSTUFF
4
3
2
1
6
5
J6500CRITICAL
M-RT-SM53261-0498
54
3
21
7
6
J650153261-0598
CRITICAL
M-RT-SM
21
R659947K
5%1/16WMF-LF402
21
R6598
402MF-LF1/16W5%
47K
M38FAN
21
R659747K
5%1/16WMF-LF402
M39FAN
21
R65800
5%1/16WMF-LF402
M38FAN
21
R65810
5%1/16WMF-LF402
M39FAN
65 111051-6949 09
Fan 0, 1 & System Temp
FAN_RPM0
FAN_TACH0
F0_VOLTAGE8R5
SMC_FAN_2_TACH
SMC_FAN_1_TACH
FAN_1_CTL
SMC_FAN_2_CTL
SMC_FAN_1_CTL
SMC_FAN_0_TACH
=PP3V3_S0_FAN
MIN_NECK_WIDTH=0.25MM
FAN_0_PWRMIN_LINE_WIDTH=0.5MM
F1_VOLTAGE8R5
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
F1_RCFEEDBK
MIN_NECK_WIDTH=0.25MM
F0_RCFEEDBKMIN_LINE_WIDTH=0.5MM
FAN_1_OUTMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
=PP3V3_S0_FAN
SMC_FAN_0_CTL
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
FAN_0_OUT
PP3V3_S5
FAN_1_PWRMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
=PP12V_S0_FAN
=PP12V_S0_FAN
F0_GATESLOWDN
PP3V3_S5
FAN_RPM1
F1_GATESLOWDN
FAN_TACH1
83
83
81
81
80
80
79
79
77
77
76
76
66
66
65
65
66
66
59
59
65
65
26
66
66
26
66
66
66
66
59
59
58
6
65
65
6
58
58
58
58
58
6
6
5
6
6
5
www.vinafix.vn
G
D
S
G
D
S
IN
IN
OUT
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
518S0328
ODD TEMP SENSOR
FAN 2
HD TEMP SENSOR
12V DC
TACHGND
MOTOR CONTROL
M38: CPU FANM39: HD FAN
518S0193518S0193
I2C ADDR:0X90(1001000)I2C ADDR:0X92(1001001)
2
1C66540.1UF
10V20%
CERM402 2
1C66550.1UF
10V20%
CERM402
2
1R66005%1/16W
10K
402MF-LF
4
3
2
1
6
5
J6601CRITICAL
53261-0498M-RT-SM
5
4
876321
Q66001206A-03-LFNTHS5443T1
3
1
D6600SOT23MMBD914XXG
2
1 C660025V
603
0.1UF20%
CERM
NOSTUFF
2
1R6601
805MF-LF1/8W
5%1.5K
21
R6602
5%
MF-LF805
1/8W
02
1 C660116VX7R805
10%0.47UF
R6603
805MF-LF1/8W5%
3.9K
2
1R6604
MF-LF1/4W5%1.5K
1206
4
5
3
Q66022N7002DW-X-FSOT-363
CRITICAL
2
1R66051/16W5%
402
10K
MF-LF
1
2
6
Q66022N7002DW-X-FSOT-363
2
1 C660220%
ELEC16V
220UF
SM-LF
CRITICAL
2
1R6606
MF-LF
5%
805
1.0K1/8W
NOSTUFF
21
R6607
MF-LF1/8W5%
0
805
21
D6601
B130LBT01XF
SMB
NOSTUFF
4
3
2
1
6
5
J6602CRITICAL
53261-0498M-RT-SM
4
3
2
1
6
5
J6600F-ST-SM
53398-0476
CRITICAL
21
R6681
5%
402MF-LF1/16W
0
M38FAN
21
R6680
402
1/16W5%
0
MF-LF
M39FAN
21
R6697
402MF-LF1/16W5%
47K
M38FAN
21
R669847K
5%1/16WMF-LF402
M39FAN
2 1
C6650
402
0.01UF
CERM20%16V
17_INCH_LCD
2 1
C66510.01UF
CERM20%16V
17_INCH_LCD
402
2 1
C66530.01UF
CERM20%16V
17_INCH_LCD
402
2 1
C665217_INCH_LCD
16V20% CERM
0.01UF
402
Fan 2 & HD Temp
11166
09051-6949
PP3V3_S5
FAN_RPM2
=PP3V3_S0_FAN
=I2C_ODD_TEMP_SCL=I2C_HD_TEMP_SCL
=I2C_ODD_TEMP_SDA=I2C_HD_TEMP_SDA
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
FAN_2_PWR
SMC_FAN_1_CTL FAN_2_CTL
SMC_FAN_2_TACH
SMC_FAN_1_TACH
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
F2_RCFEEDBKMIN_LINE_WIDTH=0.5MM
FAN_2_OUT
MIN_NECK_WIDTH=0.25MM
F2_GATESLOWDNF2_VOLTAGE8R5
SMC_FAN_2_CTL
=PP12V_S0_FAN
FAN_TACH2
CPU_HS_ZH608
CPU_HS_ZH608CPU_HS_ZH608
CPU_HS_ZH608
=PP3V3_S0_HD_TSENS=PP3V3_S0_ODD_TSENS
83 81 80 79 77 76 65 59 26
65
6
59
65
65
65
65
65
66
66 66
66
5
6
59 59
59 59
58
58
58
58
6
9
9 9
9
6 6
www.vinafix.vn
IN
IO
IO
IO LAD1
LAD2
LCLK
LFRAME*
LRESET*LPCPD*
SERRIRQ
LAD0
CLKRUN/GPIO*
PP/GPIO
GPIO_EXPRESS_00
GPIO/SM_DATGPIO/SM_CLK
XTALI/32K_IN
TESTBI/BADD/GPIO
TESTI
3V0
3V1
3V2
3VSB
VNC
VBAT
XTALO
GND2
GND3
GND0
GND1
LAD3
IO
IO
IN
IN
IO
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
BASE ADDR = 0X4E/4F
GPIO2TESTBI/BADD
1/8W (R6704/R6705) IS USED FOR NOWSINCE CURRENT OF VSB IS NOT YET ON SPEC,NOTE:
PLACE R6702-03 WHERE ACCESSIBLELAYOUT NOTE:
PLACE WHERE ACCESSIBLELAYOUT NOTE:
BASE ADDR = 0X2E/2F
NC
NC
NC
CLKRUN*
GPIO
PP
NC
VDD
VDD
VDD
VSB
NC
NC
GND
(INT PD)
2
1 C67000.1UF10%16VX5R402
2
1 C670110%16VX5R402
0.1UF2
1 C6702
402X5R16V10%0.1UF
2
1 C6703
402X5R16V10%0.1UF
2
1R6700
402MF-LF1/16W5%0
NOSTUFF
14
13
3
12
89
27
7
16
28
22
21
17
2023
26
61
2
25
18
114
15
5
2419
10U6700TPMTSSOP
OMIT
2
1 R6702
402
10K5%1/16WMF-LF
2
1 R6703
402
10K
MF-LF1/16W5%
NOSTUFF
21
R67040
5%1/8WMF-LF805
2
1R670505%1/8WMF-LF805
NOSTUFF
21
R6798
402
1/16WMF-LF
5%
0
21
R6799
402
1/16W
NOSTUFF
0
5%
MF-LF
11167
09051-6949
SYNC_MASTER=N/A SYNC_DATE=N/A
TPM
PP3V3_TPM_3VSBVOLTAGE=3.3VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.15MM
TPM_PPTPM_GPIO1
TPM_GPIO2
LPC_AD<3>
=PP3V3_S0_TPM
=PP3V3_S3_TPM
PM_CLKRUN_L
TPM_XTALITPM_XTALO
=PP3V3_S0_TPM
INT_SERIRQPM_SUS_STAT_L
LPC_FRAME_LPCI_CLK_TPM
LPC_AD<2>LPC_AD<1>LPC_AD<0>
TPM_BADD
TPM_RST_L
TPM_LRESET_L
SMC_TPM_RESET_L
60 58
60
44
60
60
60
60
60
60
58
67
23
67
58
58
58
58
58
58
59
59
59
59
59
21
6
6
5
59
59
6
23
23
21
34
21
21
21
6
58
www.vinafix.vn
IN
IN
IN
IN
OUT
NR/FBENIN OUT
GNDGNDTAB
GPIO1
GPIO0GPIO2
SPDIF-OUT
AVDD1
AVDD2
DVDD_CORE3
DVDD_CORE1
BIT_CLK
SYNC
SDATA_OUTSDATA_IN
PORT-C_R
PORT-D_L_HPPORT-D_R_HP
CD-G
VOLUME_DOWN
VOLUME_UP
PC_BEEP
GPIO3/SPDIFIN
SENSE_A
SENSE_B
PORT-A_L_HP
PORT-A_R_HP
PORT-E_L
PORT-E_R
AVSS3
AVSS1
DVSS2
DVSS3
VREF_FILTAFILT1
AFILT2
NC1
NC2
CAP2
VREFOUT-D
VREFOUT-A
VREFOUT-B
VREFOUT-C
PORT-B_L
PORT-B_R
PORT-F_R_HPPORT-F_L_HP
PORT-C_L
CD-R
CD-L
RESET*
MIC1
HP
LO
MIC2
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
12
10
15
13
10
10
10
10
NCNC
11
14
NC
MIC INPUT TO BOTH L&R
APN: 353S12334.5V POWER SUPPLY FOR CODEC AND LINE IN AMP
AUDIO CODECAPPLE P/N 353S1345
2
1 C6821
X5R
0.1UF16V10%
402
2
1 C6825
CERM
1UF
402
6.3V10%
2
1R6803
MF-LF
100K5%
402
1/16W2
1C68230.1UF
X5R16V10%
4022
1 C682210UF
603X5R6.3V20%
21
R6802
MF-LF1/16W
1K
1%
402
2
1C6810
TANTSMA-LF
10UF20%
6.3V
21
R6807
1/16W
402
22
5%
MF-LF
21
R6808
402
5%1/16WMF-LF
22
2
1 C68291000PF
402X7R25V10%
2
1 C683210%25VX7R402
1000PF2
1 C6833
402
10%1000PF25VX7R 2
1 C6834
X7R25V
402
10%1000PF
2
1C68076.3V20%
10UF
TANTSMA-LF
2
1 C68131000PF
X7R25V10%
4022
1 C6812LEMENU
25VX7R402
1000PF10%
2
1C68026.3V
100UF20%
B2POLY 2
1C6803100UF
6.3VPOLY
B2
20%2
1 C6830
X7R25V
1000PF
402
10%
2
1R681129.4K1/16WMF-LF
1%
402
2
1R68101/16W
78.7K1%
MF-LF402
2
1 C68351000PF10%
X7R402
25V 2
1 C68361000PF
402
10%25VX7R
4
52
63
1
VR6800SOT223-6
TPS79501
2
1 C682610UF
603
6.3VX5R
20%
2
1C68081UF10%
402CERM6.3V 2
1C6809
402
10%
CERM6.3V
1UF2
1C6811
CERM402
10%6.3V
1UF
21
L6800
0402
FERR-120-OHM-1.5A
21
R6812
1/16WMF-LF
0
402
5%
LEMENU
21
R6813
402
ALC882
0
5%1/16WMF-LF
21
R6814
1/16WMF-LF402
5%
0
LEMENU
21
L6801FERR-120-OHM-1.5A
0402
21
R6815ALC882
0
402
5%
MF-LF1/16W
2
1R68161/16W
ALC882
1%20K
402MF
2
1R6817
402
ALC882
05%
MF-LF1/16W
21
R68180
5%1/8WMF-LF805
NO STUFF
2
1C680410UF
20%6.3V
SMA-LF
LEMENU
TANT
32
29
28
37
27
23
10
48
34
13
5
8
11
17
16
15
1436
35
2423
22
21
4139
12
43
40
47
44
4645
7 491
20
18
19
33
6
42
26
38
25
31
30
U6800
LQFPSTAC9220
OMIT
2
1 C68011000PF25V
402
10%
X7R
2
1R6800100K
MF-LF1/16W5%
402
2
1C68006.3VX5R
20%
603
10UF
2
1R68011/8WMF-LF805
5%0
2
1C6805OMIT
50V5%
820PF
805CERM
2
1 C6806OMIT
805CERM
5%50V
820PF
68
051-6790
154
SYNC_MASTER=FINO-SO
??
SYNC_DATE=04/28/2005
AUDIO: CODEC
GND_AUDIO_CODEC
AUD_SPDIF_OUT
AUD_GPIO_0
AUD_GPIO_1
AUD_GPIO_1_A
ACZ_SDATAIN<0>
VOLTAGE=3.3V=PP3V3_S0_AUDIO
VOL_UP
VOL_DOWN
AUD_GPIO_0_A
AUD_BI_PORT_B_RAUD_BI_PORT_B_L
PP4V5_AUDIO_ANALOGVOLTAGE=4.5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
VREG_FB
AUD_4V5_SHDN_L
VOLTAGE=5V
5V_REG_IN
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
GND_AUDIO_CODEC
=PP5V_S0_AUDIO
VOLTAGE=5VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
=PP3V3_S0_AUDIO
ACZ_RST_L
BAL_IN_L
BAL_IN_R
AUD_BI_PORT_C_L AUD_BI_PORT_F_LAUD_BI_PORT_F_R
AUD_BI_PORT_B_RAUD_BI_PORT_B_L
NC_AUD_VREF_PORT_C
AUD_VREF_PORT_B
NC_AUD_VREF_PORT_A
NC_AUD_VREF_PORT_D
AUD_BYPASS
CEN
JDREF
AUD_ANALOG_FILT_2AUD_ANALOG_FILT_1AUD_VREF_FILT
MIN_NECK_WIDTH=0.25MMVOLTAGE=0VMIN_LINE_WIDTH=0.6MM
GND_AUDIO_CODEC
AUD_BI_PORT_E_RAUD_BI_PORT_E_L
AUD_BI_PORT_A_RAUD_BI_PORT_A_L
AUD_SENSE_B
AUD_SENSE_AAUD_SPDIF_IN
BEEP
VOL_UPVOL_DOWN
BAL_IN_COM
AUD_BI_PORT_D_RAUD_BI_PORT_D_L
AUD_BI_PORT_C_R
ACZ_SDATAIN_CHIP
ACZ_SDATAOUTACZ_SYNCACZ_BITCLK
PPV_3V3_AUDIO_CODEC
MIN_NECK_WIDTH=0.20MMVOLTAGE=3.3V
AUD_SPDIF_OUT_CHIP
AUD_GPIO_2AUD_GPIO_0AUD_GPIO_1
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
PP4V5_AUDIO_ANALOGVOLTAGE=4.5V
74
74
74
73
74
73
74
73
72
73
72
73
72
74
74
68
74 74
74
72
68
74
74
72
74
74
74
68
73
68
68
73
21
6
68
68
72
68 68
68
68
6
6
21
74
74
72 74
74
68
68
74
74
68
74
74
74
74
74
74
74
68
68
74
74
74
72
21
21
21
MIN_LINE_WIDTH=0.30MM
74
68
68
68
www.vinafix.vn
PGND
VDD
G1
G2
CHOLD
AGND PADTHM
NC
SHDN*
FS2FS1
INL-
INL+
INR-
REG
INR+
OUTL+
OUTL+
OUTL-OUTL-
C1+
C1-
OUTR+
OUTR+
OUTR-OUTR-
SS
G
D
S G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
APPLE P/N 353S0680
GAIN SETTINGS: +19DBMODULATION SETTING: LOW EMI
GAIN AND SWITCHING FREQUENCY STUFF OPTIONS
SPEAKER AMP
NC
2
1R7214
MF-LF1/16W
10K1%
402 22
21
43
33
12
11
14
24
2321
26
28
25
27
30
32
29
31
8
15
16
9
10
1817
20
19
7
5
6
13
U7200MAX9714
QFN-LF
21
XW7201SM OMIT
4
5
3
Q72002N7002DW-X-FSOT-363
1
2
6
Q72002N7002DW-X-FSOT-363
2
1 C7220
402CERM50V5%100PF
2
1 C7221100PF5%50VCERM402
21
R7213
1/16WMF-LF402
5%
47K
21
R7215
1/16W
10K
MF-LF402
5%
21
R7217
1/16WMF-LF402
5%
02
1R7216
402
1/16W5%0
MF-LF
NOSTUFF
2
1R7218
402MF-LF1/16W5%0
NOSTUFF
21
R7219NOSTUFF
5%
402MF-LF1/16W
0
21
L7203
0603
180-OHM-1.5A
2
1 C7208
X7R
10%50V
0.1UF
603-1
21
L7204180-OHM-1.5A
0603
2
1 C720910%16V
805X7R
0.47UF
21
L7200FERR-250-OHM
SM-1
21
C7204
10%16V
0.47UF
805X7R
21
C7205
805X7R16V10%
0.47UF
21
L7202180-OHM-1.5A
0603
2
1 C7214
603
25V10%
X5R
1UF
21
C7207
805
0.47UF
16VX7R
10%
21
C7206
16VX7R805
10%
0.47UF
2
1C7200220UF
20%16V
ELEC6.3X8-SM
21
L7201180-OHM-1.5A
0603
2
1R7208
402MF-LF1/16W5%0
2
1C7217
ELEC16V
6.3X8-SM
20%220UF
2
1 C72021UF
X7R
10%
805
35V
5678
4321
RP72005%47K1/16WSM-LF
2
1R7212
402
1/16WMF-LF
5%15K
1
XC720050R28
21
L7205
0603
1000-OHM-200MA
2
1 C721550VCERM402
100PF5%
2
1 C7216
402CERM
100PF5%50V
21
L72061000-OHM-200MA
0603
21
L72071000-OHM-200MA
0603
21
L7208
0603
1000-OHM-200MA
2
1 C721916V20%0.1UF
603CERM2
1C721820%
CERM16V
603
0.1UF2
1 C7203
1210CERM16V10%10UF
2
1 C7223
1210CERM16V10%10UF
2
1C720110%
1210CERM16V
10UF
2
1 C721025V
1000PF10%
X7R402
2
1 C721125V
1000PF10%
X7R402
2
1 C72121000PF25V10%
X7R402
2
1 C72131000PF25V10%
X7R402
SYNC_DATE=04/28/2005
AUDIO: SPEAKER AMP
051-6790
154
??
SYNC_MASTER=FINO-SO
72
=PP12V_S0_AUDIO_SPKRAMP
VOLTAGE=12VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MMNET_SPACING_TYPE=AUDIO
GND_AUDIO_SPKRAMP_PLANE
GND_AUDIO_CODEC
GND_AUDIO_SPKRAMP_PLANE
PP3V3_INTERCON
AUD_SAMP_INL_P
NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MMAUDSAMPOUTLP
SPKRAMP_MUTE
GND_AUDIO_SPKRAMP_PLANE
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MMNET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=0.15MM
AUD_MAX9714_VREGMIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM
SPKRAMP_SS
AUD_SAMP_SHDN_L
AUD_SAMP_G2
MIN_NECK_WIDTH=0.3MMNET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MM
AUDSAMPOUTRN
NET_SPACING_TYPE=AUDIOMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMVOLTAGE=12V
PP12V_AUD_SPKRAMP_PLANE
AUD_SAMP_INR_N
GND_AUDIO_SPKRAMP_PLANE
AUD_SAMP_G2AUD_SAMP_FS1AUD_SAMP_FS2
=PP3V3_S0_AUDIO
AUD_SAMP_INL_N
AUD_SAMP_INR_P
AUD_SAMP_G1
AUD_SPKR_OUTR_N
NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MM
GND_AUDIO_SPKRAMP_PLANE
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MMNET_SPACING_TYPE=AUDIO
AUDSAMPOURTP AUD_SPKR_OUTR_P
NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MM
MIN_LINE_WIDTH=0.6MM
GND_AUDIO_SPKRAMP
MIN_NECK_WIDTH=0.25MMNET_SPACING_TYPE=AUDIO
AUD_SPKR_OUTL_P
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MMNET_SPACING_TYPE=AUDIO
AUD_SPKR_OUTL_N
NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MM
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM
AUDSAMPCPN
MIN_NECK_WIDTH=0.15MMAUDSAMPCPP
MIN_LINE_WIDTH=0.2MM
=PP3V3_S0_AUDIO
AUD_SAMP_FS1
MIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.5MMNET_SPACING_TYPE=AUDIO
AUDSAMPOUTLN
AUDSAMPINLP
AUDSAMPINRP
AUDSAMPINLN
AUD_SAMP_FS2
AUDSAMPINRN
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
AUD_MAX9714_CHOLD
AUD_DEBOUNCE
AUD_SAMP_G1
AUD_BI_PORT_C_L
GND_AUDIO_CODEC
=PP3V3_S0_AUDIO
AUD_GPIO_0_A
AUD_BI_PORT_C_R
74
74
74
74
73
73
74
73
73
72
72
73
72
74
72
74
74
74
68
74
74
68
72
68
6
72
68
72
72
72
72
72
72
72
6
72
73
72
73
6
73
73
6
72
72
72
68
68
6
68
68
www.vinafix.vn
TIP_DET
RING
TIP
GND_1
GND_2
TYPE_DET
LED
VCCVIN
GND
IN
IN
IN
IN
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TO FHB CONNECTOR PAGE 47
APPLE P/N 514-0260 (M23)LINE OUT JACK
APPLE P/N 514-0261 (M33)
APPLE P/N 518S0325
TO POWER SUPPLY PAGE 6
APPLE P/N 514-0246 (M23)
MMBZ15DLT1
SPEAKER CABLE CONNECTORLINE IN JACKAPPLE P/N 514-0249 (M33)
TO GPIO 1SPEAKER TYPE DETECT
2
1 C7303
402
100PF50VCERM
5%2
1 C7302100PF
CERM
5%50V
402
2
1R73021/16W
5%
MF-LF402
0
2
1R73135%47K
402MF-LF1/16W
20_INCH_LCD42
31
DZ7300
OMIT0405
14V-15A
2
1 C7301
402
100PF5%50VCERM
2
1 C7321
402X7R
10%1000PF25V 2
1 C732210%
X7R25V
402
1000PF
2
1 C7300OMIT
50VCERM
5%100PF
402
2
1 C7324100PF
CERM50V
402
5%
2
1 C73235%50VCERM
100PF
402
21
L7300FERR-EMI-100-OHM
SM
21
L7301FERR-EMI-100-OHM
SM
21
L7302FERR-EMI-100-OHM
SM
21
L7303OMIT
FERR-EMI-100-OHM
SM
21
L7304
SM
FERR-EMI-100-OHM
21
L7305
SM
FERR-EMI-100-OHM
21
L7306FERR-EMI-100-OHM
SM
21
L7307OMIT
SM
FERR-EMI-100-OHM
21
L7309
SM
FERR-EMI-100-OHM
21
L7310FERR-EMI-100-OHM
SM
21
L7312FERR-EMI-100-OHM
SM
21
L7313
SM
FERR-EMI-100-OHM
21
L7314
SM
FERR-EMI-100-OHM
21
L7315
SM
FERR-EMI-100-OHM
21
L7316FERR-EMI-100-OHM
SM
21
L7320OMIT
FERR-EMI-100-OHM
SM
21
L7322FERR-EMI-100-OHM
SM
21
L7323
SM
FERR-EMI-100-OHM
21
L7324FERR-EMI-100-OHM
SM
21
L7328OMIT
FERR-EMI-100-OHM
SM
7
6
5
4
3
2
1
9
8
J730153261-0798
M-RT-SM
78
6
5
4
3
2
13
12
1110
1
9
J7303F-ANG-TH
UCNT2052E007-0
OMIT
21
L7325FERR-EMI-100-OHM
SM
2
1 C7314
402
50V5%100PF
CERM
21
L7317
SM
FERR-EMI-100-OHM
2
1 C7312100PF
402CERM50V5%
21
L7327
SM
FERR-EMI-100-OHM21
L7319FERR-EMI-100-OHM
SM
21
L7318
SM
FERR-EMI-100-OHM
2
1 C7313100PF5%50VCERM402
21
L7326
SM
FERR-EMI-100-OHM
21
XW7300SM
4 2
3 1
DZ730114V-15A
0405
OMIT
42
31
DZ730214V-15A0405
OMIT
42
31DZ730314V-15A
0405
OMIT
42
31DZ730414V-15A
0405
OMIT
2
1R7314
MF-LF
17_INCH_LCD
1/16W
402
5%4.7K
2
1 C7318
805
10V
1UF
CERM
10%2
1 C731720%
402
10V
0.1UF
CERM
2
1 C7315100PF
402
50VCERM
5%2
1 C7311OMIT
402CERM
100PF50V5%
4
3
2
1
8
7
6
5
J7300OMIT
JA03333-M23-4FF-ST-TH
514-0260 1 J7303 17_INCH_LCDCRITICALCOMBO OUT CONN, 5.5 DEG
1514-0249 LINE IN CONNECTOR, 4.5 DEG J7300 20_INCH_LCDCRITICAL
1514-0261 J7303 20_INCH_LCDCRITICALCOMBO OUT CONN, 4.5 DEG
1 SIGMATEL STAC9220 LEMENUCRITICALU6800353S1345
1 U6800 ALC882CRITICALREALTEK ALC882353S1268
514-0246 1 J7300 17_INCH_LCDCRITICALLINE IN CONNECTOR, 5.5 DEG
2 C6805,C6806 LEMENUCRITICAL131S8223 CAPACITOR, 820PF
ALC882131S0534 C6805,C68062 CAPACITOR, 1UF CRITICAL
CRITICAL377S0043 TRANSIENT VOLTAGE DIODE DZ7300,DZ7301,DZ7302,DZ7303,DZ73045
RESISTOR, 0 OHM, 0603 L7303,L7307,L7320,L7328113S0022 4
2 RESISTOR, 0 OHM, 0402116S0004 C7300,C7311
SYNC_DATE=04/28/2005SYNC_MASTER=FINO-SO
??
154
051-6790
AUDIO: CONNECTORS
73
GND_CHASSIS_AUDIO_EXTERNAL
GND_CHASSIS_AUDIO_EXTERNAL
MIN_NECK_WIDTH=0.15MMAUD_LI_DET_JACK
MIN_LINE_WIDTH=0.2MM
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MMAUD_LI_R_JACK
GND_CHASSIS_AUDIO_INTERNAL
=PP3V3_S0_AUDIO
AUD_GPIO_1_A
GND_AUDIO_CODEC
AUD_SPKR_OUTL_N
MIN_LINE_WIDTH=0.5MMNET_SPACING_TYPE=AUDIOMIN_NECK_WIDTH=0.3MM
NET_SPACING_TYPE=AUDIO
AUD_MIC_IN_N_CONNAUD_MIC_IN_P_CONN
NET_SPACING_TYPE=AUDIONET_SPACING_TYPE=AUDIO
AUD_MIC_IN_N_EMI
AUD_SPDIF_OUT_JACKAUD_SPDIF_OUT_EMI
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM
AUD_LI_L_JACK
MIN_LINE_WIDTH=0.3MM
AUD_LO_L_EMIMIN_NECK_WIDTH=0.2MM
AUD_LO_DET1_EMI
MIN_NECK_WIDTH=0.3MM
AUD_LI_GND_JACK
MIN_LINE_WIDTH=0.4MM
MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM AUD_LO_L_JACK
AUD_PORT_F_LMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM
AUD_LO_DET1_JACK
GND_CHASSIS_AUDIO_EXTERNAL
MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM AUD_LO_R_JACK
AUD_SPDIF_OUT
=PP3V3_S0_AUDIO
AUD_LO_DET2_JACK
MIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
AUD_SPDIF_GND
PP3V3_AUDIO_SPDIF_JACK
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MM
PP3V3_AUDIO_SPDIF_EMI
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MM
AUD_LO_R_EMI
AUD_LO_DET2_EMI
MIN_NECK_WIDTH=0.4MMMIN_LINE_WIDTH=0.5MM
AUD_LO_GND_EMI
AUD_LO_DET1
MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MM
AUD_PORT_A_L
AUD_LO_DET2
MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MM
AUD_PORT_A_R
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MM
AUD_PORT_F_R
NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MM
AUD_SPKR_OUTL_P
MIN_NECK_WIDTH=0.3MMNET_SPACING_TYPE=AUDIOAUD_SPKR_OUTR_N
MIN_LINE_WIDTH=0.5MM
AUD_SPKR_OUTR_PNET_SPACING_TYPE=AUDIOMIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.5MM
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MM
AUD_LI_DET_H
AUD_MIC_IN_N
NET_SPACING_TYPE=AUDIONET_SPACING_TYPE=AUDIO
GND_AUDIO_MIC_CONNNET_SPACING_TYPE=AUDIO
AUD_MIC_IN_P AUD_MIC_IN_P_EMI
NET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
GND_AUDIO_CODEC
GND_AUDIO_CODEC
MIN_NECK_WIDTH=0.15MM
AUD_LI_R_EMI
MIN_LINE_WIDTH=0.2MM
AUD_LO_GND_JACKMIN_NECK_WIDTH=0.4MMMIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MMAUD_LI_GND_EMI
MIN_LINE_WIDTH=0.4MM
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MM
AUD_LI_DET_EMI
AUD_LI_L_EMIMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM
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G
D
S
G
D
S
G
D
SG
D
S G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PORT F LI/LO
UNUSED PORTS
PLACE NEAR HEADPHONE PORTPORT F LI/LOPORT C BI SPEAKERSPORT B MIC INPORT A HP/LIUSED PORTS
UNUSED PORT TERMINATION
MICROPHONE IMPEDANCE MATCHING CIRCUIT
JACK SENSE PULL UPS(PLACE NEXT TO CODEC)
R7432 ENABLES PORT B AND C
NCNC
PORT A HP/LI
PORT D PORT E
PLACE ACROSS GROUND SPLIT
PLACE AT J7303
AMP GROUND PLANEPLACE NEAR ENTRY TO SPEAKER
AUDIO GROUND RETURNS
PORT F (LI/LO) PLUG DETECT
PORT A/H (HP/LI/DIG_OUT) PLUG DETECT (E TELLS H TO COME ON)
21
R7412NOSTUFF
805
0
5%1/8WMF-LF
2
1R7405
MF-LF
20.0K1%1/16W
402
2
1
3
Q7401SOT23-LF2N7002
2
1 C74010.1UF20%
CERM402
10V
21
R7404
1/16W
47K
MF-LF
5%
402
2
1R7409
402MF-LF1/16W5%270K
2
1 C740010V20%0.1UF
CERM402
21
R7400
MF-LF1/16W5%
402
47K
2
1 C7402
402
10V20%
CERM
0.1UF
21
R740847K
5%
MF-LF402
1/16W
21
R7414
MF-LF1/8W
805
4.7
5%
21
R7415
805MF-LF1/8W
4.7
5%
21
R7416
1/8W
4.7
805MF-LF
5%
21
R7417
5%
805
4.7
1/8WMF-LF
21
C7403
20%10VTANT
CASE-B-SM
100UF
21
C7404
TANT10V20%
CASE-B-SM
100UF
21
C7405
CASE-B-SMTANT10V20%
100UF
21
C7406
10VTANT
CASE-B-SM
20%
100UF
2
1R74205%
402MF-LF1/16W
100K
2
1R7413
MF-LF
470K1/16W
402
5%
2
1R7418
402
1/16W
22K
MF-LF
5%
2
1R7419
MF-LF402
5%1/16W
22K
2
1R74221/16WMF-LF402
1%5.11K
2
1 C74080.1UF10%16VX5R402
2
1R7421
MF-LF
5.11K1/16W
402
1%
2
1 C7407
402X5R16V10%0.1UF
2
1 C7417
402X5R16V10%0.1UF
2
1 C74160.1UF
402
10%16VX5R
2
1 C741516V
402
0.1UF10%
X5R
2
1C7414
X5R16V10%
402
0.1UF
2
1 C74130.1UF10%
X5R16V
402
2
1C7412
402
16V10%
0.1UF
X5R
2
1 C7411
X5R16V
402
0.1UF10%
2
1C74100.1UF
16VX5R402
10%
NOSTUFF
2
1 C74090.1UF10%16VX5R402
21
C74190.1UF
X7R603-1
50V10%
21
XW6800SM
2
1R74272.2K5%1/16W
402MF-LF
2
1R7426
402MF-LF1/16W
100K5%
21
R7425
5%
MF-LF1/16W
330
402
2
1C7418
805CERM
10%50V
820PF
2
1R742322K
402MF-LF1/16W
5%
2
1R74241/16W5%
402
22K
MF-LF
2
1 C742016V10%
402
0.1UF
X5R
2
1C74210.1UF
10%16VX5R402
2
1 C7422ALC882
X5R16V10%
402
0.1UF
2
1C742316V
402
10%
X5R
0.1UF
ALC882
1
2
6
Q7400SOT-3632N7002DW-X-F
4
5
3
Q7400SOT-3632N7002DW-X-F
21
R7429
5%
MF-LF805
0
1/8W
21
R7407
402
5%
MF-LF1/16W
100K
4
5
3
Q7402SOT-3632N7002DW-X-F
1
2
6
Q7402SOT-3632N7002DW-X-F 2
1R7432
402
1/16W1%
MF-LF
6.65K
NOSTUFF
2
1R743139.2K
402
1/16W1%
MF-LF2
1R7430
MF-LF1/16W
402
1%39.2K
21
XW7400SM OMIT
21
R7411
5%1/8W
0
NOSTUFF
MF-LF805
21
R74100
805
5%1/8WMF-LF
NOSTUFF
AUDIO: POWER SUPPLIES
74
??
154
051-6790
SYNC_MASTER=FINO-SO SYNC_DATE=04/28/2005
AUD_PORT_F_R
AUD_PORT_F_L
GND_CHASSIS_AUDIO_EXTERNAL
AUD_TYPE_DET_EN
AUD_BI_PORT_B_L
GND_AUDIO_CODEC
GND_AUDIO_CODEC
AUD_PORT_F_L1
AUD_SENSE_A
AUD_BI_PORT_E_R
GND_AUDIO_CODEC
CEN
AUD_BI_PORT_E_L
AUD_PORT_A_R1
AUD_MIC_IN_N
NET_SPACING_TYPE=AUDIO
AUD_VREF_PORT_B
=PP3V3_S0_AUDIO
AUD_LI_DET_H
AUD_SPDIF_IN
AUD_BI_PORT_D_R
GND_AUDIO_CODEC
AUD_PORT_F_R1
AUD_GPIO_2AUD_GPIO_0AUD_GPIO_1
PP4V5_AUDIO_ANALOG
AUD_PORT_A_R
AUD_SENSE_B
BAL_IN_COM
AUD_BI_PORT_F_R
AUD_BI_PORT_A_L
GND_AUDIO_CODEC
BAL_IN_LBAL_IN_R
AUD_PORT_A_L1
AUD_BI_PORT_A_R
AUD_BI_PORT_F_L
AUD_LO_DET2_1
MIN_NECK_WIDTH=0.25MM
GND_AUDIO
MIN_LINE_WIDTH=0.6MMVOLTAGE=0V
NET_SPACING_TYPE=AUDIO
GND_AUDIO_CODEC
GND_AUDIO_SPKRAMP
GND_AUDIO_SPKRAMP_PLANE GND_AUDIO_CODEC
AUDLINDETH
AUD_SENSE_B
GND_AUDIO_CODEC
AUD_MIC_P1AUD_MIC_IN_P
NET_SPACING_TYPE=AUDIO
AUD_LO_DET1_1
AUD_LO_DET2
AUD_LO_DET1
=PP3V3_S0_AUDIO
AUD_PORT_A_L
AUD_BI_PORT_D_L
AUD_BI_PORT_B_R
GND_CHASSIS_AUDIO_EXTERNAL
GND_AUDIO_CODEC
=PP3V3_S0_AUDIO
GND_AUDIO_CODEC
AUD_LO_DET1_1
AUD_SENSE_B
AUD_SENSE_A
AUD_PORT_E_DET_LAUD_PORT_A_DET_L
AUD_LO_DET1_INV
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TPADVSS
BOOT2
BOOT1
PHASE1
UGATE1
LGATE1
PGND1
ISEN1
UGATE2
PHASE2
LGATE2
PVCCVDDVIN
PGND2
VID6
VID5
VID4
VID2
VID3
VID1
VID0
ISEN2
VSUM
OCSET
VO
DROOP
DFB
VSEN
RTN
DPRSTP*
DPRSLPVR
PSI*
PGD_IN
3V3
CLK_EN*
PGOOD
VR_ON
NTC
VR_TT*
SOFT
RBIAS
VDIFF
FB2
FB
COMP
VW
NC
IN
IN
IN
IN
OUT
IN
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
IMVP6 CPU VCORE REGULATOR
(IMVP6_PHASE1)
FROM SMC
DPRSLPVR
001
11 0
0 1DPRSTP*
01
1
0
PSI*
1-Phase DCM
1-Phase DCM
1-Phase CCM
2-Phase CCM
Operation Mode
LAYOUT NOTE:PLACE R7528-29 CLOSE TO CPU DECAPS
MIN_NECK_WIDTHMIN_LINE_WIDTH
(IMVP6_VO)
(IMVP6_VO)
(IMVP6_VSUM)
(IMVP6_ISEN2)
(IMVP6_PHASE2)
MIN_LINE_WIDTH MIN_NECK_WIDTH MIN_LINE_WIDTH MIN_NECK_WIDTH
(IMVP6_COMP)
(IMVP6_FB)
(IMVP6_VW)
(GND)
(GND)
CLOSE TO CPUPLACE R7526
LAYOUT NOTE:
Note 1: C7532,C7533 = 27.4 Ohm For Validating CPU Only.
(IMVP6_ISEN1)
44A MAX CURRENT
NTC
*NEED TO CHANGE R7531 TO NTC ERT-J1VR103J PANASONIC
CPU_VCCSENSE_P & N ARE DIFF PAIRSROUTE AS 18MIL WIDE, 7MIL SPACE
FROM 1.5V AND 1.05V VREGS
ERT-J1VR103J
2
1 C7500NO STUFF
0.0022UF
CERM402
10%50V
2
1 R7503
1206MF-LF1/4W
1.05%
2
1 C7512
603
10%
CERM50V
4700PF
2
1 C7590NO STUFF
0.0022UF
CERM402
10%50V
21
R750010K
MF-LF402
1%1/16W
21
C75030.22uF
CERM-X5R10%6.3V402
2
1
XW7503SM
2
1
XW7504SM
9
19
21
14
5
44
18
20
43424140393837
13
22
27
35
49
7
15
4
31
2
28
34
129
33
3
8
6
25
30
32
23
24
1211
16
4645
17
10
47
2636
48
U7500OMIT
QFNISL6262
2
1C751520%0.22UF
25VX5R603
321
4
5Q7501CRITICAL
HAT2165HLFPAK
321
4
5Q7504HAT2165H
CRITICAL
LFPAK
321
4
5 Q7500HAT2168H
CRITICAL
LFPAK
321
4
5
Q7502CRITICAL
HAT2168HLFPAK
2
1
XW7501SM
2
1
XW7502SM
21
R75051/16W10K
MF-LF402
1%
21
C7504402
CERM-X5R6.3V10%
0.22uF
2
1 C7511
603
4700PF
50V10%
CERM
321
4
5Q7503CRITICAL
HAT2165HLFPAK
2
1 R7502
1206MF-LF1/4W
1.05%
2
1 C75020.0022UF
CERM402
10%50V
NO STUFF
321
4
5Q7505CRITICAL
HAT2165HLFPAK
2
1 C7592NO STUFF
0.0022UF
CERM402
10%50V
2
1C752720%0.22UF
25VX5R603
21
R75201/16W5%
402
10
MF-LF
21
R7512
402
101/16W5%MF-LF 2
1 C7526
603X5R10%25V1uF
2
1 C75960.1uF16V10%
402X5R
21
R75215%
MF-LF1/16W10
402
2
1 C7530
X5R402
10%16V0.1uF
21R7519499
1%1/16WMF-LF 402
2
1 C750725V10%
402CERM
0.0047uF
2
1 R75101/16W1%
402MF-LF
3.57K
2
1 C75356.3V20%
603CERM
4.7uF
2
1
D7500B340LBXFSMB
2
1
D7501SMBB340LBXF
21
R75950
21
R75930
21
R75910
21
R75960
21
R75940
21
R75920
21
R75900
321
4
5 Q7570
MEROM
LFPAK
CRITICAL
HAT2168H
321
4
5
Q7572
MEROM
CRITICAL
LFPAKHAT2168H
2
1 C7517OMIT
SM-3
20%16V
330UF
ELEC2
1 C7518OMIT
330UF
ELECSM-3
20%16V
2
1 C750816V
1210X7R
20%22UF
2
1 C750120%
ELEC16V
680UF
TH-MCZ
21
L7500
SM
0.36UH-30A-0.80MOHM
CRITICAL
21
L75010.36UH-30A-0.80MOHM
SM
CRITICAL
21
R75A0MF-LF1/16W
1%402
499
21
R7527
402 MF-LF1/16W 1%4.02K
21
C7510
40216V 10%0.01uF
CERM
21
R75081/16WMF-LF1%402
147K
21
R7513NO STUFF
2.0K
MF-LF1/16W1%
402
2
1 C7506
402
10%50V470pF
CERM
2
1 R75111.40K
MF-LF402
1%1/16W
2
1 R75091/16W1%
402MF-LF
1.82K
2
1 C7513470PF50V10%
402CERM
2
1 C7514
402
10%470PF50VCERM
2
1 R7514
4021/16WMF-LF
180K5%
2
1R7504
4021/16W5%MF-LF
1
2
1R7507
5%402
MF-LF1/16W
1
2
1C7516
50VCERM402
10%0.001uF
NO STUFF
2
1 R7516
MF-LF1/16W1%
402
11.5K
21
R75174.32K
402MF-LF1%1/16W
2
1 C7529
CERM50V5%180pF
402
2
1 R75181/16WMF-LF
1K1%
402
2
1 R7530
MF-LF4021/16W1%2.61K
2
1 R7515
402
1%11K
MF-LF1/16W
2
1 C75280.33uF10%
402CERM-X5R6.3V
2
1 C7534
402
10%0.033UF16VX5R
2
1 R7522
402MF-LF1/16W5%0
21
C75310.01uF10%16VCERM402
21
C753210%CERM40216V
NO STUFF
0.01uF
2
1R7523
MF-LF1/16W5%0
402
21
C7533
16V402
10%CERM
0.01uF
21
C7521
4026.3V20%X5R
0.22UF2
1XW7500SM
21R7529 NOSTUFF
402 100MF-LF1%
1/16W
21R7528 NOSTUFF
4021/16W1% MF-LF
100
2
1 C755025V1uF
X5R10%
603 2
1 C7551
60310%X5R
25V1uF
2
1R75013.65K1%1/10WMF-LF603
2
1R7506
603MF-LF1/10W1%3.65K
21
C75050.01uF
10%16VCERM402
21
R7526
470K
402
CRITICAL
21
R75310603-LF
10KOHM-5%
CRITICAL
2
1 C7509CRITICAL
16V
1210X7R
20%22UF
2
1 C759816V
1210X7R
20%22UF
CRITICAL
2
1 C7597CRITICAL
16V
1210X7R
20%22UF
SYNC_DATE=07/08/2005SYNC_MASTER=POWER
051-6949 09
75 111
IMVP6 CPU VCore Regulator
IMVP6_UGATE2 0.25 MM0.25 MM
GND_IMVP6_SGND
IMVP_VID<3>
IMVP6_FB2
IMVP6_VO
PP5V_S0
VOLTAGE=5VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.25 MMPP5V_S0_IMVP6_VDD
IMVP_VID<4>
IMVP_VID<2>
IMVP_VID<5>
0.25 MM0.60 MMIMVP6_VSUM_R2
PP12V_S5_CPU_REG
IMVP6_FET_RC1
IMVP6_VR_TT
PP12V_S5_CPU_REG
IMVP6_UGATE1
0.25 MM0.25 MMIMVP6_BOOT2
IMVP6_COMP_RC
IMVP_VID<1>
PPVCORE_CPU
IMVP6_VSEN
CPU_VCCSENSE_N
0.25 MM 0.25 MMIMVP6_RTN
0.20 MM0.25 MMIMVP6_FB20.20 MM0.25 MMIMVP6_VDIFF0.20 MM0.25 MMIMVP6_RBIAS0.20 MM0.25 MMIMVP6_SOFT
0.20 MM0.25 MMIMVP6_DROOP0.20 MM0.25 MMIMVP6_VO0.20 MM0.50 MMGND_IMVP6_SGND0.20 MM0.25 MMIMVP6_VSUM
0.20 MM0.25 MMIMVP6_OCSET
IMVP6_DFB
IMVP6_LGATE1
IMVP6_PHASE1
0.25 MM0.25 MMIMVP6_FET_RC10.25 MM0.25 MMIMVP6_VSUM_R10.25 MM0.25 MMR7504_1
0.25 MM1.5 MMIMVP6_LGATE10.25 MM0.25 MMIMVP6_ISEN1
0.25 MM1.5 MMIMVP6_UGATE1
0.25 MM0.25 MMIMVP6_BOOT10.25 MM1.5 MMIMVP6_PHASE1
0.25 MM0.25 MMR7507_1
0.25 MM0.25 MMIMVP6_FET_RC20.25 MM0.25 MMIMVP6_ISEN20.25 MM0.25 MMIMVP6_LGATE2
0.25 MM0.25 MMIMVP6_PHASE2
IMVP6_BOOT2
IMVP6_COMPIMVP6_FB
IMVP6_RBIAS
CPU_VID<1>
CPU_VID<3>
CPU_VID<5>
CPU_VID<0>
CPU_VID<2>
CPU_VID<4>
CPU_VID<6>
VR_PWRGOOD_DELAYIMVP_VR_ONVR_PWRGD_CK410_L
IMVP_PGD_INCPU_PSI_L
CPU_DPRSTP_L
PP12V_S5_CPU_REG
IMVP6_VW
0.25 MM0.25 MMIMVP6_VSEN
0.25 MM0.25 MMIMVP6_VW0.20 MM0.25 MMIMVP6_COMP0.20 MM0.25 MMIMVP6_FB
PM_DPRSLPVR
IMVP6_BOOT1
IMVP6_VDIFF
R7507_1
R7504_1
IMVP6_FET_RC2
MIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.2 MM
PPVIN_S5_IMVP6_VIN
IMVP6_OCSET
IMVP_DPRSLPVR
IMVP6_ISEN2
IMVP6_RTN
IMVP6_UGATE2
IMVP6_ISEN1
PPVCORE_CPU
IMVP6_DROOP
IMVP6_VSUM_R1
IMVP6_VSUM_R2
IMVP6_VDIFF_RC
=PP3V3_S0_IMVP
IMVP6_SOFT
GND_IMVP6_SGND
IMVP6_NTC
IMVP6_NTC_R
IMVP6_PHASE2
0.20 MM0.25 MMIMVP6_DFB
IMVP6_LGATE2
IMVP6_VO_R
CPU_VCCSENSE_P
GND_IMVP6_SGND
IMVP_VID<0>
IMVP_VID<6>
MIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.2 MMPP3V3_S0_IMVP6_3V3
IMVP6_VSUM
97
76
76
94
75
26
75
76
88
76
76
6
76
76
14
21
76
23
6
76
75
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75
75
6
75
75
75
75
75
75
5
75
8
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
8
8
8
8
8
8
8
5
58
26
77
7
7
75
75
75
75
75
75
14
75
75
75
75
75
75
75
75
75
75
5
75
75
75
6
75
75
75
75
75
8
75
75
www.vinafix.vn
ING
D
S
D
GS
GND
OUT
VIN+ VIN-
V+
GD
S
GD
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Current Sense Calibration CircuitSwitches in fixed load on power supplies to calibrate current sense circuits
1.2A / 1.44W
PCB: PLACE R7602, C7602 WITHIN 1" OF SMC (U5800)
SMC PWRGD PULLUP
SCALE4 V/V
ADC IS 10BIT 0 TO 10230 TO 3.3V
COUNT.0129 V/COUNT
PROCESSOR DCIN VOLTAGE SENSE
PCB: PLACE R7632, C7633 WITHIN 1" OF SMC (U5800)
2.73224 A/VSCALE
ADC IS 10BIT 0 TO 10230 TO 3.3V
.00881 A/COUNTCOUNT
TO SMC
PROCESSOR VCORE CURRENT SENSE(USING 12V INPUT CURRENT TO DERIVE CPU CURRENT)
(SCALING 12V INPUT VOLTAGE TO SMC)
PCB:PLACE D7599,R7597,C7599 BY SMCPCB:KEEP SHORTS NEXT TO U7501
PCB: PLACE D7599, C7599, R7597 WITHIN 1" OF SMC (U5800)
PROCESSOR VCORE SENSE
WORKS WELL.
1 MS TIME CONSTANTSO SMC ADC SAMPLING
PROCESSOR VCORE CURRENT SENSE(MEASURING DC/DC INDUCTOR DCR TO DERIVE CPU CURRENT)
PCB: PLACE R7612, C7612 WITHIN 1" OF SMC (U5800)
3
1
D7599SOT23
NOSTUFF
BAS16
21
L7502
TH-VERT-LF
CRITICAL
1UH-20A-4.5MOHM
2
1R76405%
1/16WMF-LF
100K
402
21
R7607
MF-LF402
1/16W
0
5%
21
R7604NOSTUFF
1/16W
402MF-LF
5%
0
2
1
3
Q76392N7002SOT23-LF
2
1
3
Q7640SOT-23
NTR4101P2
1R7639
402MF-LF1/16W5%10K
2
1R76411/16W5%10K
MF-LF402
21
R7659
1%1/16WMF-LF402
20.0K
2
1 C76590.1UF10%16VX5R402
NOSTUFF
21
R760520.0K
1%1/16WMF-LF402
21
R7606
402MF-LF1/16W1%
20.0K2
5
1
4
3
U7600SOT23-5
LMV2011MF
CRITICAL
21
R7669
1%1/16WMF-LF402
20.0K
2
1 C76690.1UF10%16VX5R402
NOSTUFF
21
R76001M
1/16W
402MF-LF
1%
21
C7600
402CERM50V
470PF
10%
2
1 C7603
CERM50V
402
470PF10%
2
1R7603
402MF-LF
1M1/16W1%
21
C7601
20%10V
0.1UF
CERM402
21
R7597
1/16WMF-LF402
1%
4.53K
2
1 C7599
402
20%
X5R6.3V
0.22UF
21
XW7598SM
OMIT21
R76024.53K
402
1%
MF-LF1/16W
2
1 C76026.3VX5R
0.22UF
402
20%
21
R7612
402MF-LF1/16W
4.53K
1%
2
1 C761220%6.3V
402X5R
0.22UF
2
1 C763320%6.3V
402
0.22UF
X5R
21
R7632
402
1/16W
4.53K
1%
MF-LF
2
1R75981/16W1%
MF-LF
73.2K
402
2
1R76301%1/16WMF-LF402
6.04K
2
1R76311%2.0K
402MF-LF1/16W
2
1R76231/16W
10K
402MF-LF
1%
21
R7599
1W
0.025
MF2512-1
1%
21
R7620
402MF-LF
5%
0
1/16W
NOSTUFF
2
1R76441.00
1%
1206
1/4WMF-LF
43
5 1
2
U7501SOT23-5-LFINA138
CRITICAL
2
1R76431.00
1%1/4WMF-LF1206
65321
4
7
Q7642FDC796N
CRITICAL
SUPERSOT-6
65321
4
7
Q7641CRITICAL
FDC796NSUPERSOT-6
2
1R7642
402MF-LF1/16W5%470K
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
CPU SENSE CIRCUITRIES
11176
09051-6949
CPU_ISENSE_OUT_R
IMVP6_VO_R_OA
ISENSE_CAL_EN_LS12V
GND_SMC_AVSS
ISENSE_CAL_EN_L_R
PP12V_S0
ISENSE_CAL_EN_L
MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.20 MM
ISENSE_CAL_EN
=PPVCORE_S0_CPU
MIN_NECK_WIDTH=0.20 mmMIN_LINE_WIDTH=0.50 mmGPUVCORE_ISENSE_CALCPUVCORE_ISENSE_CAL
MIN_LINE_WIDTH=0.50 mmMIN_NECK_WIDTH=0.20 mm
SYS_POWERFAIL_L RSMRST_PWRGD
PP3V3_S5
SMC_PBUS_VSENSE_R SMC_PBUS_VSENSE
PP12V_S5_CPU_REG
GND_SMC_AVSS
CPU_SENSE_I_R
PP12V_L7502VOLTAGE=12V
SMC_DCIN_ISENSE
SMC_CPU_ISENSE
PP3V3_S0
=PP12V_S5_CPU
GND_SMC_AVSS
GND_NEXT_TO_SMC
=PPVCORE_S0_GPU
PP3V3_S5
PP12V_S5_CPU_REG
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.60MMVOLTAGE=12V
CPU_DCIN_SENSE
GND_SMC_AVSS
SMC_CPU_VSENSE
CPU_ISENSE_R_NEG
IMVP6_VO
IMVP6_DROOP_RIMVP6_DROOP
GND_CPU_ISENSE_OPAMP
MIN_LINE_WIDTH=0.20 MM
CPU_ISENSE_R_POS
PPVCORE_CPU
83
83
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80
79
79
77
77
76
88
76
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61
66
65
59
65
85
59
85
41
85
59
85
76
9
26
76
26
76
91
26
76
75
59
88
8
6
76
59
10
59
88
6
76
59
6
58
6
58
6
6 58
5
58
75
58
58
58
6
6
58
59
86
5
75
58
58
75
75
5
www.vinafix.vn
PVINSVIN
SHDN/RT
SYNC/MODE
SW
VFB
ITHPGOODPGND SGND
SW
SGND PGND PADTHERM
SVIN PVIN
PGOOD
VFB
ITHSYNC/MODE
RUN/SSRT
IN G
D
S
G
D
SIN
OUT
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
VOUT = VREF * (1 + R2 / R1)
TOTAL=2.526A
M56=2.100AYUKON=0.426A
2.5V S0 RegulatorNB=0.142A
1.2V S5
POWER BUDGET
2.5V S0
POWER BUDGET
TOTAL=0.887AM56=0.745A
0.816V MAX0.784V MIN
VREF = 0.800V TYP
VREF = 0.800V TYP0.784V MIN0.816V MAX
0.4V (R1)(R1)
(R2)
CONTINUOUS
Powers up with PPVIN
(R1)
(R2)
BURST
1.2V S3 REGULATOR / 1.2V S0 FET
VOUT = VREF * (1 + R2 / R1)
CONTINUOUS
92
4
7
1
3
6
8
5
10
U7700
CRITICAL
LTC3411MSOP-LF
2
1C7703
402
100pF
CERM
5%50V
2
1R7706
402MF-LF1/16W
1%4.99K
2
1 C7704
CERM402
0.0033uF10%50V
21
L7700
SM1-LF
2.2uH
CRITICAL
2
1C7706
402CERM50V5%
22pF
2
1R77071%
MF-LF1/16W
402
10K
2
1R77084.7K
MF-LF402
1/16W1%
2
1 C7709
X5R805
6.3V20%22uF
21
R7700
402MF-LF1/16W5%
10
2
1 C7700
603X5R
20%6.3V
10UF
2
1R7705
1/16W1%
402MF-LF
324K
21
XW7700SM
2
1 C775622uF6.3VX5R805
20%
2
1 C7755
6.3V20%
X5R805
22uF
2
1 C7752
805
22uF
X5R
20%6.3V2
1C7751
805
22uF
X5R
20%6.3V
21
L77501.0UH-3.48A
SM-LF
CRITICAL
4
17
6
15
14
11
10
1
8
7
5
16
9
2
13
12
3
U7750LTC3412TSSOP-LF
CRITICAL
21
XW7750SM
2
1R77541%1/16WMF-LF402
309K
2
1 C7757
402CERM50V10%470pF
2
1R7755NO STUFF
05%1/16WMF-LF4022
1R7757
402MF-LF1/16W5%1M
2
1R775605%1/16WMF-LF402
1
2
6
Q77032N7002DW-X-FSOT-363
2
1R7793
402MF-LF1/16W5%10K
2
1R77945%1/16WMF-LF402
10K
4
5
3
Q7703SOT-3632N7002DW-X-F
2
1R7750
1/16W1%
402MF-LF
93.1K
2
1 C7750
50V5%
CERM
22pF
402
2
1R7751
MF-LF402
1%1/16W
121K
2
1R7752
MF-LF402
1%1/16W
54.9K
436521
Q7701
SI3446DV
TSOP-LF
2
1R771047K5%1/16WMF-LF402
21
C7710
10V
0.1UF
21
C7711
10V
0.1UF
21
C77120.1UF
10V
5
4
1
2
3
U7710
MC74VHC1G08SOT23-5-LF
5
4
1
2
3
U7712
MC74VHC1G08SOT23-5-LF
5
4
1
2
3
U7711
MC74VHC1G08SOT23-5-LF
2
1
3
Q7799SOT23-LF2N7002
NOSTUFF
2
1R7701
402
10K
MF-LF
5%1/16W
2
1R7704
402
1/16WMF-LF
5%10K
2
1R7753
402
8.25K1%1/16WMF-LF
2
1 C7753
402
10%50VCERM
0.0022UF
2
1 C775450V5%
402CERM
100PF
2
1 C7799
CERM10V20%0.1UF
402
11177
051-6949 09
SYNC_DATE=(MASTER)
2.5V & 1.2V GRAPHICS REGULATORSSYNC_MASTER=(MASTER)
PP1V2_S3
=PP1V2_S0_REG
ALL_SYS_PWRGD
IMVP_PGD_INPP3V3_S5
PP1V5_S0_PGOOD
PP1V05_S0_PGOOD
PP3V3_S5
PP2V5 S0_PGOOD
PP0V9_S0_PGOOD
PP3V3_S5
PM_SLP_S4_L
PP2V5 S0_PGOOD
PP3V3_SO_2V5REG_RVOLTAGE=3.3VMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
PM_SLP_S4
2V5REG_RTPP3V3_S5
PM_SLP_S3_L
2V5REG_VFB
PP2V5_S0
1V2REG_PGOOD1V2REG_RT
1V2REG_MODE
2V5REG_SW
MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
1V2REG_SWMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
2V5REG_ITH
2V5REG_ITH_RC
PM_SLP_S3
PP3V3_S5
=PP3V3_S3_1V2REGPM_PWROK
=PP3V3_S0_2V5REG
2V5REG_MODE
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmVOLTAGE=0V
2V5REG_SGND
1V2REG_ITH_RC
1V2REG_VFB
PM_SLP_S4
GPUVCORE_PGOOD1V2REG_SGND
VOLTAGE=0VMIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm
1V2REG_RUNSS
1V2REG_ITH
1V2REG_VFB_DIV
83
83
83
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81
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76
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76
66
66
66
66
66
65
65
65
65
65
59
59
59
59
59
26
26
26
83
26
81
26
83
58
6
6
6
58
79
6 88
80
6
79
6
88
26
75
5
80
81
5
77
79
5
23
77
77
5 6
78
5
6
6
77
85
www.vinafix.vn
FS_DIS
LDO_DR
LDO_FB
PVCC5
VCC5
DGND
THRML_PAD
AGND PGND
FB
COMP
PHASE
LGATE
BOOT
UGATE
VCC12G
D
S
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
1.8V S0 REGULATOR
(R1)
0.816V MAXVREF = 0.800V TYP
(R2)
VOUT=VREF*(1+R2/R1)
TOTAL=8.010A
1.5V S0
POWER BUDGETM56=2.400AGDDR=3.320AIO=1.750A
LOAD FROM POWER BUDGET8.5A PEAK CURRENT DRAW7.2A CONTINUOUS CURRENT DRAW
0.784V MIN
2
1 C7813
CERM
5%1000PF50V
1206
2
1 C7807330UF20%2.5V-ESR9VPOLYCASE-D2E-LF
2
1 C7817330UF20%2.5V-ESR9VPOLYCASE-D2E-LF
3
2
1
L78001.53UH
SM
CRITICAL
2
1 C7801
SM-LFELEC16V20%680UF
21
R78057.15K
1/16WMF-LF
1%
402
9
87
14
17
10
13
12
114
3
16
2
6
1
15
5
U7800ISL6549
QFN
2
1R78921%39.2K
402MF-LF1/16W
21
R7801
402MF-LF1/16W5%
0
2
1C78036.3V
4.7UF
603CERM
20%
2
1R7800
402MF-LF1/16W5%10
21
R7840OMIT
5%
MF-LF402
0
1/16W
21
C7814
10V
0.068UF
402CERM
10%
21
C7811
CERM50V
820PF
402
10%
2
1 C78090.01UF
402CERM16V10%
2
1R7802
402MF-LF1/16W1%1.24K
2
1R7803
402MF-LF1/16W1%1K
21
C7802
25V
1UF
603X5R
10%
2
1R7812
402MF-LF1/16W5%22
2
1 C78101500PF10%25VX7R402
2
1 C7806
CERM805-1
10UF6.3V20%
2
1 C7800
CERM1210
16V
10UF10%
21
C78050.1UF
603CERM25V20%
3
1
4
Q7800NTD60N02RCASE369-LF
CRITICAL
3
1
4
Q7801CASE369-LFNTD60N02R
CRITICAL
2
1
XW7800SM
2
1 C78041UF6.3V
402
10%
CERM
2
1
3
Q78022N7002SOT23-LF
2
1R78041/4W1%5.11
1206MF-LF
1.8V GDDR REGULATORSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
TRUE
PAGE_BORDER=TRUE
051-6949 09
78 111
5.11 OHM 0402 1% 1/16W LF R7840114S0514 1
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_GPU_FB
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_GPU_VCC5
1V8REG_GPU_LDO_DRMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V8REG_GPU_LGATE
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
PM_SLP_S3
1V8REG_GPU_LDO_FBMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V8REG_GPU_PVCC5MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM 1V8REG_GPU_BOOT
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V8REG_GPU_UGATE
1V8REG_GPU_BOOT_RMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V8REG_GPU_SNUB
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_GPU_COMP_R
1V8REG_GPU_COMPMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V8REG_GPU_FB_R
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
PP1V8_S0
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMVOLTAGE=0 V
1V8REG_GPU_GND
1V8REG_GPU_FS_DISMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
MIN_NECK_WIDTH=0.25MM
1V8REG_GPU_SWITCHNODEMIN_LINE_WIDTH=0.6MM
PP12V_S588 83 81 80
81
79
80
6
77
88
5
www.vinafix.vn
GND
V+LM339A
GND
V+LM339A
G
D
S
FS_DIS
LDO_DR
LDO_FB
PVCC5
VCC5
DGND
THRML_PAD
AGND PGND
FB
COMP
PHASE
LGATE
BOOT
UGATE
VCC12G
D
S
G
D
S
GND
V+LM339A
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(R2)
NB=4.000ADRAM=6.000A
TOTAL=10.000A
POWER BUDGET
1.8V S3
(R1)
1.8V S3 REGULATOR
PP1V8_S3
1.591V
0.723V
PLACE LEDNEAR VREG
PP1V8_S3
VOUT=VREF*(1+R2/R1)0.784V MIN0.816V MAX
VREF = 0.800V TYP
2
1 C7998330UF20%2.5V-ESR9VPOLYCASE-D2E-LF
3
2
5
4
12
U7910SOI-LF
21
C7980
20%10VCERM402
0.1UF
2
1R79125.11K
402MF-LF1/16W1%
2
1R79111%1/16WMF-LF402
5.49K
2
1R7910
402MF-LF1/16W1%10K
2
1R791310K1%1/16WMF-LF402
2
1R79148.45K
402MF-LF1/16W1%
3
13
11
10
12
U7910SOI-LF
2
1R79152.37K1%1/16WMF-LF402
2
1R7999
402
1/16WMF-LF
225%
2
1R7903
402
1%1/16WMF-LF
1.24K
2
1 C7907
CERM
10%
402
0.01UF16V
2
1R7901
MF-LF1/16W1%
402
1K
2
1R7902
MF-LF1206
5.111%1/4W
2
1 C79091000PF5%50VCERM1206
3
1
4
Q7901NTD60N02RCASE369-LF
CRITICAL
21
C7908
CERM
0.047UF
10%16V
402
21
R7940
402MF-LF
5%
0
1/16W
21
C7906
402
1000PF
10%25VX7R
2
1 C7900
CERM
10%
402
6.3V
1UF
2
1R7905105%1/16WMF-LF402
21
R7904
1/16WMF-LF
1%
402
4.02K
9
87
14
17
10
13
12
114
3
16
2
6
1
15
5
U7900QFN
ISL6549
2
1C79034.7UF
20%6.3VCERM603
21
R7991
402MF-LF1/16W5%
0
2
1R7992
402MF-LF1/16W5%100K
3
1
4Q7900CASE369-LFNTD60N02R
CRITICAL
2
1
3
Q7902SOT23-LF2N7002
21
C7992
25V
1UF
603X5R
10%
2
1 C7902
402X7R25V10%1000PF
21
C79010.1UF
603CERM25V20%
2
1 C7910OMIT
330UF20%16VELECSM-3
2
1 C7911
CERM1210
10UF10%16V
2
1R79063305%1/16WMF-LF402
DEVELOPMENT
2
1
LED79002.0X1.25MM-SMGREEN-3.6MCD
DEVELOPMENT
3
14
9
8
12
U7901SOI-LF
DEVELOPMENT
C791310UF6.3V20%
CERM1206
2
1
XW7900SM
3
2
1
L79001.53UH
SM
CRITICAL
2
1 C7912330UF20%2.5V-ESR9VPOLYCASE-D2E-LF
SYNC_MASTER=M23-PC
1.8V Vreg
79
051-6949
SYNC_DATE=04/12/2005
09
111
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_DDR_BOOT
PP12V_S5
VOLTAGE=0 VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V8REG_DDR_GND
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_DDR_LGATE
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_DDR_UGATE
PP1V8_S3
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_DDR_COMP
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_DDR_LDO_DR
1V8REG_DDR_FB_R
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_DDR_SNUB
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_DDR_VCC5
MIN_NECK_WIDTH=0.25MM
1V8REG_DDR_PVCC5MIN_LINE_WIDTH=0.6MM
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V8REG_DDR_FS_DIS
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V8REG_DDR_BOOT_R
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_DDR_COMP_R
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_DDR_LDO_FB
PM_SLP_S4
PP3V3_S5
PP3V3_S5
PP3V3_S5
PP1V8_S3_PGOOD
PP5V_S5
1V6_REF
PP5V_S5
PP0V9_S0_PGOOD
0V7_REF
LED_PP1V8_S3_P
LED_PP1V8_S3_N
PP0V9_S0
1V0_REF
MEMVTT_ENPM_SLP_S3_L
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V8REG_DDR_FB
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V8REG_DDR_SWITCHNODE
83
83
83
81
81
81
80
80
80
79
79
79
77
77
77
88
76
76
76
83
83
83
66
66
66
81
81
81
65
65
65
80
80
88
80
59
59
59
79
79
77
78
26
26
26
59
59
58
6
6
83
6
6
6
6
6
81
23
5
5
77
5
5
5
5
5
77
6
80
31 6
www.vinafix.vn
GND
V+LM339A
GND
V+LM339A
G
D
S
G
D
S
FS_DIS
LDO_DR
LDO_FB
PVCC5
VCC5
DGND
THRML_PAD
AGND PGND
FB
COMP
PHASE
LGATE
BOOT
UGATE
VCC12
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
1.5V S0
NB=6.000ASB=1.890A
TOTAL=8.010A
CPU=0.120APOWER BUDGET
VOUT=VREF*(1+R2/R1)VREF = 0.800V TYP
0.816V MAX0.784V MIN
(R1)
(R2)
PP1V5_S3
1.300V
PLACE LEDNEAR VREG
PP1V8_S3
1.5V S0 REGULATOR
3
1
7
6
12
U7910SOI-LF
3
1
7
6
12
U7901
DEVELOPMENT
SOI-LF
2
1R8010
402MF-LF1/16W1%10K
2
1R80118.45K
402MF-LF1/16W1%
2
1R80121%1/16WMF-LF402
5.49K
2
1R8007DEVELOPMENT
3305%1/16WMF-LF402
2
1LED8000DEVELOPMENT
2.0X1.25MM-SMGREEN-3.6MCD
2
1R8099
402
1/16WMF-LF
225%
2
1R8003
402
1%1/16WMF-LF
1K
2
1 C8003
CERM
10%
402
0.01UF16V
2
1R8000
MF-LF1/16W1%
402
1.13K
3
1
4
Q8000CASE369-LFNTD60N02R
CRITICAL
2
1R8002
MF-LF1206
5.111%1/4W
2
1 C80041000PF5%50VCERM1206
21
C8010
20%25VCERM603
0.1UF
3
1
4
Q8001NTD60N02RCASE369-LF
CRITICAL
21
C8011
CERM
0.047UF
10%16V
402
21
R8040
402MF-LF1/16W5%
0
21
C8012
402
1000PF
10%25VX7R
2
1 C8006
CERM
10%
402
6.3V
1UF
2
1R8005105%1/16WMF-LF402
21
R8004
1/16WMF-LF
1%
402
4.22K
9
87
14
17
10
13
12
114
3
16
2
6
1
15
5
U8000QFN
ISL6549
2
1
XW8000SM
2
1C80094.7UF
20%6.3VCERM603
21
R80010
5%1/16WMF-LF402
2
1R8092
402MF-LF1/16W5%100K
2
1
3
Q80032N7002SOT23-LF
2
1 C8014680UF20%16VELECTH-MCZ
2
1 C8000
CERM1210
16V
10UF10%
2
1 C8015
1210CERM
10%16V
10UF
2
1 C8001
POLYCASE-D2E-LF
2.5V-ESR9V20%330UF
2
1 C8099330UF20%2.5V-ESR9V
CASE-D2E-LFPOLY 2
1 C8016
805-1CERM
10UF6.3V20%
21
C8002
25V
603X5R
10%
1UF
2
1 C80051000PF10%25VX7R402
3
2
1
L8000
SM
1.53UH
CRITICAL
80
051-6949 09
111
SYNC_DATE=05/18/2005
1.5V VregSYNC_MASTER=FINO-PC
PP12V_S5
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V5REG_PCIE_COMP_R
MIN_LINE_WIDTH=0.6MM1V5REG_PCIE_UGATE
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V5REG_PCIE_FBMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V5REG_PCIE_LGATE
1V5REG_PCIE_COMPMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
PP3V3_S5
PP3V3_S5
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V5REG_PCIE_LDO_DR
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V5REG_PCIE_FB_R
1V5REG_PCIE_SNUBMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
PP5V_S5
PP1V5_S0_PGOOD
1V3_REF
LED_PP1V5_S0_P
LED_PP1V5_S0_N
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V5REG_PCIE_VCC5
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V5REG_PCIE_PVCC5
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V5REG_PCIE_FS_DIS
1V0_REF
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V5REG_PCIE_BOOT_RMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V5REG_PCIE_BOOT
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V5REG_PCIE_LDO_FB
PM_SLP_S3
VOLTAGE=0 VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V5REG_PCIE_GND
PP1V5_S0MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V5REG_PCIE_SWITCHNODE
83
83
81
81
80
80
79
79
77
77
88
76
76
83
66
66
83
81
65
65
81
79
59
59
79
78
26
26
59
81
6
6
6
6
81
78
5
5
5
5
77
79
77
6
www.vinafix.vn
GND
V+LM339A
GND
V+LM339A
FS_DIS
LDO_DR
LDO_FB
PVCC5
VCC5
DGND
THRML_PAD
AGND PGND
FB
COMP
PHASE
LGATE
BOOT
UGATE
VCC12G
D
S
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PP1V05_S0
1.05V S0 REGULATOR
0.867V
PP1V05_S0
NEAR VREGPLACE LED
(R1)
(R2)
VREF = 0.800V TYP0.816V MAX0.784V MIN
VOUT=VREF*(1+R2/R1)
CPU=2.500APOWER BUDGET
1.05V S0
TOTAL=8.874ASB=0.874ANB=5.500A
2
1R811010K1%1/16WMF-LF402
3
14
9
8
12
U7910SOI-LF
3
2
5
4
12
U7901
DEVELOPMENT
SOI-LF
2
1 C8198
1210
16V10%10UF
CERM2
1 C8112
1210CERM
10%16V
10UF2
1 C8111
1210
16V10%10UF
CERM2
1 C8110
CERM
10UF10%16V
1210
2
1R8107
402MF-LF1/16W5%330
DEVELOPMENT
2
1LED8100GREEN-3.6MCD2.0X1.25MM-SM
DEVELOPMENT
21
C8199
20%10VCERM402
0.1UF
DEVELOPMENT
2
1R8198
402MF-LF1/16W1%8.45K
2
1R81993.01K1%1/16WMF-LF402
9
87
14
17
10
13
12
114
3
16
2
6
1
15
5
U8100ISL6549
QFN
2
1 C8115
CERM805-1
10UF6.3V20%
2
1 C8190330UF20%2.5V-ESR9VPOLYCASE-D2E-LF
2
1 C8114330UF20%2.5V-ESR9VPOLYCASE-D2E-LF
2
1R8190
MF-LF1/16W
402
225%
2
1R8103
MF-LF1/16W1%
402
1.02K
2
1 C8107
402
10%
CERM
0.01UF16V
2
1R8101
402
1%1/16WMF-LF
3.24K
3
1
4
Q8102CASE369-LFNTD60N02R
CRITICAL
2
1R81021/4W1%5.11
1206MF-LF
2
1 C8109
CERM50V5%1000PF
1206
21
C81010.1UF
603CERM25V20%
3
1
4
Q8103NTD60N02RCASE369-LF
CRITICAL
21
C8108
CERM
0.047UF
10%16V
402
21
R81400
5%1/16WMF-LF402
21
C8106
402
10%
X7R
1000PF
25V
2
1 C81006.3V
402
10%
CERM
1UF
2
1R8105
402MF-LF1/16W5%10
2
1
XW8100SM
2
1C8103
603CERM6.3V20%
4.7UF
21
R8191
402MF-LF1/16W5%
0
2
1R8192100K5%1/16WMF-LF402
2
1
3
Q81042N7002SOT23-LF
21
L81001.5UH
IHLP
CRITICAL
21
C8192
603X5R
10%25V
1UF
21
R8104
402MF-LF1/16W5%
3.9K
2
1 C8102
402X7R25V10%1000PF
SYNC_MASTER=M38-RT
1.05V VREG
09
11181
051-6949
SYNC_DATE=05/18/2005
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V05REG_NB_SWITCHNODE
PP12V_S5
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V05REG_NB_PVCC5
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V05REG_NB_LDO_DR
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMVOLTAGE=0 V
1V05REG_NB_GND
PP3V3_S5
1V0_REF
MIN_LINE_WIDTH=0.6MM1V05REG_NB_LGATE
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V05REG_NB_COMP
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V05REG_NB_COMP_R
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V05REG_NB_FB
PM_SLP_S3
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V05REG_NB_LDO_FB
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V05REG_NB_BOOT
1V0_REF
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V05REG_NB_BOOT_R
PP1V05_S0
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V05REG_NB_FS_DIS
PP3V3_S5
LED_PP1V05_S0_N
LED_PP1V05_S0_P
PP5V_S5
PP1V05_S0_PGOOD
1V05REG_NB_SNUBMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V05REG_NB_FB_R
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
1V05REG_NB_UGATE
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
1V05REG_NB_VCC5
83
83
81
81
80
80
79
79
77
77
88
76
76
83
66
66
83
80
65
65
80
79
59
59
79
78
26
81
80
81
26
59
6
6
80
78
80
34
6
6
5
5
79
77
79
6
5
5
77
www.vinafix.vn
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
321
4
8765
Q8300IRF7413PBFSO-8
CRITICAL
2
1R830047K
402MF-LF1/16W5%
2
1R83011/16W
3.6K5%
MF-LF402
321
4
8765
Q8301IRF7413PBFSO-8
2
1R83023.6K5%
MF-LF1/16W
402
2
1R83031/16W
47K5%
MF-LF402
4
5
3
Q83022N7002DW-X-FSOT-363
CRITICAL
1
2
6
Q8303SOT-3632N7002DW-X-F
CRITICAL
2
1 C83991UF10V
603
20%
CERM
2
1 C83981UF10V
603
20%
CERM
5V & 3.3V Fets
11183
09051-6949
SYNC_MASTER=FINO-PC SYNC_DATE=04/12/2005
PM_SLP_S4
PP3V3_S3
PP5V_S3
PP12V_S5
PP12V_S5
GATE_5V_S3
PP5V_S5
PP3V3_S5
GATE_3V3_S3
81 80 79
88
88
77
83
83
76
81
81
81
66
80
80
80
65
79
79
79
59
59
78
78
59
26
79
53
59
6
6
6
6
77
6
6
5
5
5
5
www.vinafix.vn
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
PCIE_PVSS
PCIE_VDDR_12
PCIE_PVDD_12
PCIE_VSS
(1.2V)
(1.2V)
PCIE_VSS
(2 OF 7)
PCI EXPRESS POWER & GROUND
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
PCIE_REFCLKPPCIE_REFCLKN
PERST*PERST*_MASK
PCIE_TEST
PCIE_RX15N
PCIE_RX14P
PCIE_RX13N
PCIE_RX12NPCIE_RX12P
PCIE_RX1P
PCIE_TX0PPCIE_TX0N
PCIE_TX1P
PCIE_TX2N
PCIE_TX1N
PCIE_TX2P
PCIE_TX3PPCIE_TX3N
PCIE_TX4PPCIE_TX4N
PCIE_TX5PPCIE_TX5N
PCIE_TX6PPCIE_TX6N
PCIE_TX7PPCIE_TX7N
PCIE_TX8NPCIE_TX8P
PCIE_TX9P
PCIE_TX10P
PCIE_TX9N
PCIE_TX10N
PCIE_TX11PPCIE_TX11N
PCIE_TX12PPCIE_TX12N
PCIE_TX13NPCIE_TX13P
PCIE_TX14NPCIE_TX14P
PCIE_TX15NPCIE_TX15P
PCIE_CALRPPCIE_CALRN
PCIE_CALI
PCIE_RX1N
PCIE_RX2NPCIE_RX2P
PCIE_RX3PPCIE_RX3N
PCIE_RX4PPCIE_RX4N
PCIE_RX5PPCIE_RX5N
PCIE_RX6NPCIE_RX6P
PCIE_RX7NPCIE_RX7P
PCIE_RX8PPCIE_RX8N
PCIE_RX9PPCIE_RX9N
PCIE_RX10PPCIE_RX10N
PCIE_RX11PPCIE_RX11N
PCIE_RX13P
PCIE_RX14N
PCIE_RX0NPCIE_RX0P
PCIE_RX15P
PCI-EXPRESS BUS INTERFACE
(1 OF 7)
OUT
OUT
OUT
OUT
OUT
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
2000mA
100mA
NC
Add ferrite bead(s)?
21C848110% 16V
0.1uF
402X5R
21C848210% 16V X5R
0.1uF
402
21C847910% 16V X5R 402
0.1uF
21C848010% 16V X5R
0.1uF
402
21C847710% 16V X5R
0.1uF
402
21C847810% 16V X5R
0.1uF
402
21C847510% 16V X5R
0.1uF
402
21C847610% 16V X5R
0.1uF
402
21C847310% 16V X5R
0.1uF
402
21C847410% 16V X5R
0.1uF
402
21C842040210% 16V X5R
0.1uF
21C847110% 16V X5R
0.1uF
402
21C847210% 16V X5R
0.1uF
402
21C846910% 16V X5R
0.1uF
402
21C847010% 16V X5R
0.1uF
402
21C846710% 16V X5R
0.1uF
402
21C842110%
0.1uF
16V X5R 402
21C846810% 16V X5R
0.1uF
402
21C846510% 16V X5R
0.1uF
402
21C846610% 16V X5R
0.1uF
402
21C846310% 16V X5R
0.1uF
402
21C846410% 16V X5R
0.1uF
402
21C845010% 16V X5R
0.1uF
402
21C846110% 16V X5R
0.1uF
402
21C846210% 16V X5R
0.1uF
402
21C845910% 16V X5R
0.1uF
402
21C846010% 16V X5R
0.1uF
402
21C845710% 16V X5R
0.1uF
402
21C845110% 16V X5R 402
0.1uF
21C845810% 16V X5R 402
0.1uF
2
1R8496
1/16WMF-LF402
1%562
2
1R84951%2.0K
1/16WMF-LF402
2
1R84971.47K
1%
402MF-LF1/16W
R24
AL27
AK32
R23
AK31
AK30
AK29
AK26
AJ32
AJ30
AJ29
AJ28
AJ26
AH29
P30
AH27
AH26
AH24
AG31
AG29
AG26
AG25
AF30
AF29
AF28
P29
AF26
AE29
AE27
AE26
AD31
AD29
AD26
AD25
AC30
AC29
P28
AC28
AC26
AC24
AC23
AB29
AB27
AB26
AB23
AA31
AA29
P26
AA26
AA25
AA23
Y30
Y29
Y28
Y26
Y24
W29
W27
P25
W26
W24
V31
V29
V26
V25
V24
U30
U29
U28
P24
U26
U24
T29
T27
T26
T24
R31
R29
R26
R25
N30
N24
AM27
AL32
AL31
AL30
AL29
N29
N28
N27
AM31
AM30
AM29
AM28
N26
N25
W23
V23
U23
P23
N23
U8400
OMIT
BGA
M56P
2
1
L8400200-OHM-EMI
0402
2
1C8402
CERM
1uF6.3V
402
10%
21C844810% 16V X5R
0.1uF
402
2
1C8401
402CERM
10%6.3V
1uF
2
1C840710%6.3VCERM402
1uF
21C844910% 16V X5R
0.1uF
402
2
1C841310%6.3VCERM402
1uF
2
1C84061uF
402CERM6.3V10%
2
1C84111uF
402CERM6.3V10%
2
1C841210%6.3VCERM402
1uF
2
1 C840020%
X5R805
6.3V
22uF
2
1 C841022uF6.3V
805X5R
20%21C844610% 16V X5R
0.1uF
402
2
1 C8405
6.3V
805X5R
20%22uF
21C844710% 16V X5R
0.1uF
402
21C844410% 16V X5R
0.1uF
402
21C8445X5R10% 16V
0.1uF
402
21C844210% 16V X5R
0.1uF
402
21C844310% 16V X5R
0.1uF
402
21C844010% 16V X5R
0.1uF
402
21C844110% 16V X5R
0.1uF
402
21C843810% 16V X5R
0.1uF
402
21C843910% 16V X5R 402
0.1uF
21C843610% 16V X5R
0.1uF
402
21C843710% 16V X5R
0.1uF
402
21C843410% 16V X5R
0.1uF
402
21C843510% 16V X5R
0.1uF
402
21C843210% 16V X5R
0.1uF
402
21C843310% 16V X5R
0.1uF
402
21C8430 0.1uF
10% 16V X5R 402
21C8431 0.1uF
10% 16V X5R 402
21C842810% 16V X5R
0.1uF
402
21C842910% 16V X5R
0.1uF
402
21C842610% 16V X5R
0.1uF
402
21C842710% 16V X5R
0.1uF
402
21C842416V X5R
0.1uF
40210%
21C842510% 16V X5R 402
0.1uF
21C8422 0.1uF
10% X5R 40216V
21C842310% 16V X5R
0.1uF
402
21C8455402
0.1uF
X5R16V10%
21C8456402
0.1uF
X5R16V10%
AF24
AG24
AA27
Y27
AB28
AA28
AC25
AB25
AD27
AC27
AE28
AD28
AF25
AE25
AG27
AF27
AH28
AG28
AJ25
AH25
R27
P27
T28
R28
U25
T25
V27
U27
W28
V28
Y25
W25
AK27
AJ27
AA24
Y31
W31
AA32
Y32
AB30
AA30
AC31
AB31
AD32
AC32
AE30
AD30
AF31
AE31
AG32
AF32
AH30
AG30
P31
N31
R32
P32
T30
R30
U31
T31
V32
U32
W30
V30
AJ31
AH31
AL28
AK28
AD24
AE24
AB24
U8400
OMIT
M56PBGA
21C8485 0.1uF
10% 16V X5R 402
21C8486 0.1uF
16V X5R10% 402
21C848310% 16V X5R
0.1uF
402
21C848410% 16V X5R
0.1uF
402
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
09051-6949
11184
ATI M56 PCI-E
=PP1V2_S0_PCIE_GPU_VDDR
PEG_RESET_L
PEG_R2D_P<5>PEG_R2D_N<5>
PEG_R2D_C_N<7>
PEG_R2D_C_N<0>
GPU_CLK100M_PCIE_PGPU_CLK100M_PCIE_N
PEG_R2D_C_P<0>
PEG_R2D_C_N<1>
PEG_R2D_C_P<1>
PEG_R2D_C_N<2>
PEG_R2D_C_N<3>
PEG_R2D_C_P<2>
PEG_R2D_C_N<4>
PEG_R2D_C_P<4>
PEG_R2D_C_P<5>
PEG_R2D_C_N<6>
PEG_R2D_C_P<6>
PEG_R2D_C_P<7>
PEG_R2D_C_N<8>
PEG_R2D_C_N<9>
PEG_R2D_C_P<9>
PEG_R2D_C_N<11>
PEG_R2D_C_P<10>
PEG_R2D_C_P<11>
PEG_R2D_C_N<12>
PEG_R2D_C_P<12>
PEG_R2D_C_N<13>
PEG_R2D_C_P<13>
PEG_R2D_C_P<14>
PEG_R2D_C_N<14>
PEG_R2D_C_P<15>
PEG_R2D_P<15>
PEG_R2D_P<14>
PEG_R2D_P<12>
PEG_R2D_P<11>
PEG_R2D_P<10>
PEG_R2D_P<9>
PEG_R2D_P<7>
PEG_R2D_P<4>
PEG_R2D_P<3>
PEG_R2D_P<2>
PEG_R2D_P<1>
PEG_R2D_P<0>
PEG_R2D_N<14>
PEG_R2D_N<13>
PEG_R2D_N<12>
PEG_R2D_N<10>
PEG_R2D_N<11>
PEG_R2D_N<9>
PEG_R2D_N<3>
PEG_R2D_N<4>
PEG_R2D_N<2>
PEG_R2D_N<1>
PEG_R2D_N<0>
PEG_D2R_C_N<4>
PEG_D2R_C_N<1>
PEG_D2R_C_N<2>
PEG_D2R_C_N<0>
PEG_D2R_C_N<13>
PEG_D2R_C_N<10>
PEG_D2R_C_N<9>
PEG_D2R_C_N<8>
PEG_D2R_C_N<7>
PEG_D2R_C_N<6>
PEG_D2R_C_N<5>
GPU_PCIE_CALI
GPU_PCIE_CALRNGPU_PCIE_CALRP
PEG_D2R_P<15>
PEG_D2R_N<15>
PEG_D2R_C_P<1> PEG_D2R_P<14>
PEG_D2R_N<14>
PEG_D2R_N<13>
PEG_D2R_C_P<2> PEG_D2R_P<13>
PEG_D2R_N<12>
PEG_D2R_C_P<3> PEG_D2R_P<12>
PEG_D2R_N<11>
PEG_D2R_C_P<4> PEG_D2R_P<11>
PEG_D2R_C_P<5> PEG_D2R_P<10>
PEG_D2R_N<10>
PEG_D2R_C_P<6> PEG_D2R_P<9>
PEG_D2R_N<9>
PEG_D2R_C_P<7> PEG_D2R_P<8>
PEG_D2R_N<8>
PEG_D2R_C_P<8> PEG_D2R_P<7>
PEG_D2R_N<7>
PEG_D2R_N<6>
PEG_D2R_C_P<9> PEG_D2R_P<6>
PEG_D2R_P<4>
PEG_D2R_N<4>
PEG_D2R_C_P<10> PEG_D2R_P<5>
PEG_D2R_N<5>
PEG_D2R_N<3>
PEG_D2R_C_P<12> PEG_D2R_P<3>
PEG_D2R_C_P<14> PEG_D2R_P<1>
PEG_D2R_N<2>
PEG_D2R_C_P<13> PEG_D2R_P<2>
PEG_D2R_N<1>
PEG_D2R_P<0>
PEG_D2R_C_P<0>
VOLTAGE=0VGND_GPU_PCIE_PVSS
MIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.1 MM
PEG_D2R_C_N<3>
PEG_R2D_C_P<3>
PEG_R2D_N<6>
PEG_R2D_N<8>
PEG_D2R_C_P<11>PEG_D2R_C_N<11>
PEG_D2R_N<0>
=PPVIO_S0_PCIE
PEG_D2R_C_N<15>PEG_D2R_C_P<15>
PEG_D2R_C_N<14>
PEG_R2D_C_N<5>
PEG_R2D_C_N<15>
PEG_R2D_P<6>
PEG_R2D_N<7>
PEG_R2D_P<8>
PEG_D2R_C_N<12>
PEG_R2D_P<13>
=PP1V2_S0_PCIE_GPU_PVDD
PEG_R2D_N<15>
PEG_R2D_C_P<8>
PEG_R2D_C_N<10>
88
6
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13 13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
88
13
13
88
13
13
www.vinafix.vn
PGND
PHASE
UG
LG
PVCC
FCCM
EN
PGOODCOMP
FSET
ISEN
FB
VO
BOOT
VIN
THRMLPAD
VCC
G
D
S
OUT
GD
S
PGEN
VIN
ADJ
VOUT
GND
G
D
SG
D
S
SHDN*
D
FB
VIN
GND
SW
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
<Rb>
GPU VCore Supply
180mA max output
Back-bias negative supply provides VSS - 0.5V when active.
<Rc>
<Ra>
Vout(low) = 0.6V * (1 + Ra/Rb)
Vout(high) = 0.6V * (1 + Ra/Req)
Req = Rb || Rc
Back-Bias Negative SupplyWhen inactive, provides VSS to BBN pins.
(GPUBBN_D)
Vout = -10uA * Ra
<Ra>
150mA max output
Vout = -0.50V
FDC796N min Vgs is 1.0V
(Inductor & IC current limit)
Watch FET Vgs, since Vs will be negative
Req = Rb || Rc
<Rc>
When inactive, provides VDDC to BBP pins.NOTE: BBP tracks VDDC based on GPU voltage GPIO.
Back-bias positive supply provides VDDC + 0.5V when active.
<Ra>
Vout(high) = 0.59V * (1 + Ra/Req)
Vout(low) = 0.59V * (1 + Ra/Rb)
(LDO limit)
Vout = 1.58V / 1.50V
close to inductorR8594 and R8597Keep C8590, R8590,Placement Note:
Vin must be > 4.2V
GPU VCore Current Sense
Pull-up voltage must be high enough tosatisfy BBP FET Vgs (where Vs = 1.2V)
FDC796N max Vgs is 3.0V
Back-Bias Positive Supply
<Rb>
2
1 C8542330uF
POLYCASE-D2E-LF
20%2.5V-ESR9V
2
1R8521
1/16WMF-LF
1%
402
3.01K
2
1
R8522
402MF-LF1/16W1%
5.11K
OMIT
2
1 C8532
X7R1210
20%16V
22uF
321
4
5
Q8520
LFPAKHAT2168H
CRITICAL
21
C8509
X5R402
20%6.3V
0.22UF
2
1
D8520SMB
B340LBXF321
4
5 Q8522CRITICAL
LFPAKHAT2165H
21
R8510
1/16W1%
3.01K
402MF-LF
2
1C8502
603
20%6.3V
2.2UF
CERM1
2
1C8500
6.3V20%
603CERM1
2.2UF2
1C8501
16V10%
603X5R
1uF
2
1R8503
402MF-LF1/16W5%10K
8
1
2
14
17
12
15
16
10
11
9
7
3
6
4
5
13
U8500
QFNISL6269
2
1C8507
CERM402
50V
15PF5%
2
1R8508
MF-LF402
1%1/16W
150K
2
1C8508
CERM402
470PF10%50V
2
1R850733K
MF-LF402
5%1/16W
2
1R8504
1/16W
0
MF-LF402
5%
2
1R8505
1/16W5%
402MF-LF
0
NO STUFF
2
1R850640.2K
MF-LF402
1%1/16W
2
1C8506
16V10%
402CERM
0.01UF
2
1 C853122uF
X7R1210
20%16V
2
1 C853020%22uF16VX7R1210
2
1 C8540
X5R805
22uF6.3V20%
2
1C854122uF
X5R
20%
805
6.3V
321
4
5Q8521
LFPAKHAT2165H
CRITICAL
21
XW8500SM
2
1 C852210%
402X7R
1000pF
NO STUFF
25V 2
1 C8521
X7R402
10%25V
NO STUFF
1000pF
2
1C8543
POLY
330uF
CASE-D2E-LF
20%2.5V-ESR9V
2
1
R8523
402 MF-LF1/16W 1%40.2K
NOSTUFF
2
1R8502
402
1/16W5%
MF-LF
NO STUFF
0
2
1R856010K
MF-LF402
5%1/16W
GPU_BB_CTL
2
1C85601uF
CERM402
10%6.3V
GPU_BB_CTL
2
1
3
Q85702N7002SOT23-LF
GPU_BB_CTL
5
13
42
U856074LVC1G125LFSOT23-5
GPU_BB_CTL2
1R85701K
1/16W5%
402MF-LF
2
1 C85700.01uF
CERM402
10%16V
GPU_BB_CTL
21
R8561
MF-LF402
5%1/16W
0
GPU_BB_CTL
2 1
C8598
50V
470pF
402CERM
10%
2 1
C8592
50V
470pF
402CERM
10%
21
R8598
402MF-LF1/16W
1M
1%
2
5
1
4
3
U8595LMV2011MFSOT23-5
CRITICAL
21
R8592
1%
1M
MF-LF402
1/16W
2
1 C85951uF
CERM402
10%6.3V
21
R8593
1/16W
402MF-LF
1%
27.4K
21
R8591
1%
402
1/16WMF-LF
27.4K
2
1R85901%
649
1/16W
402MF-LF
21
R8594
1/16W1%
1K
402MF-LF
NO STUFF
2 1
C8590
6.3V
1uF
402CERM
10%
2
1
R8597
0603-LF
10KOHM-5%
CRITICAL
2
1R8596
402MF-LF1/16W
1K1%
2
1 C85A0
X5R402
0.22UF6.3V20%
21
R85A0
402
4.53K
1%1/16WMF-LF
21
L85201.5UH
IHLP
CRITICAL
2
1R8599
1206MF-LF1/4W1%5.11
2
1 C8599
1206CERM50V5%1000PF
2
1C855620%
X5R
22uF6.3V
805
GPU_BB_CTL
65321
4
7
Q8575
SUPERSOT-6FDC796N
CRITICAL
2
1 C855722uF
X5R
20%6.3V
805
GPU_BB_CTL
2
1
R8555
402 MF-LF1/16W 1%24.9K
GPU_BB_CTL
2
1C8555
16V10%
402CERM
0.01UF
GPU_BB_CTL
61
4
2
3 5
U8550FAN2558SOT23-6-LF
CRITICALGPU_BB_CTL
2
1C8551
CERM1603
2.2uF6.3V20%
GPU_BB_CTL
2
1
R8556
402 MF-LF1/16W 1%16.2K
GPU_BB_CTL
2
1
R8554
402 MF-LF1/16W 1%174K
GPU_BB_CTL
2
1
3
Q85542N7002SOT23-LF
GPU_BB_CTL
6 5 3 2 1
4
7
Q8576
SUPERSOT-6FDC796N
CRITICAL
2
1
C85896.3VX5R 805
20%22uF
GPU_BB_CTL
21
R8585
1/10W
10
5%
MF-LF603
GPU_BB_CTL
32
41
L8585
SDQ12150-SM15uH
CRITICALGPU_BB_CTL
2
1
R8586
402 MF-LF1/16W 1%49.9K
GPU_BB_CTL
2
1C8586220pF
CERM402
5%25V
GPU_BB_CTL
21
C8585
CERM
10%50V
402
330pF
GPU_BB_CTL
2
1C8580
603
20%10uF
X5R6.3V
GPU_BB_CTL
6
1
4
2
3
5
U8580LT3483TSOT23-6
CRITICAL
GPU_BB_CTL
1
2
6
Q8523SOT-3632N7002DW-X-F
NOSTUFF
2
1 C85230.1uF
402
10%16VX5R
NOSTUFF
21
R8525
5%1/16WMF-LF402
0
NOSTUFF2
1R8526100K
402
5%1/16WMF-LF
NOSTUFF
4
5
3
Q85232N7002DW-X-FSOT-363
NOSTUFF
2
1R852410K
402MF-LF1/16W
5%
NOSTUFF
2
1
C85205%
60350V2200PF
CERM
NOSTUFF
2 1
R8540
MF-LF
0
5% 4021/16W
21
R8588
1/16WMF-LF
5%
0
402
85
09
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
GPU (M56) Core Supplies
111
051-6949
GPUVCORE_FB
=PPVCORE_S0_GPU_REG
PP5V_S0_GPUVCORE_VCC
=PP3V3_S0_GPUBBN
GPUVCORE_PHASE
GPUBB_EN
GPUVCORE_ENGPUVCORE_FCCM
GPUVCORE_PGOODGPUVCORE_COMP
C8509_P1
GPUVCORE_BOOT
GPUVCORE_UG
GPUVCORE_ISEN
=PP5V_S0_GPUVCORE
GPUISENS_POS
GPUVCORE_LG
GPUVCORE_FSET
GPU_VCORE_HIGH_RC
GPU_VCORE_LOW
GPU_VCORE_HIGH
=PP3V3_S0_GPU
GPUVCORE_FB_LOW
GPUBB_EN
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmGPUBBN_D_RC
GPUBB_EN_L
MIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm
GPUBBN_SW
GPUBBN_FB
=PNVOUT_S0_GPUBBN_REG
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mm
GPUBBN_D
GPU_VCORE_HIGH
GPUBB_EN
GPUBB_EN_L
GPUBBP_ADJ
=PP3V3_S0_GPUBBP =PPVOUT_S0_GPUBBP_LDO
=PPVCORE_S0_GPU_BBP
GPUBBP_ADJ_LOW
GPUVCORE_IOUT
GND_SMC_AVSS
U8595_1
GPUISENS_NTC
=PP5V_S0_GPUBBCTL
GPUBB_EN_L
=PP3V3_S0_GPUBBCTL
GPU_BB_ENGPU_GENERICD
=PP5V_S0_GPUISENS
GPUISENS_NEG
R8599_2
GPUISENS_RC
GPUVCORE_COMP_R
GND_GPUVCORE_SGND
=PPVIN_S0_GPUVCORE
93
76
91
59
88
88
88
85
88
77
88
88
85
88
85
85
88
85
85
85
88 88
88
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58
88
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MEMORY & CORE POWER / GROUND
(1.0V/1.2V)
(1.0V/1.2V)
(7 OF 7)
VDDR1VSS
VSS
(1.8V/2.0V) VSS
VDDC
BBP BBN
VDDCI
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
100mA (Preliminary)
100mA (Preliminary)
2.0A @ 500MHz 1.8V GDDR3
14.2A @ 445/452MHz Core/Mem Clk for VDDC+VDDCI
- =PP1V5_GPU_VDD15Power aliases required by this page:
Page Notes
Signal aliases required by this page:
BOM options provided by this page:
- =PP1VR1V3_GPU_VCORE
(NONE)
(NONE)
P17
P15
P7
P6
P5
P1
N8
N7
N3
M32
A31
M28
M24
M9
M8
M7
M6
M3
L29
L7
L6
A25
L1
K30
K27
K17
K16
K12
K10
J30
J28
J24
A22
J21
J16
J12
J9
J6
J3
H32
H28
H21
H20
A19
H16
H7
H5
H1
G25
G22
G21
G20
G19
G16
A16
G13
F30
F27
F24
F22
F21
F19
F18
F16
F15
A13
F13
F10
F6
F3
E32
E30
E28
E25
E19
E16
A11
E13
E12
E9
E8
E5
D30
D11
C27
C24
C21
A8
C20
C18
C15
C10
AM13
AM2
AL13
AL1
AK16
AJ10
AH16
AH11
AH10
C9
AG23
AG16
AG11
AF16
AF14
AE17
AE16
AE15
AE14
AE8
C6
AD17
AD16
AD15
AD14
AD13
AD10
AD9
AD8
AD7
AD6C5
AC10
AC9
AA6
AA4
Y7
Y6
Y5
Y1
W18
W16
C4
V19
V17
V6
V3
U18
U14
U10
U9
U8
U7
B32
U6
U5
U1
T19
T15
T10
R16
R14
R6
R3
B1
A2
K23
C32
C1
A30
A24
A21
AA1
Y10
Y9
Y8
A18
V1
R9
R1
P10
P9
P8
N10
N9
M10
M1
A15
L32
L24
L23
K24
K21
K20
K19
K13
K11
J32
A12
J20
J19
J18
J13
J11
J10
J1
H19
H13
F32
A9
A3
W17
W10
U19
T23
T14
P16
K14
T18
T17
T16
R19
R18
R17
R15
AD11
AC12
AC11
P19
W19
W15
W14
V18
V16
V15
V14
U17
U16
U15
P18
P14
AC14
V10
M23
K18
AC17
Y23
R10
K15
U8400M56PBGA
OMIT
2
1C8697GPU_BB_CTL
10%16VX5R402
0.1uF
2
1C8696GPU_BB_CTL
1uF
402
10%6.3VCERM
2
1 C8691
6.3VCERM
1uF
402
10%
2
1 C869210%16VX5R402
0.1uF
2
1 C861010%
402
1uF6.3VCERM2
1 C860910%
402
1uF
CERM6.3V
2
1 C860810%
402
1uF
CERM6.3V
2
1 C860710%
402
1uF
CERM6.3V
2
1 C860610%
402
1uF
CERM6.3V
2
1 C860510%
402
1uF
CERM6.3V
2
1 C860410%1uF
CERM6.3V
402
2
1 C8616
6.3VCERM
1uF
402
10%
2
1 C8615
6.3VCERM
1uF
402
10%
2
1 C8614
6.3VCERM
1uF
402
10%
2
1 C8613
6.3VCERM
1uF
402
10%
2
1 C8612
6.3VCERM
1uF
402
10%
2
1R863005%
603MF-LF1/10W
2
1 C863410%
402
1uF
CERM6.3V
2
1 C863310%
402
1uF
CERM6.3V
2
1 C863210%
402
1uF
CERM6.3V
2
1 C863110%
402
1uF
CERM6.3V
2
1 C866010%
402
1uF
CERM6.3V
2
1 C8666
6.3VCERM
1uF
402
10%
2
1 C865910%
402
1uF
CERM6.3V
2
1 C865810%
402
1uF
CERM6.3V
2
1 C865710%
402
1uF
CERM6.3V
2
1 C8665
6.3VCERM
1uF
402
10%
2
1 C8664
6.3VCERM
1uF
402
10%
2
1 C86631uF6.3VCERM402
10%
2
1 C865610%
402
1uF
CERM6.3V
2
1 C8662
6.3VCERM
1uF
402
10%
2
1 C865510%
402
1uF
CERM6.3V
2
1 C8661
6.3VCERM
1uF
402
10%
2
1 C867210%
402
1uF
CERM6.3V
2
1 C8678
6.3VCERM
1uF
402
10%
2
1 C867110%
402
1uF
CERM6.3V
2
1 C867010%
402
1uF
CERM6.3V
2
1 C866910%
402
1uF
CERM6.3V
2
1 C8677
6.3VCERM
1uF
402
10%
2
1 C8676
6.3VCERM
1uF
402
10%
2
1 C8675
6.3VCERM
1uF
402
10%
2
1 C866810%
402
1uF
CERM6.3V
2
1 C8674
6.3VCERM
1uF
402
10%
2
1 C866710%
402
1uF6.3VCERM
2
1 C8673
6.3VCERM
1uF
402
10%
2
1C865320%
805
22uF
X5R6.3V
2
1C865222uF
805X5R6.3V20%
2
1C865120%
805
22uF6.3VX5R2
1C865020%6.3VX5R805
22uF
2
1 C8683
6.3VCERM
1uF
402
10%
2
1 C8682
6.3VCERM
1uF
402
10%
2
1 C8681
6.3VCERM
1uF
402
10%
2
1 C8680
6.3VCERM
1uF
402
10%
2
1 C867910%
402
1uF
CERM6.3V
2
1C860120%6.3VX5R805
22uF
2
1 C861110%
402
1uF
CERM6.3V
2
1C869022uF
805X5R6.3V20%
2
1 C8695GPU_BB_CTL
805X5R6.3V
22uF20%
2
1C863022uF
805X5R6.3V20%
2
1C860022uF
805X5R6.3V20%
86 111
051-6949 09
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
ATI M56 Core Power
MIN_LINE_WIDTH=0.5 MM
PPVCORE_S0_GPU_VDDCIVOLTAGE=1.2V
MIN_NECK_WIDTH=0.2 MM
=PPBB_S0_GPU
=PPVCORE_S0_GPU
=PP1V8R2V0_S0_FB_GPU
=PNBB_S0_GPU
91 88
88
88
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87
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www.vinafix.vn
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IN
IN
IN
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
DQA_58DQA_59
WEA1*
DQA_61DQA_62
MVREFD_0MVREFS_0
VDDRH0
MAA_0MAA_1MAA_2MAA_3MAA_4MAA_5MAA_6MAA_7MAA_8MAA_9MAA_10MAA_11MAA_12MAA_13MAA_14MAA_15
DQMA_0*DQMA_1*DQMA_2*DQMA_3*DQMA_4*DQMA_5*DQMA_6*DQMA_7*
QSA_1QSA_2
QSA_0
QSA_3QSA_4QSA_5QSA_6QSA_7
QSA_0*QSA_1*QSA_2*QSA_3*QSA_4*QSA_5*QSA_6*QSA_7*
CLKA0CLKA0*
CSA0_0*
CKEA0
RASA0*
CASA0*
WEA0*
ODTA0
CLKA1*
CSA1_0*
CKEA1
RASA1*
CASA1*
ODTA1
DQA_0DQA_1DQA_2DQA_3DQA_4DQA_5DQA_6DQA_7DQA_8DQA_9DQA_10DQA_11DQA_12DQA_13DQA_14DQA_15DQA_16DQA_17DQA_18DQA_19DQA_20DQA_21DQA_22DQA_23DQA_24DQA_25DQA_26DQA_27DQA_28DQA_29DQA_30DQA_31DQA_32DQA_33DQA_34DQA_35DQA_36DQA_37DQA_38DQA_39DQA_40DQA_41DQA_42DQA_43
DQA_45DQA_44
DQA_46DQA_47DQA_48
DQA_50DQA_51
DQA_49
DQA_52DQA_53DQA_54DQA_55DQA_56DQA_57
DQA_60
DQA_63
VSSRH0
CLKA1
CSA0_1*
CSA1_1*
WRITE STROBE
READ STROBE
MEMORY INTERFACE A
(3 OF 7)
2.0V)(1.8V/
DQB_62
VDDRH1
MVREFS_1
MAB_0MAB_1MAB_2MAB_3MAB_4MAB_5MAB_6MAB_7MAB_8MAB_9MAB_10MAB_11MAB_12
MAB_15MAB_14MAB_13
DQMB_0*DQMB_1*DQMB_2*DQMB_3*DQMB_4*DQMB_5*DQMB_6*DQMB_7*
QSB_0QSB_1QSB_2
QSB_4QSB_3
QSB_5QSB_6QSB_7
QSB_0*QSB_1*QSB_2*QSB_3*QSB_4*QSB_5*QSB_6*QSB_7*
CLKB0*CLKB0
CSB0_0*
CKEB0
RASB0*
WEB0*
CASB0*
ODTB0
CLKB1CLKB1*
CKEB1
RASB1*
WEB1*
CASB1*
ODTB1
DRAM_RST
DQB_0DQB_1DQB_2DQB_3DQB_4DQB_5DQB_6DQB_7DQB_8DQB_9DQB_10DQB_11DQB_12
DQB_15DQB_14DQB_13
DQB_16DQB_17DQB_18
DQB_20DQB_19
DQB_22DQB_21
DQB_23
DQB_25DQB_24
DQB_27DQB_26
DQB_28
DQB_30DQB_29
DQB_33
DQB_31DQB_32
DQB_35DQB_34
DQB_37DQB_36
DQB_38
DQB_40DQB_41DQB_42DQB_43DQB_44DQB_45DQB_46
DQB_48DQB_47
DQB_52DQB_53
DQB_56DQB_55DQB_54
DQB_58DQB_57
DQB_60DQB_59
DQB_61
DQB_63
MVREFD_1
VSSRH1
TEST_MCLKTEST_YCLKMEMTEST
DQB_39
CSB1_0*
DQB_51DQB_50DQB_49
CSB0_1*
CSB1_1*
WRITE STROBE
READ STROBE
MEMORY INTERFACE B
(4 OF 7)
(1.8V/ 2.0V)
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Page Notes
NC
NCNC
NC
(NONE)
(NONE)
Power aliases required by this page:
Signal aliases required by this page:
BOM options provided by this page:
- =PP1V8R2V0_S0_FB_GPU
2
1R87221%1/16WMF-LF402
40.2
2
1R87201%
1/16WMF-LF402
40.2
2
1 C87230.1uF
402X5R16V10%
2
1R8723100
402MF-LF1/16W1%
2
1R8721100
402MF-LF1/16W
1%
2
1C87210.1uF
402X5R16V10%
2
1 C871310%16VX5R402
0.1uF
2
1R87121%1/16WMF-LF402
40.2
2
1R8713
1/16W
100
402MF-LF
1%
2
1C87110.1uF
402X5R16V10%
2
1R87101%
1/16WMF-LF402
40.2
2
1R8711100
402MF-LF1/16W
1%
2
1R8732
402
2431%1/16WMF-LF
2
1R8731
MF-LF1/16W
5%4.7K
402
2
1R87304.7K
402
5%1/16WMF-LF
2
1R87335%1/16WMF-LF402
4.7K
B21
B31
A28
A27
B24
B28
J15
H15
D15
D16
C16
B16
D21
D20
G24
F23
K26
K25
K28
K29
K31
J31
D24
F29
C30
C31
B26
C26
F25
D27
E26
E24
D25
D28
C25
B25
E29
E27
B27
D29
F28
D26
J17
D14
B15
E21
G23
J26
J29
H31
M29
M27
F31
J14
H14
G14
G15
G30
G17
G18
H17
H18
D13
F14
E14
E15
F17
E17
G31
E18
D17
B13
C13
B14
C14
B17
C17
B18
B19
H30
D18
D19
F20
E20
E22
D23
D22
E23
J22
J23
L30
H22
H23
H24
H25
G26
F26
H26
H27
G28
J25
L31
L25
M25
L26
M26
G27
G29
H29
J27
L27
L28
M30
M31
C23
B23
C28
B29
C19
B20
E31
D31
C22
B30
B22
C29
U8400
OMIT
M56PBGA
M2
B2
E1
F1
AA2
AA5
J2
E2
V9
V8
V4
U4
U3
U2
M4
N4
J7
K6
G10
H10
E10
D10
B10
B9
J4
D6
C3
B3
AA7
G2
G3
H6
F4
G5
J5
H4
E4
H3
H2
D5
F5
F2
D4
E6
G4
AA3
T9
W4
V2
M5
K7
G9
D9
B8
D12
F12
B6
W9
W8
W7
V7
C7
T7
R7
T8
R8
Y4
W6
W5
V5
T6
T5
B7
R5
T4
Y2
Y3
W2
W3
T2
T3
R2
P2
C8
R4
P4
N6
N5
L5
K4
L4
K5
L9
K9
C11
L8
K8
J8
H8
G7
G6
G8
F8
E7
H9
B11
H11
H12
G11
G12
F7
D7
D8
F9
F11
E11
C12
B12
K3
K2
E3
D2
P3
N2
B5
B4
L3
C2
L2
D3
U8400
OMIT
M56PBGA
2
1C8716
6.3VCERM
1uF
402
10%
2
1C871510%
402
1uF
CERM6.3V
2
1C872610%
402
1uF
CERM6.3V
2
1C8725
6.3VCERM
1uF
402
10%
21
L8725
VOLTAGE=1.8V
FERR-220-OHM
0402
21
L8715
0402
FERR-220-OHM
21
XW8725SM
21
XW8715SM
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
ATI M56 Frame Buffer I/F
09051-6949
11187
PP1V8R2V0_S0_GPU_VDDRH1
MIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.25 MM=PP1V8R2V0_S0_FB_GPU
VOLTAGE=0V
GND_GPU_VSSRH1MIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.25 MM
PP1V8R2V0_S0_GPU_VDDRH0
VOLTAGE=1.8VMIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.25 MM
VOLTAGE=0VMIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.25 MMGND_GPU_VSSRH0
=PP1V8R2V0_S0_FB_GPU
=PP1V8R2V0_S0_FB_GPU
=PP1V8R2V0_S0_FB_GPU
FB_A_CLK_N<0>
FB_A_BA<0>
FB_B_MA<11>FB_B_MA<10>
FB_A_MA<4>FB_A_MA<3>
FB_A_DQ<0>
FB_B_DQ<62>
GPU_MVREFS1
FB_B_MA<0>FB_B_MA<1>FB_B_MA<2>
FB_B_MA<3>FB_B_MA<4>FB_B_MA<5>FB_B_MA<6>FB_B_MA<7>FB_B_MA<8>FB_B_MA<9>
TP_FB_B_MA12
FB_B_BA<1>FB_B_BA<0>FB_B_BA<2>
FB_B_DQM_L<0>FB_B_DQM_L<1>FB_B_DQM_L<2>FB_B_DQM_L<3>FB_B_DQM_L<4>FB_B_DQM_L<5>FB_B_DQM_L<6>FB_B_DQM_L<7>
FB_B_RDQS<0>FB_B_RDQS<1>FB_B_RDQS<2>
FB_B_RDQS<4>FB_B_RDQS<3>
FB_B_RDQS<5>FB_B_RDQS<6>FB_B_RDQS<7>
FB_B_WDQS<0>FB_B_WDQS<1>FB_B_WDQS<2>FB_B_WDQS<3>FB_B_WDQS<4>FB_B_WDQS<5>FB_B_WDQS<6>FB_B_WDQS<7>
FB_B_CLK_N<0>FB_B_CLK_P<0>
FB_B_CS_L<0>
FB_B_CKE<0>
FB_B_RAS_L<0>
FB_B_WE_L<0>
FB_B_CAS_L<0>
TP_FB_B_ODT<0>
FB_B_CLK_P<1>FB_B_CLK_N<1>
FB_B_CKE<1>
FB_B_RAS_L<1>
FB_B_WE_L<1>
FB_B_CAS_L<1>
TP_FB_B_ODT<1>
FB_DRAM_RST
FB_B_DQ<0>FB_B_DQ<1>FB_B_DQ<2>FB_B_DQ<3>FB_B_DQ<4>FB_B_DQ<5>FB_B_DQ<6>FB_B_DQ<7>FB_B_DQ<8>FB_B_DQ<9>FB_B_DQ<10>FB_B_DQ<11>FB_B_DQ<12>
FB_B_DQ<15>FB_B_DQ<14>FB_B_DQ<13>
FB_B_DQ<16>FB_B_DQ<17>FB_B_DQ<18>
FB_B_DQ<20>FB_B_DQ<19>
FB_B_DQ<22>FB_B_DQ<21>
FB_B_DQ<23>
FB_B_DQ<25>FB_B_DQ<24>
FB_B_DQ<27>FB_B_DQ<26>
FB_B_DQ<28>
FB_B_DQ<30>FB_B_DQ<29>
FB_B_DQ<33>
FB_B_DQ<31>FB_B_DQ<32>
FB_B_DQ<35>FB_B_DQ<34>
FB_B_DQ<37>FB_B_DQ<36>
FB_B_DQ<38>
FB_B_DQ<40>FB_B_DQ<41>FB_B_DQ<42>FB_B_DQ<43>FB_B_DQ<44>FB_B_DQ<45>FB_B_DQ<46>
FB_B_DQ<48>FB_B_DQ<47>
FB_B_DQ<52>FB_B_DQ<53>
FB_B_DQ<56>FB_B_DQ<55>FB_B_DQ<54>
FB_B_DQ<58>FB_B_DQ<57>
FB_B_DQ<60>FB_B_DQ<59>
FB_B_DQ<61>
FB_B_DQ<63>
GPU_MVREFD1
GPU_TEST_MCLKGPU_TEST_YCLKGPU_MEMTEST
FB_B_DQ<39>
FB_B_CS_L<1>
FB_B_DQ<51>FB_B_DQ<50>FB_B_DQ<49>
FB_A_DQ<58>FB_A_DQ<59>
FB_A_WE_L<1>
FB_A_DQ<61>FB_A_DQ<62>
GPU_MVREFD0GPU_MVREFS0
FB_A_MA<0>FB_A_MA<1>FB_A_MA<2>
FB_A_MA<5>FB_A_MA<6>FB_A_MA<7>
FB_A_MA<11>TP_FB_A_MA12
FB_A_DQM_L<0>FB_A_DQM_L<1>FB_A_DQM_L<2>FB_A_DQM_L<3>FB_A_DQM_L<4>FB_A_DQM_L<5>
FB_A_CLK_P<0>
FB_A_CS_L<0>
FB_A_CKE<0>
FB_A_RAS_L<0>
FB_A_CAS_L<0>
FB_A_WE_L<0>
TP_FB_A_ODT<0>
FB_A_CS_L<1>
FB_A_CKE<1>
FB_A_RAS_L<1>
FB_A_CAS_L<1>
TP_FB_A_ODT<1>
FB_A_DQ<1>FB_A_DQ<2>FB_A_DQ<3>FB_A_DQ<4>FB_A_DQ<5>FB_A_DQ<6>FB_A_DQ<7>FB_A_DQ<8>FB_A_DQ<9>FB_A_DQ<10>FB_A_DQ<11>FB_A_DQ<12>FB_A_DQ<13>FB_A_DQ<14>FB_A_DQ<15>FB_A_DQ<16>FB_A_DQ<17>FB_A_DQ<18>FB_A_DQ<19>FB_A_DQ<20>FB_A_DQ<21>FB_A_DQ<22>FB_A_DQ<23>FB_A_DQ<24>FB_A_DQ<25>FB_A_DQ<26>FB_A_DQ<27>FB_A_DQ<28>FB_A_DQ<29>FB_A_DQ<30>FB_A_DQ<31>FB_A_DQ<32>FB_A_DQ<33>FB_A_DQ<34>FB_A_DQ<35>FB_A_DQ<36>FB_A_DQ<37>FB_A_DQ<38>FB_A_DQ<39>FB_A_DQ<40>FB_A_DQ<41>FB_A_DQ<42>FB_A_DQ<43>
FB_A_DQ<45>FB_A_DQ<44>
FB_A_DQ<46>FB_A_DQ<47>FB_A_DQ<48>
FB_A_DQ<50>FB_A_DQ<51>
FB_A_DQ<49>
FB_A_DQ<52>FB_A_DQ<53>FB_A_DQ<54>FB_A_DQ<55>FB_A_DQ<56>FB_A_DQ<57>
FB_A_DQ<60>
FB_A_DQ<63>
FB_A_CLK_P<1>
FB_A_BA<2>
FB_A_MA<9>FB_A_MA<8>
FB_A_MA<10>
FB_A_BA<1>
FB_A_DQM_L<7>FB_A_DQM_L<6>
FB_A_RDQS<0>FB_A_RDQS<1>FB_A_RDQS<2>FB_A_RDQS<3>FB_A_RDQS<4>FB_A_RDQS<5>
FB_A_RDQS<7>FB_A_RDQS<6>
FB_A_WDQS<0>FB_A_WDQS<1>
FB_A_WDQS<3>FB_A_WDQS<2>
FB_A_WDQS<4>FB_A_WDQS<5>FB_A_WDQS<6>FB_A_WDQS<7>
FB_A_CLK_N<1>
88
88
88
88
87
87
87
87
89
89
89
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
86
86
86
86
5
89
90
90
89
5
5
90
90
90
90
5
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
88
5
90
90
90
90
90
90
90
5
90
90
90
90
90
90
90
5
90
90
90
90
90
90
90
90
5
90
90
90
90
90
90
90
5
90
90
90
90
90
5
90
90
90
90
90
90
5
90
90
90
5
90
90
90
90
90
90
90
90
90
5
90
90
90
89
89
5
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
5
5
5
5
5
5
5
5
5
5
89
89
89
89
89
89
89
5
89
89
89
89
89
89
89
5
89
89
89
89
89
89
89
5
89
89
89
89
89
89
89
5
89
89
89
89
89
89
89
5
89
89
89
89
89
89
89
5
89
89
89
89
89
89
89
5
89
89
89
5
89
89
89
89
89
89
89
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
www.vinafix.vn
A
D
C
B
A
D
C
B
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
EXTERNAL PULL DOWN RECOMMENDED
GPIO 15 = SWITCH CORE VOLTAGE HIGH TO LOW
INTERNAL PULL DOWN
INTERNAL PULL DOWN, ATI RECOMMENDS HIGH
M56 GPIOSONLY ON IN RUN
"S0" GPU RAILS
GPIO 0 = TRANSMITTER POWER SAVINGS ENABLE
INTERNAL PULL DOWN, ATI RECOMMENDS HIGHGPIO 1 = TRANSMITTER DE-EMPHASIS ENABLE
GPIO 9,13,12,11 = ROM ID CFG
0010 = 256 M APERATURE SIZE
GPIO 4 = DEBUG SIGNALS OUT
21 R88025%MF-LF4021/16W
10K
21 R8803NOSTUFFMF-LF 5%4021/16W
10K
21 R880410K1/16W 402 MF-LF
NOSTUFF5%
21 R88055%MF-LF4021/16W
10KNOSTUFF
21 R88065%4021/16W MF-LF
10K
21 R88075%MF-LF4021/16W
10KNOSTUFF
21 R8808NOSTUFFMF-LF
10K5%4021/16W
21 R88091/16W 402 MF-LF 5%
NOSTUFF10K
21 R8810ATI_FB_256M
1/16W10K
402 MF-LF 5%
21 R8811NOSTUFFMF-LF402
10K1/16W 5%
21 R8812MF-LF 5%4021/16W
10KNOSTUFF
21 R88135%4021/16W MF-LF
10K
21 R88505%MF-LF4021/16W
10K
21 R8830ATI_FB_256M
10K5%MF-LF4021/16W
21 R883110K1/16W 402 5%MF-LF
ATI_FB_HYNIX
21 R8832MF-LF 5%4021/16W
10K
21 R8833MF-LF 5%4021/16W
10KTMDS_PANEL
21 R88001/10W 60310
5%MF-LF
21 R88011/16W 402 MF-LF 5%33
GPU MISC
GPU_GPIO_27
MAKE_BASE=TRUEGPU_VCORE_LOW
GPU_GPIO_9
PP12V_S0
PP12V_S5 =PPVIN_S0_GPUVCORE
=PP12V_GPU
=PP5V_S0_GPUISENS
PP2V5_S0
MIN_NECK_WIDTH=0.125MMMIN_LINE_WIDTH=0.5MMMAKE_BASE=TRUEPNBB_S0_GPU
VOLTAGE=0V
=PPVIO_S0_PCIE
=PNBB_S0_GPU
MIN_LINE_WIDTH=0.6MMVOLTAGE=1.2V
MAKE_BASE=TRUEPP1V2_GPU_IO_S0
MIN_NECK_WIDTH=0.125MM
=PP1V2_S0_GPU_VDDPLL
=PPBB_S0_GPU
=PP3V3_S0_GPUBBCTL
GPU_GPIO_8
=PP1V2_S0_PCIE_GPU_VDDR
=PPVOUT_S0_GPUBBP_LDO
GPU_VGA_R
GPU_VGA_G
MAKE_BASE=TRUETP_GPU_GPIO_17
VOLTAGE=1.2V
PPBB_S0_GPU
MIN_LINE_WIDTH=0.5MMMAKE_BASE=TRUEMIN_NECK_WIDTH=0.125MM
MAKE_BASE=TRUETP_GPU_VGA_B
GPU_GPIO_5
GPU_GPIO_3
GPU_TV_C
GPU_DDC_B_CLK
TP_GPU_VGA_HSYNCMAKE_BASE=TRUE
GPU_VGA_HSYNC
GPU_TV_COMP
TP_GPU_DDC_B_DATAMAKE_BASE=TRUE
TP_GPU_DDC_B_CLKMAKE_BASE=TRUE
MAKE_BASE=TRUETP_GPU_TV_COMP
TP_GPU_TV_CMAKE_BASE=TRUE
TP_GPU_VGA_VSYNCMAKE_BASE=TRUE
GPU_DDC_B_DATA
MAKE_BASE=TRUETP_GPU_VGA_R
MAKE_BASE=TRUETP_GPU_TV_Y
GPU_GPIO_17
MAKE_BASE=TRUETP_GPU_VGA_G
MAKE_BASE=TRUETP_GPU_GPIO_7
GPU_GPIO_6
=PNVOUT_S0_GPUBBN_REG
GPUVCORE_EN
GPU_GPIO_4
GPU_GPIO_7MAKE_BASE=TRUETP_GPU_GPIO_14
=PP1V8R3V3_S0_GPU_VDDR4
GPU_GPIO_14
PP5V_S0 =PP5V_S0_GPUBBCTL=PP5V_S0_DVI_DDC
GPU_TV_Y
GPU_VGA_VSYNC
GPU_VGA_B
GPU_GPIO_0
GPU_GPIO_10
=PP1V8_S0_FB_VDD
=PP1V2_S0_PCIE_GPU_PVDD
=PP1V2_S0_REG
=PP2V5_S0_GPU=PP2V5_S0_GPU_VDDC_CT
=PP2V5_S0_GPU_VDD25
PP1V8R2V0_S0_FB_GPUMAKE_BASE=TRUE
VOLTAGE=1.8VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.125MM
=PP1V8_S0_FB_VDDQ
=PP3V3_S0_GPUBBN=PP3V3_S0_GPU
=PP3V3_S0_GPU_VDDR3=PP3V3_S0_LCD
=PP3V3_DDC_DVI
=PP3V3_S0_GPUBBP
=PP2V5_S0_GPU_PVDD
=PP3V3_DDC_LCD=PP3V3_S0_GPU_CLOCKS
PP3V3_S0
=PP3V3_GPU
MIN_LINE_WIDTH=0.6MMVOLTAGE=1.2V
MAKE_BASE=TRUEPP1V0R1V2_S0_GPU
MIN_NECK_WIDTH=0.125MM=PPVCORE_S0_GPU
=PPVCORE_S0_GPU_BBP
=PPVCORE_S0_GPU_REG
=PP1V8R3V3_S0_GPU_VDDR5
PP1V8_S0=PP1V8R2V0_S0_FB_GPU
FB_DRAM_RSTMAKE_BASE=TRUE
GPU_GPIO_11
GPU_GPIO_12
GPU_GPIO_1
DRAM_RST
PM_SLP_S3_L
NC_GPU_GPIO_10MAKE_BASE=TRUE
=PP5V_S0_GPUVCORE
VOLTAGE=5V
MAKE_BASE=TRUEPP5V_S0_GPUVCORE_VCC
MIN_NECK_WIDTH=0.125MMMIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.125MM
GPUVCORE_VCCMAKE_BASE=TRUE
VOLTAGE=5VMIN_LINE_WIDTH=0.6MM
GPU_GPIO_13
GPU_GPIO_2
GPU_GPIO_24
GPU_GPIO_15
GPU_GPIO_28
GPU_GPIO_29
=PP3V3_S0_GPU_VDDR3
83
76
81
61
80
59
79
79
97
41
77
78
94
93
26
91
90
58
76
6
77
75
94
90
90
91
91
10
86
87
89
23
91
91
85
91
6
5 85
94
85
6
84
86
91
86
85
91
84
85
93
93
91
91
93
93
93
93
93
91
91
85
85
91
91
91
91
6 85
97
93
93
93
91
91
89
84
77
93
91
91
89
85
85
88
94
97
85
91
94
6
94
59
76
85
85
91
78
86
87
91
91
91
5
6
85 85
91
91
91
91
91
91
88
www.vinafix.vn
DQ1
DQ0
DQ2
DQ3
DQ5
DQ6
DQ4
DQ8DQ7
DQ9DQ10
DQ11
DQ12DQ13
DQ14
DQ15DQ16
DQ17
DQ18DQ19
DQ20DQ21
DQ24DQ23
DQ22
DQ25
DQ26DQ27
DQ29
DQ28
DQ30
DQ31
RDQS3RDQS2
RDQS1RDQS0
SEN
RESET
MFZQ
RAS*
CAS*WE*
CS*
CK*
A9
A6
A7
A3
A4
A2
A0
A1
CK
WDQS2
WDQS1
WDQS0
WDQS3
BA0
BA2
BA1
RFU1
RFU2
DM3DM2
DM1
DM0
A5
A11
A8/AP
A10
CKE
MFHIGH
MFHIGH
MFHIGH
(1 OF 2)
VSS0
VSS1VSS2
VSS5
VSS3VSS4
VSS7VSS6
VSSA0
VSSA1
VSSQ0
VSSQ1VSSQ2
VSSQ3
VSSQ5
VSSQ6
VSSQ4
VSSQ7
VSSQ8
VSSQ9VSSQ10
VSSQ11
VSSQ12VSSQ13
VSSQ14
VSSQ16
VSSQ15
VSSQ17VSSQ18
VSSQ19VDDQ19
VDDQ20VDDQ21
VREF1
VREF0
VDDQ10
VDDQ11
VDDQ12VDDQ13
VDDQ14VDDQ15
VDDQ18
VDDQ16
VDDQ17
VDDQ9
VDDA1
VDDQ0
VDDQ1VDDQ2
VDDQ5
VDDQ3VDDQ4
VDDQ6VDDQ7
VDDQ8
VDD0
VDD1VDD2
VDD5
VDD3VDD4
VDD6VDD7
VDDA0
(2 OF 2)
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
DQ1
DQ0
DQ2
DQ3
DQ5
DQ6
DQ4
DQ8DQ7
DQ9DQ10
DQ11
DQ12DQ13
DQ14
DQ15DQ16
DQ17
DQ18DQ19
DQ20DQ21
DQ24DQ23
DQ22
DQ25
DQ26DQ27
DQ29
DQ28
DQ30
DQ31
RDQS3RDQS2
RDQS1RDQS0
SEN
RESET
MFZQ
RAS*
CAS*WE*
CS*
CK*
A9
A6
A7
A3
A4
A2
A0
A1
CK
WDQS2
WDQS1
WDQS0
WDQS3
BA0
BA2
BA1
RFU1
RFU2
DM3DM2
DM1
DM0
A5
A11
A8/AP
A10
CKE
MFHIGH
MFHIGH
MFHIGH
(1 OF 2)
VSS0
VSS1VSS2
VSS5
VSS3VSS4
VSS7VSS6
VSSA0
VSSA1
VSSQ0
VSSQ1VSSQ2
VSSQ3
VSSQ5
VSSQ6
VSSQ4
VSSQ7
VSSQ8
VSSQ9VSSQ10
VSSQ11
VSSQ12VSSQ13
VSSQ14
VSSQ16
VSSQ15
VSSQ17VSSQ18
VSSQ19VDDQ19
VDDQ20VDDQ21
VREF1
VREF0
VDDQ10
VDDQ11
VDDQ12VDDQ13
VDDQ14VDDQ15
VDDQ18
VDDQ16
VDDQ17
VDDQ9
VDDA1
VDDQ0
VDDQ1VDDQ2
VDDQ5
VDDQ3VDDQ4
VDDQ6VDDQ7
VDDQ8
VDD0
VDD1VDD2
VDD5
VDD3VDD4
VDD6VDD7
VDDA0
(2 OF 2)
IN
IN
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Connect to designated pin, then GNDU8900.J1U8900.J1 U8900.J12U8900.J12
- =PP1V8_S0_FB_VDDQ- =PP1V8_S0_FB_VDD
(NONE)
(NONE)Signal aliases required by this page:
BOM options provided by this page:
Page NotesPower aliases required by this page:
Connect to designated pin, then GND
2
1R8930
1/16W1%
402MF-LF
2.37K
2
1R8931
402
1/16W1%
MF-LF
5.49K
2
1 C8903
402
16V10%
X5R
0.1uF
2
1 C8902
16V10%
402X5R
0.1uF
2
1 C8904
402
16V10%
X5R
0.1uF
2
1 C8901
16V10%
402X5R
0.1uF
2
1 C8922
16V10%
402X5R
0.1uF
2
1 C89230.1uF
X5R
10%16V
4022
1 C8924
16V
402X5R
0.1uF10%
2
1 C892510%16V
402X5R
0.1uF
2
1 C8926
16V10%
402X5R
0.1uF
A4
H4
P2
P11
D11
D2
V4
J3
J2
V9
P3
P10
D10
D3
H10
A9
B10
B11
G3
F2
F3
E2
T3
T2
C3
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
C2
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B3
B2
N3
N10
E10
E3
F4
H9
J10
J11
F9
H3
G4
G9
M4
K2
L4
K3
H2
K4
M9
K10
L9
K11
H11
K9 U8900FBGA
16MX32-GDDR3-500MHZ
K4J52324QC-BC20
CRITICAL
OMIT
G11
G2
D12
D9
D4
D1
B12
B9
T12
T9
T4
T1
P12
P9
P4
P1
L11
L2
B4
B1
J12
J1
V10
V3
L12
L1
G12
G1
A10
A3
H12
H1
E12
E9
E4
E1
C12
C9
C4
V12
V1
C1
R12
R9
R4
R1
N12
N9
N4
N1
J9
J4
A12
A1
K12
K1
V11
V2
M12
M1
F12
F1
A11
A2
U8900
CRITICAL
K4J52324QC-BC20
16MX32-GDDR3-500MHZ
FBGA
OMIT
2
1R8949100
MF-LF402
5%1/16W
2
1R89411K
1/16W5%
402MF-LF
2
1R8948
1/16W1%
402MF-LF
243
2
1R89451%1/16W
402MF-LF
60.4
2
1R894660.4
MF-LF
1%1/16W
402
2
1 C8933
402
0.1uF
X5R
10%16V
2
1R89322.37K
MF-LF402
1%1/16W
2
1R89335.49K
1%1/16W
402MF-LF
2
1 C892110%0.1uF
X5R402
16V
21
L8910FERR-220-OHM
0402
21
L8915FERR-220-OHM
0402 2
1 C8915
402X5R
0.1uF16V10%
2
1 C89100.1uF16V10%
402X5R
2
1R89401%
121
MF-LF402
1/16W
2
1R8947
1/16W1%
MF-LF
121
402
2
1R8944
1/16W
402
1211%
MF-LF
2
1R8943
402MF-LF
1%121
1/16W
2
1R8942
1/16W
402MF-LF
1211%
2
1R89911K
MF-LF402
5%1/16W
2
1R8990
1/16W
402MF-LF
1211%
2
1R89921%
121
MF-LF402
1/16W
2
1 C8971
X5R
0.1uF10%
402
16V 2
1 C89720.1uF
X5R402
10%16V
2
1R8998243
402MF-LF
1%1/16W
2
1R8999100
1/16W5%
402MF-LF
A4
H4
P2
P11
D11
D2
V4
J3
J2
V9
P3
P10
D10
D3
H10
A9
B10
B11
G3
F2
F3
E2
T3
T2
C3
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
C2
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B3
B2
N3
N10
E10
E3
F4
H9
J10
J11
F9
H3
G4
G9
M4
K2
L4
K3
H2
K4
M9
K10
L9
K11
H11
K9 U8950FBGA
CRITICAL
K4J52324QC-BC20
16MX32-GDDR3-500MHZ
OMIT2
1R8993
1/16W
402MF-LF
1%121
2
1R899560.4
MF-LF402
1/16W1%
2
1R89941%
121
MF-LF402
1/16W
2
1R8997
1/16W
402MF-LF
1211%
2
1R8996
1/16W1%
402MF-LF
60.4
2
1R8981
MF-LF402
1%1/16W
5.49K
2
1R89802.37K
1/16WMF-LF
402
1%
2
1R89835.49K
MF-LF402
1%1/16W
2
1R89821%
MF-LF
2.37K
402
1/16W
2
1 C89730.1uF
X5R402
10%16V
2
1 C89810.1uF
X5R402
10%16V
2
1 C8974
402X5R
10%16V
0.1uF
2
1 C89750.1uF
402
10%
X5R16V
2
1 C8983
16V10%
402X5R
0.1uF
G11
G2
D12
D9
D4
D1
B12
B9
T12
T9
T4
T1
P12
P9
P4
P1
L11
L2
B4
B1
J12
J1
V10
V3
L12
L1
G12
G1
A10
A3
H12
H1
E12
E9
E4
E1
C12
C9
C4
V12
V1
C1
R12
R9
R4
R1
N12
N9
N4
N1
J9
J4
A12
A1
K12
K1
V11
V2
M12
M1
F12
F1
A11
A2
U8950FBGA
CRITICAL
16MX32-GDDR3-500MHZ
K4J52324QC-BC20
OMIT
2
1 C89760.1uF
X5R402
10%16V
21
L8965FERR-220-OHM
0402
21
L8960FERR-220-OHM
0402
2
1 C89510.1uF
X5R402
10%16V 2
1 C89520.1uF
X5R402
10%16V
2
1 C89600.1uF
X5R402
10%16V
2
1 C89530.1uF
X5R402
10%16V
2
1 C8965
402
10%16V
0.1uF
X5R
2
1 C89540.1uF
X5R402
10%16V
2
1C890022uF
805X5R6.3V20%
2
1C8920
X5R
22uF
805
6.3V20%
2
1C895020%6.3VX5R805
22uF
2
1C897022uF
20%6.3VX5R805
2
1 C8931
16V10%
402X5R
0.1uF
SYNC_MASTER=(MASTER)
GDDR3 Frame Buffer A
89 111
09051-6949
SYNC_DATE=(MASTER)
TP_U8950_J3
TP_U8950_J2
TP_U8900_J3
TP_U8900_J2
FB_A_WDQS<1>
FB_A_RDQS<3>FB_A_RDQS<0>
FB_A0_SENDRAM_RST
FB_A_WDQS<3>
FB_A_RDQS<2>FB_A_RDQS<1>
FB_A0_ZQ
FB_A_BA<0>FB_A_BA<1>FB_A_BA<2>
=PP1V8_S0_FB_VDD
FB_A_MA<3>
FB_A_MA<5>
MIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.1 MM
VOLTAGE=1.8VPP1V8_FB_A0_VDDA1
MIN_NECK_WIDTH=0.1 MMMIN_LINE_WIDTH=0.2 MM
PP1V8_FB_A0_VDDA0VOLTAGE=1.8V
FB_A_DQ<19>
FB_A_DQ<10>
FB_A_RAS_L<1>
FB_A_BA<2>
FB_A_WDQS<4>
FB_A_BA<0>FB_A_BA<1>
FB_A_WE_L<1>
FB_A_CLK_P<1>FB_A_CKE<1>
FB_A_MA<11>FB_A_MA<10>
FB_A_MA<7>
FB_A_CS_L<1>
FB_A_RAS_L<0>FB_A_CAS_L<0>FB_A_WE_L<0>
FB_A_WDQS<0>
FB_A_CLK_N<0>
FB_A_CKE<0>
FB_A0_MF
FB_A_MA<9>
FB_A_MA<6>
FB_A_MA<3>
FB_A_CLK_P<0>
=PP1V8_S0_FB_VDDQ
FB_A_CS_L<0>
FB_A_MA<1>FB_A_MA<2>
FB_A_MA<5>
FB_A_MA<7>FB_A_MA<8>
FB_A_MA<4>
FB_A_MA<10>FB_A_MA<11>
MIN_NECK_WIDTH=0.1 MM
PP1V8_FB_A1_VDDA0
MIN_LINE_WIDTH=0.2 MMVOLTAGE=1.8V
FB_A_DQM_L<5>
FB_A_DQ<9>
FB_A_DQ<15>
FB_A_DQ<14>FB_A_DQ<13>
FB_A_DQ<18>
FB_A_DQ<31>FB_A_DQ<25>
FB_A_DQ<24>
FB_A_DQ<22>
FB_A_DQ<12>
FB_A_MA<6>
FB_A_DQ<7>FB_A_DQ<1>
FB_A_DQ<6>
FB_A_DQ<30>
MIN_NECK_WIDTH=0.1 MM
FB_A1_VREF1MIN_LINE_WIDTH=0.2 MM
FB_A_DQ<4>
FB_A_DQ<21>
FB_A_DQM_L<0>
FB_A_DQ<29>
FB_A_DQ<11>FB_A_DQ<8>
FB_A_DQ<16>
FB_A_CLK_N<1>
FB_A_MA<0>
FB_A_WDQS<2>
FB_A_MA<4>
FB_A_MA<2>
MIN_NECK_WIDTH=0.1 MMMIN_LINE_WIDTH=0.2 MMFB_A1_VREF0
FB_A_DQ<2>
FB_A_DQM_L<1>
FB_A_DQM_L<3>
FB_A_DQ<28>
FB_A_DQ<0>
FB_A_MA<9>
FB_A_CAS_L<1>
FB_A_RDQS<7>
FB_A_MA<8>
FB_A_DQ<32>
FB_A_DQ<61>FB_A_DQ<59>
FB_A_RDQS<5>
FB_A_WDQS<7>
FB_A1_ZQ
FB_A_DQ<57>FB_A_DQ<58>
FB_A_DQM_L<2>
FB_A1_MF
FB_A_DQ<17>
FB_A_DQ<20>
FB_A_DQ<23>
FB_A_DQ<26>
FB_A_DQ<27>
FB_A_DQ<5>
FB_A_DQ<3>
MIN_NECK_WIDTH=0.1 MM
FB_A0_VREF1MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MMMIN_LINE_WIDTH=0.2 MMFB_A0_VREF0
PP1V8_FB_A1_VDDA1
MIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.1 MM
VOLTAGE=1.8V
=PP1V8_S0_FB_VDD
=PP1V8_S0_FB_VDDQ
FB_A_DQM_L<4>
FB_A_DQ<60>
FB_A_DQ<56>
FB_A_DQ<33>FB_A_DQ<37>
FB_A_DQ<39>
FB_A_DQ<38>FB_A_DQ<35>
FB_A_DQ<34>
FB_A_DQ<63>
FB_A_MA<0>FB_A_MA<1>
FB_A_DQ<51>
FB_A_DQ<44>FB_A_DQ<46>
FB_A_DQ<43>
FB_A_DQ<52>FB_A_DQ<55>
FB_A_DQ<48>
FB_A_DQ<53>
FB_A_DQM_L<7>FB_A_DQM_L<6>
FB_A_DQ<36>
FB_A_DQ<62>
FB_A_DQ<50>FB_A_DQ<49>
FB_A_DQ<45>FB_A_DQ<47>
FB_A_DQ<54>
FB_A_DQ<41>FB_A_DQ<42>
FB_A_DQ<40>
FB_A_WDQS<5>FB_A_WDQS<6>
FB_A1_SENDRAM_RST
FB_A_RDQS<4>
FB_A_RDQS<6>
90 90 89
90
89 89
90
90
90
89
87
87
87
88
87
87
87
89
89
89
89
87
89
87
89
87
89
89
87
87
87
89
89
89
87
87
87
87
87
87
87
89
89
87
87
89
87
89
89
89
89
89
89
89
89
87
89
87
87
87
89
87
89
89
87
89
87
87
89
87
87
87
89
89
87
89
89
87
87
87
87
88
87
87
5
5
5
5
5
5
5
87
87
87
88
5
87
87
87
5
87
5
87
87
5
5
5
87
87
87
5
5
5
5
5
5
5
87
87
5
5
88
5
87
87
87
87
87
87
87
87
87
87
87
87
87
87
87
87
5
87
87
87
87
87
87
87
87
87
87
87
87
5
5
5
87
5
87
87
87
87
87
87
5
87
5
5
87
5
87
87
5
5
87
87
87
87
87
87
87
87
87
87
88
88
87
87
5
87
87
87
87
87
87
87
87
87
87
87
87
87
87
87
5
87
87
87
87
87
87
87
87
87
87
87
87
5
5
5
5
5
5
www.vinafix.vn
DQ1
DQ0
DQ2
DQ3
DQ5
DQ6
DQ4
DQ8DQ7
DQ9DQ10
DQ11
DQ12DQ13
DQ14
DQ15DQ16
DQ17
DQ18DQ19
DQ20DQ21
DQ24DQ23
DQ22
DQ25
DQ26DQ27
DQ29
DQ28
DQ30
DQ31
RDQS3RDQS2
RDQS1RDQS0
SEN
RESET
MFZQ
RAS*
CAS*WE*
CS*
CK*
A9
A6
A7
A3
A4
A2
A0
A1
CK
WDQS2
WDQS1
WDQS0
WDQS3
BA0
BA2
BA1
RFU1
RFU2
DM3DM2
DM1
DM0
A5
A11
A8/AP
A10
CKE
MFHIGH
MFHIGH
MFHIGH
(1 OF 2)
VSS0
VSS1VSS2
VSS5
VSS3VSS4
VSS7VSS6
VSSA0
VSSA1
VSSQ0
VSSQ1VSSQ2
VSSQ3
VSSQ5
VSSQ6
VSSQ4
VSSQ7
VSSQ8
VSSQ9VSSQ10
VSSQ11
VSSQ12VSSQ13
VSSQ14
VSSQ16
VSSQ15
VSSQ17VSSQ18
VSSQ19VDDQ19
VDDQ20VDDQ21
VREF1
VREF0
VDDQ10
VDDQ11
VDDQ12VDDQ13
VDDQ14VDDQ15
VDDQ18
VDDQ16
VDDQ17
VDDQ9
VDDA1
VDDQ0
VDDQ1VDDQ2
VDDQ5
VDDQ3VDDQ4
VDDQ6VDDQ7
VDDQ8
VDD0
VDD1VDD2
VDD5
VDD3VDD4
VDD6VDD7
VDDA0
(2 OF 2)
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
DQ1
DQ0
DQ2
DQ3
DQ5
DQ6
DQ4
DQ8DQ7
DQ9DQ10
DQ11
DQ12DQ13
DQ14
DQ15DQ16
DQ17
DQ18DQ19
DQ20DQ21
DQ24DQ23
DQ22
DQ25
DQ26DQ27
DQ29
DQ28
DQ30
DQ31
RDQS3RDQS2
RDQS1RDQS0
SEN
RESET
MFZQ
RAS*
CAS*WE*
CS*
CK*
A9
A6
A7
A3
A4
A2
A0
A1
CK
WDQS2
WDQS1
WDQS0
WDQS3
BA0
BA2
BA1
RFU1
RFU2
DM3DM2
DM1
DM0
A5
A11
A8/AP
A10
CKE
MFHIGH
MFHIGH
MFHIGH
(1 OF 2)
VSS0
VSS1VSS2
VSS5
VSS3VSS4
VSS7VSS6
VSSA0
VSSA1
VSSQ0
VSSQ1VSSQ2
VSSQ3
VSSQ5
VSSQ6
VSSQ4
VSSQ7
VSSQ8
VSSQ9VSSQ10
VSSQ11
VSSQ12VSSQ13
VSSQ14
VSSQ16
VSSQ15
VSSQ17VSSQ18
VSSQ19VDDQ19
VDDQ20VDDQ21
VREF1
VREF0
VDDQ10
VDDQ11
VDDQ12VDDQ13
VDDQ14VDDQ15
VDDQ18
VDDQ16
VDDQ17
VDDQ9
VDDA1
VDDQ0
VDDQ1VDDQ2
VDDQ5
VDDQ3VDDQ4
VDDQ6VDDQ7
VDDQ8
VDD0
VDD1VDD2
VDD5
VDD3VDD4
VDD6VDD7
VDDA0
(2 OF 2)
IN
IN
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Connect to designated pin, then GND
Power aliases required by this page:
Page Notes
BOM options provided by this page:
Signal aliases required by this page:(NONE)
(NONE)
- =PP1V8_S0_FB_VDD- =PP1V8_S0_FB_VDDQ
U9000.J1Connect to designated pin, then GND
U9000.J1 U9000.J12U9000.J12
2
1R90302.37K
MF-LF402
1%1/16W
2
1R90315.49K
MF-LF402
1%1/16W
2
1 C90030.1uF
X5R402
10%16V2
1 C90020.1uF
X5R402
10%16V 2
1 C90040.1uF
X5R402
10%16V2
1 C90010.1uF
X5R402
10%16V
2
1 C90220.1uF
X5R402
10%16V 2
1 C90230.1uF
X5R402
10%16V 2
1 C90240.1uF
402
10%16VX5R 2
1 C90250.1uF
X5R402
10%16V 2
1 C9026
X5R
0.1uF
402
10%16V
A4
H4
P2
P11
D11
D2
V4
J3
J2
V9
P3
P10
D10
D3
H10
A9
B10
B11
G3
F2
F3
E2
T3
T2
C3
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
C2
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B3
B2
N3
N10
E10
E3
F4
H9
J10
J11
F9
H3
G4
G9
M4
K2
L4
K3
H2
K4
M9
K10
L9
K11
H11
K9 U9000
K4J52324QC-BC20
16MX32-GDDR3-500MHZ
CRITICAL
FBGA
OMIT
G11
G2
D12
D9
D4
D1
B12
B9
T12
T9
T4
T1
P12
P9
P4
P1
L11
L2
B4
B1
J12
J1
V10
V3
L12
L1
G12
G1
A10
A3
H12
H1
E12
E9
E4
E1
C12
C9
C4
V12
V1
C1
R12
R9
R4
R1
N12
N9
N4
N1
J9
J4
A12
A1
K12
K1
V11
V2
M12
M1
F12
F1
A11
A2
U9000
K4J52324QC-BC20
16MX32-GDDR3-500MHZ
CRITICAL
FBGA
OMIT
2
1R9049100
1/16W5%
402MF-LF
2
1R90411K
MF-LF402
5%1/16W
2
1R9048243
MF-LF402
1%1/16W
2
1R904560.4
MF-LF402
1%1/16W
2
1R9046
1/16W1%
402MF-LF
60.4
2
1 C90330.1uF16V10%
402X5R
2
1R9032
MF-LF1/16W
1%
402
2.37K
2
1R90335.49K
MF-LF402
1%1/16W
2
1 C90210.1uF
X5R402
10%16V
21
L9010FERR-220-OHM
0402
21
L9015FERR-220-OHM
0402 2
1 C90150.1uF
X5R402
10%16V
2
1 C90100.1uF
402X5R
10%16V
2
1R9040
1/16W
402MF-LF
1211%
2
1R9047
1/16W
402MF-LF
1211%
2
1R90441%
121
MF-LF402
1/16W
2
1R9043
1/16W
402MF-LF
1211%
2
1R90421%
121
MF-LF402
1/16W
2
1R90911K
1/16W5%
402MF-LF
2
1R90901%
121
MF-LF402
1/16W
2
1R9092
1/16W
402
1%121
MF-LF
2
1 C90710.1uF16V10%
402X5R 2
1 C90720.1uF16V10%
402X5R
2
1R90981%
243
MF-LF402
1/16W
2
1R9099100
1/16W
402MF-LF
5%
A4
H4
P2
P11
D11
D2
V4
J3
J2
V9
P3
P10
D10
D3
H10
A9
B10
B11
G3
F2
F3
E2
T3
T2
C3
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
C2
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B3
B2
N3
N10
E10
E3
F4
H9
J10
J11
F9
H3
G4
G9
M4
K2
L4
K3
H2
K4
M9
K10
L9
K11
H11
K9 U9050
K4J52324QC-BC20
FBGA
CRITICAL
16MX32-GDDR3-500MHZ
OMIT2
1R9093121
1/16W
402MF-LF
1%
2
1R909560.4
1/16W1%
402MF-LF
2
1R9094
1/16W1%
MF-LF
121
402
2
1R9097121
MF-LF1/16W1%
402
2
1R909660.4
MF-LF402
1%1/16W
2
1R9081
1/16W1%
5.49K
MF-LF402
2
1R9080
1/16W1%
2.37K
MF-LF402
2
1R90831%
1/16W
402MF-LF
5.49K
2
1R90821%
2.37K
1/16W
402MF-LF
2
1 C90730.1uF16VX5R402
10%
2
1 C9081
16V10%
402X5R
0.1uF
2
1 C90740.1uF
X5R402
10%16V 2
1 C90750.1uF10%
402X5R16V
2
1 C90830.1uF
X5R
10%
402
16V
G11
G2
D12
D9
D4
D1
B12
B9
T12
T9
T4
T1
P12
P9
P4
P1
L11
L2
B4
B1
J12
J1
V10
V3
L12
L1
G12
G1
A10
A3
H12
H1
E12
E9
E4
E1
C12
C9
C4
V12
V1
C1
R12
R9
R4
R1
N12
N9
N4
N1
J9
J4
A12
A1
K12
K1
V11
V2
M12
M1
F12
F1
A11
A2
U9050FBGA
16MX32-GDDR3-500MHZ
K4J52324QC-BC20
CRITICAL
OMIT
2
1 C90760.1uF16V10%
402X5R
21
L9065
0402
FERR-220-OHM
21
L9060
0402
FERR-220-OHM
2
1 C9051
16V10%
402X5R
0.1uF
2
1 C9052
16V10%
402X5R
0.1uF
2
1 C90600.1uF
X5R402
10%16V
2
1 C90530.1uF
X5R402
10%16V
2
1 C90650.1uF
X5R402
10%16V
2
1 C9054
16V10%
X5R402
0.1uF
2
1C900020%6.3VX5R805
22uF
2
1C902020%6.3VX5R805
22uF
2
1C905020%6.3VX5R805
22uF
2
1C907020%6.3VX5R805
22uF
2
1 C9031
X5R
0.1uF
402
10%16V
GDDR3 Frame Buffer BSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
051-6949 09
11190
TP_U9050_J3
TP_U9050_J2TP_U9000_J2
TP_U9000_J3
FB_B_DQM_L<0>FB_B_MA<1>
=PP1V8_S0_FB_VDD
FB_B_DQ<7>FB_B_DQ<1>
FB_B_DQ<28>FB_B_DQ<30>FB_B_DQ<29>
PP1V8_FB_B1_VDDA1VOLTAGE=1.8VMIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.1 MM
FB_B1_VREF0MIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.1 MM
MIN_LINE_WIDTH=0.2 MMFB_B1_VREF1
MIN_NECK_WIDTH=0.1 MM
PP1V8_FB_B1_VDDA0VOLTAGE=1.8VMIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.1 MM
=PP1V8_S0_FB_VDD
FB_B_DQ<4>
FB_B_MA<0>
FB_B_MA<2>FB_B_MA<3>
FB_B_MA<9>
FB_B_CAS_L<1>
FB_B_DQM_L<4>
FB_B_DQ<39>
FB_B_WE_L<1>
FB_B_MA<10>
FB_B_MA<7>
FB_B_MA<5>
FB_B_DQM_L<7>
FB_B_RDQS<6>FB_B_RDQS<5>
FB_B_WDQS<4>
FB_B_RDQS<7>
FB_B_CS_L<1>FB_B_CLK_N<1>
FB_B_DQ<36>FB_B_DQ<34>
FB_B_DQM_L<6>
FB_B_WDQS<7>FB_B_WDQS<6>FB_B_WDQS<5>
FB_B_BA<0>FB_B_BA<1>
FB_B_DQ<60>FB_B_DQ<59>
FB_B_MA<11>FB_B_DQ<32>
FB_B_DQ<3>
FB_B_DQ<5>
FB_B_DQ<55>
FB_B_DQ<45>
FB_B_DQ<41>FB_B_DQ<47>FB_B_DQ<42>FB_B_DQ<46>FB_B_DQ<44>
FB_B_MA<8>
FB_B_DQ<25>
FB_B_WDQS<3>FB_B_WDQS<2>FB_B_WDQS<1>
FB_B_DQ<43>FB_B_DQ<40>
FB_B_DQ<53>FB_B_DQ<52>
FB_B_DQ<22>
FB_B_DQ<23>FB_B_DQ<21>
FB_B_DQ<24>FB_B_DQ<26>
FB_B_DQ<31>FB_B_DQ<27>
FB_B_DQ<6>FB_B_DQ<0>
MIN_LINE_WIDTH=0.2 MM
PP1V8_FB_B0_VDDA0VOLTAGE=1.8V
MIN_NECK_WIDTH=0.1 MM
MIN_LINE_WIDTH=0.2 MM
PP1V8_FB_B0_VDDA1VOLTAGE=1.8V
MIN_NECK_WIDTH=0.1 MM
MIN_LINE_WIDTH=0.2 MMFB_B0_VREF0
MIN_NECK_WIDTH=0.1 MM
FB_B_MA<6>
FB_B1_ZQFB_B1_MF
DRAM_RSTFB_B1_SEN
FB_B_RDQS<4>
FB_B_MA<10>
FB_B_MA<8>
FB_B_MA<11>
FB_B_MA<5>
FB_B_DQM_L<3>
FB_B_BA<1>FB_B_BA<0>
FB_B_WDQS<0>
FB_B_CLK_P<0>
FB_B_MA<1>FB_B_MA<0>
FB_B_MA<2>
FB_B_MA<4>FB_B_MA<3>
FB_B_MA<7>FB_B_MA<6>
FB_B_MA<9>
DRAM_RST
FB_B_RDQS<0>FB_B_DQ<20>
FB_B_CKE<1>
FB_B_DQ<13>
FB_B_DQ<16>
FB_B_DQ<9>
FB_B_DQ<8>
FB_B_DQ<15>FB_B_DQ<11>
FB_B_DQ<12>
FB_B_DQ<17>FB_B_DQ<18>
FB_B_DQ<19>
FB_B_DQM_L<2>
FB_B_DQ<2>
FB_B_CLK_P<1>FB_B_CLK_N<0>
FB_B_CKE<0>
FB_B_RDQS<1>FB_B_RDQS<2>FB_B_RDQS<3>
FB_B_BA<2> FB_B_BA<2>
FB_B_RAS_L<1>
MIN_LINE_WIDTH=0.2 MMFB_B0_VREF1
MIN_NECK_WIDTH=0.1 MM
=PP1V8_S0_FB_VDDQ
FB_B_DQ<61>
FB_B_DQ<37>FB_B_DQ<33>FB_B_DQ<35>FB_B_DQ<38>
FB_B_DQ<62>
FB_B_DQ<57>FB_B_DQ<58>
=PP1V8_S0_FB_VDDQ
FB_B_DQ<56>
FB_B_MA<4>FB_B_DQM_L<5>
FB_B_DQ<63>FB_B_DQ<51>FB_B_DQ<50>FB_B_DQ<49>
FB_B_DQ<48>FB_B_DQ<54>
FB_B0_SEN
FB_B_DQ<10>
FB_B_DQ<14>
FB_B_DQM_L<1>
FB_B_CS_L<0>FB_B_WE_L<0>FB_B_CAS_L<0>FB_B_RAS_L<0>
FB_B0_ZQFB_B0_MF
90 90
90 90
90
89
90
89
90 90
90
89 89
90
90
87
90
87
87
90
90
90
87
87
87
87
87
87
87
87
87
90
90
90 87
90
87
87
87
87
87
87
90
88
87
90
90
90
90
90
90
87
87
90
90
90
90
87
90
90
90
88
87
87
87
87
87
87
87
87
87
87
90 90
87
89 89
87
90
87
87
87
87
87
87
87
88
87
87
87
87
87
88
87
87
87
5
87
5
87
87
5
87
87
87
87
5
5
5
5
5
5
87
87
87
5
5
5
87
87
87
87
87 5
87
87
87
87
87
87
87
87
87
87
87
5
5
5
87
5
87
87
87
87
87
5
87
87
87
87
5
87
5
5
87
87
87
87
87
87
87
5
5
87
87
87
87
5
87
87
87
5
5 87
5
87
5
87
5
87
87
87
87
87
87
87
87
5
5
5
5
5
5
87 87
5
88
87
87
87
87
87
87
87
87
88
5
87
87
87
87
87
87
5
87
87
87
87
5
5
5
5
www.vinafix.vn
GPIO_0GPIO_1
TESTEN
GPIO_2
GPIO_27
PLLTEST
XTALOUTXTALIN
MPVSSMPVDD
PVSSPVDD
GPIO_16GPIO_17
GPIO_15GPIO_14GPIO_13GPIO_12GPIO_11GPIO_10GPIO_9GPIO_8
GPIO_7_BLONGPIO_6GPIO_5GPIO_4GPIO_3
VREFG
GPIO_33
GPIO_31GPIO_32
GPIO_25GPIO_26
GPIO_24
GPIO_21GPIO_20GPIO_19
DMINUSDPLUS
ROMCS*
GPIO_34
GPIO_29GPIO_30
NC_DVOVMODE_0NC_DVOVMODE_1
DVPCLK
DVPCNTL_0DVPCNTL_1DVPCNTL_2
DVPDATA_2DVPDATA_1DVPDATA_0
DVPDATA_4DVPDATA_3
DVPDATA_5
DVPDATA_7DVPDATA_6
DVPDATA_9DVPDATA_8
DVPDATA_10DVPDATA_11
DVPDATA_13DVPDATA_12
DVPDATA_15DVPDATA_14
DVPDATA_16
DVPDATA_18DVPDATA_17
DVPDATA_19
DVPDATA_21DVPDATA_20
DVPDATA_23DVPDATA_22
GENERICAGENERICBGENERICCGENERICD
DIGONVARY_BL
NC0
GPIO_18
VDDPLL
GPIO_28
GPIO_22GPIO_23
GENERAL PURPOSE I/O
(1.2V)
(2.5V)
ROM
TEST
PLL & XTAL
VIP HOST / EXTERNAL TMDS
PANELCONTROL
VDDR3(3.3V)
(2.5V)VDD25
VDDR5
(1.8V/3.3V)
(1.8V/3.3V)
VDDR4
DIODETHERMAL
(2.5V)
(6 OF 7)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
BOM options provided by this page:
Typically <50mA
Typically <50mA
Typically <50mA
20mA
external TMDS transmitters
- =PP2V5_PVDD
(NONE)
external TMDS transmitters
- =PP1V8_GPU_LVDS_PLL
- =PP3V3_GPU_GPIOS
- =I2C_GPU_TMDS_SDA - I2C data line for
(PP2V5_S0_GPU_PVDD_F)
(GND_GPU_MPVSS)
(GND_GPU_PVSS)
Signal aliases required by this page:
NC
NCNC
Add ferrite bead
(PP1V0R1V2_S0_GPU_MPVDD)
Page Notes
WHY ARE THESE SEPARATE?
- =I2C_GPU_TMDS_SCL - I2C clock line for
Power aliases required by this page:
70mA total for VDD25
20mA
100mA
2
1 C911210%16VX5R
0.1uF
402
2
1 C9111
6.3VCERM
1uF
402
10%
2
1 C9116
402
1uF6.3VCERM
10%
2
1 C9117
6.3VCERM
1uF10%
402
2
1 C913710%
X5R402
0.1uF16V
2
1 C9136
6.3VCERM402
10%1uF
21
L9135FERR-220-OHM
0402
2
1 C9141
6.3VCERM
1uF
402
10%
21
L9140FERR-220-OHM
0402
2
1 C9142
X5R16V
0.1uF10%
402
2
1R91955%1/16WMF-LF402
1K
21
XW9140SM
2
1R91911%499
1/16WMF-LF402
2
1R91901%499
402MF-LF1/16W
21
XW9135SM
2
1C910022uF
805X5R6.3V20%
2
1C911020%6.3VX5R805
22uF
2
1C9115
805
22uF
X5R6.3V20%
2
1C912020%6.3VX5R805
22uF
2
1C912522uF
805X5R6.3V20%
2
1 C913210%
402
1uF6.3VCERM2
1C913022uF
805X5R6.3V20%
2
1C9135
805X5R6.3V20%
22uF
2
1C914022uF
805X5R6.3V20%
2
1C919110%16VX5R402
0.1uF
AM26
AL26
AC8
AE5
AE4
AE3
AE2
AM5
AL5
AK5
AJ5
AD20
AD19
AD18
AC20
AC19
AB10
AB9
AA9
AC15
AC18
AC16
AC13
AA10
L10
K22 AD12
AG22
AC7
AH14
AJ14
AG14
AL4
AK4
AB6
A5
A6
AC5
AC6
AB2
AC3
AC2
AC1
AG8
AH7
AG9
AH8
AJ8
AD3
AH9
AG10
AF10
AH6
AF8
AF7
AE9
AE10
AG7
AF9
AD1
AF13
AE13
AB7
AA8
AB8
AD5
AB5
AB4
AB3
AC4
AD2
AD4
AD23
AE23
AF23
AK22
AL2
AK3
AK1
AK2
AJ1
AJ2
AH3
AG6
AE7
AF6
AH5
AH2
AG5
AJ4
AH4
AJ3
AG4
AF5
AF4
AE6
AM3
AL3
AG3
AG2
AF3
AF1
AF2
AG1
AG12
AH12
AE11
U8400
OMIT
BGA
M56P
2
1 C91270.1uF
402X5R16V10%
2
1 C912610%
402
1uF
CERM6.3V
2
1 C912210%16VX5R
0.1uF
402
2
1 C9121
6.3VCERM
1uF10%
402
21
L9120
0402
FERR-220-OHM
21
L9125FERR-220-OHM
0402
21
L9130
0402
200-OHM-EMI
2
1 C913110%
402CERM6.3V
1uF
2
1 C910110%
402
1uF
CERM6.3V
2
1 C9102
6.3V
1uF10%
402CERM 2
1 C9103
6.3VCERM
1uF
402
10%
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
ATI M56 GPIO/DVO/Misc
91 111
09051-6949
TP_U8400_AG14
GPU_XTALOUT
MIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.1 MMVOLTAGE=0V
GND_GPU_PVSS
VOLTAGE=1.2VMIN_LINE_WIDTH=0.2 MM
PPVCORE_S0_GPU_MPVDD
MIN_NECK_WIDTH=0.1 MM
MIN_LINE_WIDTH=0.25 MMVOLTAGE=2.5VPP2V5_S0_GPU_PVDD_F
MIN_NECK_WIDTH=0.12 MM
VOLTAGE=1.2VMIN_LINE_WIDTH=0.2 MM
PP1V2_S0_GPU_VDDPLL
MIN_NECK_WIDTH=0.1 MM
=PP2V5_S0_GPU_PVDD
=PPVCORE_S0_GPU
=PP1V8R3V3_S0_GPU_VDDR4
=PP3V3_S0_GPU_VDDR3
=PP2V5_S0_GPU_VDD25
=PP2V5_S0_GPU_VDDC_CT
GPU_GPIO_30GPU_GPIO_31
GPU_GPIO_8
ATI_DVPDATA<0>
ATI_DVPDATA<19>
ATI_DVPDATA<2>
ATI_TDIODE_P
GPU_GPIO_0GPU_GPIO_1GPU_GPIO_2
GPU_GPIO_27
GPU_XTALIN
GPU_GPIO_16GPU_GPIO_17
GPU_GPIO_15GPU_GPIO_14GPU_GPIO_13GPU_GPIO_12GPU_GPIO_11GPU_GPIO_10GPU_GPIO_9
GPU_GPIO_7GPU_GPIO_6GPU_GPIO_5
GPU_GPIO_3
GPU_GPIO_33GPU_GPIO_32
GPU_GPIO_25GPU_GPIO_26
GPU_GPIO_21GPU_GPIO_20GPU_GPIO_19
ATI_TDIODE_N
TP_ATI_ROMCS_L
GPU_GPIO_34
GPU_GPIO_29
ATI_DVPCLK
ATI_DVPCNTL<0>ATI_DVPCNTL<1>ATI_DVPCNTL<2>
ATI_DVPDATA<1>
ATI_DVPDATA<4>ATI_DVPDATA<3>
ATI_DVPDATA<5>
ATI_DVPDATA<7>ATI_DVPDATA<6>
ATI_DVPDATA<9>ATI_DVPDATA<8>
ATI_DVPDATA<10>ATI_DVPDATA<11>
ATI_DVPDATA<13>ATI_DVPDATA<12>
ATI_DVPDATA<15>ATI_DVPDATA<14>
ATI_DVPDATA<16>
ATI_DVPDATA<18>ATI_DVPDATA<17>
ATI_DVPDATA<21>ATI_DVPDATA<20>
ATI_DVPDATA<23>ATI_DVPDATA<22>
GPU_GENERICAGPU_GENERICBGPU_GENERICCGPU_GENERICD
GPU_DIGONGPU_VARY_BL
GPU_GPIO_18
GPU_GPIO_28
GPU_GPIO_22GPU_GPIO_23
ATI_TESTEN
MIN_LINE_WIDTH=0.25 MMVOLTAGE=3.3VPP1V8R3V3_S0_GPU_VDDR5_F
MIN_NECK_WIDTH=0.12 MM
=PP3V3_S0_GPU
ATI_VREFG
GPU_GPIO_24 GPU_GPIO_4
VOLTAGE=0V
MIN_LINE_WIDTH=0.2 MMGND_GPU_MPVSS
MIN_NECK_WIDTH=0.1 MM
MIN_LINE_WIDTH=0.25 MM
PP1V8R3V3_S0_GPU_VDDR4_FVOLTAGE=3.3V
MIN_NECK_WIDTH=0.12 MM
=PP1V8R3V3_S0_GPU_VDDR5
=PP1V2_S0_GPU_VDDPLL
88
93
86
94
88
88
76
88
88
88
88
95
95
88
95
95
95
61
88
88
88
88
92
92
88
88
88
88
88
88
88
88
88
88
88
88
95
95
95
95
95
95
95
61
95
88
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
95
85
94
94
95
88
95
95
85
88 88
88
88
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
- =PP1V5_GPU_PWRSEQ- =PP1V8_GPU_PWRSEQ- =PP2V5_GPU_PWRSEQ
- =PP3V3_GPU_CLOCKS
- =PP2V5_GPU_LVDDR_LDO- =PPVIN_GPU_LVDDR_LDO
(NONE)
- GPU_SS
Power aliases required by this page:
Page Notes
Signal aliases required by this page:
BOM options provided by this page:
- =PP3V3_GPU_PWRSEQ
- GPU_LVDDR_2V8
I262
1R9250
MF-LF1/16W
402
2871%
I28
2
1R9202162
MF-LF402
1%1/16W
SYNC_DATE=05/21/2005SYNC_MASTER=BOZEMAN
92 111
09051-6949
GPU CLOCKS
GPU_CLK27MCK410_27M_NONSPREAD
GPU_XTALIN
GPU_GPIO_16MAKE_BASE=TRUECK410_27M_SPREAD
34 91
91 34
www.vinafix.vn
DDC3DATADDC3CLK
DDC2DATADDC2CLK
DDC1DATADDC1CLK
TXOUT_L3NTXOUT_L3PTXOUT_L2NTXOUT_L2PTXOUT_L1NTXOUT_L1PTXOUT_L0NTXOUT_L0P
TXCLK_LPTXCLK_LN
TXOUT_U3N
TXOUT_U2NTXOUT_U3P
TXOUT_U2PTXOUT_U1NTXOUT_U1PTXOUT_U0NTXOUT_U0P
TXCLK_UNTXCLK_UP
COMP
CY
V2SYNCH2SYNC
B2G2R2
VSYNCHSYNC
BGR
TX2MTX2PTX1M
TX0MTX1P
TX0P
TXCM
HPD1
LPVSSLPVDD
R2SET
VDD2DIVSS2DI
A2VSSQNC_A2VDDQ
VSS1DI
RSET
AVSSQ
VDD1DI
TXCPTPVSSTPVDD
TX3PTX3MTX4PTX4MTX5PTX5M
A2VSS
A2VDD(2.5V)
AVSS
(2.5V)AVDD
TXVSSR
IDENTIFICATION
(5 OF 7)
LVDDR
LVSSR
DAC (CRT)
DAC2 (TV/CRT2)
LVDS
MONITOR
TXVDDR
(2.5V)
(2.5V)
(2.5V)
(2.5V)
(2.5V)
(2.5V)
INTEGRATED TMDS
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
150mA peak
PLACE CLOSE TO GPU (U8400)TERMINATION FOR TMDS USAGE OF LVDS PINS
- =PP1V8R2V5_S0_GPU_LVDDR- =PP2V5_S0_GPU
(NONE)
(NONE)
BOM options provided by this page:
NC
65mA peak
20mA peak
130mA peak
20mA peak
200mA peak
Comp B Pb
C R PrY G Y
20mA peak
20mA peak
Signal aliases required by this page:
Power aliases required by this page:
Page Notes
Sum of peak currents on this page: 605mA
Composite/S-Video VGA Component
AJ15
AJ22
AJ17
AL23
AJ16
AM23
AG15
AM7
AL7
AK8
AK7
AJ7
AM6
AL6
AK6
AJ6
AH21
AG21
AG20
AH20
AK20
AJ20
AG18
AH18
AJ18
AK18
AM21
AL21
AM20
AL20
AL19
AK19
AM9
AL9
AJ21
AK21
AM18
AL18
AJ12
AK12
AJ11
AK11
AJ9
AK9
AM12
AL12
AM11
AL11
AL10
AK10
AL8
AM8
AL22
AK14
AK15
AK24
AL14
AK17
AJ19
AH19
AH17
AG19
AG17
AF22
AF21
AF18
AF17
AF20
AF19
AE22
AE21
AE20
AD22
AD21
AC22
AC21
AE18
AE19
AJ23
AF11
AF15
AM15
AM24
AE12
AF12
AH13
AG13
AH22
AH23
AH15
AJ13
AL15
AL24AK23
AK25
AJ24
AM25
AL25
AK13
AM17
AL17
AM16
AL16
U8400
BGA
M56P
OMIT
2
1R9350499
MF-LF402
1%1/16W
2
1 C9346
16V10%
402X5R
0.1uF
2
1 C9342
16V10%
402X5R
0.1uF
2
1 C93411uF
CERM402
10%6.3V
21
L9300
0402
FERR-220-OHM
2
1 C9301
402
6.3V10%
CERM
1uF
2
1 C9306
6.3V10%
402CERM
1uF
21
L9305
0402
FERR-220-OHM
2
1 C9307
16V
0.1uF
X5R402
10%
21
L9330
0402
FERR-220-OHM
2
1 C93311uF
CERM402
10%6.3V
21
XW9330SM
2
1 C93220.1uF16V10%
402X5R2
1 C932110%
402CERM
1uF6.3V
21
L9320
0402
FERR-220-OHM
21
XW9320SM
2
1 C9312
16V
0.1uF
X5R402
10%
2
1 C9311
402
1uF
CERM
10%6.3V
21
L9310
0402
FERR-220-OHM
21
XW9310SM
21
XW9305SM
21
XW9300SM
21
XW9314SM
21
XW9324SM
2
1 C9317
402
0.1uF
X5R
10%16V
2
1 C93161uF10%6.3V
402CERM
2
1 C93270.1uF
X5R402
10%16V
2
1 C9326
6.3V
1uF
CERM402
10%
21
L9325
0402
FERR-220-OHM
21
L9315FERR-220-OHM
0402
21
L9345FERR-220-OHM
0402
2
1R93915%
4.7K
MF-LF402
1/16W
2
1R9390
MF-LF402
1/16W
4.7K5%
2
1 C9347
16V10%
402X5R
0.1uF
2
1C934022uF
805X5R6.3V20%
2
1C934520%6.3VX5R805
22uF
2
1 C93321uF
CERM402
10%6.3V
2
1 C9302
402
6.3V10%
CERM
1uF
2
1C930020%
22uF
805X5R6.3V
2
1C930520%6.3VX5R805
22uF
2
1C931022uF
805X5R6.3V20%
2
1C931520%6.3VX5R805
22uF
2
1C932022uF
805X5R6.3V20%
2
1C9325
805
22uF20%6.3VX5R
2
1C933022uF
805X5R6.3V20%
2
1R9373
402MF-LF1/16W
5%100
TMDS_PANEL
2
1R9372
402MF-LF1/16W
5%100
TMDS_PANEL
2
1R9371
402MF-LF1/16W
5%100
TMDS_PANEL
2
1R9370
402
1/16W
100
TMDS_PANEL
5%
MF-LF
21
XW9345SM
2
1R9351715
MF-LF402
1%1/16W
ATI M56 Video InterfacesSYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
051-6949 09
11193
MIN_NECK_WIDTH=0.125 MMMIN_LINE_WIDTH=0.35 MMGND_GPU_LVSSR
VOLTAGE=0V
GPU_HPD
LVDS_L_CLK_P
=PP3V3_S0_GPU
GPU_DDC_C_CLKGPU_DDC_C_DATA
GPU_DDC_C_DATAGPU_DDC_C_CLK
LVDS_U_DATA_P<2>LVDS_U_DATA_N<2>
ATI_R2SETATI_RSET
GPU_DDC_A_DATA
GPU_DDC_B_CLKGPU_DDC_B_DATA
LVDS_L_DATA_N<3>LVDS_L_DATA_P<3>LVDS_L_DATA_N<2>
TMDS_DATA_N<3>
TMDS_DATA_N<4>
TMDS_DATA_P<2>
TMDS_DATA_P<5>TMDS_DATA_N<5>
TMDS_DATA_P<4>
TMDS_DATA_P<3>
TMDS_DATA_N<2>
TMDS_DATA_P<1>TMDS_DATA_N<1>
LVDS_U_DATA_N<0>LVDS_U_DATA_P<0>
LVDS_U_CLK_NLVDS_U_CLK_P
GPU_VGA_HSYNCGPU_VGA_VSYNC
LVDS_U_DATA_P<1>LVDS_U_DATA_N<1>
LVDS_U_DATA_P<3>LVDS_U_DATA_N<3>
ATI_RSET
ATI_R2SET
GND_GPU_AVSSN
VOLTAGE=0V
MIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.12 MM
PP2V5_S0_GPU_VDD1DI
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.12 MM
VOLTAGE=2.5V
PP2V5_S0_GPU_A2VDDMIN_LINE_WIDTH=0.3 MMMIN_NECK_WIDTH=0.125 MM
VOLTAGE=2.5V
PP2V5_S0_GPU_LPVDDMIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.12 MM
GND_GPU_AVSSQ
VOLTAGE=0V
MIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.125 MM
GND_GPU_TPVSS
VOLTAGE=0V
MIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.1 MM
GPU_V2SYNC
GPU_B2GPU_G2GPU_R2
GPU_VGA_BGPU_VGA_GGPU_VGA_R
GPU_TV_Y
GPU_TV_COMP
GND_GPU_A2VSSN
VOLTAGE=0V
MIN_LINE_WIDTH=0.3 MMMIN_NECK_WIDTH=0.125 MM
GPU_H2SYNC
GND_GPU_A2VSSQ
VOLTAGE=0V
MIN_LINE_WIDTH=0.3 MMMIN_NECK_WIDTH=0.125 MM
GND_GPU_LPVSS
VOLTAGE=0V
MIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.12 MM
=PP2V5_S0_GPU
PP2V5_S0_GPU_LVDDR
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.35 MMMIN_NECK_WIDTH=0.125 MM
GPU_TV_C
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.25 MMPP2V5_S0_GPU_AVDD
MIN_NECK_WIDTH=0.12 MM
VOLTAGE=0V
GND_GPU_TXVSSRMIN_LINE_WIDTH=0.3 MMMIN_NECK_WIDTH=0.12 MM
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.3 MMPP2V5_S0_GPU_TXVDDR
MIN_NECK_WIDTH=0.12 MM TMDS_DATA_N<0>TMDS_DATA_P<0>
TMDS_CLK_NTMDS_CLK_P
LVDS_L_DATA_P<2>LVDS_L_DATA_N<1>LVDS_L_DATA_P<1>
LVDS_L_CLK_NLVDS_L_CLK_P
LVDS_L_DATA_N<0>LVDS_L_DATA_P<0>
LVDS_L_DATA_P<1>
LVDS_L_DATA_N<1>
LVDS_L_DATA_P<0>
LVDS_L_DATA_N<0>
LVDS_L_DATA_N<2>
LVDS_L_DATA_P<2>
LVDS_L_CLK_N
VOLTAGE=2.5VMIN_NECK_WIDTH=0.1 MMMIN_LINE_WIDTH=0.2 MMPP2V5_S0_GPU_TPVDD
PP2V5_S0_GPU_VDD2DI
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.12 MM
GPU_DDC_A_CLK
91
94
88
94
94
94
94
94
94
94
94
94
94
94
94
94
94
94
94
94
94
94
97
93
85
93
93
93
93
94
94
93
93
97
88
88
94
94
93
95
95
97
95
95
95
95
97
97
97
94
94
94
94
88
88
94
94
94
94
93
93
97
97
97
97
88
88
88
88
88
97
88
88
97
97
97
97
93
93
93
93
93
93
93
93
93
93
93
93
93
93
97
www.vinafix.vn
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
LCD (LVDS) INTERFACE
INVERTER INTERFACE
NOTE: 3RD STANDOFF FOR LVDS->TMDS CONVERTER BOARD
GATE TO PREVENT LEAKAGE ONTO PWMMIGHT BE ABLE TO BYPASS IF SMC DRIVES SIGNAL
Panel has 2K pull-upsno-panel case (development)100K pull-ups are for
518S0331
2
1R94105%
402
1/16WMF-LF
100K
2
1C9410
CERM50V20%
0.001uF
4022
1R94115%
MF-LF1/16W
100K
402
2
1C9401
402
0.001uF
CERM
20%50V
21
L9400FERR-250-OHM
SM
21
C9400NOSTUFF
603-1X7R
10%
0.1UF
50V
21
R9401NOSTUFF
402
1%
29.4K
MF-LF1/16W
2
1R9400NOSTUFF
402
100K
1/16W5%
MF-LF 4
3 6
5
2
1
Q9400
NOSTUFF
TSOP-LFSI3443DV
2
1
3
Q9401NOSTUFF
2N7002SOT23-LF
2
1C9450
805
1UF10%35VX7R
21
R9450
MF-LF402
5%1/16W
47
2
1R9470100K
402
5%1/16WMF-LF
9
87
65
4
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
J9402F-ST-SM
53307-3072
CRITICAL
1
SDF9400STDOFF-3MMOD4.6MMH-1.35-TH
1
SDF9401STDOFF-3MMOD4.6MMH-1.35-TH
21
R9490
1/8W
805
5%
0
MF-LF
2
1C942010%
10UF16V
CERM1210
4
3
2
1
J9401CRITICAL
M-ST-SM87437-0443-BLK
21
R9491NOSTUFF
5%
0
MF-LF805
1/8W
21
R9475
MF-LF402
475%
1/16W
2
1R9474
MF-LF1/16W
402
5%10K
2
1 C94700.1UF
402
20%CERM10V
5
41
2
3
U9470
SOT23-5-LFMC74VHC1G08
21
R94730
MF-LF5%
402
NOSTUFF
1/16W
2
1R9472
4021/16W5%10KMF-LF
NOSTUFF
1
SDF9402STDOFF-3MMOD4.6MMH-1.35-TH
4
3
2
1
J9410M-ST-SM
CRITICAL
87437-0443-BLK
NOSTUFF
Internal Display ConnsSYNC_DATE=04/27/2005
051-6949 09
11194
SYNC_MASTER=BOZEMAN
LCD_PWREN_L
LCD_PWREN_L_RC
LVDS_L_DATA_N<0>
MIN_LINE_WIDTH=0.5 mmVOLTAGE=3.3V
PP3V3R12V_LCD_CONNMIN_NECK_WIDTH=0.25 mm
GPU_DIGON
PP5V_S0
GPU_DIGON
GPU_VARY_BL
GPU_DDC_C_CLK
PP3V3R12V_LCD_CONNPP3V3R12V_LCD_CONN=PP3V3_DDC_LCD
LVDS_L_DATA_N<2>
LVDS_U_DATA_P<1>
PP3V3R12V_LCD_CONN
LVDS_L_CLK_PLVDS_L_DATA_P<3>
LVDS_U_DATA_P<0>
LVDS_L_CLK_NLVDS_L_DATA_P<2>
LVDS_L_DATA_N<1>LVDS_L_DATA_P<0>LVDS_U_DATA_P<3>LVDS_U_CLK_P
LVDS_U_DATA_N<1>LVDS_U_DATA_N<2>
LVDS_L_DATA_N<3>
GPU_DDC_C_DATA
LCD_PWM
LCD_PWM
PANEL_IDGPU_GPIO_0
LVDS_U_DATA_N<0>
LVDS_L_DATA_P<1>
LVDS_U_DATA_N<3>LVDS_U_CLK_N
LVDS_U_DATA_P<2>
LCD_PWM_R
=PP3V3_GPU
=PP12V_GPU
GPU_DDC_C_CLK
=PP3V3_DDC_LCD
GPU_DDC_C_DATA
GPU_PWM_RST_L
MIN_LINE_WIDTH=0.5 mmVOLTAGE=3.3V
MIN_NECK_WIDTH=0.25 mm
PP3V3_LCD_SW
=PP3V3_S0_LCD
PANEL_ID
=PP12V_GPU
97 88
94
75
94
94
94
94
91
94
94
94
94
94
93
94
91
6
91
91
93
94
94 88
93
93
94
93
93
93
93 93
93
93
93
93
93
93
93
93
94
94
94 88
93
93
93
93
93
88
88
93
88
93
6
88
94
88
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
M56 TPS
.
11195
09051-6949
TP_TMDS_DATA_P<5>MAKE_BASE=TRUE
MAKE_BASE=TRUETP_TMDS_DATA_N<5> TMDS_DATA_N<5>
MAKE_BASE=TRUETP_ATI_DVPDATA<18> ATI_DVPDATA<18>
ATI_DVPDATA<19>
ATI_DVPDATA<22>
MAKE_BASE=TRUETP_GPU_GENERICA
MAKE_BASE=TRUETP_GPU_GENERICB
MAKE_BASE=TRUETP_GPU_GENERICC
GPU_GPIO_26
TP_TMDS_DATA_P<3>MAKE_BASE=TRUE
MAKE_BASE=TRUETP_TMDS_DATA_N<3>
TMDS_DATA_P<4>TP_TMDS_DATA_P<4>MAKE_BASE=TRUE
TMDS_DATA_N<4>TP_TMDS_DATA_N<4>MAKE_BASE=TRUE
TMDS_DATA_P<5>
MAKE_BASE=TRUETP_ATI_DVPDATA<21>
MAKE_BASE=TRUETP_ATI_DVPDATA<20>
MAKE_BASE=TRUETP_ATI_DVPDATA<19>
MAKE_BASE=TRUETP_ATI_DVPDATA<17>
MAKE_BASE=TRUETP_ATI_DVPDATA<16>
MAKE_BASE=TRUETP_ATI_DVPDATA<15>
MAKE_BASE=TRUETP_ATI_DVPDATA<14>
MAKE_BASE=TRUETP_ATI_DVPDATA<13>
MAKE_BASE=TRUETP_ATI_DVPDATA<12>
MAKE_BASE=TRUETP_ATI_DVPDATA<11>
MAKE_BASE=TRUETP_ATI_DVPDATA<10>
MAKE_BASE=TRUETP_ATI_DVPDATA<9>
MAKE_BASE=TRUETP_ATI_DVPDATA<8>
MAKE_BASE=TRUETP_ATI_DVPDATA<7>
MAKE_BASE=TRUETP_ATI_DVPDATA<6>
MAKE_BASE=TRUETP_ATI_DVPDATA<5>
MAKE_BASE=TRUETP_ATI_DVPDATA<4>
MAKE_BASE=TRUETP_ATI_DVPDATA<3>
MAKE_BASE=TRUETP_ATI_DVPDATA<2>
MAKE_BASE=TRUETP_ATI_DVPDATA<1>
MAKE_BASE=TRUETP_ATI_DVPDATA<0>
MAKE_BASE=TRUETP_ATI_DVPCLK
MAKE_BASE=TRUETP_ATI_DVPCNTL<0>
MAKE_BASE=TRUETP_ATI_DVPCNTL<1>
MAKE_BASE=TRUETP_ATI_DVPCNTL<2>
ATI_DVPDATA<4>
ATI_DVPDATA<3>
ATI_DVPDATA<2>
ATI_DVPDATA<1>
ATI_DVPDATA<0>
ATI_DVPCLK
ATI_DVPCNTL<0>
ATI_DVPCNTL<1>
ATI_DVPCNTL<2>
ATI_DVPDATA<23>
ATI_DVPDATA<20>
ATI_DVPDATA<17>
ATI_DVPDATA<16>
ATI_DVPDATA<15>
ATI_DVPDATA<14>
ATI_DVPDATA<13>
ATI_DVPDATA<12>
ATI_DVPDATA<11>
ATI_DVPDATA<10>
ATI_DVPDATA<9>
ATI_DVPDATA<8>
ATI_DVPDATA<7>
ATI_DVPDATA<6>
ATI_DVPDATA<5>
GPU_GPIO_30
MAKE_BASE=TRUETP_GPU_GPIO<18>
MAKE_BASE=TRUETP_GPU_GPIO<30>
MAKE_BASE=TRUETP_GPU_GPIO<31>
MAKE_BASE=TRUETP_GPU_GPIO<32>
MAKE_BASE=TRUETP_GPU_GPIO<33>
MAKE_BASE=TRUETP_GPU_GPIO<22>
TP_ATI_DVPDATA<22>MAKE_BASE=TRUE
MAKE_BASE=TRUETP_ATI_DVPDATA<23>
TMDS_DATA_N<3>
TMDS_DATA_P<3>
ATI_DVPDATA<21>
MAKE_BASE=TRUETP_GPU_GPIO<19> GPU_GPIO_19
GPU_GENERICB
GPU_GPIO_20
GPU_GPIO_21
MAKE_BASE=TRUETP_GPU_GPIO<26>
GPU_GPIO_18
MAKE_BASE=TRUETP_GPU_GPIO<20>
TP_GPU_GPIO<21>MAKE_BASE=TRUE
MAKE_BASE=TRUETP_GPU_GPIO<23>
GPU_GPIO_25
GPU_GPIO_31
GPU_GPIO_32
GPU_GPIO_33
GPU_GPIO_34TP_GPU_GPIO<34>MAKE_BASE=TRUE
GPU_GPIO_22
GPU_GPIO_23
MAKE_BASE=TRUETP_GPU_GPIO<25>
GPU_GENERICC
GPU_GENERICA
93
91
91
91
91
93
93
93
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
93
93
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
www.vinafix.vn
G
SD
G
SD
32
32
LCFILTER
LCFILTER
LCFILTER
SYM_VER-1
SYM_VER-1
SYM_VER-1
SYM_VER-1
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
AS POSSIBLE
PLACE R9750 & R9751 CLOSE TO DVI CONNECTOR
DVI INTERFACE
3V LEVEL SHIFTERS
PLACE LEFT SIDEAS CLOSE TO GPU (U8400) TO TMDS CONNECTOR
PLACE FILTER CLOSE
VGA SYNC BUFFERS
ANALOG FILTERING
PLACE CLOSE TO CONNECTOR
DVI DDC CURRENT LIMIT(55mA requirement per DVI spec)
2
1R9721
1/16W5%
402MF-LF
10K
2
1R972010K
1/16W5%
402MF-LF
1
2
6
Q97112N7002DW-X-F
SOT-363
4
5
3
Q9711
SOT-3632N7002DW-X-F
2
1R9722
1/16W5%
402MF-LF
100K
2
1 C9713
50V5%
402CERM
100pF
2
1R97124.7K
1/16W5%
402MF-LF
2
1R9710
1/16W5%
402MF-LF
4.7K
2
1 C9711
50V5%
402CERM
100pF
2
1C9710
50V20%
603CERM
0.01uF
21
L9710400-OHM-EMI
SM-1
21
F9710
SM-LF
0.5AMP-13.2V
CRITICAL
2
1 C9714
50V5%
402CERM
100pF
21
R9711
1/16W5%
402MF-LF
100
21
R9713
1/16W5%
402MF-LF
100
21
R9714
1/16W5%
402MF-LF
20K
5
4
2
1
3
U9750
SM-LF
74AHC1G32
5
4
2
1
3
U9751
SM-LF
74AHC1G32
2
1 C97413.3pF
CERM402
0.25%50V
2
1R9742
1/16W1%
402MF-LF
75
2
1R974075
MF-LF402
1%1/16W
2
1R9741
1/16W1%
402MF-LF
75
2
1 C97423.3pF
CERM402
0.25%50V
2
1 C97403.3pF
CERM402
0.25%50V
43
21
FL9740
SM-220MHZ-LFCRITICAL
43
21
FL9741CRITICAL
SM-220MHZ-LF
43
21
FL9742
SM-220MHZ-LFCRITICAL
21
R975033
MF-LF402
5%1/16W
21
R975133
5%
MF-LF402
1/16W
21R9700NOSTUFF
0
4
32
1L9700
2012H90-OHM-300MA
CRITICAL
2
1R9701182
MF-LF1/16W
1%
402
21R9702NOSTUFF
0
21R9703 0NOSTUFF
21R9704NOSTUFF
0
4
3 2
1L9701
2012H
90-OHM-300MA
CRITICAL
21R9705NOSTUFF 0
4
32
1L9702
2012H90-OHM-300MA
CRITICAL
2
1R9706182
1%
MF-LF1/16W
402
2
1R9707182
1%
MF-LF1/16W
402
21R9708NOSTUFF
0
21R9709NOSTUFF 0
4
32
1
L9703165-OHM
CRITICAL
SM
21R9715 0NOSTUFF
2
1R971690.9
MF-LF1/16W
1%
402
2
1R971790.9
MF-LF1/16W
402
1%2
1C970050V
CERM402
5%22PF
31
27
19
34
33
24
17
29
22
30
28
16
15
14
13
12
11
32
10
9
25
18
26
1
2
3
4
5
6
7
8
20
J9710F-ST-SM
MINI-DVI
OMIT
12
D9700CASE425
MMSZ4681XXG
20_INCH_LCDCRITICALCONN,32-P MINI-DVI RCPT MG3,LF1514S0116 J9710
CRITICAL 17_INCH_LCD514S0114 CONN,32-P MINI-DVI RCPT MG3,LF1 J9710
External Display ConnsSYNC_MASTER=BOZEMAN
97 111
09051-6949
SYNC_DATE=04/14/2005
DIFFERENTIAL_PAIR=TMDS_CONN_D1
TMDS_CONN_DP<1>
DIFFERENTIAL_PAIR=TMDS_CONN_D1TMDS_CONN_DN<1>
DIFFERENTIAL_PAIR=TMDS_DATA_0
TMDS_DATA_P<0>
DIFFERENTIAL_PAIR=TMDS_DATA_1TMDS_DATA_N<1>
VGA_R
GPU_B2
DVI_DDC_DATA_UF
TMDS_CONN_DP<2>
VGA_BTMDS_CONN_DN<1>
DIFFERENTIAL_PAIR=TMDS_DATA_0TMDS_DATA_N<0>
MIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm
VOLTAGE=5VPP5V_S0_DDC
VGA_HSYNC
GND_CHASSIS_VGA
TMDS_CONN_DP<1>
VGA_R
TMDS_CONN_DP<0>
TMDS_CONN_CLKN
TMDS_CONN_CLKP
TMDS_CONN_DN<0>
VGA_VSYNCVGA_G
DVI_HPD_UF
DVI_DDC_CLK_UF
=PP3V3_S3_VGASYNC
=PP3V3_S3_VGASYNC
GPU_DDC_A_CLK
DIFFERENTIAL_PAIR=TMDS_CONN_D2TMDS_CONN_DN<2>
GPU_H2SYNC
TMDS_CLK_PDIFFERENTIAL_PAIR=TMDS_CLK
MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MM
TMDS_CK_TERM
DVI_DDC_DATA
DVI_DDC_CLK
TMDS_DATA_P<1>DIFFERENTIAL_PAIR=TMDS_DATA_1
DIFFERENTIAL_PAIR=TMDS_CONN_D0TMDS_CONN_DN<0>
DIFFERENTIAL_PAIR=TMDS_CONN_CLK
TMDS_CONN_CLKP
VGA_VSYNCGPU_V2SYNC
GPU_VSYNC_BUF
VGA_HSYNCGPU_HSYNC_BUF
=PP5V_S0_DVI_DDC
GPU_DDC_A_DATA
DVI_DDC_CLK_UF
DVI_DDC_DATA_UF
DVI_HPD_UF
DIFFERENTIAL_PAIR=TMDS_CONN_CLKTMDS_CONN_CLKN
DIFFERENTIAL_PAIR=TMDS_CONN_D2
TMDS_CONN_DP<2>
MIN_LINE_WIDTH=0.38 mmVOLTAGE=5V
MIN_NECK_WIDTH=0.25 mm
PP5V_S0_DDC_FUSE
DIFFERENTIAL_PAIR=TMDS_CONN_D0
TMDS_CONN_DP<0>
VGA_G
VGA_B
GPU_R2
GPU_G2
=PP3V3_DDC_DVI
PP5V_S0
DIFFERENTIAL_PAIR=TMDS_CLKTMDS_CLK_N
DIFFERENTIAL_PAIR=TMDS_DATA_2
TMDS_DATA_P<2>
DIFFERENTIAL_PAIR=TMDS_DATA_2TMDS_DATA_N<2>
GPU_HPD
TMDS_CONN_DN<2>
94 88
97
97
75
97
97
93
93
97
93
97
97
97
97
93
97
6
97
97
97
97
97
97
97
97
97
97
6
6
93
97
93
93
93
97
97
97
93
97
88
93
97
97
97
97
97
97
97
97
93
93
88
6
93
93
93
93
97
www.vinafix.vn
A
D
C
B
A
D
C
B
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
AUD_GPIO_1 AUD_GPIO_1 - @m38_lib.M38 68A6 68C7 74A6 AUD_GPIO_0_A AUD_GPIO_0_A - @m38_lib.M38 68B8 72B8 AUD_GPIO_0 AUD_GPIO_0 - @m38_lib.M38 68B6 68C7 74A6 AUD_DEBOUNCE AUD_DEBOUNCE - @m38_lib.M38 72B7 AUD_BYPASS AUD_BYPASS - @m38_lib.M38 68C4 AUD_BI_PORT_F_R AUD_BI_PORT_F_R - @m38_lib.M38 68C1 74C8 AUD_BI_PORT_F_L AUD_BI_PORT_F_L - @m38_lib.M38 68C1 74C8 AUD_BI_PORT_E_R AUD_BI_PORT_E_R - @m38_lib.M38 68C1 74B6 AUD_BI_PORT_E_L AUD_BI_PORT_E_L - @m38_lib.M38 68C1 74B6 AUD_BI_PORT_D_R AUD_BI_PORT_D_R - @m38_lib.M38 68C7 74B6 AUD_BI_PORT_D_L AUD_BI_PORT_D_L - @m38_lib.M38 68C7 74B6 AUD_BI_PORT_C_R AUD_BI_PORT_C_R - @m38_lib.M38 68C7 72C8 AUD_BI_PORT_C_L AUD_BI_PORT_C_L - @m38_lib.M38 68C7 72D8 AUD_BI_PORT_B_R - @m38_lib.M38 68B1 68C1 74B6 AUD_BI_PORT_B_L AUD_BI_PORT_B_L - @m38_lib.M38 68B2 68C1 74A3 AUD_BI_PORT_A_R AUD_BI_PORT_A_R - @m38_lib.M38 68C1 74B8 AUD_BI_PORT_A_L AUD_BI_PORT_A_L - @m38_lib.M38 68C1 74B8 AUD_ANALOG_FILT_2 AUD_ANALOG_FILT_2 - @m38_lib.M38 68C4 AUD_ANALOG_FILT_1 AUD_ANALOG_FILT_1 - @m38_lib.M38 68C4 AUD_4V5_SHDN_L AUD_4V5_SHDN_L - @m38_lib.M38 68A4 AUDSAMPOUTRN AUDSAMPOUTRN - @m38_lib.M38 72C4 AUDSAMPOUTLP AUDSAMPOUTLP - @m38_lib.M38 72C4 AUDSAMPOUTLN AUDSAMPOUTLN - @m38_lib.M38 72C4 AUDSAMPOURTP AUDSAMPOURTP - @m38_lib.M38 72C4 AUDSAMPINRP AUDSAMPINRP - @m38_lib.M38 72C6 AUDSAMPINRN AUDSAMPINRN - @m38_lib.M38 72C6 AUDSAMPINLP AUDSAMPINLP - @m38_lib.M38 72C6 AUDSAMPINLN AUDSAMPINLN - @m38_lib.M38 72D6 AUDSAMPCPP AUDSAMPCPP - @m38_lib.M38 72C4 AUDSAMPCPN AUDSAMPCPN - @m38_lib.M38 72C4 AUDLINDETH AUDLINDETH - @m38_lib.M38 74C4 ATI_VREFG ATI_VREFG - @m38_lib.M38 91D3 ATI_TESTEN ATI_TESTEN - @m38_lib.M38 91A3 ATI_TDIODE_P ATI_TDIODE_P - @m38_lib.M38 61C5 91A3 ATI_TDIODE_N ATI_TDIODE_N - @m38_lib.M38 61C5 91A3 ATI_RSET ATI_RSET - @m38_lib.M38 93A8 93B5 ATI_R2SET ATI_R2SET - @m38_lib.M38 93A8 93B5 ATI_DVPDATA<23> ATI_DVPDATA<23> - @m38_lib.M38 91A3 95C6 ATI_DVPDATA<22> ATI_DVPDATA<22> - @m38_lib.M38 91A3 95C6 ATI_DVPDATA<21> ATI_DVPDATA<21> - @m38_lib.M38 91B3 95C6 ATI_DVPDATA<20> ATI_DVPDATA<20> - @m38_lib.M38 91B3 95C6 ATI_DVPDATA<19> ATI_DVPDATA<19> - @m38_lib.M38 91B3 95C6 ATI_DVPDATA<18> ATI_DVPDATA<18> - @m38_lib.M38 91B3 95C6 ATI_DVPDATA<17> ATI_DVPDATA<17> - @m38_lib.M38 91B3 95C6 ATI_DVPDATA<16> ATI_DVPDATA<16> - @m38_lib.M38 91B3 95C6 ATI_DVPDATA<15> ATI_DVPDATA<15> - @m38_lib.M38 91B3 95C6 ATI_DVPDATA<14> ATI_DVPDATA<14> - @m38_lib.M38 91B3 95C6 ATI_DVPDATA<13> ATI_DVPDATA<13> - @m38_lib.M38 91B3 95C6 ATI_DVPDATA<12> ATI_DVPDATA<12> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<11> ATI_DVPDATA<11> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<10> ATI_DVPDATA<10> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<9> ATI_DVPDATA<9> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<8> ATI_DVPDATA<8> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<7> ATI_DVPDATA<7> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<6> ATI_DVPDATA<6> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<5> ATI_DVPDATA<5> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<4> ATI_DVPDATA<4> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<3> ATI_DVPDATA<3> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<2> ATI_DVPDATA<2> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<1> ATI_DVPDATA<1> - @m38_lib.M38 91B3 95B6 ATI_DVPDATA<0> ATI_DVPDATA<0> - @m38_lib.M38 91B3 95B6 ATI_DVPCNTL<2> ATI_DVPCNTL<2> - @m38_lib.M38 91B3 95A6 ATI_DVPCNTL<1> ATI_DVPCNTL<1> - @m38_lib.M38 91B3 95A6 ATI_DVPCNTL<0> ATI_DVPCNTL<0> - @m38_lib.M38 91C3 95A6 TP_ATI_DVPCLK - @m38_lib.M38 95A8 ATI_DVPCLK ATI_DVPCLK - @m38_lib.M38 91C3 95A6 TP_ALS_RIGHT - @m38_lib.M38 59D3 ALS_RIGHT ALS_RIGHT - @m38_lib.M38 58A7 59D5 TP_ALS_LEFT - @m38_lib.M38 59D3 ALS_LEFT ALS_LEFT - @m38_lib.M38 58A7 59D5 NC_ALS_GAIN - @m38_lib.M38 59C5 ALS_GAIN ALS_GAIN - @m38_lib.M38 58B5 59C6 ALL_SYS_PWRGD ALL_SYS_PWRGD - @m38_lib.M38 26D5 58D7 77B6 AIRPORT_WAKE_L AIRPORT_WAKE_L - @m38_lib.M38 53C6 AIRPORT_RST_L AIRPORT_RST_L - @m38_lib.M38 6A7 53C5 AIRPORT_CONN_DATA AIRPORT_CONN_DATA - @m38_lib.M38 53B5 AIRPORT_CONN_CLK AIRPORT_CONN_CLK - @m38_lib.M38 53B5 _P @m38_lib.M38 AIRPORT_CLK100M_PCIE AIRPORT_CLK100M_PCIE_P - 34B4 34C2 53C6 _N @m38_lib.M38 AIRPORT_CLK100M_PCIE AIRPORT_CLK100M_PCIE_N - 34B4 34C2 53C6 ACZ_SYNC ACZ_SYNC - @m38_lib.M38 21C7 68D7 ACZ_SDATAOUT ACZ_SDATAOUT - @m38_lib.M38 21C7 68D7 ACZ_SDATAIN_CHIP ACZ_SDATAIN_CHIP - @m38_lib.M38 68C6 ACZ_SDATAIN<0> ACZ_SDATAIN<0> - @m38_lib.M38 21C7 68D7 ACZ_RST_L ACZ_RST_L - @m38_lib.M38 21C7 68C7 ACZ_BITCLK ACZ_BITCLK - @m38_lib.M38 21C7 68D7 =PPVCORE_S0_GPU_BBP - @m38_lib.M38 85B7 88D6 =PPVCORE_S0_GPU_REG - @m38_lib.M38 85C1 88D6 PP1V0R1V2_S0_GPU - @m38_lib.M38 59B4 88D8 =PPVCORE_S0_GPU_REG - @m38_lib.M38 85C1 88D6 PP1V0R1V2_S0_GPU - @m38_lib.M38 59B4 88D8 =PPVCORE_S0_GPU_BBP - @m38_lib.M38 85B7 88D6 =PPVCORE_S0_GPU =PPVCORE_S0_GPU - @m38_lib.M38 76B4 86D8 88D6 91A7 PPVCORE_CPU - @m38_lib.M38 5D2 6D6 75A4 75D1 76B4 =PPVCORE_S0_CPU =PPVCORE_S0_CPU - @m38_lib.M38 6D4 8B6 8D7 8D8 9B8 76B5 @m38_lib.M38 =PPVOUT_S0_GPUBBP_LDO - 85B5 88C6 PPBB_S0_GPU - @m38_lib.M38 88C8 @m38_lib.M38 =PPVOUT_S0_GPUBBP_LDO - 85B5 88C6 =PPBB_S0_GPU =PPBB_S0_GPU - @m38_lib.M38 86D6 88C6 PP12V_FW - @m38_lib.M38 46D6 =PP12V_S5_FW_PHY =PP12V_S5_FW_PHY - @m38_lib.M38 44C2 46D5 =PP12V_S5_FW - @m38_lib.M38 6C1 46D7 =PPVIN_S0_GPUVCORE - @m38_lib.M38 85D7 88B6 80D7 81D7 83C5 83C5 88B8 PP12V_S5 - @m38_lib.M38 5D2 6C2 6D7 78C7 79D7 =PP12V_S5_FW - @m38_lib.M38 6C1 46D7 80D7 81D7 83C5 83C5 88B8 PP12V_S5 - @m38_lib.M38 5D2 6C2 6D7 78C7 79D7 =PPVIN_S0_GPUVCORE - @m38_lib.M38 85D7 88B6 =PP12V_S5_CPU =PP12V_S5_CPU - @m38_lib.M38 6C1 76D8 @m38_lib.M38 PP12V_S0_AUDIO_SPKRAMP - 6A5 AMP @m38_lib.M38 =PP12V_S0_AUDIO_SPKR =PP12V_S0_AUDIO_SPKRAMP - 6A4 72D8 =PP12V_S0_FAN - @m38_lib.M38 6A4 65B6 65D7 66D6 PP12V_S0 - @m38_lib.M38 6A6 6D8 76B8 88B8 =PP12V_S0_FAN - @m38_lib.M38 6A4 65B6 65D7 66D6 PP12V_S0 - @m38_lib.M38 6A6 6D8 76B8 88B8 =PP12V_GPU =PP12V_GPU - @m38_lib.M38 88B6 94C3 94D7 79B3 80B3 81B3 83C3 PP5V_S5 - @m38_lib.M38 5D2 6A8 6D2 6D7 59A5 79B3
=PP5V_S5_SB =PP5V_S5_SB - @m38_lib.M38 6D1 25C8 =PP5V_S3_BNDI - @m38_lib.M38 6C3 47D4 =PP5V_S3_USB - @m38_lib.M38 6C3 47C8 PP5V_S3 - @m38_lib.M38 6C4 59D6 83C3 =PP5V_S3_USB - @m38_lib.M38 6C3 47C8 =PP5V_S3_BNDI - @m38_lib.M38 6C3 47D4 PP5V_S3 - @m38_lib.M38 6C4 59D6 83C3 =PP5V_S0_MEMVTT =PP5V_S0_MEMVTT - @m38_lib.M38 6C3 31C6 GPUVCORE_VCC - @m38_lib.M38 88D6 =PP5V_S0_GPUVCORE =PP5V_S0_GPUVCORE - @m38_lib.M38 85D7 88D6 =PP5V_S0_DVI_DDC - @m38_lib.M38 88A6 97D6 =PP5V_S0_GPUBBCTL - @m38_lib.M38 85A6 88B6 =PP5V_S0_GPUISENS - @m38_lib.M38 85D2 88A6 =PP5V_S0_PATA - @m38_lib.M38 6A4 38C4 38D3 =PP5V_S0_SB - @m38_lib.M38 6A4 25D8 97D3 PP5V_S0 - @m38_lib.M38 6A6 6D8 75D7 88B8 94A4 =PP5V_S0_PATA - @m38_lib.M38 6A4 38C4 38D3 =PP5V_S0_SB - @m38_lib.M38 6A4 25D8 =PP5V_S0_GPUBBCTL - @m38_lib.M38 85A6 88B6 97D3 PP5V_S0 - @m38_lib.M38 6A6 6D8 75D7 88B8 94A4 =PP5V_S0_GPUISENS - @m38_lib.M38 85D2 88A6 =PP5V_S0_DVI_DDC - @m38_lib.M38 88A6 97D6 =PP5V_S0_DEBUG =PP5V_S0_DEBUG - @m38_lib.M38 6A4 60C6 PP5V_S0_AUDIO - @m38_lib.M38 6A5 =PP5V_S0_AUDIO =PP5V_S0_AUDIO - @m38_lib.M38 6A4 68A6 44D7 45D6 46A8 =PP3V3_S5_FW - @m38_lib.M38 6D1 44A6 44B2 44B7 44D5 =PP3V3_S5_ROM - @m38_lib.M38 6D1 63D4 23D8 25C8 26D8 =PP3V3_S5_SB - @m38_lib.M38 6D1 23A7 23B3 23B7 23D4 @m38_lib.M38 =PP3V3_S5_SB_3V3_1V5_VCCSUSHDA - 6D1 24C3 =PP3V3_S5_SB_IO - @m38_lib.M38 6D1 22C6 27C6 =PP3V3_S5_SB_PM - @m38_lib.M38 6D1 11B5 23D1 =PP3V3_S5_SB_USB - @m38_lib.M38 6D1 22D8 @m38_lib.M38 =PP3V3_S5_SB_VCCSUS3_3 - 6D1 24A5 24B3 25B6 25D1 @m38_lib.M38 =PP3V3_S5_SB_VCCSUS3_3_USB - 6D1 24B3 25D1 59A5 59C4 59D3 59D8 =PP3V3_S5_SMC - @m38_lib.M38 6D1 58C2 58D3 58D4 59A4 83C3 79B3 80A5 80B3 81A5 81A5 77C8 77C8 77D8 79A3 79A5 66D7 76D2 76D4 77B8 77C7 26C4 26C4 59A8 65B7 65D7 PP3V3_S5 - @m38_lib.M38 5D2 6C8 6D2 6D8 6D8 26C1 23D8 25C8 26D8 =PP3V3_S5_SB - @m38_lib.M38 6D1 23A7 23B3 23B7 23D4 =PP3V3_S5_SB_USB - @m38_lib.M38 6D1 22D8 =PP3V3_S5_SB_PM - @m38_lib.M38 6D1 11B5 23D1 @m38_lib.M38 =PP3V3_S5_SB_VCCSUS3_3 - 6D1 24A5 24B3 25B6 25D1 @m38_lib.M38 =PP3V3_S5_SB_VCCSUS3_3_USB - 6D1 24B3 25D1 @m38_lib.M38 =PP3V3_S5_SB_3V3_1V5_VCCSUSHDA - 6D1 24C3 =PP3V3_S5_SB_IO - @m38_lib.M38 6D1 22C6 27C6 44D7 45D6 46A8 =PP3V3_S5_FW - @m38_lib.M38 6D1 44A6 44B2 44B7 44D5 59A5 59C4 59D3 59D8 =PP3V3_S5_SMC - @m38_lib.M38 6D1 58C2 58D3 58D4 59A4 83C3 79B3 80A5 80B3 81A5 81A5 77C8 77C8 77D8 79A3 79A5 66D7 76D2 76D4 77B8 77C7 26C4 26C4 59A8 65B7 65D7 PP3V3_S5 - @m38_lib.M38 5D2 6C8 6D2 6D8 6D8 26C1 =PP3V3_S5_ROM - @m38_lib.M38 6D1 63D4 =PP3V3_S5_DEBUG =PP3V3_S5_DEBUG - @m38_lib.M38 6D1 60D6 =PP3V3_S3_BT - @m38_lib.M38 6D3 47B3 41D8 42D3 42D8 43D2 =PP3V3_S3_ENET - @m38_lib.M38 6D3 41A5 41B3 41C3 41D6 =PP3V3_S3_TPM - @m38_lib.M38 6D3 67C2 =PP3V3_S3_USB - @m38_lib.M38 6C3 49C5 =PP3V3_S3_VGASYNC - @m38_lib.M38 6C3 97A4 97B4 83B3 PP3V3_S3 - @m38_lib.M38 6A7 6D4 53C4 59C8 59D3 41D8 42D3 42D8 43D2 =PP3V3_S3_ENET - @m38_lib.M38 6D3 41A5 41B3 41C3 41D6 =PP3V3_S3_TPM - @m38_lib.M38 6D3 67C2 =PP3V3_S3_BT - @m38_lib.M38 6D3 47B3 83B3 PP3V3_S3 - @m38_lib.M38 6A7 6D4 53C4 59C8 59D3 =PP3V3_S3_VGASYNC - @m38_lib.M38 6C3 97A4 97B4 =PP3V3_S3_USB - @m38_lib.M38 6C3 49C5 =PP3V3_S3_1V2REG =PP3V3_S3_1V2REG - @m38_lib.M38 6D3 77B7 =PP3V3_DDC_DVI - @m38_lib.M38 88C6 97D2 =PP3V3_DDC_LCD - @m38_lib.M38 88C6 94A7 94C7 =PP3V3_GPU - @m38_lib.M38 88C6 94B3 =PP3V3_S0_2V5REG - @m38_lib.M38 6A4 77D6 =PP3V3_S0_AIRPORT - @m38_lib.M38 6A4 53C2 74D5 72D5 73B8 73C2 74B5 74C5 =PP3V3_S0_AUDIO - @m38_lib.M38 6A4 68A6 68D7 72A6 72C8 =PP3V3_S0_CK410 - @m38_lib.M38 6A4 33C8 33D3 33D8 34D4 66C7 =PP3V3_S0_FAN - @m38_lib.M38 6B4 59A8 59B7 65B7 65C7 =PP3V3_S0_GPU - @m38_lib.M38 85B3 88C6 91D2 93A1 =PP3V3_S0_GPUBBCTL - @m38_lib.M38 85A7 88C6 =PP3V3_S0_GPUBBN - @m38_lib.M38 85B5 88C6 =PP3V3_S0_GPUBBP - @m38_lib.M38 85B8 88C6 =PP3V3_S0_GPU_CLOCKS - @m38_lib.M38 88C6 =PP3V3_S0_HD_TSENS - @m38_lib.M38 6B4 66B5 =PP3V3_S0_IMVP - @m38_lib.M38 6A4 75D8 =PP3V3_S0_LCD - @m38_lib.M38 88C6 94C8 =PP3V3_S0_NB_PM - @m38_lib.M38 6B4 =PP3V3_S0_NB_TVDAC - @m38_lib.M38 6B4 19C7 =PP3V3_S0_NB_VCC_HV - @m38_lib.M38 6B4 17C6 19A8 19C7 =PP3V3_S0_ODD_TSENS - @m38_lib.M38 6A4 66B4 =PP3V3_S0_PATA - @m38_lib.M38 6B4 38D3 =PP3V3_S0_PCI - @m38_lib.M38 6A4 44D5 =PP3V3_S0_SB - @m38_lib.M38 6B4 22B5 25D8 @m38_lib.M38 =PP3V3_S0_SB_3V3_1V5_VCCHDA - 6A4 24C3 25C4 =PP3V3_S0_SB_GPIO - @m38_lib.M38 6B4 21C3 21D3 23B3 23D5 =PP3V3_S0_SB_PCI - @m38_lib.M38 6B4 26D1 =PP3V3_S0_SB_PM - @m38_lib.M38 6B4 26D4 =PP3V3_S0_SB_VCC3_3 - @m38_lib.M38 6B4 24B5 24B5 25B8 25C6 @m38_lib.M38 =PP3V3_S0_SB_VCC3_3_IDE - 6B4 24C3 25B3 @m38_lib.M38
=PP3V3_S0_SB_VCC3_3_PCI - 6B4 24B3 25A3 @m38_lib.M38 =PP3V3_S0_SB_VCCLAN3_3 - 6A4 24D3 25D3 =PP3V3_S0_TPM - @m38_lib.M38 6A4 67C7 67D4 =PPSPD_S0_MEM - @m38_lib.M38 6A4 28A7 29A3 29A7 88C8 26C6 41D8 59D3 61C3 76D6 PP3V3_S0 - @m38_lib.M38 6A7 6B6 6D8 10D2 26B7 =PP3V3_S0_SB - @m38_lib.M38 6B4 22B5 25D8 @m38_lib.M38 =PP3V3_S0_SB_VCCLAN3_3 - 6A4 24D3 25D3 =PP3V3_S0_SB_GPIO - @m38_lib.M38 6B4 21C3 21D3 23B3 23D5 =PP3V3_S0_NB_VCC_HV - @m38_lib.M38 6B4 17C6 19A8 19C7 =PP3V3_S0_SB_VCC3_3 - @m38_lib.M38 6B4 24B5 24B5 25B8 25C6 @m38_lib.M38 =PP3V3_S0_SB_VCC3_3_PCI - 6B4 24B3 25A3 @m38_lib.M38 =PP3V3_S0_SB_VCC3_3_IDE - 6B4 24C3 25B3 =PP3V3_S0_SB_PCI - @m38_lib.M38 6B4 26D1 =PP3V3_S0_SB_PM - @m38_lib.M38 6B4 26D4 =PP3V3_S0_PATA - @m38_lib.M38 6B4 38D3 66C7 =PP3V3_S0_FAN - @m38_lib.M38 6B4 59A8 59B7 65B7 65C7 =PP3V3_S0_HD_TSENS - @m38_lib.M38 6B4 66B5 =PP3V3_S0_ODD_TSENS - @m38_lib.M38 6A4 66B4 @m38_lib.M38 =PP3V3_S0_SB_3V3_1V5_VCCHDA - 6A4 24C3 25C4 =PP3V3_S0_TPM - @m38_lib.M38 6A4 67C7 67D4 =PPSPD_S0_MEM - @m38_lib.M38 6A4 28A7 29A3 29A7 =PP3V3_S0_CK410 - @m38_lib.M38 6A4 33C8 33D3 33D8 34D4 =PP3V3_S0_IMVP - @m38_lib.M38 6A4 75D8 74D5 72D5 73B8 73C2 74B5 74C5 =PP3V3_S0_AUDIO - @m38_lib.M38 6A4 68A6 68D7 72A6 72C8 =PP3V3_S0_PCI - @m38_lib.M38 6A4 44D5 =PP3V3_S0_AIRPORT - @m38_lib.M38 6A4 53C2 =PP3V3_S0_2V5REG - @m38_lib.M38 6A4 77D6 =PP3V3_S0_GPUBBP - @m38_lib.M38 85B8 88C6 =PP3V3_S0_LCD - @m38_lib.M38 88C6 94C8 =PP3V3_S0_GPU_VDDR3 - @m38_lib.M38 88C6 88D3 91C6 =PP3V3_S0_GPU - @m38_lib.M38 85B3 88C6 91D2 93A1 =PP3V3_S0_GPUBBN - @m38_lib.M38 85B5 88C6 =PP3V3_S0_GPUBBCTL - @m38_lib.M38 85A7 88C6 88C8 26C6 41D8 59D3 61C3 76D6 PP3V3_S0 - @m38_lib.M38 6A7 6B6 6D8 10D2 26B7 =PP3V3_GPU - @m38_lib.M38 88C6 94B3 =PP3V3_DDC_LCD - @m38_lib.M38 88C6 94A7 94C7 =PP3V3_DDC_DVI - @m38_lib.M38 88C6 97D2 20B4 20B4 =PP3V3_S0_NB =PP3V3_S0_NB - @m38_lib.M38 6A4 14C7 14D6 19C7 20A4 PP2V5_S3_ENET - @m38_lib.M38 42C4 43D8 =PP2V5_S3_ENET =PP2V5_S3_ENET - @m38_lib.M38 41D5 41D6 42C4 =PP2V5_S0_GPU - @m38_lib.M38 88B6 93C8 =PP2V5_S0_GPU_PVDD - @m38_lib.M38 88B6 91A8 =PP2V5_S0_GPU_VDD25 - @m38_lib.M38 88B6 91C6 @m38_lib.M38 =PP2V5_S0_GPU_VDDC_CT - 88B6 91C6 PP2V5_S0 - @m38_lib.M38 6B6 77C3 88C8 =PP2V5_S0_GPU_PVDD - @m38_lib.M38 88B6 91A8 @m38_lib.M38 =PP2V5_S0_GPU_VDDC_CT - 88B6 91C6 =PP2V5_S0_GPU_VDD25 - @m38_lib.M38 88B6 91C6 PP2V5_S0 - @m38_lib.M38 6B6 77C3 88C8 =PP2V5_S0_GPU - @m38_lib.M38 88B6 93C8 BG @m38_lib.M38 =PP2V5_S0_NB_VCCA_3G =PP2V5_S0_NB_VCCA_3GBG - 6B4 17D6 19A8 19C7 =PP1V8_S0_MEMVTT - @m38_lib.M38 6D3 31C7 28D6 29B2 29D3 29D6 =PP1V8_S3_MEM - @m38_lib.M38 5C4 6D3 28B2 28C8 28D3 PP1V8_S3 - @m38_lib.M38 5D2 6D4 79C2 28D6 29B2 29D3 29D6 =PP1V8_S3_MEM - @m38_lib.M38 5C4 6D3 28B2 28C8 28D3 PP1V8_S3 - @m38_lib.M38 5D2 6D4 79C2 =PP1V8_S0_MEMVTT - @m38_lib.M38 6D3 31C7 19D7 =PP1V8_S3_MEM_NB =PP1V8_S3_MEM_NB - @m38_lib.M38 6D3 6D3 14C2 16B6 19B8 88B6 =PP1V8R2V0_S0_FB_GPU - @m38_lib.M38 86B8 87A5 87A8 87B5 87B8 @m38_lib.M38 =PP1V8R3V3_S0_GPU_VDDR4 - 88B6 91B7 @m38_lib.M38 =PP1V8R3V3_S0_GPU_VDDR5 - 88B6 91B7 =PP1V8_S0_FB_VDDQ - @m38_lib.M38 88B6 89D5 89D8 90D5 90D8 PP1V8R2V0_S0_FB_GPU - @m38_lib.M38 88B8 PP1V8_S0 - @m38_lib.M38 78B2 88B6 @m38_lib.M38 =PP1V8R3V3_S0_GPU_VDDR4 - 88B6 91B7 @m38_lib.M38 =PP1V8R3V3_S0_GPU_VDDR5 - 88B6 91B7 PP1V8_S0 - @m38_lib.M38 78B2 88B6 88B6 =PP1V8R2V0_S0_FB_GPU - @m38_lib.M38 86B8 87A5 87A8 87B5 87B8 =PP1V8_S0_FB_VDDQ - @m38_lib.M38 88B6 89D5 89D8 90D5 90D8 =PP1V8_S0_FB_VDD =PP1V8_S0_FB_VDD - @m38_lib.M38 88B6 89D5 89D8 90D5 90D8 PP1V2_S3 - @m38_lib.M38 6D4 77B2 =PP1V2_S3_LAN =PP1V2_S3_LAN - @m38_lib.M38 6D3 42B8 PP1V2_S3_ENET - @m38_lib.M38 42B5 =PP1V2_S3_ENET =PP1V2_S3_ENET - @m38_lib.M38 41A8 41D6 42B5 @m38_lib.M38 =PP1V2_S0_PCIE_GPU_PVDD - 84C8 88D6 @m38_lib.M38 =PP1V2_S0_PCIE_GPU_VDDR - 84C8 88D6 =PP1V2_S0_REG - @m38_lib.M38 77A1 88C6 =PPVIO_S0_PCIE - @m38_lib.M38 84A2 88C6 PP1V2_GPU_IO_S0 - @m38_lib.M38 88D8 @m38_lib.M38 =PP1V2_S0_PCIE_GPU_VDDR - 84C8 88D6 @m38_lib.M38 =PP1V2_S0_PCIE_GPU_PVDD - 84C8 88D6 =PP1V2_S0_REG - @m38_lib.M38 77A1 88C6 =PPVIO_S0_PCIE - @m38_lib.M38 84A2 88C6 =PP1V2_S0_GPU_VDDPLL =PP1V2_S0_GPU_VDDPLL - @m38_lib.M38 88C6 91B8 =PP0V9_S0_MEM_TERM - @m38_lib.M38 6D4 30D4 PP0V9_S0 - @m38_lib.M38 6D6 79A3 =PP0V9_S0_MEM_TERM - @m38_lib.M38 6D4 30D4 =PP0V9_S0_MEMVTT_LDO =PP0V9_S0_MEMVTT_LDO - @m38_lib.M38 6D4 31B3 @m38_lib.M38 =PNVOUT_S0_GPUBBN_REG - 85B1 88C6 PNBB_S0_GPU - @m38_lib.M38 88C8 @m38_lib.M38 =PNVOUT_S0_GPUBBN_REG - 85B1 88C6 =PNBB_S0_GPU =PNBB_S0_GPU - @m38_lib.M38 86D2 88C6 =SMB_AIRPORT_DATA - @m38_lib.M38 27C6 53B4
SMB_CK410_DATA - @m38_lib.M38 27D6 33B6 SMB_DATA - @m38_lib.M38 23D5 27B7 27D7 SMB_CK410_DATA - @m38_lib.M38 27D6 33B6 =SMB_AIRPORT_DATA - @m38_lib.M38 27C6 53B4 =I2C_MEM_SDA =I2C_MEM_SDA - @m38_lib.M38 27D6 28A6 29A6 =SMB_AIRPORT_CLK - @m38_lib.M38 27D6 53B4 SMB_CK410_CLK - @m38_lib.M38 27D6 33B6 SMB_CLK - @m38_lib.M38 23D5 27B7 27D7 SMB_CK410_CLK - @m38_lib.M38 27D6 33B6 =SMB_AIRPORT_CLK - @m38_lib.M38 27D6 53B4 =I2C_MEM_SCL =I2C_MEM_SCL - @m38_lib.M38 27D6 28A6 29A6 =I2C_ODD_TEMP_SDA - @m38_lib.M38 59C1 66B4 =SMB_THRM_DATA - @m38_lib.M38 10C3 59C1 SMB_B_S0_DATA - @m38_lib.M38 58B5 59C2 59D1 SMB_GPU_NB_THRM_DATA - @m38_lib.M38 59B1 61C3 SMB_B_S0_DATA - @m38_lib.M38 58B5 59C2 59D1 =SMB_THRM_DATA - @m38_lib.M38 10C3 59C1 =I2C_ODD_TEMP_SDA - @m38_lib.M38 59C1 66B4 =I2C_HD_TEMP_SDA =I2C_HD_TEMP_SDA - @m38_lib.M38 59C1 66B6 =I2C_ODD_TEMP_SCL - @m38_lib.M38 59C1 66B4 =SMB_THRM_CLK - @m38_lib.M38 10C3 59C1 SMB_B_S0_CLK - @m38_lib.M38 58B5 59C2 59D1 SMB_GPU_NB_THRM_CLK - @m38_lib.M38 59B1 61C3 SMB_B_S0_CLK - @m38_lib.M38 58B5 59C2 59D1 =SMB_THRM_CLK - @m38_lib.M38 10C3 59C1 =I2C_ODD_TEMP_SCL - @m38_lib.M38 59C1 66B4 =I2C_HD_TEMP_SCL =I2C_HD_TEMP_SCL - @m38_lib.M38 59C1 66B6 5V_REG_IN 5V_REG_IN - @m38_lib.M38 68A4 2V5REG_VFB 2V5REG_VFB - @m38_lib.M38 77C4 2V5REG_SW 2V5REG_SW - @m38_lib.M38 77C4 2V5REG_SGND 2V5REG_SGND - @m38_lib.M38 77C4 2V5REG_RT 2V5REG_RT - @m38_lib.M38 77C5 2V5REG_MODE 2V5REG_MODE - @m38_lib.M38 77C5 2V5REG_ITH_RC 2V5REG_ITH_RC - @m38_lib.M38 77C4 2V5REG_ITH 2V5REG_ITH - @m38_lib.M38 77C4 1V8REG_GPU_VCC5 1V8REG_GPU_VCC5 - @m38_lib.M38 78C7 1V8REG_GPU_UGATE 1V8REG_GPU_UGATE - @m38_lib.M38 78C6 E @m38_lib.M38 1V8REG_GPU_SWITCHNOD 1V8REG_GPU_SWITCHNODE - 78B5 1V8REG_GPU_SNUB 1V8REG_GPU_SNUB - @m38_lib.M38 78B4 1V8REG_GPU_PVCC5 1V8REG_GPU_PVCC5 - @m38_lib.M38 78C7 1V8REG_GPU_LGATE 1V8REG_GPU_LGATE - @m38_lib.M38 78B6 1V8REG_GPU_LDO_FB 1V8REG_GPU_LDO_FB - @m38_lib.M38 78B7 1V8REG_GPU_LDO_DR 1V8REG_GPU_LDO_DR - @m38_lib.M38 78C7 1V8REG_GPU_GND 1V8REG_GPU_GND - @m38_lib.M38 78B7 1V8REG_GPU_FS_DIS 1V8REG_GPU_FS_DIS - @m38_lib.M38 78B7 1V8REG_GPU_FB_R 1V8REG_GPU_FB_R - @m38_lib.M38 78B3 1V8REG_GPU_FB 1V8REG_GPU_FB - @m38_lib.M38 78B5 1V8REG_GPU_COMP_R 1V8REG_GPU_COMP_R - @m38_lib.M38 78B5 1V8REG_GPU_COMP 1V8REG_GPU_COMP - @m38_lib.M38 78B6 1V8REG_GPU_BOOT_R 1V8REG_GPU_BOOT_R - @m38_lib.M38 78C5 1V8REG_GPU_BOOT 1V8REG_GPU_BOOT - @m38_lib.M38 78C6 1V8REG_DDR_VCC5 1V8REG_DDR_VCC5 - @m38_lib.M38 79D7 1V8REG_DDR_UGATE 1V8REG_DDR_UGATE - @m38_lib.M38 79D6 E @m38_lib.M38 1V8REG_DDR_SWITCHNOD 1V8REG_DDR_SWITCHNODE - 79C5 1V8REG_DDR_SNUB 1V8REG_DDR_SNUB - @m38_lib.M38 79C4 1V8REG_DDR_PVCC5 1V8REG_DDR_PVCC5 - @m38_lib.M38 79D7 1V8REG_DDR_LGATE 1V8REG_DDR_LGATE - @m38_lib.M38 79C6 1V8REG_DDR_LDO_FB 1V8REG_DDR_LDO_FB - @m38_lib.M38 79C7 1V8REG_DDR_LDO_DR 1V8REG_DDR_LDO_DR - @m38_lib.M38 79C7 1V8REG_DDR_GND 1V8REG_DDR_GND - @m38_lib.M38 79C7 1V8REG_DDR_FS_DIS 1V8REG_DDR_FS_DIS - @m38_lib.M38 79C7 1V8REG_DDR_FB_R 1V8REG_DDR_FB_R - @m38_lib.M38 79C3 1V8REG_DDR_FB 1V8REG_DDR_FB - @m38_lib.M38 79C5 1V8REG_DDR_COMP_R 1V8REG_DDR_COMP_R - @m38_lib.M38 79C5 1V8REG_DDR_COMP 1V8REG_DDR_COMP - @m38_lib.M38 79C6 1V8REG_DDR_BOOT_R 1V8REG_DDR_BOOT_R - @m38_lib.M38 79D5 1V8REG_DDR_BOOT 1V8REG_DDR_BOOT - @m38_lib.M38 79D6 1V6_REF 1V6_REF - @m38_lib.M38 79B3 1V5REG_PCIE_VCC5 1V5REG_PCIE_VCC5 - @m38_lib.M38 80D7 1V5REG_PCIE_UGATE 1V5REG_PCIE_UGATE - @m38_lib.M38 80D6 DE @m38_lib.M38 1V5REG_PCIE_SWITCHNO 1V5REG_PCIE_SWITCHNODE - 80C5 1V5REG_PCIE_SNUB 1V5REG_PCIE_SNUB - @m38_lib.M38 80C4 1V5REG_PCIE_PVCC5 1V5REG_PCIE_PVCC5 - @m38_lib.M38 80D7 1V5REG_PCIE_LGATE 1V5REG_PCIE_LGATE - @m38_lib.M38 80C6 1V5REG_PCIE_LDO_FB 1V5REG_PCIE_LDO_FB - @m38_lib.M38 80C7 1V5REG_PCIE_LDO_DR 1V5REG_PCIE_LDO_DR - @m38_lib.M38 80C7 1V5REG_PCIE_GND 1V5REG_PCIE_GND - @m38_lib.M38 80B7 1V5REG_PCIE_FS_DIS 1V5REG_PCIE_FS_DIS - @m38_lib.M38 80C7 1V5REG_PCIE_FB_R 1V5REG_PCIE_FB_R - @m38_lib.M38 80C3 1V5REG_PCIE_FB 1V5REG_PCIE_FB - @m38_lib.M38 80C5 1V5REG_PCIE_COMP_R 1V5REG_PCIE_COMP_R - @m38_lib.M38 80C5 1V5REG_PCIE_COMP 1V5REG_PCIE_COMP - @m38_lib.M38 80C6 1V5REG_PCIE_BOOT_R 1V5REG_PCIE_BOOT_R - @m38_lib.M38 80C5 1V5REG_PCIE_BOOT 1V5REG_PCIE_BOOT - @m38_lib.M38 80C6 1V05REG_NB_VCC5 1V05REG_NB_VCC5 - @m38_lib.M38 81D7 1V05REG_NB_UGATE 1V05REG_NB_UGATE - @m38_lib.M38 81D6 E @m38_lib.M38 1V05REG_NB_SWITCHNOD 1V05REG_NB_SWITCHNODE - 81C5 1V05REG_NB_SNUB 1V05REG_NB_SNUB - @m38_lib.M38 81C4 1V05REG_NB_PVCC5 1V05REG_NB_PVCC5 - @m38_lib.M38 81D7 1V05REG_NB_LGATE 1V05REG_NB_LGATE - @m38_lib.M38 81C6 1V05REG_NB_LDO_FB 1V05REG_NB_LDO_FB - @m38_lib.M38 81C7 1V05REG_NB_LDO_DR 1V05REG_NB_LDO_DR - @m38_lib.M38 81C7 1V05REG_NB_GND 1V05REG_NB_GND - @m38_lib.M38 81B7 1V05REG_NB_FS_DIS 1V05REG_NB_FS_DIS - @m38_lib.M38 81C7 1V05REG_NB_FB_R 1V05REG_NB_FB_R - @m38_lib.M38 81C3 1V05REG_NB_FB 1V05REG_NB_FB - @m38_lib.M38 81C5 1V05REG_NB_COMP_R 1V05REG_NB_COMP_R - @m38_lib.M38 81C5 1V05REG_NB_COMP 1V05REG_NB_COMP - @m38_lib.M38 81C6 1V05REG_NB_BOOT_R 1V05REG_NB_BOOT_R - @m38_lib.M38 81C5 1V05REG_NB_BOOT 1V05REG_NB_BOOT - @m38_lib.M38 81C6 1V3_REF 1V3_REF - @m38_lib.M38 80B3 1V2REG_VFB_DIV 1V2REG_VFB_DIV - @m38_lib.M38 77A5 1V2REG_VFB 1V2REG_VFB - @m38_lib.M38 77B5 1V2REG_SW 1V2REG_SW - @m38_lib.M38 77B4 1V2REG_SGND 1V2REG_SGND - @m38_lib.M38 77A7 1V2REG_RUNSS 1V2REG_RUNSS - @m38_lib.M38 77B5 1V2REG_RT 1V2REG_RT - @m38_lib.M38 77B5 1V2REG_PGOOD 1V2REG_PGOOD - @m38_lib.M38 77B4 1V2REG_MODE 1V2REG_MODE - @m38_lib.M38 77B5 1V2REG_ITH_RC 1V2REG_ITH_RC - @m38_lib.M38 77B6 1V2REG_ITH 1V2REG_ITH - @m38_lib.M38 77B5 1V0_REF 1V0_REF - @m38_lib.M38 79A5 80A5 81A5 81B3 0V7_REF 0V7_REF - @m38_lib.M38 79A3
Base Signal Synonyms Location([Zone][dir]) Base nets and synonyms for m38_lib.M38(@m38_lib.m38(sch_1))
Date: Dec 8 15:02:55 2005 Design: m38 Title: Basenet Report
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www.vinafix.vn
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8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
FB_B_DQ<25> FB_B_DQ<25> - @m38_lib.M38 87C3 90A6 FB_B_DQ<24> FB_B_DQ<24> - @m38_lib.M38 5A5 5C6 87C3 90A6 FB_B_DQ<23> FB_B_DQ<23> - @m38_lib.M38 87C3 90A6 FB_B_DQ<22> FB_B_DQ<22> - @m38_lib.M38 87C3 90A6 FB_B_DQ<21> FB_B_DQ<21> - @m38_lib.M38 87C3 90A6 FB_B_DQ<20> FB_B_DQ<20> - @m38_lib.M38 87C3 90A6 FB_B_DQ<19> FB_B_DQ<19> - @m38_lib.M38 87C3 90A6 FB_B_DQ<18> FB_B_DQ<18> - @m38_lib.M38 87C3 90A6 FB_B_DQ<17> FB_B_DQ<17> - @m38_lib.M38 87D3 90A6 FB_B_DQ<16> FB_B_DQ<16> - @m38_lib.M38 5A5 5D6 87D3 90A6 FB_B_DQ<15> FB_B_DQ<15> - @m38_lib.M38 87D3 90A6 FB_B_DQ<14> FB_B_DQ<14> - @m38_lib.M38 87D3 90A6 FB_B_DQ<13> FB_B_DQ<13> - @m38_lib.M38 87D3 90A6 FB_B_DQ<12> FB_B_DQ<12> - @m38_lib.M38 87D3 90A6 FB_B_DQ<11> FB_B_DQ<11> - @m38_lib.M38 87D3 90A6 FB_B_DQ<10> FB_B_DQ<10> - @m38_lib.M38 87D3 90A6 FB_B_DQ<9> FB_B_DQ<9> - @m38_lib.M38 87D3 90A6 FB_B_DQ<8> FB_B_DQ<8> - @m38_lib.M38 5A5 5D6 87D3 90A6 FB_B_DQ<7> FB_B_DQ<7> - @m38_lib.M38 87D3 90B6 FB_B_DQ<6> FB_B_DQ<6> - @m38_lib.M38 87D3 90B6 FB_B_DQ<5> FB_B_DQ<5> - @m38_lib.M38 87D3 90B6 FB_B_DQ<4> FB_B_DQ<4> - @m38_lib.M38 87D3 90B6 FB_B_DQ<3> FB_B_DQ<3> - @m38_lib.M38 87D3 90B6 FB_B_DQ<2> FB_B_DQ<2> - @m38_lib.M38 87D3 90B6 FB_B_DQ<1> FB_B_DQ<1> - @m38_lib.M38 87D3 90B6 FB_B_DQ<0> FB_B_DQ<0> - @m38_lib.M38 5B5 5D6 87D3 90B6 FB_B_CS_L<1> FB_B_CS_L<1> - @m38_lib.M38 5A5 87B1 90B5 FB_B_CS_L<0> FB_B_CS_L<0> - @m38_lib.M38 5B5 87B1 90B8 FB_B_CLK_P<1> FB_B_CLK_P<1> - @m38_lib.M38 5A5 87B1 90B5 FB_B_CLK_P<0> FB_B_CLK_P<0> - @m38_lib.M38 5B5 87B1 90B8 FB_B_CLK_N<1> FB_B_CLK_N<1> - @m38_lib.M38 5A5 87B1 90B5 FB_B_CLK_N<0> FB_B_CLK_N<0> - @m38_lib.M38 5B5 87B1 90B8 FB_B_CKE<1> FB_B_CKE<1> - @m38_lib.M38 5A5 87B1 90B5 FB_B_CKE<0> FB_B_CKE<0> - @m38_lib.M38 5B5 87B1 90B8 FB_B_CAS_L<1> FB_B_CAS_L<1> - @m38_lib.M38 5A5 87B1 90A5 FB_B_CAS_L<0> FB_B_CAS_L<0> - @m38_lib.M38 5B5 87B1 90A8 FB_B_BA<2> FB_B_BA<2> - @m38_lib.M38 87D1 90A5 90A8 FB_B_BA<1> FB_B_BA<1> - @m38_lib.M38 87D1 90A5 90A8 FB_B_BA<0> FB_B_BA<0> - @m38_lib.M38 87D1 90A5 90A8 FB_B1_ZQ FB_B1_ZQ - @m38_lib.M38 90A4 FB_B1_VREF1 FB_B1_VREF1 - @m38_lib.M38 90C4 FB_B1_VREF0 FB_B1_VREF0 - @m38_lib.M38 90C4 FB_B1_SEN FB_B1_SEN - @m38_lib.M38 90A4 FB_B1_MF FB_B1_MF - @m38_lib.M38 90A4 FB_B0_ZQ FB_B0_ZQ - @m38_lib.M38 90A7 FB_B0_VREF1 FB_B0_VREF1 - @m38_lib.M38 90C7 FB_B0_VREF0 FB_B0_VREF0 - @m38_lib.M38 90C7 FB_B0_SEN FB_B0_SEN - @m38_lib.M38 90A7 FB_B0_MF FB_B0_MF - @m38_lib.M38 90A7 FB_A_WE_L<1> FB_A_WE_L<1> - @m38_lib.M38 5A6 87B5 89A5 FB_A_WE_L<0> FB_A_WE_L<0> - @m38_lib.M38 5B6 87B5 89A8 FB_A_WDQS<7> FB_A_WDQS<7> - @m38_lib.M38 5A6 87C5 89A5 FB_A_WDQS<6> FB_A_WDQS<6> - @m38_lib.M38 5A6 87C5 89A5 FB_A_WDQS<5> FB_A_WDQS<5> - @m38_lib.M38 5A6 87C5 89A5 FB_A_WDQS<4> FB_A_WDQS<4> - @m38_lib.M38 5A6 87C5 89A5 FB_A_WDQS<3> FB_A_WDQS<3> - @m38_lib.M38 5B6 87C5 89A8 FB_A_WDQS<2> FB_A_WDQS<2> - @m38_lib.M38 5B6 87C5 89A8 FB_A_WDQS<1> FB_A_WDQS<1> - @m38_lib.M38 5B6 87C5 89A8 FB_A_WDQS<0> FB_A_WDQS<0> - @m38_lib.M38 5B6 87C5 89A8 FB_A_RDQS<7> FB_A_RDQS<7> - @m38_lib.M38 5D6 87C5 89A5 FB_A_RDQS<6> FB_A_RDQS<6> - @m38_lib.M38 5D6 87C5 89A5 FB_A_RDQS<5> FB_A_RDQS<5> - @m38_lib.M38 5D6 87C5 89A5 FB_A_RDQS<4> FB_A_RDQS<4> - @m38_lib.M38 5D6 87C5 89A5 FB_A_RDQS<3> FB_A_RDQS<3> - @m38_lib.M38 5D6 87C5 89A8 FB_A_RDQS<2> FB_A_RDQS<2> - @m38_lib.M38 5D6 87C5 89A8 FB_A_RDQS<1> FB_A_RDQS<1> - @m38_lib.M38 5D6 87C5 89A8 FB_A_RDQS<0> FB_A_RDQS<0> - @m38_lib.M38 5D6 87C5 89A8 FB_A_RAS_L<1> FB_A_RAS_L<1> - @m38_lib.M38 5A6 87B5 89A5 FB_A_RAS_L<0> FB_A_RAS_L<0> - @m38_lib.M38 5B6 87B5 89A8 FB_A_MA<11> FB_A_MA<11> - @m38_lib.M38 87D5 89B5 89B8 FB_A_MA<10> FB_A_MA<10> - @m38_lib.M38 87D5 89B5 89B8 FB_A_MA<9> FB_A_MA<9> - @m38_lib.M38 87D5 89B5 89B8 FB_A_MA<8> FB_A_MA<8> - @m38_lib.M38 87D5 89B5 89B8 FB_A_MA<7> FB_A_MA<7> - @m38_lib.M38 87D5 89B5 89B8 FB_A_MA<6> FB_A_MA<6> - @m38_lib.M38 87D5 89B5 89B8 FB_A_MA<5> FB_A_MA<5> - @m38_lib.M38 87D5 89B5 89B8 FB_A_MA<4> FB_A_MA<4> - @m38_lib.M38 87D5 89B5 89B8 89B8 FB_A_MA<3> FB_A_MA<3> - @m38_lib.M38 5A6 5B6 5D6 87D5 89B5 FB_A_MA<2> FB_A_MA<2> - @m38_lib.M38 87D5 89B5 89B8 FB_A_MA<1> FB_A_MA<1> - @m38_lib.M38 87D5 89B5 89B8 FB_A_MA<0> FB_A_MA<0> - @m38_lib.M38 87D5 89B5 89B8 FB_A_DQM_L<7> FB_A_DQM_L<7> - @m38_lib.M38 87C5 89B3 FB_A_DQM_L<6> FB_A_DQM_L<6> - @m38_lib.M38 87C5 89B3 FB_A_DQM_L<5> FB_A_DQM_L<5> - @m38_lib.M38 87C5 89B3 FB_A_DQM_L<4> FB_A_DQM_L<4> - @m38_lib.M38 87C5 89B3 FB_A_DQM_L<3> FB_A_DQM_L<3> - @m38_lib.M38 87C5 89B6 FB_A_DQM_L<2> FB_A_DQM_L<2> - @m38_lib.M38 87C5 89B6 FB_A_DQM_L<1> FB_A_DQM_L<1> - @m38_lib.M38 87C5 89B6 FB_A_DQM_L<0> FB_A_DQM_L<0> - @m38_lib.M38 87D5 89B6 FB_A_DQ<63> FB_A_DQ<63> - @m38_lib.M38 87B7 89A3 FB_A_DQ<62> FB_A_DQ<62> - @m38_lib.M38 87B7 89A3 FB_A_DQ<61> FB_A_DQ<61> - @m38_lib.M38 87B7 89B3 FB_A_DQ<60> FB_A_DQ<60> - @m38_lib.M38 87B7 89B3 FB_A_DQ<59> FB_A_DQ<59> - @m38_lib.M38 87B7 89B3 FB_A_DQ<58> FB_A_DQ<58> - @m38_lib.M38 87B7 89B3 FB_A_DQ<57> FB_A_DQ<57> - @m38_lib.M38 87B7 89A3 FB_A_DQ<56> FB_A_DQ<56> - @m38_lib.M38 5A6 5D6 87B7 89A2 FB_A_DQ<55> FB_A_DQ<55> - @m38_lib.M38 87B7 89A3 FB_A_DQ<54> FB_A_DQ<54> - @m38_lib.M38 87B7 89A3 FB_A_DQ<53> FB_A_DQ<53> - @m38_lib.M38 87B7 89A3 FB_A_DQ<52> FB_A_DQ<52> - @m38_lib.M38 87B7 89A3 FB_A_DQ<51> FB_A_DQ<51> - @m38_lib.M38 87B7 89A3 FB_A_DQ<50> FB_A_DQ<50> - @m38_lib.M38 87B7 89A3 FB_A_DQ<49> FB_A_DQ<49> - @m38_lib.M38 87B7 89A3 FB_A_DQ<48> FB_A_DQ<48> - @m38_lib.M38 5A6 5D6 87B7 89A2 FB_A_DQ<47> FB_A_DQ<47> - @m38_lib.M38 87B7 89A3 FB_A_DQ<46> FB_A_DQ<46> - @m38_lib.M38 87B7 89A3 FB_A_DQ<45> FB_A_DQ<45> - @m38_lib.M38 87B7 89A3 FB_A_DQ<44> FB_A_DQ<44> - @m38_lib.M38 87B7 89A3 FB_A_DQ<43> FB_A_DQ<43> - @m38_lib.M38 87C7 89A3 FB_A_DQ<42> FB_A_DQ<42> - @m38_lib.M38 87C7 89A3 FB_A_DQ<41> FB_A_DQ<41> - @m38_lib.M38 87C7 89A3 FB_A_DQ<40> FB_A_DQ<40> - @m38_lib.M38 5A6 5D6 87C7 89A2 FB_A_DQ<39> FB_A_DQ<39> - @m38_lib.M38 87C7 89B3 FB_A_DQ<38> FB_A_DQ<38> - @m38_lib.M38 87C7 89B3 FB_A_DQ<37> FB_A_DQ<37> - @m38_lib.M38 87C7 89B3 FB_A_DQ<36> FB_A_DQ<36> - @m38_lib.M38 87C7 89B3 FB_A_DQ<35> FB_A_DQ<35> - @m38_lib.M38 87C7 89B3 FB_A_DQ<34> FB_A_DQ<34> - @m38_lib.M38 87C7 89B3 FB_A_DQ<33> FB_A_DQ<33> - @m38_lib.M38 87C7 89B3 FB_A_DQ<32> FB_A_DQ<32> - @m38_lib.M38 5A6 5D6 87C7 89B2 FB_A_DQ<31> FB_A_DQ<31> - @m38_lib.M38 87C7 89A6 FB_A_DQ<30> FB_A_DQ<30> - @m38_lib.M38 87C7 89B6
FB_A_DQ<29> FB_A_DQ<29> - @m38_lib.M38 87C7 89B6 FB_A_DQ<28> FB_A_DQ<28> - @m38_lib.M38 87C7 89B6 FB_A_DQ<27> FB_A_DQ<27> - @m38_lib.M38 87C7 89B6 FB_A_DQ<26> FB_A_DQ<26> - @m38_lib.M38 87C7 89A6 FB_A_DQ<25> FB_A_DQ<25> - @m38_lib.M38 87C7 89A6 FB_A_DQ<24> FB_A_DQ<24> - @m38_lib.M38 5A6 5D6 87C7 89A6 FB_A_DQ<23> FB_A_DQ<23> - @m38_lib.M38 87C7 89A6 FB_A_DQ<22> FB_A_DQ<22> - @m38_lib.M38 87C7 89A6 FB_A_DQ<21> FB_A_DQ<21> - @m38_lib.M38 87C7 89A6 FB_A_DQ<20> FB_A_DQ<20> - @m38_lib.M38 87C7 89A6 FB_A_DQ<19> FB_A_DQ<19> - @m38_lib.M38 87C7 89A6 FB_A_DQ<18> FB_A_DQ<18> - @m38_lib.M38 87C7 89A6 FB_A_DQ<17> FB_A_DQ<17> - @m38_lib.M38 87D7 89A6 FB_A_DQ<16> FB_A_DQ<16> - @m38_lib.M38 5A6 5D6 87D7 89A6 FB_A_DQ<15> FB_A_DQ<15> - @m38_lib.M38 87D7 89A6 FB_A_DQ<14> FB_A_DQ<14> - @m38_lib.M38 87D7 89A6 FB_A_DQ<13> FB_A_DQ<13> - @m38_lib.M38 87D7 89A6 FB_A_DQ<12> FB_A_DQ<12> - @m38_lib.M38 87D7 89A6 FB_A_DQ<11> FB_A_DQ<11> - @m38_lib.M38 87D7 89A6 FB_A_DQ<10> FB_A_DQ<10> - @m38_lib.M38 87D7 89A6 FB_A_DQ<9> FB_A_DQ<9> - @m38_lib.M38 87D7 89A6 FB_A_DQ<8> FB_A_DQ<8> - @m38_lib.M38 5A6 5D6 87D7 89A6 FB_A_DQ<7> FB_A_DQ<7> - @m38_lib.M38 87D7 89B6 FB_A_DQ<6> FB_A_DQ<6> - @m38_lib.M38 87D7 89B6 FB_A_DQ<5> FB_A_DQ<5> - @m38_lib.M38 87D7 89B6 FB_A_DQ<4> FB_A_DQ<4> - @m38_lib.M38 87D7 89B6 FB_A_DQ<3> FB_A_DQ<3> - @m38_lib.M38 87D7 89B6 FB_A_DQ<2> FB_A_DQ<2> - @m38_lib.M38 87D7 89B6 FB_A_DQ<1> FB_A_DQ<1> - @m38_lib.M38 87D7 89B6 FB_A_DQ<0> FB_A_DQ<0> - @m38_lib.M38 5B6 5D6 87D7 89B6 FB_A_CS_L<1> FB_A_CS_L<1> - @m38_lib.M38 5A6 87B5 89B5 FB_A_CS_L<0> FB_A_CS_L<0> - @m38_lib.M38 5B6 87B5 89B8 FB_A_CLK_P<1> FB_A_CLK_P<1> - @m38_lib.M38 5A6 87B5 89B5 FB_A_CLK_P<0> FB_A_CLK_P<0> - @m38_lib.M38 5B6 87B5 89B8 FB_A_CLK_N<1> FB_A_CLK_N<1> - @m38_lib.M38 5A6 87B5 89B5 FB_A_CLK_N<0> FB_A_CLK_N<0> - @m38_lib.M38 5B6 87B5 89B8 FB_A_CKE<1> FB_A_CKE<1> - @m38_lib.M38 5A6 87B5 89B5 FB_A_CKE<0> FB_A_CKE<0> - @m38_lib.M38 5B6 87B5 89B8 FB_A_CAS_L<1> FB_A_CAS_L<1> - @m38_lib.M38 5A6 87B5 89A5 FB_A_CAS_L<0> FB_A_CAS_L<0> - @m38_lib.M38 5B6 87B5 89A8 FB_A_BA<2> FB_A_BA<2> - @m38_lib.M38 87D5 89A5 89A8 FB_A_BA<1> FB_A_BA<1> - @m38_lib.M38 87D5 89A5 89A8 FB_A_BA<0> FB_A_BA<0> - @m38_lib.M38 87D5 89A5 89A8 FB_A1_ZQ FB_A1_ZQ - @m38_lib.M38 89A4 FB_A1_VREF1 FB_A1_VREF1 - @m38_lib.M38 89C4 FB_A1_VREF0 FB_A1_VREF0 - @m38_lib.M38 89C4 FB_A1_SEN FB_A1_SEN - @m38_lib.M38 89A4 FB_A1_MF FB_A1_MF - @m38_lib.M38 89A4 FB_A0_ZQ FB_A0_ZQ - @m38_lib.M38 89A7 FB_A0_VREF1 FB_A0_VREF1 - @m38_lib.M38 89C7 FB_A0_VREF0 FB_A0_VREF0 - @m38_lib.M38 89C7 FB_A0_SEN FB_A0_SEN - @m38_lib.M38 89A7 FB_A0_MF FB_A0_MF - @m38_lib.M38 89A7 FAN_TACH2 FAN_TACH2 - @m38_lib.M38 66C7 FAN_TACH1 FAN_TACH1 - @m38_lib.M38 65A7 FAN_TACH0 FAN_TACH0 - @m38_lib.M38 65C7 FAN_2_PWR FAN_2_PWR - @m38_lib.M38 66C3 FAN_2_OUT FAN_2_OUT - @m38_lib.M38 66C4 FAN_RPM2 - @m38_lib.M38 66C7 FAN_2_CTL FAN_2_CTL - @m38_lib.M38 66D7 FAN_1_PWR FAN_1_PWR - @m38_lib.M38 65B3 FAN_1_OUT FAN_1_OUT - @m38_lib.M38 65B4 FAN_RPM1 - @m38_lib.M38 65B7 FAN_1_CTL FAN_1_CTL - @m38_lib.M38 65B7 FAN_0_PWR FAN_0_PWR - @m38_lib.M38 65C4 FAN_0_OUT FAN_0_OUT - @m38_lib.M38 65C4 F2_VOLTAGE8R5 F2_VOLTAGE8R5 - @m38_lib.M38 66D5 F2_RCFEEDBK F2_RCFEEDBK - @m38_lib.M38 66C5 F2_GATESLOWDN F2_GATESLOWDN - @m38_lib.M38 66D4 F1_VOLTAGE8R5 F1_VOLTAGE8R5 - @m38_lib.M38 65B6 F1_RCFEEDBK F1_RCFEEDBK - @m38_lib.M38 65B5 F1_GATESLOWDN F1_GATESLOWDN - @m38_lib.M38 65B5 F0_VOLTAGE8R5 F0_VOLTAGE8R5 - @m38_lib.M38 65D6 F0_RCFEEDBK F0_RCFEEDBK - @m38_lib.M38 65C5 F0_GATESLOWDN F0_GATESLOWDN - @m38_lib.M38 65D5 ENET_XTALO ENET_XTALO - @m38_lib.M38 41B5 ENET_XTALI ENET_XTALI - @m38_lib.M38 41B5 ENET_VPD_DATA ENET_VPD_DATA - @m38_lib.M38 41A2 41C4 ENET_VPD_CLK ENET_VPD_CLK - @m38_lib.M38 41A2 41C4 ENET_RST_L ENET_RST_L - @m38_lib.M38 6B7 42D3 ENET_RSET ENET_RSET - @m38_lib.M38 41C7 ENET_PU_VDDO_TTL1 ENET_PU_VDDO_TTL1 - @m38_lib.M38 41C5 ENET_PU_VDDO_TTL0 ENET_PU_VDDO_TTL0 - @m38_lib.M38 41C5 ENET_MDI_R_P<3> ENET_MDI_R_P<3> - @m38_lib.M38 43C6 ENET_MDI_R_P<2> ENET_MDI_R_P<2> - @m38_lib.M38 43C6 ENET_MDI_R_P<1> ENET_MDI_R_P<1> - @m38_lib.M38 43C6 ENET_MDI_R_P<0> ENET_MDI_R_P<0> - @m38_lib.M38 43C6 ENET_MDI_R_N<3> ENET_MDI_R_N<3> - @m38_lib.M38 43B6 ENET_MDI_R_N<2> ENET_MDI_R_N<2> - @m38_lib.M38 43C6 ENET_MDI_R_N<1> ENET_MDI_R_N<1> - @m38_lib.M38 43C6 ENET_MDI_R_N<0> ENET_MDI_R_N<0> - @m38_lib.M38 43C6 ENET_MDI_P<3> ENET_MDI_P<3> - @m38_lib.M38 41C2 43C7 ENET_MDI_P<2> ENET_MDI_P<2> - @m38_lib.M38 41C2 43C7 ENET_MDI_P<1> ENET_MDI_P<1> - @m38_lib.M38 41C2 43C7 ENET_MDI_P<0> ENET_MDI_P<0> - @m38_lib.M38 41C2 43C7 ENET_MDI_N<3> ENET_MDI_N<3> - @m38_lib.M38 41C2 43B7 ENET_MDI_N<2> ENET_MDI_N<2> - @m38_lib.M38 41C2 43C7 ENET_MDI_N<1> ENET_MDI_N<1> - @m38_lib.M38 41C2 43C7 ENET_MDI_N<0> ENET_MDI_N<0> - @m38_lib.M38 41C2 43C7 ENET_LOM_DIS_L ENET_LOM_DIS_L - @m38_lib.M38 41C7 ENET_LED_LINK_L ENET_LED_LINK_L - @m38_lib.M38 41C8 43C3 ENET_LED_LINK1000_L ENET_LED_LINK1000_L - @m38_lib.M38 41C8 43C3 L @m38_lib.M38 ENET_LED_LINK10_100_ ENET_LED_LINK10_100_L - 41C8 43C3 ENET_LED_ACT_L ENET_LED_ACT_L - @m38_lib.M38 41C8 43C3 ENET_GATED_RST_L ENET_GATED_RST_L - @m38_lib.M38 41C5 42D2 ENET_CTRL25 ENET_CTRL25 - @m38_lib.M38 41C7 42C6 TP_ENET_CTRL12 - @m38_lib.M38 42B7 ENET_CTRL12 ENET_CTRL12 - @m38_lib.M38 41C7 42B8 ENET_CLK100M_PCIE_P ENET_CLK100M_PCIE_P - @m38_lib.M38 5D5 34A4 34B2 41C5 ENET_CLK100M_PCIE_N ENET_CLK100M_PCIE_N - @m38_lib.M38 5D5 34A4 34B2 41C5 ENET_C4118_1 ENET_C4118_1 - @m38_lib.M38 41B2 ENET_C4117_1 ENET_C4117_1 - @m38_lib.M38 41B2 ENET_C4107_2 ENET_C4107_2 - @m38_lib.M38 41D2 ENET_C4106_2 ENET_C4106_2 - @m38_lib.M38 41D2 DVI_HPD_UF DVI_HPD_UF - @m38_lib.M38 97C3 97D5 DVI_DDC_DATA_UF DVI_DDC_DATA_UF - @m38_lib.M38 97C3 97D5 DVI_DDC_DATA DVI_DDC_DATA - @m38_lib.M38 97C2 DVI_DDC_CLK_UF DVI_DDC_CLK_UF - @m38_lib.M38 97D3 97D5 DVI_DDC_CLK DVI_DDC_CLK - @m38_lib.M38 97D2 DMI_S2N_P<3> DMI_S2N_P<3> - @m38_lib.M38 14B4 22D2 DMI_S2N_P<2> DMI_S2N_P<2> - @m38_lib.M38 14B4 22D2 DMI_S2N_P<1> DMI_S2N_P<1> - @m38_lib.M38 14B4 22D2 DMI_S2N_P<0> DMI_S2N_P<0> - @m38_lib.M38 5C7 14B4 22D2
DMI_S2N_N<3> DMI_S2N_N<3> - @m38_lib.M38 14B4 22D2 DMI_S2N_N<2> DMI_S2N_N<2> - @m38_lib.M38 14B4 22D2 DMI_S2N_N<1> DMI_S2N_N<1> - @m38_lib.M38 14B4 22D2 DMI_S2N_N<0> DMI_S2N_N<0> - @m38_lib.M38 5C7 14B4 22D2 DMI_N2S_P<3> DMI_N2S_P<3> - @m38_lib.M38 14B4 22D2 DMI_N2S_P<2> DMI_N2S_P<2> - @m38_lib.M38 14B4 22D2 DMI_N2S_P<1> DMI_N2S_P<1> - @m38_lib.M38 14B4 22D2 DMI_N2S_P<0> DMI_N2S_P<0> - @m38_lib.M38 5B8 14B4 22D2 DMI_N2S_N<3> DMI_N2S_N<3> - @m38_lib.M38 14B4 22D2 DMI_N2S_N<2> DMI_N2S_N<2> - @m38_lib.M38 14B4 22D2 DMI_N2S_N<1> DMI_N2S_N<1> - @m38_lib.M38 14B4 22D2 DMI_N2S_N<0> DMI_N2S_N<0> - @m38_lib.M38 5B8 14B4 22D2 DMI_IRCOMP_R DMI_IRCOMP_R - @m38_lib.M38 22C2 DEBUG_RST_L DEBUG_RST_L - @m38_lib.M38 6A7 60B6 TP_CRT_DDC_DATA - @m38_lib.M38 19C5 CRT_DDC_DATA CRT_DDC_DATA - @m38_lib.M38 13B5 19C4 TP_CRT_DDC_CLK - @m38_lib.M38 19C5 CRT_DDC_CLK CRT_DDC_CLK - @m38_lib.M38 13B5 19C4 59A1 59A3 8C7 9C8 9C8 11B3 11C5 =PP1V05_S0_CPU - @m38_lib.M38 5D4 6D4 7B5 7B7 7D5 7D5 19D7 =PP1V05_S0_FSB_NB - @m38_lib.M38 5D4 6D4 12A7 12B7 12C2 =PP1V05_S0_NB - @m38_lib.M38 6D4 19D7 =PP1V05_S0_NB_VTT - @m38_lib.M38 6D4 17D3 19B8 19D7 =PP1V05_S0_SB_CPU_IO - @m38_lib.M38 6D4 21C1 21C1 24C3 25C3 19D7 =PPVCORE_S0_NB - @m38_lib.M38 6D4 16C8 16D3 19B6 19D5 =PPVCORE_S0_SB - @m38_lib.M38 6D4 24D3 25D3 CRT_BLUE_L - @m38_lib.M38 13B5 19D4 CRT_GREEN - @m38_lib.M38 13B5 19D4 CRT_GREEN_L - @m38_lib.M38 13B5 19D4 CRT_IREF - @m38_lib.M38 13B5 19D4 CRT_RED - @m38_lib.M38 13B5 19D4 CRT_RED_L - @m38_lib.M38 13B5 19D4 PP1V05_S0 - @m38_lib.M38 6D6 34A8 34B8 34C7 81C2 @m38_lib.M38 PP2V5_S0_NB_VCCA_CRTDAC - 17D6 19D4 19D7 =PP1V05_S0_FSB_NB - @m38_lib.M38 5D4 6D4 12A7 12B7 12C2 =PP1V05_S0_NB_VTT - @m38_lib.M38 6D4 17D3 19B8 19D7 =PP1V05_S0_SB_CPU_IO - @m38_lib.M38 6D4 21C1 21C1 24C3 25C3 =PPVCORE_S0_SB - @m38_lib.M38 6D4 24D3 25D3 59A1 59A3 8C7 9C8 9C8 11B3 11C5 =PP1V05_S0_CPU - @m38_lib.M38 5D4 6D4 7B5 7B7 7D5 7D5 PP1V05_S0 - @m38_lib.M38 6D6 34A8 34B8 34C7 81C2 CRT_RED_L - @m38_lib.M38 13B5 19D4 CRT_RED - @m38_lib.M38 13B5 19D4 @m38_lib.M38 PP2V5_S0_NB_VCCA_CRTDAC - 17D6 19D4 CRT_GREEN - @m38_lib.M38 13B5 19D4 CRT_GREEN_L - @m38_lib.M38 13B5 19D4 CRT_IREF - @m38_lib.M38 13B5 19D4 CRT_BLUE_L - @m38_lib.M38 13B5 19D4 19D7 =PPVCORE_S0_NB - @m38_lib.M38 6D4 16C8 16D3 19B6 19D5 CRT_BLUE CRT_BLUE - @m38_lib.M38 13B5 19D4 CRB_SV_DET CRB_SV_DET - @m38_lib.M38 23B6 23C3 FSB_CLK_XDP_P - @m38_lib.M38 34B4 34C2 CPU_XDP_CLK_P CPU_XDP_CLK_P - @m38_lib.M38 11B3 34B3 FSB_CLK_XDP_N - @m38_lib.M38 34B4 34C2 CPU_XDP_CLK_N CPU_XDP_CLK_N - @m38_lib.M38 11B3 34B3 CPU_VID<6> CPU_VID<6> - @m38_lib.M38 8B7 75D7 CPU_VID<5> CPU_VID<5> - @m38_lib.M38 8B7 75C7 CPU_VID<4> CPU_VID<4> - @m38_lib.M38 8B7 75C7 CPU_VID<3> CPU_VID<3> - @m38_lib.M38 8B7 75C7 CPU_VID<2> CPU_VID<2> - @m38_lib.M38 8B7 75C7 CPU_VID<1> CPU_VID<1> - @m38_lib.M38 8B7 75C7 CPU_VID<0> CPU_VID<0> - @m38_lib.M38 8B7 75C7 CPU_VCCSENSE_P CPU_VCCSENSE_P - @m38_lib.M38 8B6 75A4 CPU_VCCSENSE_N CPU_VCCSENSE_N - @m38_lib.M38 8B6 75A4 CPU_THERMTRIP_R CPU_THERMTRIP_R - @m38_lib.M38 21C2 CPU_THERMD_P CPU_THERMD_P - @m38_lib.M38 7C6 10C6 CPU_THERMD_N CPU_THERMD_N - @m38_lib.M38 7C6 10C6 CPU_THERMD_EXT_P CPU_THERMD_EXT_P - @m38_lib.M38 10B6 CPU_THERMD_EXT_N CPU_THERMD_EXT_N - @m38_lib.M38 10B6 CPU_TEST2 CPU_TEST2 - @m38_lib.M38 7B4 CPU_TEST1 CPU_TEST1 - @m38_lib.M38 7B4 CPU_STPCLK_L CPU_STPCLK_L - @m38_lib.M38 5C8 7C7 21C4 CPU_SMI_L CPU_SMI_L - @m38_lib.M38 5C8 7C7 21C4 CPU_SENSE_I_R CPU_SENSE_I_R - @m38_lib.M38 76D7 CPU_RCIN_L CPU_RCIN_L - @m38_lib.M38 21C4 CPU_PWRGD CPU_PWRGD - @m38_lib.M38 7B3 21C4 CPU_PSI_L CPU_PSI_L - @m38_lib.M38 7A3 75C6 CPU_PROCHOT_L CPU_PROCHOT_L - @m38_lib.M38 7C6 59A8 59C7 CPU_NMI CPU_NMI - @m38_lib.M38 5C8 7C7 21C4 CPU_ISENSE_R_POS CPU_ISENSE_R_POS - @m38_lib.M38 76D4 CPU_ISENSE_R_NEG CPU_ISENSE_R_NEG - @m38_lib.M38 76D4 CPU_ISENSE_OUT_R CPU_ISENSE_OUT_R - @m38_lib.M38 76D3 CPU_INTR CPU_INTR - @m38_lib.M38 5C8 7C7 21C4 CPU_INIT_L CPU_INIT_L - @m38_lib.M38 5C8 7D6 21C4 CPU_IGNNE_L CPU_IGNNE_L - @m38_lib.M38 5C8 7C7 21C4 CPU_HS_ZH610 CPU_HS_ZH610 - @m38_lib.M38 9D2 CPU_HS_ZH609 CPU_HS_ZH609 - @m38_lib.M38 9D3 CPU_HS_ZH608 CPU_HS_ZH608 - @m38_lib.M38 9D3 66A4 66A6 66B4 66B6 CPU_HS_ZH607 CPU_HS_ZH607 - @m38_lib.M38 9D4 CPU_GTLREF CPU_GTLREF - @m38_lib.M38 5D4 7B4 CPU_FERR_L CPU_FERR_L - @m38_lib.M38 7C7 21C2 CPU_DPSLP_L CPU_DPSLP_L - @m38_lib.M38 7B3 21C4 CPU_DPRSTP_L CPU_DPRSTP_L - @m38_lib.M38 7B3 21C4 75C6 CPU_DCIN_SENSE CPU_DCIN_SENSE - @m38_lib.M38 76D7 CPU_COMP<3> CPU_COMP<3> - @m38_lib.M38 7B2 CPU_COMP<2> CPU_COMP<2> - @m38_lib.M38 7B2 CPU_COMP<1> CPU_COMP<1> - @m38_lib.M38 7B2 CPU_COMP<0> CPU_COMP<0> - @m38_lib.M38 7B2 CPU_BSEL<2> CPU_BSEL<2> - @m38_lib.M38 7B4 34A8 CPU_BSEL<1> CPU_BSEL<1> - @m38_lib.M38 7B4 34A8 CPU_BSEL<0> CPU_BSEL<0> - @m38_lib.M38 7B4 34B8 CPU_A20M_L CPU_A20M_L - @m38_lib.M38 5C8 7C7 21C4 CPUVCORE_ISENSE_CAL CPUVCORE_ISENSE_CAL - @m38_lib.M38 76A5 CLK_NB_OE_L CLK_NB_OE_L - @m38_lib.M38 14B6 33B4 CK410_XTAL_OUT CK410_XTAL_OUT - @m38_lib.M38 33C6 CK410_XTAL_IN CK410_XTAL_IN - @m38_lib.M38 33C6 CK410_USB48_FSA CK410_USB48_FSA - @m38_lib.M38 33A4 34C6 CK410_SRC_CLKREQ8_L CK410_SRC_CLKREQ8_L - @m38_lib.M38 33A4 34D8 CK410_SRC_CLKREQ6_L CK410_SRC_CLKREQ6_L - @m38_lib.M38 33B4 53C6 CK410_SRC_CLKREQ3_L CK410_SRC_CLKREQ3_L - @m38_lib.M38 33B4 34D8 CK410_SRC_CLKREQ1_L CK410_SRC_CLKREQ1_L - @m38_lib.M38 33B4 34D8 CK410_SRC8_P CK410_SRC8_P - @m38_lib.M38 33A4 34A6 CK410_SRC8_N CK410_SRC8_N - @m38_lib.M38 33A4 34A6 CK410_SRC7_P CK410_SRC7_P - @m38_lib.M38 33B4 34D3 CK410_SRC7_N CK410_SRC7_N - @m38_lib.M38 33B4 34D3 CK410_SRC6_P CK410_SRC6_P - @m38_lib.M38 33B4 34B6
CK410_SRC6_N CK410_SRC6_N - @m38_lib.M38 33B4 34B6 CK410_SRC5_P CK410_SRC5_P - @m38_lib.M38 33B4 34B6 CK410_SRC5_N CK410_SRC5_N - @m38_lib.M38 33B4 34B6 CK410_SRC4_P CK410_SRC4_P - @m38_lib.M38 33B4 34B6 CK410_SRC4_N CK410_SRC4_N - @m38_lib.M38 33B4 34B6 CK410_SRC3_P CK410_SRC3_P - @m38_lib.M38 33B4 34D3 CK410_SRC3_N CK410_SRC3_N - @m38_lib.M38 33B4 34D3 CK410_SRC2_P CK410_SRC2_P - @m38_lib.M38 33B4 34A6 CK410_SRC2_N CK410_SRC2_N - @m38_lib.M38 33B4 34A6 CK410_SRC1_P CK410_SRC1_P - @m38_lib.M38 33B4 34A6 CK410_SRC1_N CK410_SRC1_N - @m38_lib.M38 33B4 34A6 CK410_REF1_FCTSEL0 CK410_REF1_FCTSEL0 - @m38_lib.M38 33A4 34C6 VR_PWRGD_CK410_L - @m38_lib.M38 26A7 75C6 CK410_PD_VTT_PWRGD_L CK410_PD_VTT_PWRGD_L - @m38_lib.M38 26A8 33A4 CK410_PCIF1_ITP_EN CK410_PCIF1_ITP_EN - @m38_lib.M38 33B8 34B6 CK410_PCIF0_CLK CK410_PCIF0_CLK - @m38_lib.M38 33B8 34B6 CK410_PCI5_FCTSEL1 CK410_PCI5_FCTSEL1 - @m38_lib.M38 33B6 34D6 CK410_PCI4_CLK CK410_PCI4_CLK - @m38_lib.M38 33B6 34C6 CK410_PCI3_CLK CK410_PCI3_CLK - @m38_lib.M38 33B6 34C6 CK410_PCI2_CLK CK410_PCI2_CLK - @m38_lib.M38 33B6 34C6 CK410_PCI1_CLK CK410_PCI1_CLK - @m38_lib.M38 33B6 34C6 TP_CK410_LVDS_P - @m38_lib.M38 34A4 CK410_LVDS_P CK410_LVDS_P - @m38_lib.M38 33B4 34A6 TP_CK410_LVDS_N - @m38_lib.M38 34A4 CK410_LVDS_N CK410_LVDS_N - @m38_lib.M38 33B4 34A6 CK410_IREF CK410_IREF - @m38_lib.M38 33B6 CK410_FSC CK410_FSC - @m38_lib.M38 34A8 34D4 CK410_FSB_TEST_MODE CK410_FSB_TEST_MODE - @m38_lib.M38 33C6 34A8 CK410_FSA CK410_FSA - @m38_lib.M38 34B8 34C4 AD_N @m38_lib.M38 CK410_DOT96_27M_SPRE CK410_DOT96_27M_SPREAD_N - 33A4 34A6 PREAD_P @m38_lib.M38 CK410_DOT96_27M_NONS CK410_DOT96_27M_NONSPREAD_P - 33A4 34A6 _P @m38_lib.M38 CK410_CPU2_ITP_SRC10 CK410_CPU2_ITP_SRC10_P - 33C4 34B6 _N @m38_lib.M38 CK410_CPU2_ITP_SRC10 CK410_CPU2_ITP_SRC10_N - 33C4 34B6 CK410_CPU1_P CK410_CPU1_P - @m38_lib.M38 33C4 34B6 CK410_CPU1_N CK410_CPU1_N - @m38_lib.M38 33C4 34B6 CK410_CPU0_P CK410_CPU0_P - @m38_lib.M38 33C4 34B6 CK410_CPU0_N CK410_CPU0_N - @m38_lib.M38 33C4 34B6 CK410_CLK14P3M_TIMER CK410_CLK14P3M_TIMER - @m38_lib.M38 33A4 34D6 GPU_GPIO_16 - @m38_lib.M38 91C3 92C3 CK410_27M_SPREAD CK410_27M_SPREAD - @m38_lib.M38 34A4 92C5 CK410_27M_NONSPREAD CK410_27M_NONSPREAD - @m38_lib.M38 34A4 92C7 CEN CEN - @m38_lib.M38 68B5 74B6 C8509_P1 C8509_P1 - @m38_lib.M38 85C5 BOOT_LPC_SPI_L BOOT_LPC_SPI_L - @m38_lib.M38 22B3 58C7 60C6 BIOS_REC BIOS_REC - @m38_lib.M38 23A6 23C5 BEEP BEEP - @m38_lib.M38 68C6 BAT_2 BAT_2 - @m38_lib.M38 26C8 BAT_1 BAT_1 - @m38_lib.M38 26C8 BAL_IN_R BAL_IN_R - @m38_lib.M38 68C7 74A7 BAL_IN_L BAL_IN_L - @m38_lib.M38 68C7 74A7 BAL_IN_COM BAL_IN_COM - @m38_lib.M38 68C7 74A7 AUD_VREF_PORT_B AUD_VREF_PORT_B - @m38_lib.M38 68C1 74A3 AUD_VREF_FILT AUD_VREF_FILT - @m38_lib.M38 68C4 AUD_TYPE_DET_EN AUD_TYPE_DET_EN - @m38_lib.M38 74B3 AUD_SPKR_OUTR_P AUD_SPKR_OUTR_P - @m38_lib.M38 72C1 73D3 AUD_SPKR_OUTR_N AUD_SPKR_OUTR_N - @m38_lib.M38 72C1 73D3 AUD_SPKR_OUTL_P AUD_SPKR_OUTL_P - @m38_lib.M38 72C1 73D3 AUD_SPKR_OUTL_N AUD_SPKR_OUTL_N - @m38_lib.M38 72C1 73D3 AUD_SPDIF_OUT_JACK AUD_SPDIF_OUT_JACK - @m38_lib.M38 73B5 AUD_SPDIF_OUT_EMI AUD_SPDIF_OUT_EMI - @m38_lib.M38 73B7 AUD_SPDIF_OUT_CHIP AUD_SPDIF_OUT_CHIP - @m38_lib.M38 68D4 AUD_SPDIF_OUT AUD_SPDIF_OUT - @m38_lib.M38 68D1 73B8 AUD_SPDIF_IN AUD_SPDIF_IN - @m38_lib.M38 68C1 74B6 AUD_SPDIF_GND AUD_SPDIF_GND - @m38_lib.M38 73A3 AUD_SENSE_B AUD_SENSE_B - @m38_lib.M38 68C1 74C5 74D5 74D7 AUD_SENSE_A AUD_SENSE_A - @m38_lib.M38 68C1 74C5 74D7 AUD_SAMP_SHDN_L AUD_SAMP_SHDN_L - @m38_lib.M38 72C5 AUD_SAMP_INR_P AUD_SAMP_INR_P - @m38_lib.M38 72C5 AUD_SAMP_INR_N AUD_SAMP_INR_N - @m38_lib.M38 72C5 AUD_SAMP_INL_P AUD_SAMP_INL_P - @m38_lib.M38 72C5 AUD_SAMP_INL_N AUD_SAMP_INL_N - @m38_lib.M38 72C5 AUD_SAMP_G2 AUD_SAMP_G2 - @m38_lib.M38 72A6 72C5 AUD_SAMP_G1 AUD_SAMP_G1 - @m38_lib.M38 72A6 72C5 AUD_SAMP_FS2 AUD_SAMP_FS2 - @m38_lib.M38 72A6 72C5 AUD_SAMP_FS1 AUD_SAMP_FS1 - @m38_lib.M38 72A6 72C5 AUD_PORT_F_R1 AUD_PORT_F_R1 - @m38_lib.M38 74C7 AUD_PORT_F_R AUD_PORT_F_R - @m38_lib.M38 73D4 74C5 AUD_PORT_F_L1 AUD_PORT_F_L1 - @m38_lib.M38 74C7 AUD_PORT_F_L AUD_PORT_F_L - @m38_lib.M38 73D4 74C5 AUD_PORT_E_DET_L AUD_PORT_E_DET_L - @m38_lib.M38 74B1 AUD_PORT_A_R1 AUD_PORT_A_R1 - @m38_lib.M38 74B7 AUD_PORT_A_R AUD_PORT_A_R - @m38_lib.M38 73A8 74B5 AUD_PORT_A_L1 AUD_PORT_A_L1 - @m38_lib.M38 74B7 AUD_PORT_A_L AUD_PORT_A_L - @m38_lib.M38 73B8 74B5 AUD_PORT_A_DET_L AUD_PORT_A_DET_L - @m38_lib.M38 74B2 AUD_MIC_P1 AUD_MIC_P1 - @m38_lib.M38 74A4 AUD_MIC_IN_P_EMI AUD_MIC_IN_P_EMI - @m38_lib.M38 73C5 AUD_MIC_IN_P_CONN AUD_MIC_IN_P_CONN - @m38_lib.M38 47C2 73C4 AUD_MIC_IN_P AUD_MIC_IN_P - @m38_lib.M38 73C6 74A6 AUD_MIC_IN_N_EMI AUD_MIC_IN_N_EMI - @m38_lib.M38 73C5 AUD_MIC_IN_N_CONN AUD_MIC_IN_N_CONN - @m38_lib.M38 47C2 73C4 AUD_MIC_IN_N AUD_MIC_IN_N - @m38_lib.M38 73C6 74A6 AUD_MAX9714_VREG AUD_MAX9714_VREG - @m38_lib.M38 72C5 AUD_MAX9714_CHOLD AUD_MAX9714_CHOLD - @m38_lib.M38 72C4 AUD_LO_R_JACK AUD_LO_R_JACK - @m38_lib.M38 73B4 AUD_LO_R_EMI AUD_LO_R_EMI - @m38_lib.M38 73A7 AUD_LO_L_JACK AUD_LO_L_JACK - @m38_lib.M38 73B4 AUD_LO_L_EMI AUD_LO_L_EMI - @m38_lib.M38 73B7 AUD_LO_GND_JACK AUD_LO_GND_JACK - @m38_lib.M38 73B4 AUD_LO_GND_EMI AUD_LO_GND_EMI - @m38_lib.M38 73A7 AUD_LO_DET2_JACK AUD_LO_DET2_JACK - @m38_lib.M38 73B4 AUD_LO_DET2_EMI AUD_LO_DET2_EMI - @m38_lib.M38 73B7 AUD_LO_DET2_1 AUD_LO_DET2_1 - @m38_lib.M38 74B4 AUD_LO_DET2 AUD_LO_DET2 - @m38_lib.M38 73B8 74B5 AUD_LO_DET1_JACK AUD_LO_DET1_JACK - @m38_lib.M38 73B4 AUD_LO_DET1_INV AUD_LO_DET1_INV - @m38_lib.M38 74B3 AUD_LO_DET1_EMI AUD_LO_DET1_EMI - @m38_lib.M38 73B7 AUD_LO_DET1_1 AUD_LO_DET1_1 - @m38_lib.M38 74A4 74B2 AUD_LO_DET1 AUD_LO_DET1 - @m38_lib.M38 73B8 74A5 AUD_LI_R_JACK AUD_LI_R_JACK - @m38_lib.M38 73D8 AUD_LI_R_EMI AUD_LI_R_EMI - @m38_lib.M38 73D7 AUD_LI_L_JACK AUD_LI_L_JACK - @m38_lib.M38 73D8 AUD_LI_L_EMI AUD_LI_L_EMI - @m38_lib.M38 73D7 AUD_LI_GND_JACK AUD_LI_GND_JACK - @m38_lib.M38 73D8 AUD_LI_GND_EMI AUD_LI_GND_EMI - @m38_lib.M38 73C7 AUD_LI_DET_JACK AUD_LI_DET_JACK - @m38_lib.M38 73D8 AUD_LI_DET_H AUD_LI_DET_H - @m38_lib.M38 73D4 74C5 AUD_LI_DET_EMI AUD_LI_DET_EMI - @m38_lib.M38 73D7 AUD_GPIO_2 AUD_GPIO_2 - @m38_lib.M38 68C7 74A6 AUD_GPIO_1_A AUD_GPIO_1_A - @m38_lib.M38 68A8 73C2
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IMVP6_DROOP_R IMVP6_DROOP_R - @m38_lib.M38 76D4 IMVP6_DROOP IMVP6_DROOP - @m38_lib.M38 75A4 75B4 76D5 IMVP6_DFB IMVP6_DFB - @m38_lib.M38 75A4 75B5 IMVP6_COMP_RC IMVP6_COMP_RC - @m38_lib.M38 75B7 IMVP6_COMP IMVP6_COMP - @m38_lib.M38 75A4 75B6 IMVP6_BOOT2 IMVP6_BOOT2 - @m38_lib.M38 75A6 75C5 IMVP6_BOOT1 IMVP6_BOOT1 - @m38_lib.M38 75A8 75C5 IDE_RESET_L IDE_RESET_L - @m38_lib.M38 23C3 38D3 38D6 IDE_PDIOW_L IDE_PDIOW_L - @m38_lib.M38 21B6 38C3 IDE_PDIOR_L IDE_PDIOR_L - @m38_lib.M38 5C8 21B6 38C1 IDE_PDIORDY IDE_PDIORDY - @m38_lib.M38 5C8 21B6 38C4 IDE_PDDREQ IDE_PDDREQ - @m38_lib.M38 21B6 38C4 IDE_PDDACK_L IDE_PDDACK_L - @m38_lib.M38 21B6 38C1 IDE_PDD<15> IDE_PDD<15> - @m38_lib.M38 21B5 38C1 IDE_PDD<14> IDE_PDD<14> - @m38_lib.M38 21B5 38D1 IDE_PDD<13> IDE_PDD<13> - @m38_lib.M38 21B5 38D1 IDE_PDD<12> IDE_PDD<12> - @m38_lib.M38 21B5 38D1 IDE_PDD<11> IDE_PDD<11> - @m38_lib.M38 21B5 38D1 IDE_PDD<10> IDE_PDD<10> - @m38_lib.M38 21B5 38D1 IDE_PDD<9> IDE_PDD<9> - @m38_lib.M38 5C8 21B5 38D1 IDE_PDD<8> IDE_PDD<8> - @m38_lib.M38 21B5 38D1 IDE_PDD<7> IDE_PDD<7> - @m38_lib.M38 21B5 38D3 IDE_PDD<6> IDE_PDD<6> - @m38_lib.M38 21B5 38D3 IDE_PDD<5> IDE_PDD<5> - @m38_lib.M38 21B5 38D3 IDE_PDD<4> IDE_PDD<4> - @m38_lib.M38 21B5 38D3 IDE_PDD<3> IDE_PDD<3> - @m38_lib.M38 21B5 38D3 IDE_PDD<2> IDE_PDD<2> - @m38_lib.M38 21B5 38D3 IDE_PDD<1> IDE_PDD<1> - @m38_lib.M38 21B5 38C3 IDE_PDD<0> IDE_PDD<0> - @m38_lib.M38 21C5 38C3 IDE_PDCS3_L IDE_PDCS3_L - @m38_lib.M38 21B5 38C1 IDE_PDCS1_L IDE_PDCS1_L - @m38_lib.M38 21B5 38C3 IDE_PDA<2> IDE_PDA<2> - @m38_lib.M38 21B5 38C1 IDE_PDA<1> IDE_PDA<1> - @m38_lib.M38 21B5 38C3 IDE_PDA<0> IDE_PDA<0> - @m38_lib.M38 21B5 38C3 IDE_IRQ14 IDE_IRQ14 - @m38_lib.M38 21B6 38C4 IDE_IOCS16_PU IDE_IOCS16_PU - @m38_lib.M38 38C1 IDE_DASP_L_DS IDE_DASP_L_DS - @m38_lib.M38 38B3 IDE_DASP_L IDE_DASP_L - @m38_lib.M38 38C3 IDE_CSEL_PD IDE_CSEL_PD - @m38_lib.M38 38C3 SMB_A_S3_DATA - @m38_lib.M38 58B5 59B2 59D1 I2C_ALS_SDA I2C_ALS_SDA - @m38_lib.M38 59B1 59C8 SMB_A_S3_CLK - @m38_lib.M38 58B5 59B2 59D1 I2C_ALS_SCL I2C_ALS_SCL - @m38_lib.M38 59B1 59C8 GPU_XTALOUT GPU_XTALOUT - @m38_lib.M38 91A5 GPU_VSYNC_BUF GPU_VSYNC_BUF - @m38_lib.M38 97A4 TP_GPU_VGA_VSYNC - @m38_lib.M38 88B3 GPU_VGA_VSYNC GPU_VGA_VSYNC - @m38_lib.M38 88B1 93B3 TP_GPU_VGA_R - @m38_lib.M38 88C3 GPU_VGA_R GPU_VGA_R - @m38_lib.M38 88C1 93C3 TP_GPU_VGA_HSYNC - @m38_lib.M38 88B3 GPU_VGA_HSYNC GPU_VGA_HSYNC - @m38_lib.M38 88B1 93B3 TP_GPU_VGA_G - @m38_lib.M38 88C3 GPU_VGA_G GPU_VGA_G - @m38_lib.M38 88C1 93C3 TP_GPU_VGA_B - @m38_lib.M38 88C3 GPU_VGA_B GPU_VGA_B - @m38_lib.M38 88C1 93C3 GPU_VCORE_HIGH_RC GPU_VCORE_HIGH_RC - @m38_lib.M38 85B3 GPU_VCORE_HIGH GPU_VCORE_HIGH - @m38_lib.M38 85A8 85B4 GPU_VARY_BL GPU_VARY_BL - @m38_lib.M38 91C3 94B4 GPU_V2SYNC GPU_V2SYNC - @m38_lib.M38 93B3 97B4 TP_GPU_TV_Y - @m38_lib.M38 88B3 GPU_TV_Y GPU_TV_Y - @m38_lib.M38 88B1 93B3 TP_GPU_TV_COMP - @m38_lib.M38 88B3 GPU_TV_COMP GPU_TV_COMP - @m38_lib.M38 88B1 93B3 TP_GPU_TV_C - @m38_lib.M38 88B3 GPU_TV_C GPU_TV_C - @m38_lib.M38 88B1 93B3 GPU_TEST_YCLK GPU_TEST_YCLK - @m38_lib.M38 87A3 GPU_TEST_MCLK GPU_TEST_MCLK - @m38_lib.M38 87A3 GPU_R2 GPU_R2 - @m38_lib.M38 93B3 97A8 GPU_PWM_RST_L GPU_PWM_RST_L - @m38_lib.M38 6C7 94B3 GPU_PCIE_CALRP GPU_PCIE_CALRP - @m38_lib.M38 84A3 GPU_PCIE_CALRN GPU_PCIE_CALRN - @m38_lib.M38 84A3 GPU_PCIE_CALI GPU_PCIE_CALI - @m38_lib.M38 84A3 GPU_MVREFS1 GPU_MVREFS1 - @m38_lib.M38 87B3 GPU_MVREFS0 GPU_MVREFS0 - @m38_lib.M38 87B7 GPU_MVREFD1 GPU_MVREFD1 - @m38_lib.M38 87B3 GPU_MVREFD0 GPU_MVREFD0 - @m38_lib.M38 87B7 GPU_MEMTEST GPU_MEMTEST - @m38_lib.M38 87A3 GPU_HSYNC_BUF GPU_HSYNC_BUF - @m38_lib.M38 97A4 GPU_HPD GPU_HPD - @m38_lib.M38 93A5 97C1 GPU_H2SYNC GPU_H2SYNC - @m38_lib.M38 93B3 97A4 GPU_GPIO_34 GPU_GPIO_34 - @m38_lib.M38 91C5 95C4 GPU_GPIO_33 GPU_GPIO_33 - @m38_lib.M38 91C5 95C4 GPU_GPIO_32 GPU_GPIO_32 - @m38_lib.M38 91C5 95C4 GPU_GPIO_31 GPU_GPIO_31 - @m38_lib.M38 91C5 95C4 GPU_GPIO_30 GPU_GPIO_30 - @m38_lib.M38 91C5 95C4 GPU_GPIO_29 GPU_GPIO_29 - @m38_lib.M38 88B5 91C5 GPU_GPIO_28 GPU_GPIO_28 - @m38_lib.M38 88B5 91D5 GPU_GPIO_27 GPU_GPIO_27 - @m38_lib.M38 88B5 91D5 GPU_GPIO_26 GPU_GPIO_26 - @m38_lib.M38 91D5 95C4 GPU_GPIO_25 GPU_GPIO_25 - @m38_lib.M38 91D5 95C4 GPU_GPIO_24 GPU_GPIO_24 - @m38_lib.M38 88B5 91D5 GPU_GPIO_23 GPU_GPIO_23 - @m38_lib.M38 91D5 95B4 GPU_GPIO_22 GPU_GPIO_22 - @m38_lib.M38 91D5 95B4 GPU_GPIO_21 GPU_GPIO_21 - @m38_lib.M38 91D5 95B4 GPU_GPIO_20 GPU_GPIO_20 - @m38_lib.M38 91D5 95B4 GPU_GPIO_19 GPU_GPIO_19 - @m38_lib.M38 91D5 95B4 GPU_GPIO_18 GPU_GPIO_18 - @m38_lib.M38 91D5 95B4 TP_GPU_GPIO_17 - @m38_lib.M38 88C3 GPU_GPIO_17 GPU_GPIO_17 - @m38_lib.M38 88C1 91C3 GPU_VCORE_LOW - @m38_lib.M38 85B4 88B5 GPU_GPIO_15 GPU_GPIO_15 - @m38_lib.M38 88B4 91C3 TP_GPU_GPIO_14 - @m38_lib.M38 88C3 GPU_GPIO_14 GPU_GPIO_14 - @m38_lib.M38 88C1 91C3 GPU_GPIO_13 GPU_GPIO_13 - @m38_lib.M38 88C5 91C3 GPU_GPIO_12 GPU_GPIO_12 - @m38_lib.M38 88C5 91C3 GPU_GPIO_11 GPU_GPIO_11 - @m38_lib.M38 88B5 91C3 NC_GPU_GPIO_10 - @m38_lib.M38 88C5 GPU_GPIO_10 GPU_GPIO_10 - @m38_lib.M38 88C3 91C3 GPU_GPIO_9 GPU_GPIO_9 - @m38_lib.M38 88C5 91C3 GPU_GPIO_8 GPU_GPIO_8 - @m38_lib.M38 88C5 91D3 TP_GPU_GPIO_7 - @m38_lib.M38 88C5 GPU_GPIO_7 GPU_GPIO_7 - @m38_lib.M38 88C3 91D3 GPU_GPIO_6 GPU_GPIO_6 - @m38_lib.M38 88C5 91D3 GPU_GPIO_5 GPU_GPIO_5 - @m38_lib.M38 88C5 91D3 GPU_GPIO_4 GPU_GPIO_4 - @m38_lib.M38 88C5 91D3 GPU_GPIO_3 GPU_GPIO_3 - @m38_lib.M38 88D5 91D3 GPU_GPIO_2 GPU_GPIO_2 - @m38_lib.M38 88D5 91D3 GPU_GPIO_1 GPU_GPIO_1 - @m38_lib.M38 88D5 91D3 GPU_GPIO_0 GPU_GPIO_0 - @m38_lib.M38 88D5 91D3 94C3 GPU_GENERICD GPU_GENERICD - @m38_lib.M38 85A7 91C3 TP_GPU_GENERICC - @m38_lib.M38 95B6 GPU_GENERICC GPU_GENERICC - @m38_lib.M38 91C3 95B4 TP_GPU_GENERICB - @m38_lib.M38 95B6 GPU_GENERICB GPU_GENERICB - @m38_lib.M38 91C3 95B4
TP_GPU_GENERICA - @m38_lib.M38 95B6 GPU_GENERICA GPU_GENERICA - @m38_lib.M38 91C3 95B4 GPU_G2 GPU_G2 - @m38_lib.M38 93B3 97A8 GPU_EXT_TDIODE_P GPU_EXT_TDIODE_P - @m38_lib.M38 61C7 GPU_EXT_TDIODE_N GPU_EXT_TDIODE_N - @m38_lib.M38 61B7 GPU_DIGON GPU_DIGON - @m38_lib.M38 91C3 94A4 94C8 GPU_DDC_C_DATA GPU_DDC_C_DATA - @m38_lib.M38 93A1 93A3 94A6 94C7 GPU_DDC_C_CLK GPU_DDC_C_CLK - @m38_lib.M38 93A1 93A3 94A7 94C7 TP_GPU_DDC_B_DATA - @m38_lib.M38 88B3 GPU_DDC_B_DATA GPU_DDC_B_DATA - @m38_lib.M38 88B1 93A3 TP_GPU_DDC_B_CLK - @m38_lib.M38 88B3 GPU_DDC_B_CLK GPU_DDC_B_CLK - @m38_lib.M38 88B1 93A3 GPU_DDC_A_DATA GPU_DDC_A_DATA - @m38_lib.M38 93A3 97C1 GPU_DDC_A_CLK GPU_DDC_A_CLK - @m38_lib.M38 93A3 97D1 GPU_CLK100M_PCIE_P GPU_CLK100M_PCIE_P - @m38_lib.M38 5C6 34A4 34B2 84A5 GPU_CLK100M_PCIE_N GPU_CLK100M_PCIE_N - @m38_lib.M38 5C6 34A4 34B2 84A5 GPU_XTALIN - @m38_lib.M38 91A5 92C5 GPU_CLK27M GPU_CLK27M - @m38_lib.M38 92C6 GPU_BB_EN GPU_BB_EN - @m38_lib.M38 85A7 GPU_B2 GPU_B2 - @m38_lib.M38 93B3 97B8 GPUVCORE_UG GPUVCORE_UG - @m38_lib.M38 85C5 GPUVCORE_PHASE GPUVCORE_PHASE - @m38_lib.M38 85C5 GPUVCORE_PGOOD GPUVCORE_PGOOD - @m38_lib.M38 77A4 85C8 GPUVCORE_LG GPUVCORE_LG - @m38_lib.M38 85C5 GPUVCORE_ISENSE_CAL GPUVCORE_ISENSE_CAL - @m38_lib.M38 76A4 GPUVCORE_ISEN GPUVCORE_ISEN - @m38_lib.M38 85C5 SMC_GPU_ISENSE - @m38_lib.M38 58D5 59C6 GPUVCORE_IOUT GPUVCORE_IOUT - @m38_lib.M38 59C5 85D1 GPUVCORE_FSET GPUVCORE_FSET - @m38_lib.M38 85C7 GPUVCORE_FCCM GPUVCORE_FCCM - @m38_lib.M38 85C7 GPUVCORE_FB_LOW GPUVCORE_FB_LOW - @m38_lib.M38 85C3 GPUVCORE_FB GPUVCORE_FB - @m38_lib.M38 85C7 GPUVCORE_EN GPUVCORE_EN - @m38_lib.M38 85C8 88A8 GPUVCORE_COMP_R GPUVCORE_COMP_R - @m38_lib.M38 85C7 GPUVCORE_COMP GPUVCORE_COMP - @m38_lib.M38 85C7 GPUVCORE_BOOT GPUVCORE_BOOT - @m38_lib.M38 85C5 GPUISENS_RC GPUISENS_RC - @m38_lib.M38 85D3 GPUISENS_POS GPUISENS_POS - @m38_lib.M38 85D3 GPUISENS_NTC GPUISENS_NTC - @m38_lib.M38 85D3 GPUISENS_NEG GPUISENS_NEG - @m38_lib.M38 85D3 GPUBB_EN_L GPUBB_EN_L - @m38_lib.M38 85A1 85A5 85B7 GPUBB_EN GPUBB_EN - @m38_lib.M38 85A4 85A6 85B8 GPUBBP_ADJ_LOW GPUBBP_ADJ_LOW - @m38_lib.M38 85A7 GPUBBP_ADJ GPUBBP_ADJ - @m38_lib.M38 85B7 GPUBBN_SW GPUBBN_SW - @m38_lib.M38 85A4 GPUBBN_FB GPUBBN_FB - @m38_lib.M38 85A3 GPUBBN_D_RC GPUBBN_D_RC - @m38_lib.M38 85A3 GPUBBN_D GPUBBN_D - @m38_lib.M38 85A3 GND_USB_PORT2 GND_USB_PORT2 - @m38_lib.M38 47A5 GND_USB_PORT1 GND_USB_PORT1 - @m38_lib.M38 47C5 GND_USB_PORT0 GND_USB_PORT0 - @m38_lib.M38 47D5 76B6 76C2 76C5 85C1 GND_SMC_AVSS GND_SMC_AVSS - @m38_lib.M38 58B2 58C4 59A3 59B3 76B2 GND_NEXT_TO_SMC GND_NEXT_TO_SMC - @m38_lib.M38 59B2 76C2 TP_GND_NB_VSSA_LVDS - @m38_lib.M38 19C1 GND_NB_VSSA_LVDS GND_NB_VSSA_LVDS - @m38_lib.M38 17C6 19C2 GND_IMVP6_SGND GND_IMVP6_SGND - @m38_lib.M38 75A4 75B6 75B8 75D7 GND_GPU_VSSRH1 GND_GPU_VSSRH1 - @m38_lib.M38 87A4 GND_GPU_VSSRH0 GND_GPU_VSSRH0 - @m38_lib.M38 87A7 GND_GPU_TXVSSR GND_GPU_TXVSSR - @m38_lib.M38 93C7 GND_GPU_TPVSS GND_GPU_TPVSS - @m38_lib.M38 93C7 GND_GPU_PVSS GND_GPU_PVSS - @m38_lib.M38 91A5 GND_GPU_PCIE_PVSS GND_GPU_PCIE_PVSS - @m38_lib.M38 84B8 GND_GPU_MPVSS GND_GPU_MPVSS - @m38_lib.M38 91A5 GND_GPU_LVSSR GND_GPU_LVSSR - @m38_lib.M38 93A7 GND_GPU_LPVSS GND_GPU_LPVSS - @m38_lib.M38 93B7 GND_GPU_AVSSQ GND_GPU_AVSSQ - @m38_lib.M38 93C7 GND_GPU_AVSSN GND_GPU_AVSSN - @m38_lib.M38 93C7 GND_GPU_A2VSSQ GND_GPU_A2VSSQ - @m38_lib.M38 93B7 GND_GPU_A2VSSN GND_GPU_A2VSSN - @m38_lib.M38 93B7 GND_GPUVCORE_SGND GND_GPUVCORE_SGND - @m38_lib.M38 85C7 GND_CPU_ISENSE_OPAMP GND_CPU_ISENSE_OPAMP - @m38_lib.M38 76D3 GND_CHASSIS_IO_RIGHT - @m38_lib.M38 6B1 GND_CHASSIS_RJ45 - @m38_lib.M38 6B2 43C6 GND_CHASSIS_VGA - @m38_lib.M38 6B2 97C4 GND_CHASSIS_RJ45 - @m38_lib.M38 6B2 43C6 GND_CHASSIS_FIREWIRE GND_CHASSIS_FIREWIRE - @m38_lib.M38 6B2 46A1 46C1 GND_CHASSIS_BNDI - @m38_lib.M38 6A2 47C2 47C2 47D2 TERNAL @m38_lib.M38 GND_CHASSIS_AUDIO_IN GND_CHASSIS_AUDIO_INTERNAL - 6A2 73C6 GND_CHASSIS_IO_LEFT - @m38_lib.M38 6B2 GND_CHASSIS_USB - @m38_lib.M38 6B2 47A4 47B4 47C4 GND_CHASSIS_IO_LEFT - @m38_lib.M38 6B2 TERNAL @m38_lib.M38 74D2 GND_CHASSIS_AUDIO_EX GND_CHASSIS_AUDIO_EXTERNAL - 6B2 73A8 73C7 73D8 74C1 GND_BNDI GND_BNDI - @m38_lib.M38 47B2 47D2 ANE @m38_lib.M38 74C2 GND_AUDIO_SPKRAMP_PL GND_AUDIO_SPKRAMP_PLANE - 72A6 72B2 72B6 72D2 72D8 GND_AUDIO_SPKRAMP GND_AUDIO_SPKRAMP - @m38_lib.M38 6C2 72B1 74D2 GND_AUDIO_MIC_CONN GND_AUDIO_MIC_CONN - @m38_lib.M38 47C2 73C4 74C2 74C8 74D1 74A6 74A7 74B5 74B7 74C1 73A8 73C2 73D4 74A3 74A5 GND_AUDIO_CODEC GND_AUDIO_CODEC - @m38_lib.M38 68A6 68B7 68D2 72B8 72C8 GND_AUDIO GND_AUDIO - @m38_lib.M38 6C2 74D2 GATE_5V_S3 GATE_5V_S3 - @m38_lib.M38 83C4 GATE_3V3_S3 GATE_3V3_S3 - @m38_lib.M38 83B4 FW_XTAL_XR FW_XTAL_XR - @m38_lib.M38 44D2 FW_XTAL_XI FW_XTAL_XI - @m38_lib.M38 44D2 44D3 FW_XTAL_X0 FW_XTAL_X0 - @m38_lib.M38 44D2 44D3 FW_VP_R FW_VP_R - @m38_lib.M38 46D5 FW_VP FW_VP - @m38_lib.M38 46D4 FW_TPA_C<1> FW_TPA_C<1> - @m38_lib.M38 46B7 FW_TPA_C<0> FW_TPA_C<0> - @m38_lib.M38 46B8 FW_TEST FW_TEST - @m38_lib.M38 44B3 FW_SM FW_SM - @m38_lib.M38 44B3 FW_SE FW_SE - @m38_lib.M38 44B3 FW_ROM_CLK FW_ROM_CLK - @m38_lib.M38 44B4 FW_RESET_L FW_RESET_L - @m38_lib.M38 44C2 44C3 FW_R1 FW_R1 - @m38_lib.M38 44C4 FW_R0 FW_R0 - @m38_lib.M38 44C4 FW_PORT1_TPB_FL_P FW_PORT1_TPB_FL_P - @m38_lib.M38 46B2 FW_PORT1_TPB_FL_N FW_PORT1_TPB_FL_N - @m38_lib.M38 46B2 FW_PORT1_TPA_FL_P FW_PORT1_TPA_FL_P - @m38_lib.M38 46B2 FW_PORT1_TPA_FL_N FW_PORT1_TPA_FL_N - @m38_lib.M38 46B2 FW_PORT0_TPB_FL_P FW_PORT0_TPB_FL_P - @m38_lib.M38 46C2 FW_PORT0_TPB_FL_N FW_PORT0_TPB_FL_N - @m38_lib.M38 46C2 FW_PORT0_TPA_FL_P FW_PORT0_TPA_FL_P - @m38_lib.M38 46C2 FW_PORT0_TPA_FL_N FW_PORT0_TPA_FL_N - @m38_lib.M38 46C2 FW_PC2 FW_PC2 - @m38_lib.M38 44B3 FW_PC1 FW_PC1 - @m38_lib.M38 44B3 FW_PC0 FW_PC0 - @m38_lib.M38 44B3 TP_FW_C_TPB_P - @m38_lib.M38 46A7 FW_C_TPB_P FW_C_TPB_P - @m38_lib.M38 44C3 46A8
TP_FW_C_TPB_N - @m38_lib.M38 46A7 FW_C_TPB_N FW_C_TPB_N - @m38_lib.M38 44C3 46A8 TP_FW_C_TPBIAS - @m38_lib.M38 46B7 FW_C_TPBIAS FW_C_TPBIAS - @m38_lib.M38 44C4 46B8 TP_FW_C_TPA_P - @m38_lib.M38 46B7 FW_C_TPA_P FW_C_TPA_P - @m38_lib.M38 44C3 46B8 TP_FW_C_TPA_N - @m38_lib.M38 46B7 FW_C_TPA_N FW_C_TPA_N - @m38_lib.M38 44C3 46B8 FW_CPS FW_CPS - @m38_lib.M38 44C3 FW_CONTENDER FW_CONTENDER - @m38_lib.M38 44B3 FW_CARDBUS_L FW_CARDBUS_L - @m38_lib.M38 44B5 FW_PORT1_TPB_P - @m38_lib.M38 46B5 46C6 FW_B_TPB_P FW_B_TPB_P - @m38_lib.M38 44C3 46C8 FW_PORT1_TPB_N - @m38_lib.M38 46B5 46C6 FW_B_TPB_N FW_B_TPB_N - @m38_lib.M38 44C3 46C8 FW_B_TPBIAS FW_B_TPBIAS - @m38_lib.M38 44C4 46C8 FW_PORT1_TPA_P - @m38_lib.M38 46B5 46C6 FW_B_TPA_P FW_B_TPA_P - @m38_lib.M38 44C3 46C8 FW_PORT1_TPA_N - @m38_lib.M38 46B5 46C6 FW_B_TPA_N FW_B_TPA_N - @m38_lib.M38 44C3 46C8 FW_PORT0_TPB_P - @m38_lib.M38 46C5 46C6 FW_A_TPB_P FW_A_TPB_P - @m38_lib.M38 44C3 46C8 FW_PORT0_TPB_N - @m38_lib.M38 46C5 46C6 FW_A_TPB_N FW_A_TPB_N - @m38_lib.M38 44C3 46C8 FW_A_TPBIAS FW_A_TPBIAS - @m38_lib.M38 44C4 46C8 FW_PORT0_TPA_P - @m38_lib.M38 46C5 46C6 FW_A_TPA_P FW_A_TPA_P - @m38_lib.M38 44C3 46C8 FW_PORT0_TPA_N - @m38_lib.M38 46C5 46C6 FW_A_TPA_N FW_A_TPA_N - @m38_lib.M38 44C3 46C8 FWH_MFG_MODE FWH_MFG_MODE - @m38_lib.M38 23A6 23C5 SMC_CPU_INIT_3_3_L - @m38_lib.M38 58D5 59C6 FWH_INIT_L FWH_INIT_L - @m38_lib.M38 21C4 59C5 60C3 FSB_TRDY_L FSB_TRDY_L - @m38_lib.M38 7D6 12A4 FSB_SLPCPU_L FSB_SLPCPU_L - @m38_lib.M38 7A3 12A4 FSB_RS_L<2> FSB_RS_L<2> - @m38_lib.M38 7D6 12A4 FSB_RS_L<1> FSB_RS_L<1> - @m38_lib.M38 7D6 12A4 FSB_RS_L<0> FSB_RS_L<0> - @m38_lib.M38 7D6 12A4 FSB_REQ_L<4> FSB_REQ_L<4> - @m38_lib.M38 5C7 7D7 12A4 FSB_REQ_L<3> FSB_REQ_L<3> - @m38_lib.M38 5C7 7D7 12A4 FSB_REQ_L<2> FSB_REQ_L<2> - @m38_lib.M38 5C7 7D7 12A4 FSB_REQ_L<1> FSB_REQ_L<1> - @m38_lib.M38 5C7 7D7 12B4 FSB_REQ_L<0> FSB_REQ_L<0> - @m38_lib.M38 5C7 7D7 12B4 FSB_LOCK_L FSB_LOCK_L - @m38_lib.M38 5D7 5D8 7D6 12B4 FSB_IERR_L FSB_IERR_L - @m38_lib.M38 7D6 FSB_HIT_L FSB_HIT_L - @m38_lib.M38 5C7 7D6 12B4 FSB_HITM_L FSB_HITM_L - @m38_lib.M38 5C7 7D6 12B4 FSB_D_L<63> FSB_D_L<63> - @m38_lib.M38 7B2 12B6 FSB_D_L<62> FSB_D_L<62> - @m38_lib.M38 7B2 12B6 FSB_D_L<61> FSB_D_L<61> - @m38_lib.M38 7B2 12B6 FSB_D_L<60> FSB_D_L<60> - @m38_lib.M38 7B2 12B6 FSB_D_L<59> FSB_D_L<59> - @m38_lib.M38 5D7 5D8 7B2 12B6 FSB_D_L<58> FSB_D_L<58> - @m38_lib.M38 7B2 12B6 FSB_D_L<57> FSB_D_L<57> - @m38_lib.M38 7B2 12B6 FSB_D_L<56> FSB_D_L<56> - @m38_lib.M38 7B2 12B6 FSB_D_L<55> FSB_D_L<55> - @m38_lib.M38 7B2 12B6 FSB_D_L<54> FSB_D_L<54> - @m38_lib.M38 7B2 12B6 FSB_D_L<53> FSB_D_L<53> - @m38_lib.M38 7B2 12B6 FSB_D_L<52> FSB_D_L<52> - @m38_lib.M38 7B2 12B6 FSB_D_L<51> FSB_D_L<51> - @m38_lib.M38 7B2 12B6 FSB_D_L<50> FSB_D_L<50> - @m38_lib.M38 7B2 12B6 FSB_D_L<49> FSB_D_L<49> - @m38_lib.M38 7C2 12B6 FSB_D_L<48> FSB_D_L<48> - @m38_lib.M38 7C2 12B6 FSB_D_L<47> FSB_D_L<47> - @m38_lib.M38 7C2 12B6 FSB_D_L<46> FSB_D_L<46> - @m38_lib.M38 7C2 12B6 FSB_D_L<45> FSB_D_L<45> - @m38_lib.M38 7C2 12B6 FSB_D_L<44> FSB_D_L<44> - @m38_lib.M38 7C2 12B6 FSB_D_L<43> FSB_D_L<43> - @m38_lib.M38 7C2 12B6 FSB_D_L<42> FSB_D_L<42> - @m38_lib.M38 7C2 12B6 FSB_D_L<41> FSB_D_L<41> - @m38_lib.M38 5D7 5D8 7C2 12B6 FSB_D_L<40> FSB_D_L<40> - @m38_lib.M38 7C2 12B6 FSB_D_L<39> FSB_D_L<39> - @m38_lib.M38 7C2 12B6 FSB_D_L<38> FSB_D_L<38> - @m38_lib.M38 7C2 12C6 FSB_D_L<37> FSB_D_L<37> - @m38_lib.M38 7C2 12C6 FSB_D_L<36> FSB_D_L<36> - @m38_lib.M38 7C2 12C6 FSB_D_L<35> FSB_D_L<35> - @m38_lib.M38 7C2 12C6 FSB_D_L<34> FSB_D_L<34> - @m38_lib.M38 7C2 12C6 FSB_D_L<33> FSB_D_L<33> - @m38_lib.M38 7C2 12C6 FSB_D_L<32> FSB_D_L<32> - @m38_lib.M38 7C2 12C6 FSB_D_L<31> FSB_D_L<31> - @m38_lib.M38 7B4 12C6 FSB_D_L<30> FSB_D_L<30> - @m38_lib.M38 7B4 12C6 FSB_D_L<29> FSB_D_L<29> - @m38_lib.M38 7B4 12C6 FSB_D_L<28> FSB_D_L<28> - @m38_lib.M38 7B4 12C6 FSB_D_L<27> FSB_D_L<27> - @m38_lib.M38 7B4 12C6 FSB_D_L<26> FSB_D_L<26> - @m38_lib.M38 7B4 12C6 FSB_D_L<25> FSB_D_L<25> - @m38_lib.M38 7B4 12C6 FSB_D_L<24> FSB_D_L<24> - @m38_lib.M38 7B4 12C6 FSB_D_L<23> FSB_D_L<23> - @m38_lib.M38 7B4 12C6 FSB_D_L<22> FSB_D_L<22> - @m38_lib.M38 7B4 12C6 FSB_D_L<21> FSB_D_L<21> - @m38_lib.M38 7B4 12C6 FSB_D_L<20> FSB_D_L<20> - @m38_lib.M38 7B4 12C6 FSB_D_L<19> FSB_D_L<19> - @m38_lib.M38 7B4 12C6 FSB_D_L<18> FSB_D_L<18> - @m38_lib.M38 7B4 12C6 FSB_D_L<17> FSB_D_L<17> - @m38_lib.M38 7C4 12C6 FSB_D_L<16> FSB_D_L<16> - @m38_lib.M38 5D7 5D8 7C4 12C6 FSB_D_L<15> FSB_D_L<15> - @m38_lib.M38 7C4 12C6 FSB_D_L<14> FSB_D_L<14> - @m38_lib.M38 7C4 12C6 FSB_D_L<13> FSB_D_L<13> - @m38_lib.M38 7C4 12C6 FSB_D_L<12> FSB_D_L<12> - @m38_lib.M38 7C4 12D6 FSB_D_L<11> FSB_D_L<11> - @m38_lib.M38 7C4 12D6 FSB_D_L<10> FSB_D_L<10> - @m38_lib.M38 7C4 12D6 FSB_D_L<9> FSB_D_L<9> - @m38_lib.M38 7C4 12D6 FSB_D_L<8> FSB_D_L<8> - @m38_lib.M38 7C4 12D6 FSB_D_L<7> FSB_D_L<7> - @m38_lib.M38 7C4 12D6 FSB_D_L<6> FSB_D_L<6> - @m38_lib.M38 7C4 12D6 FSB_D_L<5> FSB_D_L<5> - @m38_lib.M38 7C4 12D6 FSB_D_L<4> FSB_D_L<4> - @m38_lib.M38 7C4 12D6 FSB_D_L<3> FSB_D_L<3> - @m38_lib.M38 7C4 12D6 FSB_D_L<2> FSB_D_L<2> - @m38_lib.M38 7C4 12D6 FSB_D_L<1> FSB_D_L<1> - @m38_lib.M38 7C4 12D6 FSB_D_L<0> FSB_D_L<0> - @m38_lib.M38 5D7 5D8 7C4 12D6 FSB_DSTBP_L<3> FSB_DSTBP_L<3> - @m38_lib.M38 5D7 5D8 7B2 12B4 FSB_DSTBP_L<2> FSB_DSTBP_L<2> - @m38_lib.M38 5D7 5D8 7C2 12B4 FSB_DSTBP_L<1> FSB_DSTBP_L<1> - @m38_lib.M38 5D7 5D8 7B4 12B4 FSB_DSTBP_L<0> FSB_DSTBP_L<0> - @m38_lib.M38 5D7 5D8 7C4 12B4 FSB_DSTBN_L<3> FSB_DSTBN_L<3> - @m38_lib.M38 5D7 5D8 7B2 12B4 FSB_DSTBN_L<2> FSB_DSTBN_L<2> - @m38_lib.M38 5D7 5D8 7C2 12B4 FSB_DSTBN_L<1> FSB_DSTBN_L<1> - @m38_lib.M38 5D7 5D8 7B4 12B4 FSB_DSTBN_L<0> FSB_DSTBN_L<0> - @m38_lib.M38 5D7 5D8 7C4 12B4 FSB_DRDY_L FSB_DRDY_L - @m38_lib.M38 7D6 12B4 FSB_DPWR_L FSB_DPWR_L - @m38_lib.M38 5C7 7B3 12B4 FSB_DINV_L<3> FSB_DINV_L<3> - @m38_lib.M38 5D7 5D8 7B2 12B4 FSB_DINV_L<2> FSB_DINV_L<2> - @m38_lib.M38 5D7 5D8 7C2 12B4 FSB_DINV_L<1> FSB_DINV_L<1> - @m38_lib.M38 5D7 5D8 7B4 12B4 FSB_DINV_L<0> FSB_DINV_L<0> - @m38_lib.M38 5D7 5D8 7C4 12B4
FSB_DEFER_L FSB_DEFER_L - @m38_lib.M38 7D6 12B4 FSB_DBSY_L FSB_DBSY_L - @m38_lib.M38 5C7 7D6 12B4 FSB_CPURST_L FSB_CPURST_L - @m38_lib.M38 5C8 7D6 11B5 12C4 FSB_CLK_NB_P FSB_CLK_NB_P - @m38_lib.M38 5C7 12A6 34B4 34C2 FSB_CLK_NB_N FSB_CLK_NB_N - @m38_lib.M38 5C7 12A6 34B4 34C2 FSB_CLK_CPU_P FSB_CLK_CPU_P - @m38_lib.M38 5C8 7C6 34B4 34C2 FSB_CLK_CPU_N FSB_CLK_CPU_N - @m38_lib.M38 5C8 7C6 34B4 34C2 FSB_BREQ0_L FSB_BREQ0_L - @m38_lib.M38 5C7 7D6 12C4 FSB_BPRI_L FSB_BPRI_L - @m38_lib.M38 7D6 12C4 FSB_BNR_L FSB_BNR_L - @m38_lib.M38 5C7 7D6 12C4 FSB_A_L<31> FSB_A_L<31> - @m38_lib.M38 7C7 12C4 FSB_A_L<30> FSB_A_L<30> - @m38_lib.M38 7C7 12C4 FSB_A_L<29> FSB_A_L<29> - @m38_lib.M38 7C7 12C4 FSB_A_L<28> FSB_A_L<28> - @m38_lib.M38 7C7 12C4 FSB_A_L<27> FSB_A_L<27> - @m38_lib.M38 5D7 5D8 7C7 12C4 FSB_A_L<26> FSB_A_L<26> - @m38_lib.M38 7C7 12C4 FSB_A_L<25> FSB_A_L<25> - @m38_lib.M38 7C7 12C4 FSB_A_L<24> FSB_A_L<24> - @m38_lib.M38 7C7 12C4 FSB_A_L<23> FSB_A_L<23> - @m38_lib.M38 7C7 12C4 FSB_A_L<22> FSB_A_L<22> - @m38_lib.M38 7C7 12C4 FSB_A_L<21> FSB_A_L<21> - @m38_lib.M38 7C7 12C4 FSB_A_L<20> FSB_A_L<20> - @m38_lib.M38 7C7 12C4 FSB_A_L<19> FSB_A_L<19> - @m38_lib.M38 7C7 12C4 FSB_A_L<18> FSB_A_L<18> - @m38_lib.M38 7C7 12C4 FSB_A_L<17> FSB_A_L<17> - @m38_lib.M38 7C7 12C4 FSB_A_L<16> FSB_A_L<16> - @m38_lib.M38 7D7 12C4 FSB_A_L<15> FSB_A_L<15> - @m38_lib.M38 7D7 12D4 FSB_A_L<14> FSB_A_L<14> - @m38_lib.M38 7D7 12D4 FSB_A_L<13> FSB_A_L<13> - @m38_lib.M38 7D7 12D4 FSB_A_L<12> FSB_A_L<12> - @m38_lib.M38 7D7 12D4 FSB_A_L<11> FSB_A_L<11> - @m38_lib.M38 7D7 12D4 FSB_A_L<10> FSB_A_L<10> - @m38_lib.M38 7D7 12D4 FSB_A_L<9> FSB_A_L<9> - @m38_lib.M38 7D7 12D4 FSB_A_L<8> FSB_A_L<8> - @m38_lib.M38 7D7 12D4 FSB_A_L<7> FSB_A_L<7> - @m38_lib.M38 7D7 12D4 FSB_A_L<6> FSB_A_L<6> - @m38_lib.M38 5D7 5D8 7D7 12D4 FSB_A_L<5> FSB_A_L<5> - @m38_lib.M38 7D7 12D4 FSB_A_L<4> FSB_A_L<4> - @m38_lib.M38 7D7 12D4 FSB_A_L<3> FSB_A_L<3> - @m38_lib.M38 7D7 12D4 FSB_ADS_L FSB_ADS_L - @m38_lib.M38 7D6 12C4 FSB_ADSTB_L<1> FSB_ADSTB_L<1> - @m38_lib.M38 5D7 5D8 7C7 12C4 FSB_ADSTB_L<0> FSB_ADSTB_L<0> - @m38_lib.M38 5D7 5D8 7D7 12C4 89A8 90A5 90A8 DRAM_RST - @m38_lib.M38 5A5 5A6 5B5 5B6 88A6 89A5FB_DRAM_RST FB_DRAM_RST - @m38_lib.M38 87A1 88A8 FB_B_WE_L<1> FB_B_WE_L<1> - @m38_lib.M38 5A5 87B1 90A5 FB_B_WE_L<0> FB_B_WE_L<0> - @m38_lib.M38 5B5 87B1 90A8 FB_B_WDQS<7> FB_B_WDQS<7> - @m38_lib.M38 5A5 87C1 90A5 FB_B_WDQS<6> FB_B_WDQS<6> - @m38_lib.M38 5A5 87C1 90A5 FB_B_WDQS<5> FB_B_WDQS<5> - @m38_lib.M38 5A5 87C1 90A5 FB_B_WDQS<4> FB_B_WDQS<4> - @m38_lib.M38 5A5 87C1 90A5 FB_B_WDQS<3> FB_B_WDQS<3> - @m38_lib.M38 5B5 87C1 90A8 FB_B_WDQS<2> FB_B_WDQS<2> - @m38_lib.M38 5B5 87C1 90A8 FB_B_WDQS<1> FB_B_WDQS<1> - @m38_lib.M38 5B5 87C1 90A8 FB_B_WDQS<0> FB_B_WDQS<0> - @m38_lib.M38 5B5 87C1 90A8 FB_B_RDQS<7> FB_B_RDQS<7> - @m38_lib.M38 5C6 87C1 90A5 FB_B_RDQS<6> FB_B_RDQS<6> - @m38_lib.M38 5C6 87C1 90A5 FB_B_RDQS<5> FB_B_RDQS<5> - @m38_lib.M38 5C6 87C1 90A5 FB_B_RDQS<4> FB_B_RDQS<4> - @m38_lib.M38 5C6 87C1 90A5 FB_B_RDQS<3> FB_B_RDQS<3> - @m38_lib.M38 5C6 87C1 90A8 FB_B_RDQS<2> FB_B_RDQS<2> - @m38_lib.M38 5C6 87C1 90A8 FB_B_RDQS<1> FB_B_RDQS<1> - @m38_lib.M38 5C6 87C1 90A8 FB_B_RDQS<0> FB_B_RDQS<0> - @m38_lib.M38 5C6 87C1 90A8 FB_B_RAS_L<1> FB_B_RAS_L<1> - @m38_lib.M38 5A5 87B1 90A5 FB_B_RAS_L<0> FB_B_RAS_L<0> - @m38_lib.M38 5B5 87B1 90A8 FB_B_MA<11> FB_B_MA<11> - @m38_lib.M38 87D1 90B5 90B8 FB_B_MA<10> FB_B_MA<10> - @m38_lib.M38 87D1 90B5 90B8 FB_B_MA<9> FB_B_MA<9> - @m38_lib.M38 87D1 90B5 90B8 FB_B_MA<8> FB_B_MA<8> - @m38_lib.M38 87D1 90B5 90B8 FB_B_MA<7> FB_B_MA<7> - @m38_lib.M38 87D1 90B5 90B8 FB_B_MA<6> FB_B_MA<6> - @m38_lib.M38 87D1 90B5 90B8 FB_B_MA<5> FB_B_MA<5> - @m38_lib.M38 87D1 90B5 90B8 FB_B_MA<4> FB_B_MA<4> - @m38_lib.M38 87D1 90B5 90B8 90B8 FB_B_MA<3> FB_B_MA<3> - @m38_lib.M38 5A5 5B5 5C6 87D1 90B5 FB_B_MA<2> FB_B_MA<2> - @m38_lib.M38 87D1 90B5 90B8 FB_B_MA<1> FB_B_MA<1> - @m38_lib.M38 87D1 90B5 90B8 FB_B_MA<0> FB_B_MA<0> - @m38_lib.M38 87D1 90B5 90B8 FB_B_DQM_L<7> FB_B_DQM_L<7> - @m38_lib.M38 87C1 90B3 FB_B_DQM_L<6> FB_B_DQM_L<6> - @m38_lib.M38 87C1 90B3 FB_B_DQM_L<5> FB_B_DQM_L<5> - @m38_lib.M38 87C1 90B3 FB_B_DQM_L<4> FB_B_DQM_L<4> - @m38_lib.M38 87C1 90B3 FB_B_DQM_L<3> FB_B_DQM_L<3> - @m38_lib.M38 87C1 90B6 FB_B_DQM_L<2> FB_B_DQM_L<2> - @m38_lib.M38 87C1 90B6 FB_B_DQM_L<1> FB_B_DQM_L<1> - @m38_lib.M38 87C1 90B6 FB_B_DQM_L<0> FB_B_DQM_L<0> - @m38_lib.M38 87D1 90B6 FB_B_DQ<63> FB_B_DQ<63> - @m38_lib.M38 87B3 90A3 FB_B_DQ<62> FB_B_DQ<62> - @m38_lib.M38 87B3 90A3 FB_B_DQ<61> FB_B_DQ<61> - @m38_lib.M38 87B3 90B3 FB_B_DQ<60> FB_B_DQ<60> - @m38_lib.M38 87B3 90B3 FB_B_DQ<59> FB_B_DQ<59> - @m38_lib.M38 87B3 90B3 FB_B_DQ<58> FB_B_DQ<58> - @m38_lib.M38 87B3 90B3 FB_B_DQ<57> FB_B_DQ<57> - @m38_lib.M38 87B3 90A3 FB_B_DQ<56> FB_B_DQ<56> - @m38_lib.M38 5A5 5C6 87B3 90A2 FB_B_DQ<55> FB_B_DQ<55> - @m38_lib.M38 87B3 90A3 FB_B_DQ<54> FB_B_DQ<54> - @m38_lib.M38 87B3 90A3 FB_B_DQ<53> FB_B_DQ<53> - @m38_lib.M38 87B3 90A3 FB_B_DQ<52> FB_B_DQ<52> - @m38_lib.M38 87B3 90A3 FB_B_DQ<51> FB_B_DQ<51> - @m38_lib.M38 87B3 90A3 FB_B_DQ<50> FB_B_DQ<50> - @m38_lib.M38 87B3 90A3 FB_B_DQ<49> FB_B_DQ<49> - @m38_lib.M38 87B3 90A3 FB_B_DQ<48> FB_B_DQ<48> - @m38_lib.M38 5A5 5C6 87B3 90A2 FB_B_DQ<47> FB_B_DQ<47> - @m38_lib.M38 87B3 90A3 FB_B_DQ<46> FB_B_DQ<46> - @m38_lib.M38 87B3 90A3 FB_B_DQ<45> FB_B_DQ<45> - @m38_lib.M38 87B3 90A3 FB_B_DQ<44> FB_B_DQ<44> - @m38_lib.M38 87B3 90A3 FB_B_DQ<43> FB_B_DQ<43> - @m38_lib.M38 87C3 90A3 FB_B_DQ<42> FB_B_DQ<42> - @m38_lib.M38 87C3 90A3 FB_B_DQ<41> FB_B_DQ<41> - @m38_lib.M38 87C3 90A3 FB_B_DQ<40> FB_B_DQ<40> - @m38_lib.M38 5A5 5C6 87C3 90A2 FB_B_DQ<39> FB_B_DQ<39> - @m38_lib.M38 87C3 90B3 FB_B_DQ<38> FB_B_DQ<38> - @m38_lib.M38 87C3 90B3 FB_B_DQ<37> FB_B_DQ<37> - @m38_lib.M38 87C3 90B3 FB_B_DQ<36> FB_B_DQ<36> - @m38_lib.M38 87C3 90B3 FB_B_DQ<35> FB_B_DQ<35> - @m38_lib.M38 87C3 90B3 FB_B_DQ<34> FB_B_DQ<34> - @m38_lib.M38 87C3 90B3 FB_B_DQ<33> FB_B_DQ<33> - @m38_lib.M38 87C3 90B3 FB_B_DQ<32> FB_B_DQ<32> - @m38_lib.M38 5A5 5C6 87C3 90B2 FB_B_DQ<31> FB_B_DQ<31> - @m38_lib.M38 87C3 90A6 FB_B_DQ<30> FB_B_DQ<30> - @m38_lib.M38 87C3 90B6 FB_B_DQ<29> FB_B_DQ<29> - @m38_lib.M38 87C3 90B6 FB_B_DQ<28> FB_B_DQ<28> - @m38_lib.M38 87C3 90B6 FB_B_DQ<27> FB_B_DQ<27> - @m38_lib.M38 87C3 90B6 FB_B_DQ<26> FB_B_DQ<26> - @m38_lib.M38 87C3 90A6
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8 7 6 5 4 3 2 1
PCI_AD<0> PCI_AD<0> - @m38_lib.M38 22B7 44D5 PCIE_WAKE_L PCIE_WAKE_L - @m38_lib.M38 23C8 41C4 53C7 TP_PCIE_F_R2D_C_P - @m38_lib.M38 54B6 PCIE_F_R2D_C_P PCIE_F_R2D_C_P - @m38_lib.M38 22C4 54B8 TP_PCIE_F_R2D_C_N - @m38_lib.M38 54C6 PCIE_F_R2D_C_N PCIE_F_R2D_C_N - @m38_lib.M38 22C4 54C8 TP_PCIE_F_D2R_P - @m38_lib.M38 54B6 PCIE_F_D2R_P PCIE_F_D2R_P - @m38_lib.M38 22C4 54B8 TP_PCIE_F_D2R_N - @m38_lib.M38 54B6 PCIE_F_D2R_N PCIE_F_D2R_N - @m38_lib.M38 22C4 54B8 TP_PCIE_E_R2D_C_P - @m38_lib.M38 54C6 PCIE_E_R2D_C_P PCIE_E_R2D_C_P - @m38_lib.M38 22C4 54C8 TP_PCIE_E_R2D_C_N - @m38_lib.M38 54C6 PCIE_E_R2D_C_N PCIE_E_R2D_C_N - @m38_lib.M38 22C4 54C8 TP_PCIE_E_D2R_P - @m38_lib.M38 54C6 PCIE_E_D2R_P PCIE_E_D2R_P - @m38_lib.M38 22C4 54C8 TP_PCIE_E_D2R_N - @m38_lib.M38 54C6 PCIE_E_D2R_N PCIE_E_D2R_N - @m38_lib.M38 22C4 54C8 TP_PCIE_D_R2D_C_P - @m38_lib.M38 54D6 PCIE_D_R2D_C_P PCIE_D_R2D_C_P - @m38_lib.M38 22D4 54D8 TP_PCIE_D_R2D_C_N - @m38_lib.M38 54D6 PCIE_D_R2D_C_N PCIE_D_R2D_C_N - @m38_lib.M38 22D4 54D8 TP_PCIE_D_D2R_P - @m38_lib.M38 54C6 PCIE_D_D2R_P PCIE_D_D2R_P - @m38_lib.M38 22D4 54C8 TP_PCIE_D_D2R_N - @m38_lib.M38 54C6 PCIE_D_D2R_N PCIE_D_D2R_N - @m38_lib.M38 22D4 54C8 TP_PCIE_C_R2D_C_P - @m38_lib.M38 54D6 PCIE_C_R2D_C_P PCIE_C_R2D_C_P - @m38_lib.M38 22D4 54D8 TP_PCIE_C_R2D_C_N - @m38_lib.M38 54D6 PCIE_C_R2D_C_N PCIE_C_R2D_C_N - @m38_lib.M38 22D4 54D8 TP_PCIE_C_D2R_P - @m38_lib.M38 54D6 PCIE_C_D2R_P PCIE_C_D2R_P - @m38_lib.M38 22D4 54D8 TP_PCIE_C_D2R_N - @m38_lib.M38 54D6 PCIE_C_D2R_N PCIE_C_D2R_N - @m38_lib.M38 22D4 54D8 PCIE_B_R2D_P PCIE_B_R2D_P - @m38_lib.M38 53B6 PCIE_B_R2D_N PCIE_B_R2D_N - @m38_lib.M38 53B6 PCIE_B_R2D_C_P PCIE_B_R2D_C_P - @m38_lib.M38 22D4 53B7 PCIE_B_R2D_C_N PCIE_B_R2D_C_N - @m38_lib.M38 22D4 53B7 PCIE_B_D2R_P PCIE_B_D2R_P - @m38_lib.M38 5B8 22D4 53C7 PCIE_B_D2R_N PCIE_B_D2R_N - @m38_lib.M38 5B8 22D4 53C7 PCIE_A_R2D_P PCIE_A_R2D_P - @m38_lib.M38 41C5 PCIE_A_R2D_N PCIE_A_R2D_N - @m38_lib.M38 41C5 PCIE_A_R2D_C_P PCIE_A_R2D_C_P - @m38_lib.M38 22D4 41C3 PCIE_A_R2D_C_N PCIE_A_R2D_C_N - @m38_lib.M38 22D4 41C3 PCIE_A_D2R_P PCIE_A_D2R_P - @m38_lib.M38 5C8 22D4 41D4 PCIE_A_D2R_N PCIE_A_D2R_N - @m38_lib.M38 5B8 22D4 41D4 PCIE_A_D2R_C_P PCIE_A_D2R_C_P - @m38_lib.M38 41D5 PCIE_A_D2R_C_N PCIE_A_D2R_C_N - @m38_lib.M38 41D5 PATA_PWR_EN_L PATA_PWR_EN_L - @m38_lib.M38 23B3 23C3 PANEL_ID PANEL_ID - @m38_lib.M38 94C2 94C3 P0V48_SMC_LSREF P0V48_SMC_LSREF - @m38_lib.M38 59A6 59A8 59B7 SB_GPIO5 - @m38_lib.M38 26C2 ODD_PWR_EN_L ODD_PWR_EN_L - @m38_lib.M38 22A6 26C3 SMC_P27 - @m38_lib.M38 58D7 59D6 NC_SMC_P27 NC_SMC_P27 - @m38_lib.M38 59D5 SMC_P26 - @m38_lib.M38 58D7 59D6 NC_SMC_P26 NC_SMC_P26 - @m38_lib.M38 59D5 SMC_P23 - @m38_lib.M38 58D7 59D6 NC_SMC_P23 NC_SMC_P23 - @m38_lib.M38 59D5 SMC_P22 - @m38_lib.M38 58D7 59D6 NC_SMC_P22 NC_SMC_P22 - @m38_lib.M38 59D5 SMC_P21 - @m38_lib.M38 58D7 59D6 NC_SMC_P21 NC_SMC_P21 - @m38_lib.M38 59D5 SMC_P20 - @m38_lib.M38 58D7 59D6 NC_SMC_P20 NC_SMC_P20 - @m38_lib.M38 59D5 NC_JE350_13 NC_JE350_13 - @m38_lib.M38 47B1 NC_FW_NU2 NC_FW_NU2 - @m38_lib.M38 44B3 NC_FW_NU1 NC_FW_NU1 - @m38_lib.M38 44B3 NC_AUD_VREF_PORT_D NC_AUD_VREF_PORT_D - @m38_lib.M38 68C1 NC_AUD_VREF_PORT_C NC_AUD_VREF_PORT_C - @m38_lib.M38 68C1 NC_AUD_VREF_PORT_A NC_AUD_VREF_PORT_A - @m38_lib.M38 68C1 NB_VTTLF_CAP3 NB_VTTLF_CAP3 - @m38_lib.M38 17B4 NB_VTTLF_CAP2 NB_VTTLF_CAP2 - @m38_lib.M38 17A4 NB_VTTLF_CAP1 NB_VTTLF_CAP1 - @m38_lib.M38 17A4 NB_VCCSM_LF5 NB_VCCSM_LF5 - @m38_lib.M38 16B8 NB_VCCSM_LF4 NB_VCCSM_LF4 - @m38_lib.M38 16B8 NB_VCCSM_LF2 NB_VCCSM_LF2 - @m38_lib.M38 16B4 NB_VCCSM_LF1 NB_VCCSM_LF1 - @m38_lib.M38 16B4 NB_TV_DCONSEL1 NB_TV_DCONSEL1 - @m38_lib.M38 14C6 NB_TV_DCONSEL0 NB_TV_DCONSEL0 - @m38_lib.M38 14D6 NB_SB_SYNC_L NB_SB_SYNC_L - @m38_lib.M38 14B6 22A6 NB_RST_IN_L_R NB_RST_IN_L_R - @m38_lib.M38 5C7 14B6 NB_RST_IN_L NB_RST_IN_L - @m38_lib.M38 6B7 14B7 NB_FSB_YSWING NB_FSB_YSWING - @m38_lib.M38 12A6 NB_FSB_YSCOMP NB_FSB_YSCOMP - @m38_lib.M38 12A6 NB_FSB_YRCOMP NB_FSB_YRCOMP - @m38_lib.M38 12A6 NB_FSB_XSWING NB_FSB_XSWING - @m38_lib.M38 12A6 NB_FSB_XSCOMP NB_FSB_XSCOMP - @m38_lib.M38 12A6 NB_FSB_XRCOMP NB_FSB_XRCOMP - @m38_lib.M38 12A6 NB_FSB_VREF NB_FSB_VREF - @m38_lib.M38 5D4 12C4 NB_CLK100M_GCLKIN_P NB_CLK100M_GCLKIN_P - @m38_lib.M38 5C7 14C4 34B4 34C2 NB_CLK100M_GCLKIN_N NB_CLK100M_GCLKIN_N - @m38_lib.M38 5C7 14C4 34B4 34C2 NB_CFG<20> NB_CFG<20> - @m38_lib.M38 14B6 20A5 NB_CFG<19> NB_CFG<19> - @m38_lib.M38 14C6 20B5 NB_CFG<18> NB_CFG<18> - @m38_lib.M38 14C6 20B5 NB_CFG<17> NB_CFG<17> - @m38_lib.M38 14C6 NB_CFG<16> NB_CFG<16> - @m38_lib.M38 14C6 20C5 NB_CFG<15> NB_CFG<15> - @m38_lib.M38 14C6 NB_CFG<14> NB_CFG<14> - @m38_lib.M38 14C6 NB_CFG<13> NB_CFG<13> - @m38_lib.M38 14C6 NB_CFG<12> NB_CFG<12> - @m38_lib.M38 14C6 NB_CFG<11> NB_CFG<11> - @m38_lib.M38 14C6 NB_CFG<10> NB_CFG<10> - @m38_lib.M38 14C6 NB_CFG<9> NB_CFG<9> - @m38_lib.M38 14C6 20B7 NB_CFG<8> NB_CFG<8> - @m38_lib.M38 14C6 NB_CFG<7> NB_CFG<7> - @m38_lib.M38 14C6 20C7 NB_CFG<6> NB_CFG<6> - @m38_lib.M38 14C6 NB_CFG<5> NB_CFG<5> - @m38_lib.M38 14C6 20C7 NB_CFG<4> NB_CFG<4> - @m38_lib.M38 14C6 NB_CFG<3> NB_CFG<3> - @m38_lib.M38 14C6 NB_BSEL<2> NB_BSEL<2> - @m38_lib.M38 14C6 34A8 NB_BSEL<1> NB_BSEL<1> - @m38_lib.M38 14C6 34B8 NB_BSEL<0> NB_BSEL<0> - @m38_lib.M38 14C6 34B8 MEM_VREF_NB_1 MEM_VREF_NB_1 - @m38_lib.M38 5B7 14C4 19B7 MEM_VREF_NB_0 MEM_VREF_NB_0 - @m38_lib.M38 5B7 14C4 19B6 MEM_VREF MEM_VREF - @m38_lib.M38 5C4 28C7 28D6 29D6 MEM_RCOMP_L MEM_RCOMP_L - @m38_lib.M38 14C4 MEM_RCOMP MEM_RCOMP - @m38_lib.M38 14C4 MEM_ODT<3> MEM_ODT<3> - @m38_lib.M38 14C4 29B6 MEM_ODT<2> MEM_ODT<2> - @m38_lib.M38 14C4 29B3 MEM_ODT<1> MEM_ODT<1> - @m38_lib.M38 14C4 28B6 MEM_ODT<3..0> MEM_ODT<3..0> - @m38_lib.M38 30D6 MEM_ODT<0> MEM_ODT<0> - @m38_lib.M38 14C4 28B3 MEM_CS_L<3> MEM_CS_L<3> - @m38_lib.M38 14C4 29B6
MEM_CS_L<2> MEM_CS_L<2> - @m38_lib.M38 14C4 29B3 MEM_CS_L<1> MEM_CS_L<1> - @m38_lib.M38 14C4 28B6 MEM_CS_L<3..0> MEM_CS_L<3..0> - @m38_lib.M38 30D6 MEM_CS_L<0> MEM_CS_L<0> - @m38_lib.M38 14C4 28B3 MEM_CLK_P<3> MEM_CLK_P<3> - @m38_lib.M38 14D4 29D3 MEM_CLK_P<2> MEM_CLK_P<2> - @m38_lib.M38 14D4 29A3 MEM_CLK_P<1> MEM_CLK_P<1> - @m38_lib.M38 14D4 28A3 MEM_CLK_P<0> MEM_CLK_P<0> - @m38_lib.M38 14D4 28D3 MEM_CLK_N<3> MEM_CLK_N<3> - @m38_lib.M38 14D4 29D3 MEM_CLK_N<2> MEM_CLK_N<2> - @m38_lib.M38 14D4 29A3 MEM_CLK_N<1> MEM_CLK_N<1> - @m38_lib.M38 14D4 28A3 MEM_CLK_N<0> MEM_CLK_N<0> - @m38_lib.M38 14D4 28D3 MEM_CKE<3> MEM_CKE<3> - @m38_lib.M38 14C4 29C3 MEM_CKE<2> MEM_CKE<2> - @m38_lib.M38 14C4 29C6 MEM_CKE<1> MEM_CKE<1> - @m38_lib.M38 14C4 28C3 MEM_CKE<3..0> MEM_CKE<3..0> - @m38_lib.M38 30D6 MEM_CKE<0> MEM_CKE<0> - @m38_lib.M38 14C4 28C6 MEM_B_WE_L MEM_B_WE_L - @m38_lib.M38 15B2 29B6 30A6 MEM_B_SPD_SA1 MEM_B_SPD_SA1 - @m38_lib.M38 29A4 MEM_B_RAS_L MEM_B_RAS_L - @m38_lib.M38 15B2 29B3 30A6 MEM_B_DQS_P<7> MEM_B_DQS_P<7> - @m38_lib.M38 5A7 15C2 29A3 MEM_B_DQS_P<6> MEM_B_DQS_P<6> - @m38_lib.M38 5A7 15C2 29A6 MEM_B_DQS_P<5> MEM_B_DQS_P<5> - @m38_lib.M38 5A7 15C2 29A3 MEM_B_DQS_P<4> MEM_B_DQS_P<4> - @m38_lib.M38 5A7 15C2 29B6 MEM_B_DQS_P<3> MEM_B_DQS_P<3> - @m38_lib.M38 5A7 15C2 29C3 MEM_B_DQS_P<2> MEM_B_DQS_P<2> - @m38_lib.M38 5A7 15C2 29C6 MEM_B_DQS_P<1> MEM_B_DQS_P<1> - @m38_lib.M38 5A7 15C2 29D6 MEM_B_DQS_P<0> MEM_B_DQS_P<0> - @m38_lib.M38 5A7 15C2 29D6 MEM_B_DQS_N<7> MEM_B_DQS_N<7> - @m38_lib.M38 5A7 15C2 29A3 MEM_B_DQS_N<6> MEM_B_DQS_N<6> - @m38_lib.M38 5A7 15C2 29A6 MEM_B_DQS_N<5> MEM_B_DQS_N<5> - @m38_lib.M38 5A7 15C2 29B3 MEM_B_DQS_N<4> MEM_B_DQS_N<4> - @m38_lib.M38 5A7 15C2 29B6 MEM_B_DQS_N<3> MEM_B_DQS_N<3> - @m38_lib.M38 5A7 15C2 29C3 MEM_B_DQS_N<2> MEM_B_DQS_N<2> - @m38_lib.M38 5A7 15C2 29C6 MEM_B_DQS_N<1> MEM_B_DQS_N<1> - @m38_lib.M38 5A7 15C2 29D6 MEM_B_DQS_N<0> MEM_B_DQS_N<0> - @m38_lib.M38 5A7 15C2 29D6 MEM_B_DQ<63> MEM_B_DQ<63> - @m38_lib.M38 15A4 29A3 MEM_B_DQ<62> MEM_B_DQ<62> - @m38_lib.M38 5A7 15A4 29A3 MEM_B_DQ<61> MEM_B_DQ<61> - @m38_lib.M38 15A4 29A3 MEM_B_DQ<60> MEM_B_DQ<60> - @m38_lib.M38 15A4 29A3 MEM_B_DQ<59> MEM_B_DQ<59> - @m38_lib.M38 15B4 29A6 MEM_B_DQ<58> MEM_B_DQ<58> - @m38_lib.M38 15B4 29A6 MEM_B_DQ<57> MEM_B_DQ<57> - @m38_lib.M38 15B4 29A6 MEM_B_DQ<56> MEM_B_DQ<56> - @m38_lib.M38 15B4 29A6 MEM_B_DQ<55> MEM_B_DQ<55> - @m38_lib.M38 15B4 29A3 MEM_B_DQ<54> MEM_B_DQ<54> - @m38_lib.M38 15B4 29A3 MEM_B_DQ<53> MEM_B_DQ<53> - @m38_lib.M38 15B4 29A3 MEM_B_DQ<52> MEM_B_DQ<52> - @m38_lib.M38 15B4 29A3 MEM_B_DQ<51> MEM_B_DQ<51> - @m38_lib.M38 15B4 29A6 MEM_B_DQ<50> MEM_B_DQ<50> - @m38_lib.M38 15B4 29A6 MEM_B_DQ<49> MEM_B_DQ<49> - @m38_lib.M38 15B4 29A6 MEM_B_DQ<48> MEM_B_DQ<48> - @m38_lib.M38 5A7 15B4 29A6 MEM_B_DQ<47> MEM_B_DQ<47> - @m38_lib.M38 15B4 29A3 MEM_B_DQ<46> MEM_B_DQ<46> - @m38_lib.M38 15B4 29A3 MEM_B_DQ<45> MEM_B_DQ<45> - @m38_lib.M38 15B4 29B3 MEM_B_DQ<44> MEM_B_DQ<44> - @m38_lib.M38 5A7 15B4 29B3 MEM_B_DQ<43> MEM_B_DQ<43> - @m38_lib.M38 15B4 29A6 MEM_B_DQ<42> MEM_B_DQ<42> - @m38_lib.M38 15B4 29A6 MEM_B_DQ<41> MEM_B_DQ<41> - @m38_lib.M38 15B4 29B6 MEM_B_DQ<40> MEM_B_DQ<40> - @m38_lib.M38 15B4 29B6 MEM_B_DQ<39> MEM_B_DQ<39> - @m38_lib.M38 15B4 29B3 MEM_B_DQ<38> MEM_B_DQ<38> - @m38_lib.M38 5A7 15B4 29B3 MEM_B_DQ<37> MEM_B_DQ<37> - @m38_lib.M38 15B4 29B3 MEM_B_DQ<36> MEM_B_DQ<36> - @m38_lib.M38 15B4 29B3 MEM_B_DQ<35> MEM_B_DQ<35> - @m38_lib.M38 15B4 29B6 MEM_B_DQ<34> MEM_B_DQ<34> - @m38_lib.M38 15B4 29B6 MEM_B_DQ<33> MEM_B_DQ<33> - @m38_lib.M38 15C4 29B6 MEM_B_DQ<32> MEM_B_DQ<32> - @m38_lib.M38 15C4 29B6 MEM_B_DQ<31> MEM_B_DQ<31> - @m38_lib.M38 15C4 29C3 MEM_B_DQ<30> MEM_B_DQ<30> - @m38_lib.M38 15C4 29C3 MEM_B_DQ<29> MEM_B_DQ<29> - @m38_lib.M38 15C4 29C3 MEM_B_DQ<28> MEM_B_DQ<28> - @m38_lib.M38 15C4 29C3 MEM_B_DQ<27> MEM_B_DQ<27> - @m38_lib.M38 15C4 29C6 MEM_B_DQ<26> MEM_B_DQ<26> - @m38_lib.M38 15C4 29C6 MEM_B_DQ<25> MEM_B_DQ<25> - @m38_lib.M38 5A7 15C4 29C6 MEM_B_DQ<24> MEM_B_DQ<24> - @m38_lib.M38 15C4 29C6 MEM_B_DQ<23> MEM_B_DQ<23> - @m38_lib.M38 5A7 15C4 29C3 MEM_B_DQ<22> MEM_B_DQ<22> - @m38_lib.M38 15C4 29C3 MEM_B_DQ<21> MEM_B_DQ<21> - @m38_lib.M38 15C4 29C3 MEM_B_DQ<20> MEM_B_DQ<20> - @m38_lib.M38 15C4 29C3 MEM_B_DQ<19> MEM_B_DQ<19> - @m38_lib.M38 15C4 29C6 MEM_B_DQ<18> MEM_B_DQ<18> - @m38_lib.M38 15C4 29C6 MEM_B_DQ<17> MEM_B_DQ<17> - @m38_lib.M38 15C4 29C6 MEM_B_DQ<16> MEM_B_DQ<16> - @m38_lib.M38 15C4 29C6 MEM_B_DQ<15> MEM_B_DQ<15> - @m38_lib.M38 15C4 29D3 MEM_B_DQ<14> MEM_B_DQ<14> - @m38_lib.M38 15C4 29D3 MEM_B_DQ<13> MEM_B_DQ<13> - @m38_lib.M38 15C4 29D3 MEM_B_DQ<12> MEM_B_DQ<12> - @m38_lib.M38 15C4 29D3 MEM_B_DQ<11> MEM_B_DQ<11> - @m38_lib.M38 15C4 29D6 MEM_B_DQ<10> MEM_B_DQ<10> - @m38_lib.M38 15C4 29D6 MEM_B_DQ<9> MEM_B_DQ<9> - @m38_lib.M38 15C4 29D6 MEM_B_DQ<8> MEM_B_DQ<8> - @m38_lib.M38 5A7 15C4 29D6 MEM_B_DQ<7> MEM_B_DQ<7> - @m38_lib.M38 15D4 29D3 MEM_B_DQ<6> MEM_B_DQ<6> - @m38_lib.M38 5A7 15D4 29D3 MEM_B_DQ<5> MEM_B_DQ<5> - @m38_lib.M38 15D4 29D3 MEM_B_DQ<4> MEM_B_DQ<4> - @m38_lib.M38 15D4 29D3 MEM_B_DQ<3> MEM_B_DQ<3> - @m38_lib.M38 15D4 29D6 MEM_B_DQ<2> MEM_B_DQ<2> - @m38_lib.M38 15D4 29D6 MEM_B_DQ<1> MEM_B_DQ<1> - @m38_lib.M38 15D4 29D6 MEM_B_DQ<0> MEM_B_DQ<0> - @m38_lib.M38 15D4 29D6 MEM_B_DM<7> MEM_B_DM<7> - @m38_lib.M38 15C2 29A6 MEM_B_DM<6> MEM_B_DM<6> - @m38_lib.M38 15C2 29A3 MEM_B_DM<5> MEM_B_DM<5> - @m38_lib.M38 15C2 29A6 MEM_B_DM<4> MEM_B_DM<4> - @m38_lib.M38 15C2 29B3 MEM_B_DM<3> MEM_B_DM<3> - @m38_lib.M38 15C2 29C6 MEM_B_DM<2> MEM_B_DM<2> - @m38_lib.M38 15D2 29C3 MEM_B_DM<1> MEM_B_DM<1> - @m38_lib.M38 15D2 29D3 MEM_B_DM<0> MEM_B_DM<0> - @m38_lib.M38 15D2 29D3 MEM_B_CAS_L MEM_B_CAS_L - @m38_lib.M38 15D2 29B6 30A6 MEM_B_BS<2> MEM_B_BS<2> - @m38_lib.M38 15D2 29C6 MEM_B_BS<1> MEM_B_BS<1> - @m38_lib.M38 15D2 29B3 MEM_B_BS<2..0> MEM_B_BS<2..0> - @m38_lib.M38 30A6 MEM_B_BS<0> MEM_B_BS<0> - @m38_lib.M38 15D2 29B6 MEM_B_A<13> MEM_B_A<13> - @m38_lib.M38 15B2 29B3 30A5 MEM_B_A<12> MEM_B_A<12> - @m38_lib.M38 15B2 29C6 30A5 MEM_B_A<11> MEM_B_A<11> - @m38_lib.M38 15B2 29C3 30A5 MEM_B_A<10> MEM_B_A<10> - @m38_lib.M38 15B2 29B6 30B5 MEM_B_A<9> MEM_B_A<9> - @m38_lib.M38 15B2 29C6 30B5 MEM_B_A<8> MEM_B_A<8> - @m38_lib.M38 15B2 29C6 30B5 MEM_B_A<7> MEM_B_A<7> - @m38_lib.M38 15B2 29C3 30B5 MEM_B_A<6> MEM_B_A<6> - @m38_lib.M38 15B2 29C3 30B5 MEM_B_A<5> MEM_B_A<5> - @m38_lib.M38 15B2 29B6 30B5 MEM_B_A<4> MEM_B_A<4> - @m38_lib.M38 15B2 29B3 30B5 MEM_B_A<3> MEM_B_A<3> - @m38_lib.M38 15B2 29B6 30B5
MEM_B_A<2> MEM_B_A<2> - @m38_lib.M38 15C2 29B3 30B5 MEM_B_A<1> MEM_B_A<1> - @m38_lib.M38 15C2 29B6 30B5 MEM_B_A<0> MEM_B_A<0> - @m38_lib.M38 15C2 29B3 30B5 MEM_A_WE_L MEM_A_WE_L - @m38_lib.M38 15B5 28B6 30B6 MEM_A_RAS_L MEM_A_RAS_L - @m38_lib.M38 15B5 28B3 30B6 MEM_A_DQS_P<7> MEM_A_DQS_P<7> - @m38_lib.M38 5B7 15C5 28A3 MEM_A_DQS_P<6> MEM_A_DQS_P<6> - @m38_lib.M38 5B7 15C5 28A6 MEM_A_DQS_P<5> MEM_A_DQS_P<5> - @m38_lib.M38 5B7 15C5 28A3 MEM_A_DQS_P<4> MEM_A_DQS_P<4> - @m38_lib.M38 5B7 15C5 28B6 MEM_A_DQS_P<3> MEM_A_DQS_P<3> - @m38_lib.M38 5B7 15C5 28C3 MEM_A_DQS_P<2> MEM_A_DQS_P<2> - @m38_lib.M38 5B7 15C5 28C6 MEM_A_DQS_P<1> MEM_A_DQS_P<1> - @m38_lib.M38 5B7 15C5 28D6 MEM_A_DQS_P<0> MEM_A_DQS_P<0> - @m38_lib.M38 5B7 15C5 28D6 MEM_A_DQS_N<7> MEM_A_DQS_N<7> - @m38_lib.M38 5B7 15C5 28A3 MEM_A_DQS_N<6> MEM_A_DQS_N<6> - @m38_lib.M38 5B7 15C5 28A6 MEM_A_DQS_N<5> MEM_A_DQS_N<5> - @m38_lib.M38 5B7 15C5 28B3 MEM_A_DQS_N<4> MEM_A_DQS_N<4> - @m38_lib.M38 5B7 15C5 28B6 MEM_A_DQS_N<3> MEM_A_DQS_N<3> - @m38_lib.M38 5B7 15C5 28C3 MEM_A_DQS_N<2> MEM_A_DQS_N<2> - @m38_lib.M38 5B7 15C5 28C6 MEM_A_DQS_N<1> MEM_A_DQS_N<1> - @m38_lib.M38 5B7 15C5 28D6 MEM_A_DQS_N<0> MEM_A_DQS_N<0> - @m38_lib.M38 5B7 15C5 28D6 MEM_A_DQ<63> MEM_A_DQ<63> - @m38_lib.M38 15A7 28A3 MEM_A_DQ<62> MEM_A_DQ<62> - @m38_lib.M38 15A7 28A3 MEM_A_DQ<61> MEM_A_DQ<61> - @m38_lib.M38 15A7 28A3 MEM_A_DQ<60> MEM_A_DQ<60> - @m38_lib.M38 15A7 28A3 MEM_A_DQ<59> MEM_A_DQ<59> - @m38_lib.M38 5B7 15B7 28A6 MEM_A_DQ<58> MEM_A_DQ<58> - @m38_lib.M38 15B7 28A6 MEM_A_DQ<57> MEM_A_DQ<57> - @m38_lib.M38 15B7 28A6 MEM_A_DQ<56> MEM_A_DQ<56> - @m38_lib.M38 15B7 28A6 MEM_A_DQ<55> MEM_A_DQ<55> - @m38_lib.M38 15B7 28A3 MEM_A_DQ<54> MEM_A_DQ<54> - @m38_lib.M38 5B7 15B7 28A3 MEM_A_DQ<53> MEM_A_DQ<53> - @m38_lib.M38 15B7 28A3 MEM_A_DQ<52> MEM_A_DQ<52> - @m38_lib.M38 15B7 28A3 MEM_A_DQ<51> MEM_A_DQ<51> - @m38_lib.M38 15B7 28A6 MEM_A_DQ<50> MEM_A_DQ<50> - @m38_lib.M38 15B7 28A6 MEM_A_DQ<49> MEM_A_DQ<49> - @m38_lib.M38 15B7 28A6 MEM_A_DQ<48> MEM_A_DQ<48> - @m38_lib.M38 15B7 28A6 MEM_A_DQ<47> MEM_A_DQ<47> - @m38_lib.M38 5B7 15B7 28A3 MEM_A_DQ<46> MEM_A_DQ<46> - @m38_lib.M38 15B7 28A3 MEM_A_DQ<45> MEM_A_DQ<45> - @m38_lib.M38 15B7 28B3 MEM_A_DQ<44> MEM_A_DQ<44> - @m38_lib.M38 15B7 28B3 MEM_A_DQ<43> MEM_A_DQ<43> - @m38_lib.M38 15B7 28A6 MEM_A_DQ<42> MEM_A_DQ<42> - @m38_lib.M38 15B7 28A6 MEM_A_DQ<41> MEM_A_DQ<41> - @m38_lib.M38 15B7 28B6 MEM_A_DQ<40> MEM_A_DQ<40> - @m38_lib.M38 15B7 28B6 MEM_A_DQ<39> MEM_A_DQ<39> - @m38_lib.M38 5B7 15B7 28B3 MEM_A_DQ<38> MEM_A_DQ<38> - @m38_lib.M38 15B7 28B3 MEM_A_DQ<37> MEM_A_DQ<37> - @m38_lib.M38 15B7 28B3 MEM_A_DQ<36> MEM_A_DQ<36> - @m38_lib.M38 15B7 28B3 MEM_A_DQ<35> MEM_A_DQ<35> - @m38_lib.M38 15B7 28B6 MEM_A_DQ<34> MEM_A_DQ<34> - @m38_lib.M38 15B7 28B6 MEM_A_DQ<33> MEM_A_DQ<33> - @m38_lib.M38 15C7 28B6 MEM_A_DQ<32> MEM_A_DQ<32> - @m38_lib.M38 15C7 28B6 MEM_A_DQ<31> MEM_A_DQ<31> - @m38_lib.M38 15C7 28C3 MEM_A_DQ<30> MEM_A_DQ<30> - @m38_lib.M38 15C7 28C3 MEM_A_DQ<29> MEM_A_DQ<29> - @m38_lib.M38 15C7 28C3 MEM_A_DQ<28> MEM_A_DQ<28> - @m38_lib.M38 15C7 28C3 MEM_A_DQ<27> MEM_A_DQ<27> - @m38_lib.M38 15C7 28C6 MEM_A_DQ<26> MEM_A_DQ<26> - @m38_lib.M38 15C7 28C6 MEM_A_DQ<25> MEM_A_DQ<25> - @m38_lib.M38 5B7 15C7 28C6 MEM_A_DQ<24> MEM_A_DQ<24> - @m38_lib.M38 15C7 28C6 MEM_A_DQ<23> MEM_A_DQ<23> - @m38_lib.M38 15C7 28C3 MEM_A_DQ<22> MEM_A_DQ<22> - @m38_lib.M38 15C7 28C3 MEM_A_DQ<21> MEM_A_DQ<21> - @m38_lib.M38 15C7 28C3 MEM_A_DQ<20> MEM_A_DQ<20> - @m38_lib.M38 15C7 28C3 MEM_A_DQ<19> MEM_A_DQ<19> - @m38_lib.M38 15C7 28C6 MEM_A_DQ<18> MEM_A_DQ<18> - @m38_lib.M38 15C7 28C6 MEM_A_DQ<17> MEM_A_DQ<17> - @m38_lib.M38 15C7 28C6 MEM_A_DQ<16> MEM_A_DQ<16> - @m38_lib.M38 5B7 15C7 28C6 MEM_A_DQ<15> MEM_A_DQ<15> - @m38_lib.M38 15C7 28D3 MEM_A_DQ<14> MEM_A_DQ<14> - @m38_lib.M38 5B7 15C7 28D3 MEM_A_DQ<13> MEM_A_DQ<13> - @m38_lib.M38 15C7 28D3 MEM_A_DQ<12> MEM_A_DQ<12> - @m38_lib.M38 15C7 28D3 MEM_A_DQ<11> MEM_A_DQ<11> - @m38_lib.M38 15C7 28D6 MEM_A_DQ<10> MEM_A_DQ<10> - @m38_lib.M38 15C7 28D6 MEM_A_DQ<9> MEM_A_DQ<9> - @m38_lib.M38 15C7 28D6 MEM_A_DQ<8> MEM_A_DQ<8> - @m38_lib.M38 15C7 28D6 MEM_A_DQ<7> MEM_A_DQ<7> - @m38_lib.M38 5B7 15D7 28D3 MEM_A_DQ<6> MEM_A_DQ<6> - @m38_lib.M38 15D7 28D3 MEM_A_DQ<5> MEM_A_DQ<5> - @m38_lib.M38 15D7 28D3 MEM_A_DQ<4> MEM_A_DQ<4> - @m38_lib.M38 15D7 28D3 MEM_A_DQ<3> MEM_A_DQ<3> - @m38_lib.M38 15D7 28D6 MEM_A_DQ<2> MEM_A_DQ<2> - @m38_lib.M38 15D7 28D6 MEM_A_DQ<1> MEM_A_DQ<1> - @m38_lib.M38 15D7 28D6 MEM_A_DQ<0> MEM_A_DQ<0> - @m38_lib.M38 15D7 28D6 MEM_A_DM<7> MEM_A_DM<7> - @m38_lib.M38 15C5 28A6 MEM_A_DM<6> MEM_A_DM<6> - @m38_lib.M38 15C5 28A3 MEM_A_DM<5> MEM_A_DM<5> - @m38_lib.M38 15C5 28A6 MEM_A_DM<4> MEM_A_DM<4> - @m38_lib.M38 15C5 28B3 MEM_A_DM<3> MEM_A_DM<3> - @m38_lib.M38 15C5 28C6 MEM_A_DM<2> MEM_A_DM<2> - @m38_lib.M38 15D5 28C3 MEM_A_DM<1> MEM_A_DM<1> - @m38_lib.M38 15D5 28D3 MEM_A_DM<0> MEM_A_DM<0> - @m38_lib.M38 15D5 28D3 MEM_A_CAS_L MEM_A_CAS_L - @m38_lib.M38 15D5 28B6 30B6 MEM_A_BS<2> MEM_A_BS<2> - @m38_lib.M38 15D5 28C6 MEM_A_BS<1> MEM_A_BS<1> - @m38_lib.M38 15D5 28B3 MEM_A_BS<2..0> MEM_A_BS<2..0> - @m38_lib.M38 30C6 MEM_A_BS<0> MEM_A_BS<0> - @m38_lib.M38 15D5 28B6 MEM_A_A<13> MEM_A_A<13> - @m38_lib.M38 15B5 28B3 MEM_A_A<12> MEM_A_A<12> - @m38_lib.M38 15B5 28C6 MEM_A_A<11> MEM_A_A<11> - @m38_lib.M38 15B5 28C3 MEM_A_A<10> MEM_A_A<10> - @m38_lib.M38 15B5 28B6 MEM_A_A<9> MEM_A_A<9> - @m38_lib.M38 15B5 28C6 MEM_A_A<8> MEM_A_A<8> - @m38_lib.M38 15B5 28C6 MEM_A_A<7> MEM_A_A<7> - @m38_lib.M38 15B5 28C3 MEM_A_A<6> MEM_A_A<6> - @m38_lib.M38 15B5 28C3 MEM_A_A<5> MEM_A_A<5> - @m38_lib.M38 15B5 28B6 MEM_A_A<4> MEM_A_A<4> - @m38_lib.M38 15B5 28B3 MEM_A_A<3> MEM_A_A<3> - @m38_lib.M38 15B5 28B6 MEM_A_A<2> MEM_A_A<2> - @m38_lib.M38 15C5 28B3 MEM_A_A<1> MEM_A_A<1> - @m38_lib.M38 15C5 28B6 MEM_A_A<13..0> MEM_A_A<13..0> - @m38_lib.M38 30C6 MEM_A_A<0> MEM_A_A<0> - @m38_lib.M38 15C5 28B3 MEMVTT_VREF MEMVTT_VREF - @m38_lib.M38 31B4 TP_LVDS_VREFL - @m38_lib.M38 19C1 LVDS_VREFL LVDS_VREFL - @m38_lib.M38 13D5 19C2 TP_LVDS_VREFH - @m38_lib.M38 19C1 LVDS_VREFH LVDS_VREFH - @m38_lib.M38 13D5 19C2 TP_LVDS_VDDEN - @m38_lib.M38 19C1 LVDS_VDDEN LVDS_VDDEN - @m38_lib.M38 13D5 19C2 LVDS_U_DATA_P<3> LVDS_U_DATA_P<3> - @m38_lib.M38 93B3 94A7 LVDS_U_DATA_P<2> LVDS_U_DATA_P<2> - @m38_lib.M38 93B3 94B6 LVDS_U_DATA_P<1> LVDS_U_DATA_P<1> - @m38_lib.M38 93B3 94B6 LVDS_U_DATA_P<0> LVDS_U_DATA_P<0> - @m38_lib.M38 93B3 94B6
LVDS_U_DATA_N<3> LVDS_U_DATA_N<3> - @m38_lib.M38 93B3 94A6 LVDS_U_DATA_N<2> LVDS_U_DATA_N<2> - @m38_lib.M38 93B3 94B7 LVDS_U_DATA_N<1> LVDS_U_DATA_N<1> - @m38_lib.M38 93B3 94B7 LVDS_U_DATA_N<0> LVDS_U_DATA_N<0> - @m38_lib.M38 93B3 94B7 LVDS_U_CLK_P LVDS_U_CLK_P - @m38_lib.M38 93B3 94A7 LVDS_U_CLK_N LVDS_U_CLK_N - @m38_lib.M38 93B3 94B6 LVDS_L_DATA_P<3> LVDS_L_DATA_P<3> - @m38_lib.M38 93A3 94A7 LVDS_L_DATA_P<2> LVDS_L_DATA_P<2> - @m38_lib.M38 93A3 93C2 94A7 LVDS_L_DATA_P<1> LVDS_L_DATA_P<1> - @m38_lib.M38 93A3 93C2 94A6 LVDS_L_DATA_P<0> LVDS_L_DATA_P<0> - @m38_lib.M38 93A3 93D2 94A7 LVDS_L_DATA_N<3> LVDS_L_DATA_N<3> - @m38_lib.M38 93A3 94A6 LVDS_L_DATA_N<2> LVDS_L_DATA_N<2> - @m38_lib.M38 93A3 93C2 94A6 LVDS_L_DATA_N<1> LVDS_L_DATA_N<1> - @m38_lib.M38 93A3 93C2 94A7 LVDS_L_DATA_N<0> LVDS_L_DATA_N<0> - @m38_lib.M38 93A3 93C2 94A6 LVDS_L_CLK_P LVDS_L_CLK_P - @m38_lib.M38 93A3 93D2 94A7 LVDS_L_CLK_N LVDS_L_CLK_N - @m38_lib.M38 93A3 93D2 94A6 TP_LVDS_IBG - @m38_lib.M38 19C1 LVDS_IBG LVDS_IBG - @m38_lib.M38 13D5 19C2 TP_LVDS_DDC_DATA - @m38_lib.M38 19C1 LVDS_DDC_DATA LVDS_DDC_DATA - @m38_lib.M38 13D5 19C2 TP_LVDS_DDC_CLK - @m38_lib.M38 19C1 LVDS_DDC_CLK LVDS_DDC_CLK - @m38_lib.M38 13D5 19C2 TP_LVDS_CLKCTLB - @m38_lib.M38 19C1 LVDS_CLKCTLB LVDS_CLKCTLB - @m38_lib.M38 13D5 19C2 TP_LVDS_CLKCTLA - @m38_lib.M38 19C1 LVDS_CLKCTLA LVDS_CLKCTLA - @m38_lib.M38 13D5 19C2 LVDS_B_DATA_P<2> LVDS_B_DATA_P<2> - @m38_lib.M38 13C5 19D2 LVDS_B_DATA_P<1> LVDS_B_DATA_P<1> - @m38_lib.M38 13C5 19D2 LVDS_B_DATA_P<0> LVDS_B_DATA_P<0> - @m38_lib.M38 13C5 19D2 LVDS_B_DATA_N<2> LVDS_B_DATA_N<2> - @m38_lib.M38 13C5 19D2 LVDS_B_DATA_N<1> LVDS_B_DATA_N<1> - @m38_lib.M38 13C5 19D2 LVDS_B_DATA_N<0> LVDS_B_DATA_N<0> - @m38_lib.M38 13C5 19D2 TP_LVDS_B_CLK_P - @m38_lib.M38 19D1 LVDS_B_CLK_P LVDS_B_CLK_P - @m38_lib.M38 13C5 19D2 TP_LVDS_B_CLK_N - @m38_lib.M38 19D1 LVDS_B_CLK_N LVDS_B_CLK_N - @m38_lib.M38 13C5 19D2 TP_LVDS_BKLTEN - @m38_lib.M38 19C1 LVDS_BKLTEN LVDS_BKLTEN - @m38_lib.M38 13D5 19C2 TP_LVDS_BKLTCTL - @m38_lib.M38 19C1 LVDS_BKLTCTL LVDS_BKLTCTL - @m38_lib.M38 13D5 19C2 LVDS_A_DATA_P<2> LVDS_A_DATA_P<2> - @m38_lib.M38 13C5 19D2 LVDS_A_DATA_P<1> LVDS_A_DATA_P<1> - @m38_lib.M38 13C5 19D2 LVDS_A_DATA_P<0> LVDS_A_DATA_P<0> - @m38_lib.M38 13C5 19D2 LVDS_A_DATA_N<2> LVDS_A_DATA_N<2> - @m38_lib.M38 13C5 19D2 LVDS_A_DATA_N<1> LVDS_A_DATA_N<1> - @m38_lib.M38 13C5 19D2 LVDS_A_DATA_N<0> LVDS_A_DATA_N<0> - @m38_lib.M38 13C5 19D2 TP_LVDS_A_CLK_P - @m38_lib.M38 19D1 LVDS_A_CLK_P LVDS_A_CLK_P - @m38_lib.M38 13C5 19D2 TP_LVDS_A_CLK_N - @m38_lib.M38 19D1 LVDS_A_CLK_N LVDS_A_CLK_N - @m38_lib.M38 13D5 19D2 LPC_FRAME_L LPC_FRAME_L - @m38_lib.M38 21C5 58C7 60C6 67C6 LPC_AD<3> LPC_AD<3> - @m38_lib.M38 21D4 58C7 60C3 67C6 LPC_AD<2> LPC_AD<2> - @m38_lib.M38 21D4 58C7 60C3 67C6 LPC_AD<1> LPC_AD<1> - @m38_lib.M38 21D4 58D7 60C6 67C6 LPC_AD<0> LPC_AD<0> - @m38_lib.M38 21D4 58D7 60C6 67C6 LED_PP1V8_S3_P LED_PP1V8_S3_P - @m38_lib.M38 79A4 LED_PP1V8_S3_N LED_PP1V8_S3_N - @m38_lib.M38 79A4 LED_PP1V5_S0_P LED_PP1V5_S0_P - @m38_lib.M38 80A4 LED_PP1V5_S0_N LED_PP1V5_S0_N - @m38_lib.M38 80A3 LED_PP1V05_S0_P LED_PP1V05_S0_P - @m38_lib.M38 81A4 LED_PP1V05_S0_N LED_PP1V05_S0_N - @m38_lib.M38 81A4 LED4303_1 LED4303_1 - @m38_lib.M38 43D1 LED4302_1 LED4302_1 - @m38_lib.M38 43D1 LED4301_1 LED4301_1 - @m38_lib.M38 43D1 LED4300_1 LED4300_1 - @m38_lib.M38 43D2 LCD_PWREN_L_RC LCD_PWREN_L_RC - @m38_lib.M38 94C7 LCD_PWREN_L LCD_PWREN_L - @m38_lib.M38 94C8 LCD_PWM_R LCD_PWM_R - @m38_lib.M38 94B2 LCD_PWM LCD_PWM - @m38_lib.M38 94B1 94C3 KBC_MDE KBC_MDE - @m38_lib.M38 58C2 JDREF JDREF - @m38_lib.M38 68C4 ITS_RUNNING ITS_RUNNING - @m38_lib.M38 6A6 ITS_PLUGGED_IN ITS_PLUGGED_IN - @m38_lib.M38 6A8 ITS_ALIVE ITS_ALIVE - @m38_lib.M38 6A7 ITP_TDO ITP_TDO - @m38_lib.M38 11B3 ITPRESET_L ITPRESET_L - @m38_lib.M38 11B3 ISENSE_CAL_EN_L_R ISENSE_CAL_EN_L_R - @m38_lib.M38 76A7 ISENSE_CAL_EN_LS12V ISENSE_CAL_EN_LS12V - @m38_lib.M38 76B6 ISENSE_CAL_EN_L ISENSE_CAL_EN_L - @m38_lib.M38 76B7 ISENSE_CAL_EN ISENSE_CAL_EN - @m38_lib.M38 58B7 76A8 INT_SERIRQ INT_SERIRQ - @m38_lib.M38 23C8 58C7 60C3 67C6 INT_PIRQD_L INT_PIRQD_L - @m38_lib.M38 22A7 26D2 44B5 INT_PIRQC_L INT_PIRQC_L - @m38_lib.M38 22A7 26D2 INT_PIRQB_L INT_PIRQB_L - @m38_lib.M38 22A7 26D2 INT_PIRQA_L INT_PIRQA_L - @m38_lib.M38 22A7 26D2 IMVP_VR_ON IMVP_VR_ON - @m38_lib.M38 58D7 75C6 IMVP_VID<6> IMVP_VID<6> - @m38_lib.M38 75C7 IMVP_VID<5> IMVP_VID<5> - @m38_lib.M38 75C7 IMVP_VID<4> IMVP_VID<4> - @m38_lib.M38 75C7 IMVP_VID<3> IMVP_VID<3> - @m38_lib.M38 75C7 IMVP_VID<2> IMVP_VID<2> - @m38_lib.M38 75C7 IMVP_VID<1> IMVP_VID<1> - @m38_lib.M38 75C7 IMVP_VID<0> IMVP_VID<0> - @m38_lib.M38 75C6 IMVP_PGD_IN IMVP_PGD_IN - @m38_lib.M38 75C6 77C7 IMVP_DPRSLPVR IMVP_DPRSLPVR - @m38_lib.M38 75C6 IMVP6_VW IMVP6_VW - @m38_lib.M38 75A4 75B6 IMVP6_VSUM_R2 IMVP6_VSUM_R2 - @m38_lib.M38 75A6 75B2 IMVP6_VSUM_R1 IMVP6_VSUM_R1 - @m38_lib.M38 75A8 75C2 IMVP6_VSUM IMVP6_VSUM - @m38_lib.M38 75A4 75C5 IMVP6_VSEN IMVP6_VSEN - @m38_lib.M38 75A4 75B5 IMVP6_VR_TT IMVP6_VR_TT - @m38_lib.M38 75C7 IMVP6_VO_R_OA IMVP6_VO_R_OA - @m38_lib.M38 76D4 IMVP6_VO_R IMVP6_VO_R - @m38_lib.M38 75B4 IMVP6_VO IMVP6_VO - @m38_lib.M38 75A4 75B4 76D5 IMVP6_VDIFF_RC IMVP6_VDIFF_RC - @m38_lib.M38 75B7 IMVP6_VDIFF IMVP6_VDIFF - @m38_lib.M38 75A4 75B6 IMVP6_UGATE2 IMVP6_UGATE2 - @m38_lib.M38 75A6 75C5 IMVP6_UGATE1 IMVP6_UGATE1 - @m38_lib.M38 75A8 75C5 IMVP6_SOFT IMVP6_SOFT - @m38_lib.M38 75A4 75C6 IMVP6_RTN IMVP6_RTN - @m38_lib.M38 75A4 75B5 IMVP6_RBIAS IMVP6_RBIAS - @m38_lib.M38 75A4 75B6 IMVP6_PHASE2 IMVP6_PHASE2 - @m38_lib.M38 75A6 75C5 IMVP6_PHASE1 IMVP6_PHASE1 - @m38_lib.M38 75A8 75C5 IMVP6_OCSET IMVP6_OCSET - @m38_lib.M38 75A4 75B5 IMVP6_NTC_R IMVP6_NTC_R - @m38_lib.M38 75C7 IMVP6_NTC IMVP6_NTC - @m38_lib.M38 75C7 IMVP6_LGATE2 IMVP6_LGATE2 - @m38_lib.M38 75A6 75C5 IMVP6_LGATE1 IMVP6_LGATE1 - @m38_lib.M38 75A8 75C5 IMVP6_ISEN2 IMVP6_ISEN2 - @m38_lib.M38 75A6 75C5 IMVP6_ISEN1 IMVP6_ISEN1 - @m38_lib.M38 75A8 75C5 IMVP6_FET_RC2 IMVP6_FET_RC2 - @m38_lib.M38 75A6 75B2 IMVP6_FET_RC1 IMVP6_FET_RC1 - @m38_lib.M38 75A8 75C2 IMVP6_FB2 IMVP6_FB2 - @m38_lib.M38 75A4 75B6 IMVP6_FB IMVP6_FB - @m38_lib.M38 75A4 75B6
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SMC_XDP_TRST_L SMC_XDP_TRST_L - @m38_lib.M38 58C7 59A3 SMC_XDP_TMS_L SMC_XDP_TMS_L - @m38_lib.M38 58C7 59B2 SMC_XDP_TDO_3_3_L SMC_XDP_TDO_3_3_L - @m38_lib.M38 58B7 59A5 SMC_XDP_TDI_L SMC_XDP_TDI_L - @m38_lib.M38 58C7 59B3 SMC_XDP_TCK_R SMC_XDP_TCK_R - @m38_lib.M38 59A1 SMC_XDP_TCK_3_3 SMC_XDP_TCK_3_3 - @m38_lib.M38 58B5 59A5 SMC_XDP_TCK SMC_XDP_TCK - @m38_lib.M38 58C7 59A2 SMC_WAKE_SCI_L SMC_WAKE_SCI_L - @m38_lib.M38 23C1 58D5 SMC_VCL SMC_VCL - @m38_lib.M38 58D3 SMC_TX_L SMC_TX_L - @m38_lib.M38 5D1 58C7 59B4 59B5 60B5 SMC_TRST_L SMC_TRST_L - @m38_lib.M38 5D1 58C1 60B5 SMC_TPM_RESET_L SMC_TPM_RESET_L - @m38_lib.M38 58B7 59C6 67B7 SMC_TPM_PP SMC_TPM_PP - @m38_lib.M38 58C7 59A6 SMC_TPM_GPIO SMC_TPM_GPIO - @m38_lib.M38 58D5 59B6 SMC_TMS SMC_TMS - @m38_lib.M38 5D1 58B5 59B4 60B5 SMC_THRMTRIP SMC_THRMTRIP - @m38_lib.M38 58B5 59C7 SMC_TDO SMC_TDO - @m38_lib.M38 5D1 58B5 59B4 60B5 SMC_TDI SMC_TDI - @m38_lib.M38 5D1 58B5 59B4 60B4 SMC_TCK SMC_TCK - @m38_lib.M38 5D1 58C5 59B4 60B4 NC_SMC_SYS_VSET - @m38_lib.M38 59D5 SMC_SYS_VSET SMC_SYS_VSET - @m38_lib.M38 58B5 59D6 SMC_SYS_LED SMC_SYS_LED - @m38_lib.M38 58C7 59D7 TP_SMC_SYS_KBDLED - @m38_lib.M38 59D3 SMC_SYS_KBDLED SMC_SYS_KBDLED - @m38_lib.M38 58C7 59D5 NC_SMC_SYS_ISET - @m38_lib.M38 59D5 SMC_SYS_ISET SMC_SYS_ISET - @m38_lib.M38 58B5 59D6 TP_SMC_SMB_0_DATA - @m38_lib.M38 59D1 SMC_SMB_0_DATA SMC_SMB_0_DATA - @m38_lib.M38 58C5 59D1 TP_SMC_SMB_0_CLK - @m38_lib.M38 59D1 SMC_SMB_0_CLK SMC_SMB_0_CLK - @m38_lib.M38 58C7 59D1 SMC_SB_NMI SMC_SB_NMI - @m38_lib.M38 23C3 58D7 SMC_RX_L SMC_RX_L - @m38_lib.M38 5D1 58C7 59B4 59B5 60B4 SMC_RUNTIME_SCI_L SMC_RUNTIME_SCI_L - @m38_lib.M38 23C8 58B7 SMC_RST_L SMC_RST_L - @m38_lib.M38 58C3 59D7 60B4 SMC_RSTGATE_L SMC_RSTGATE_L - @m38_lib.M38 42C3 44A8 58D7 SMC_REF_IN SMC_REF_IN - @m38_lib.M38 59A4 SMC_REF_GATE2 SMC_REF_GATE2 - @m38_lib.M38 59A4 SMC_REF_GATE1 SMC_REF_GATE1 - @m38_lib.M38 59A5 SMC_RCIN_L SMC_RCIN_L - @m38_lib.M38 21C3 58C7 SMC_PROCHOT_3_3_L SMC_PROCHOT_3_3_L - @m38_lib.M38 58D5 59A7 SMC_PROCHOT SMC_PROCHOT - @m38_lib.M38 58B5 59C7 TP_PM_G2_EN - @m38_lib.M38 59D3 SMC_PM_G2_EN SMC_PM_G2_EN - @m38_lib.M38 58D5 59D5 TP_SMC_PF1 - @m38_lib.M38 59D3 SMC_PF1 SMC_PF1 - @m38_lib.M38 58B5 59D5 TP_SMC_PF0 - @m38_lib.M38 59D3 SMC_PF0 SMC_PF0 - @m38_lib.M38 58B5 59D5 SMC_PBUS_VSENSE_R SMC_PBUS_VSENSE_R - @m38_lib.M38 76C8 SMC_PBUS_VSENSE SMC_PBUS_VSENSE - @m38_lib.M38 58D5 76C6 TP_SMC_PB7 - @m38_lib.M38 59C3 59C3 SMC_PB7 SMC_PB7 - @m38_lib.M38 59C5 59C5 SMC_ONOFF_L SMC_ONOFF_L - @m38_lib.M38 58C5 59B7 59C4 SMC_ODD_DETECT SMC_ODD_DETECT - @m38_lib.M38 58B7 59C4 SMC_NMI SMC_NMI - @m38_lib.M38 58C1 60B4 NC_SMC_NB_ISENSE - @m38_lib.M38 59B5 SMC_NB_ISENSE SMC_NB_ISENSE - @m38_lib.M38 58A7 59B6 NC_SMC_MEM_ISENSE - @m38_lib.M38 59B5 SMC_MEM_ISENSE SMC_MEM_ISENSE - @m38_lib.M38 58A7 59B6 SMC_MD1 SMC_MD1 - @m38_lib.M38 58C1 60B5 SMC_MANUAL_RST_L SMC_MANUAL_RST_L - @m38_lib.M38 5D1 59D8 SMC_LRESET_L SMC_LRESET_L - @m38_lib.M38 6B7 58C7 SMC_LID SMC_LID - @m38_lib.M38 58B5 59C1 SMC_GPU_VSENSE SMC_GPU_VSENSE - @m38_lib.M38 58D5 59B3 SMC_FWE SMC_FWE - @m38_lib.M38 58B5 59B4 TP_SMC_FAN_3_TACH - @m38_lib.M38 59C3 SMC_FAN_3_TACH SMC_FAN_3_TACH - @m38_lib.M38 58B7 59C5 TP_SMC_FAN_3_CTL - @m38_lib.M38 59C3 SMC_FAN_3_CTL SMC_FAN_3_CTL - @m38_lib.M38 58B7 59C5 SMC_FAN_2_TACH SMC_FAN_2_TACH - @m38_lib.M38 58B7 65A8 66C8 SMC_FAN_2_CTL SMC_FAN_2_CTL - @m38_lib.M38 58B7 65B8 66D8 SMC_FAN_1_TACH SMC_FAN_1_TACH - @m38_lib.M38 58B7 65A8 66C8 SMC_FAN_1_CTL SMC_FAN_1_CTL - @m38_lib.M38 58B7 65B8 66D8 SMC_FAN_0_TACH SMC_FAN_0_TACH - @m38_lib.M38 58B7 65C8 FAN_RPM0 - @m38_lib.M38 65D7 SMC_FAN_0_CTL SMC_FAN_0_CTL - @m38_lib.M38 58B7 65D8 SMC_EXTSMI_L SMC_EXTSMI_L - @m38_lib.M38 23B8 58B7 SMC_EXTAL SMC_EXTAL - @m38_lib.M38 58C3 59B8 SMC_EXCARD_PWR_OC_L SMC_EXCARD_PWR_OC_L - @m38_lib.M38 58B7 59C4 TP_SMC_EXCARD_PWR_EN - @m38_lib.M38 59C3 SMC_EXCARD_PWR_EN SMC_EXCARD_PWR_EN - @m38_lib.M38 58B7 59C5 SMC_EXCARD_CP SMC_EXCARD_CP - @m38_lib.M38 58B7 59C4 SMC_DCIN_ISENSE SMC_DCIN_ISENSE - @m38_lib.M38 58D5 76D5 SMC_CPU_VSENSE SMC_CPU_VSENSE - @m38_lib.M38 58D5 76B2 SMC_CPU_RESET_3_3_L SMC_CPU_RESET_3_3_L - @m38_lib.M38 58B5 59A7 SMC_CPU_ISENSE SMC_CPU_ISENSE - @m38_lib.M38 58D5 76D2 SMC_CASE_OPEN SMC_CASE_OPEN - @m38_lib.M38 58C5 59C1 SMC_BS_ALRT_L SMC_BS_ALRT_L - @m38_lib.M38 58C5 59B4 SMC_BC_ACOK SMC_BC_ACOK - @m38_lib.M38 58C5 59B4 NC_SMC_BATT_VSET - @m38_lib.M38 59D5 SMC_BATT_VSET SMC_BATT_VSET - @m38_lib.M38 58B5 59D6 @m38_lib.M38 NC_SMC_BATT_TRICKLE_EN_L - 59D5 L @m38_lib.M38 SMC_BATT_TRICKLE_EN_ SMC_BATT_TRICKLE_EN_L - 58D7 59D6 NC_SMC_BATT_ISET - @m38_lib.M38 59D5 SMC_BATT_ISET SMC_BATT_ISET - @m38_lib.M38 58B5 59D6 SMC_FWIRE_ISENSE - @m38_lib.M38 58D5 59B6 UNUSED_SMC_SENSE - @m38_lib.M38 59B5 59B5 59B6 SMC_FWIRE_ISENSE - @m38_lib.M38 58D5 59B6 UNUSED_SMC_SENSE - @m38_lib.M38 59B5 59B5 59B6 SMC_BATT_ISENSE SMC_BATT_ISENSE - @m38_lib.M38 58D5 59B6 NC_SMC_BATT_CHG_EN - @m38_lib.M38 59D5 SMC_BATT_CHG_EN SMC_BATT_CHG_EN - @m38_lib.M38 58D7 59D6 NC_SMC_ANALOG_ID - @m38_lib.M38 59C5 SMC_ANALOG_ID SMC_ANALOG_ID - @m38_lib.M38 58A7 59C6 TP_SMC_ADAPTER_EN - @m38_lib.M38 59D3 SMC_ADAPTER_EN SMC_ADAPTER_EN - @m38_lib.M38 58D5 59D5 SMB_LINK_ALERT_L SMB_LINK_ALERT_L - @m38_lib.M38 23D5 SMB_BSB_DATA SMB_BSB_DATA - @m38_lib.M38 58C7 59D1 SMB_BSB_CLK SMB_BSB_CLK - @m38_lib.M38 58C5 59D1 SMB_BSA_DATA SMB_BSA_DATA - @m38_lib.M38 58B5 59C1 SMB_BSA_CLK SMB_BSA_CLK - @m38_lib.M38 58B5 59C1 SMB_ALERT_L SMB_ALERT_L - @m38_lib.M38 23C5 TP_SDVO_CTRLDATA - @m38_lib.M38 19A1 SDVO_CTRLDATA SDVO_CTRLDATA - @m38_lib.M38 14B6 19A2 TP_SDVO_CTRLCLK - @m38_lib.M38 19A1 SDVO_CTRLCLK SDVO_CTRLCLK - @m38_lib.M38 14B6 19A2 SC_TX_L SC_TX_L - @m38_lib.M38 58C5 59B4 59B6 SC_RX_L SC_RX_L - @m38_lib.M38 58C5 59B6 59C4 SB_SPKR SB_SPKR - @m38_lib.M38 23C5 SB_SM_INTRUDER_L SB_SM_INTRUDER_L - @m38_lib.M38 21D6 26C7 SB_RTC_X2 SB_RTC_X2 - @m38_lib.M38 21D6 26D7 SB_RTC_X1 SB_RTC_X1 - @m38_lib.M38 21D6 26D7 SB_RTC_RST_L SB_RTC_RST_L - @m38_lib.M38 21D6 26C7
SB_INTVRMEN SB_INTVRMEN - @m38_lib.M38 21D6 SB_GPIO37 SB_GPIO37 - @m38_lib.M38 23D3 SB_GPIO31 SB_GPIO31 - @m38_lib.M38 22C4 22D8 SB_GPIO30 SB_GPIO30 - @m38_lib.M38 22C4 22D8 SB_GPIO29 SB_GPIO29 - @m38_lib.M38 22C4 22D8 SB_GPIO26 SB_GPIO26 - @m38_lib.M38 23C7 SB_GPIO21 SB_GPIO21 - @m38_lib.M38 23D3 SB_GPIO19 SB_GPIO19 - @m38_lib.M38 23D3 SB_GPIO4 SB_GPIO4 - @m38_lib.M38 22A6 26C2 SB_GPIO3 SB_GPIO3 - @m38_lib.M38 22A6 26C2 SB_GPIO2 SB_GPIO2 - @m38_lib.M38 22A6 26C2 SB_CRT_TVOUT_MUX SB_CRT_TVOUT_MUX - @m38_lib.M38 22B5 SB_CLK100M_SATA_P SB_CLK100M_SATA_P - @m38_lib.M38 5C8 21B6 34B4 34C2 SB_CLK100M_SATA_OE_L SB_CLK100M_SATA_OE_L - @m38_lib.M38 23C3 33B4 SB_CLK100M_SATA_N SB_CLK100M_SATA_N - @m38_lib.M38 5C8 21B6 34B4 34C2 SB_CLK100M_DMI_P SB_CLK100M_DMI_P - @m38_lib.M38 5B8 22C2 34A4 34C2 SB_CLK100M_DMI_N SB_CLK100M_DMI_N - @m38_lib.M38 5B8 22C2 34A4 34C2 SB_CLK48M_USBCTLR SB_CLK48M_USBCTLR - @m38_lib.M38 5B8 23D3 34C4 SB_CLK14P3M_TIMER SB_CLK14P3M_TIMER - @m38_lib.M38 5B8 23D3 34D4 SB_ACZ_SYNC SB_ACZ_SYNC - @m38_lib.M38 21C6 SB_ACZ_SDATAOUT SB_ACZ_SDATAOUT - @m38_lib.M38 21C6 SB_ACZ_RST_L SB_ACZ_RST_L - @m38_lib.M38 21C6 SB_ACZ_BITCLK SB_ACZ_BITCLK - @m38_lib.M38 21C6 SB_A20GATE SB_A20GATE - @m38_lib.M38 21C4 SATA_RBIAS - @m38_lib.M38 38C7 SATA_RBIAS_P - @m38_lib.M38 21B6 38C7 SATA_RBIAS - @m38_lib.M38 38C7 SATA_RBIAS_P - @m38_lib.M38 21B6 38C7 SATA_RBIAS_N SATA_RBIAS_N - @m38_lib.M38 21B6 38C7 SATA_C_R2D_P SATA_C_R2D_P - @m38_lib.M38 38B8 SATA_C_R2D_N SATA_C_R2D_N - @m38_lib.M38 38B8 SATA_C_R2D_C_P SATA_C_R2D_C_P - @m38_lib.M38 21B6 38B6 SATA_C_R2D_C_N SATA_C_R2D_C_N - @m38_lib.M38 21B6 38B6 SATA_C_PWR_EN_L SATA_C_PWR_EN_L - @m38_lib.M38 23A3 23B3 SATA_C_DET_L SATA_C_DET_L - @m38_lib.M38 23D2 38B5 SATA_C_D2R_P SATA_C_D2R_P - @m38_lib.M38 21B6 38B6 SATA_C_D2R_N SATA_C_D2R_N - @m38_lib.M38 21B6 38B6 SATA_C_D2R_C_P SATA_C_D2R_C_P - @m38_lib.M38 38B8 SATA_C_D2R_C_N SATA_C_D2R_C_N - @m38_lib.M38 38B8 TP_SATA_A_R2D_P - @m38_lib.M38 38A5 SATA_A_R2D_C_P SATA_A_R2D_C_P - @m38_lib.M38 21B6 38A6 TP_SATA_A_R2D_N - @m38_lib.M38 38A5 SATA_A_R2D_C_N SATA_A_R2D_C_N - @m38_lib.M38 21B6 38A6 TP_SATA_A_D2R_P - @m38_lib.M38 38A5 SATA_A_D2R_P SATA_A_D2R_P - @m38_lib.M38 21B6 38A6 TP_SATA_A_D2R_N - @m38_lib.M38 38A5 SATA_A_D2R_N SATA_A_D2R_N - @m38_lib.M38 21B6 38A6 RSMRST_PWRGD RSMRST_PWRGD - @m38_lib.M38 58D7 76D1 R8599_2 R8599_2 - @m38_lib.M38 85C4 R7507_1 R7507_1 - @m38_lib.M38 75A6 75B1 R7504_1 R7504_1 - @m38_lib.M38 75A8 75C1 Q4201_3 Q4201_3 - @m38_lib.M38 42D6 PPV_3V3_AUDIO_CODEC PPV_3V3_AUDIO_CODEC - @m38_lib.M38 68D6 PPVIN_S5_IMVP6_VIN PPVIN_S5_IMVP6_VIN - @m38_lib.M38 75D6 PPVCORE_S0_GPU_VDDCI PPVCORE_S0_GPU_VDDCI - @m38_lib.M38 86C7 PPVCORE_S0_GPU_MPVDD PPVCORE_S0_GPU_MPVDD - @m38_lib.M38 91A6 PPFW_PORTS_VP PPFW_PORTS_VP - @m38_lib.M38 46D3 PPFW_PORT1_VP_FL PPFW_PORT1_VP_FL - @m38_lib.M38 46B2 PPFW_PORT1_VP PPFW_PORT1_VP - @m38_lib.M38 46B2 46D1 PPFW_PORT0_VP_FL PPFW_PORT0_VP_FL - @m38_lib.M38 46C2 PPFW_PORT0_VP PPFW_PORT0_VP - @m38_lib.M38 46D2 PP12V_S5_CPU_REG PP12V_S5_CPU_REG - @m38_lib.M38 75C3 75D4 75D7 76C8 76D6 PP12V_L7502 PP12V_L7502 - @m38_lib.M38 76D7 ANE @m38_lib.M38 PP12V_AUD_SPKRAMP_PL PP12V_AUD_SPKRAMP_PLANE - 72D5 PP5V_USB2_PORT2_F PP5V_USB2_PORT2_F - @m38_lib.M38 47B5 PP5V_USB2_PORT1_F PP5V_USB2_PORT1_F - @m38_lib.M38 47C5 PP5V_USB2_PORT0_F PP5V_USB2_PORT0_F - @m38_lib.M38 47D5 PP5V_USB2 PP5V_USB2 - @m38_lib.M38 47D7 PP5V_S5_SB_V5REF_SUS PP5V_S5_SB_V5REF_SUS - @m38_lib.M38 24D5 25C7 PP5V_S3_BNDI PP5V_S3_BNDI - @m38_lib.M38 47B2 47D1 PP5V_S0_SB_V5REF PP5V_S0_SB_V5REF - @m38_lib.M38 24D5 25D7 PP5V_S0_IMVP6_VDD PP5V_S0_IMVP6_VDD - @m38_lib.M38 75D6 PP5V_S0_GPUVCORE_VCC PP5V_S0_GPUVCORE_VCC - @m38_lib.M38 85D7 88D8 PP5V_S0_DDC_FUSE PP5V_S0_DDC_FUSE - @m38_lib.M38 97D5 PP5V_S0_DDC PP5V_S0_DDC - @m38_lib.M38 97D4 PP5V_BNDI_LE340 PP5V_BNDI_LE340 - @m38_lib.M38 47D3 PP4V5_AUDIO_ANALOG PP4V5_AUDIO_ANALOG - @m38_lib.M38 68A2 68D2 74D8 PP3V3_TPM_3VSB PP3V3_TPM_3VSB - @m38_lib.M38 59C5 67C4 PP3V3_SO_2V5REG_R PP3V3_SO_2V5REG_R - @m38_lib.M38 77D5 PP3V3_S5_SB_RTC PP3V3_S5_SB_RTC - @m38_lib.M38 5D2 21D6 24B3 25A3 26D7 PP3V3_S5_FW_VDDA PP3V3_S5_FW_VDDA - @m38_lib.M38 44D5 45C6 PP3V3_S0_IMVP6_3V3 PP3V3_S0_IMVP6_3V3 - @m38_lib.M38 75D6 EF @m38_lib.M38 PP3V3_S0_CK410_VDD_R PP3V3_S0_CK410_VDD_REF - 33C5 CI @m38_lib.M38 PP3V3_S0_CK410_VDD_P PP3V3_S0_CK410_VDD_PCI - 33D5 PU_SRC @m38_lib.M38 PP3V3_S0_CK410_VDD_C PP3V3_S0_CK410_VDD_CPU_SRC - 33D6 PP3V3_S0_CK410_VDDA PP3V3_S0_CK410_VDDA - @m38_lib.M38 33C6 PP3V3_S0_CK410_VDD48 PP3V3_S0_CK410_VDD48 - @m38_lib.M38 33D5 PP3V3_LCD_SW PP3V3_LCD_SW - @m38_lib.M38 94C6 PP3V3_INTERCON PP3V3_INTERCON - @m38_lib.M38 72C7 PP3V3_FW_ESD_F PP3V3_FW_ESD_F - @m38_lib.M38 46A7 PP3V3_FW_ESD PP3V3_FW_ESD - @m38_lib.M38 46A5 46A6 46B5 46C5 46D5 PP3V3_AVREF_SMC PP3V3_AVREF_SMC - @m38_lib.M38 58D2 59A3 PP3V3_AVCC_SMC PP3V3_AVCC_SMC - @m38_lib.M38 58D3 CK @m38_lib.M38 PP3V3_AUDIO_SPDIF_JA PP3V3_AUDIO_SPDIF_JACK - 73B5 I @m38_lib.M38 PP3V3_AUDIO_SPDIF_EM PP3V3_AUDIO_SPDIF_EMI - 73B7 PP3V3R12V_LCD_CONN PP3V3R12V_LCD_CONN - @m38_lib.M38 94A6 94A6 94A7 94C5 PP2V5_S0_GPU_VDD2DI PP2V5_S0_GPU_VDD2DI - @m38_lib.M38 93B8 PP2V5_S0_GPU_VDD1DI PP2V5_S0_GPU_VDD1DI - @m38_lib.M38 93C8 PP2V5_S0_GPU_TXVDDR PP2V5_S0_GPU_TXVDDR - @m38_lib.M38 93C7 PP2V5_S0_GPU_TPVDD PP2V5_S0_GPU_TPVDD - @m38_lib.M38 93C7 PP2V5_S0_GPU_PVDD_F PP2V5_S0_GPU_PVDD_F - @m38_lib.M38 91A6 PP2V5_S0_GPU_LVDDR PP2V5_S0_GPU_LVDDR - @m38_lib.M38 93B7 PP2V5_S0_GPU_LPVDD PP2V5_S0_GPU_LPVDD - @m38_lib.M38 93B7 PP2V5_S0_GPU_AVDD PP2V5_S0_GPU_AVDD - @m38_lib.M38 93C7 PP2V5_S0_GPU_A2VDD PP2V5_S0_GPU_A2VDD - @m38_lib.M38 93B7 PP2V5_ENET_CTAP PP2V5_ENET_CTAP - @m38_lib.M38 43D7 PP2V5 S0_PGOOD PP2V5 S0_PGOOD - @m38_lib.M38 77B8 77C5 PP1V8_S3_PGOOD PP1V8_S3_PGOOD - @m38_lib.M38 79B2 PP1V8_FB_B1_VDDA1 PP1V8_FB_B1_VDDA1 - @m38_lib.M38 90D4 PP1V8_FB_B1_VDDA0 PP1V8_FB_B1_VDDA0 - @m38_lib.M38 90D4 PP1V8_FB_B0_VDDA1 PP1V8_FB_B0_VDDA1 - @m38_lib.M38 90D7 PP1V8_FB_B0_VDDA0 PP1V8_FB_B0_VDDA0 - @m38_lib.M38 90D7 PP1V8_FB_A1_VDDA1 PP1V8_FB_A1_VDDA1 - @m38_lib.M38 89D4 PP1V8_FB_A1_VDDA0 PP1V8_FB_A1_VDDA0 - @m38_lib.M38 89D4 PP1V8_FB_A0_VDDA1 PP1V8_FB_A0_VDDA1 - @m38_lib.M38 89D7 PP1V8_FB_A0_VDDA0 PP1V8_FB_A0_VDDA0 - @m38_lib.M38 89D7 R5_F @m38_lib.M38 PP1V8R3V3_S0_GPU_VDD PP1V8R3V3_S0_GPU_VDDR5_F - 91B6
R4_F @m38_lib.M38 PP1V8R3V3_S0_GPU_VDD PP1V8R3V3_S0_GPU_VDDR4_F - 91B6 RH1 @m38_lib.M38 PP1V8R2V0_S0_GPU_VDD PP1V8R2V0_S0_GPU_VDDRH1 - 87B3 RH0 @m38_lib.M38 PP1V8R2V0_S0_GPU_VDD PP1V8R2V0_S0_GPU_VDDRH0 - 87A7 L @m38_lib.M38 PP1V5_S0_SB_VCCDMIPL PP1V5_S0_SB_VCCDMIPLL - 24B5 25A6 PP1V5_S0_SB_VCC1_5_B PP1V5_S0_SB_VCC1_5_B - @m38_lib.M38 22C1 24D5 25B7 PP1V5_S0_SB_R PP1V5_S0_SB_R - @m38_lib.M38 25A7 PP1V5_S0_PGOOD PP1V5_S0_PGOOD - @m38_lib.M38 77C8 80B2 @m38_lib.M38 PP1V5_S0_NB_VCCD_TVDAC - 17C6 19B1 DAC @m38_lib.M38 PP1V5_S0_NB_VCCD_QTV PP1V5_S0_NB_VCCD_QTVDAC - 17B6 19A1 L @m38_lib.M38 PP1V5_S0_NB_VCCA_MPL PP1V5_S0_NB_VCCA_MPLL - 17C6 19C6 L @m38_lib.M38 PP1V5_S0_NB_VCCA_HPL PP1V5_S0_NB_VCCA_HPLL - 17C6 19C6 TP_NB_VCCA_DPLLB - @m38_lib.M38 19C5 LB @m38_lib.M38 PP1V5_S0_NB_VCCA_DPL PP1V5_S0_NB_VCCA_DPLLB - 17C6 19C4 TP_NB_VCCA_DPLLA - @m38_lib.M38 19C5 LA @m38_lib.M38 PP1V5_S0_NB_VCCA_DPL PP1V5_S0_NB_VCCA_DPLLA - 17C6 19C4 LL @m38_lib.M38 PP1V5_S0_NB_VCCA_3GP PP1V5_S0_NB_VCCA_3GPLL - 17D6 19A3 PP1V5_S0_NB_VCC3G PP1V5_S0_NB_VCC3G - @m38_lib.M38 17D6 19A3 PP1V5_S0_NB_3GPLL_F PP1V5_S0_NB_3GPLL_F - @m38_lib.M38 19A5 PP1V05_S0_PGOOD PP1V05_S0_PGOOD - @m38_lib.M38 77C8 81B2 PP1V2_S0_GPU_VDDPLL PP1V2_S0_GPU_VDDPLL - @m38_lib.M38 91B6 PP0V9_S0_PGOOD PP0V9_S0_PGOOD - @m38_lib.M38 77B8 79A2 POWER_BUTTON_L POWER_BUTTON_L - @m38_lib.M38 5D1 59C8 PM_THRM_L PM_THRM_L - @m38_lib.M38 10D3 23C8 58B7 PM_THRMTRIP_L PM_THRMTRIP_L - @m38_lib.M38 7C6 14B6 21C2 59C7 PM_SYSRST_L PM_SYSRST_L - @m38_lib.M38 5B8 23C5 26C3 58B7 PM_SUS_STAT_L PM_SUS_STAT_L - @m38_lib.M38 23C5 58C5 60C3 67C6 PM_STPPCI_L PM_STPPCI_L - @m38_lib.M38 23C8 33C4 PM_STPCPU_L PM_STPCPU_L - @m38_lib.M38 23C8 33C4 PM_SLP_S5_L PM_SLP_S5_L - @m38_lib.M38 23C3 58C5 PM_SLP_S4_L PM_SLP_S4_L - @m38_lib.M38 23C3 58C5 77C8 PM_SLP_S4 PM_SLP_S4 - @m38_lib.M38 77A7 77C7 79C8 83C6 MEMVTT_EN - @m38_lib.M38 31B5 79A6 88A6 PM_SLP_S3_L PM_SLP_S3_L - @m38_lib.M38 6C8 23C3 58C5 77D8 79A7 PM_SLP_S3 PM_SLP_S3 - @m38_lib.M38 77D7 78B8 80C8 81C8 PM_SB_PWROK PM_SB_PWROK - @m38_lib.M38 23C3 26D6 PM_RSMRST_L PM_RSMRST_L - @m38_lib.M38 23C1 58D7 PM_RI_L PM_RI_L - @m38_lib.M38 23D5 PM_PWROK PM_PWROK - @m38_lib.M38 77B7 PM_PWRBTN_L PM_PWRBTN_L - @m38_lib.M38 23C3 58D7 PM_LAN_ENABLE PM_LAN_ENABLE - @m38_lib.M38 23C3 58D7 DIMM_OVERTEMP_L - @m38_lib.M38 28C3 29C3 59C6 PM_EXTTS_L<0> PM_EXTTS_L<0> - @m38_lib.M38 14B7 58B7 59C5 PM_DPRSLPVR PM_DPRSLPVR - @m38_lib.M38 14B7 23C3 75C7 67C6 PM_CLKRUN_L PM_CLKRUN_L - @m38_lib.M38 5B8 23C8 44B5 58C5 60C6 PM_BMBUSY_L PM_BMBUSY_L - @m38_lib.M38 14B6 23C5 PM_BATLOW_L PM_BATLOW_L - @m38_lib.M38 23C1 58B7 PLT_RST_L PLT_RST_L - @m38_lib.M38 6C8 22A6 PEG_RESET_L PEG_RESET_L - @m38_lib.M38 6B7 84A5 PEG_R2D_P<15> PEG_R2D_P<15> - @m38_lib.M38 84B4 PEG_R2D_P<14> PEG_R2D_P<14> - @m38_lib.M38 84B4 PEG_R2D_P<13> PEG_R2D_P<13> - @m38_lib.M38 84B4 PEG_R2D_P<12> PEG_R2D_P<12> - @m38_lib.M38 84B4 PEG_R2D_P<11> PEG_R2D_P<11> - @m38_lib.M38 84B4 PEG_R2D_P<10> PEG_R2D_P<10> - @m38_lib.M38 84B4 PEG_R2D_P<9> PEG_R2D_P<9> - @m38_lib.M38 84C4 PEG_R2D_P<8> PEG_R2D_P<8> - @m38_lib.M38 84C4 PEG_R2D_P<7> PEG_R2D_P<7> - @m38_lib.M38 84C4 PEG_R2D_P<6> PEG_R2D_P<6> - @m38_lib.M38 84C4 PEG_R2D_P<5> PEG_R2D_P<5> - @m38_lib.M38 84C4 PEG_R2D_P<4> PEG_R2D_P<4> - @m38_lib.M38 84D4 PEG_R2D_P<3> PEG_R2D_P<3> - @m38_lib.M38 84D4 PEG_R2D_P<2> PEG_R2D_P<2> - @m38_lib.M38 84D4 PEG_R2D_P<1> PEG_R2D_P<1> - @m38_lib.M38 84D4 PEG_R2D_P<0> PEG_R2D_P<0> - @m38_lib.M38 84D4 PEG_R2D_N<15> PEG_R2D_N<15> - @m38_lib.M38 84B4 PEG_R2D_N<14> PEG_R2D_N<14> - @m38_lib.M38 84B4 PEG_R2D_N<13> PEG_R2D_N<13> - @m38_lib.M38 84B4 PEG_R2D_N<12> PEG_R2D_N<12> - @m38_lib.M38 84B4 PEG_R2D_N<11> PEG_R2D_N<11> - @m38_lib.M38 84B4 PEG_R2D_N<10> PEG_R2D_N<10> - @m38_lib.M38 84B4 PEG_R2D_N<9> PEG_R2D_N<9> - @m38_lib.M38 84C4 PEG_R2D_N<8> PEG_R2D_N<8> - @m38_lib.M38 84C4 PEG_R2D_N<7> PEG_R2D_N<7> - @m38_lib.M38 84C4 PEG_R2D_N<6> PEG_R2D_N<6> - @m38_lib.M38 84C4 PEG_R2D_N<5> PEG_R2D_N<5> - @m38_lib.M38 84C4 PEG_R2D_N<4> PEG_R2D_N<4> - @m38_lib.M38 84C4 PEG_R2D_N<3> PEG_R2D_N<3> - @m38_lib.M38 84D4 PEG_R2D_N<2> PEG_R2D_N<2> - @m38_lib.M38 84D4 PEG_R2D_N<1> PEG_R2D_N<1> - @m38_lib.M38 84D4 PEG_R2D_N<0> PEG_R2D_N<0> - @m38_lib.M38 84D4 PEG_R2D_C_P<15> PEG_R2D_C_P<15> - @m38_lib.M38 13A3 84D5 PEG_R2D_C_P<14> PEG_R2D_C_P<14> - @m38_lib.M38 13A3 84D5 PEG_R2D_C_P<13> PEG_R2D_C_P<13> - @m38_lib.M38 13A3 84D5 PEG_R2D_C_P<12> PEG_R2D_C_P<12> - @m38_lib.M38 13A3 84D5 PEG_R2D_C_P<11> PEG_R2D_C_P<11> - @m38_lib.M38 13B3 84D5 PEG_R2D_C_P<10> PEG_R2D_C_P<10> - @m38_lib.M38 13B3 84C5 PEG_R2D_C_P<9> PEG_R2D_C_P<9> - @m38_lib.M38 13B3 84C5 PEG_R2D_C_P<8> PEG_R2D_C_P<8> - @m38_lib.M38 13B3 84C5 PEG_R2D_C_P<7> PEG_R2D_C_P<7> - @m38_lib.M38 13B3 84C5 PEG_R2D_C_P<6> PEG_R2D_C_P<6> - @m38_lib.M38 13B3 84C5 PEG_R2D_C_P<5> PEG_R2D_C_P<5> - @m38_lib.M38 13B3 84B5 PEG_R2D_C_P<4> PEG_R2D_C_P<4> - @m38_lib.M38 13B3 84B5 PEG_R2D_C_P<3> PEG_R2D_C_P<3> - @m38_lib.M38 13B3 84B5 PEG_R2D_C_P<2> PEG_R2D_C_P<2> - @m38_lib.M38 13B3 84B5 PEG_R2D_C_P<1> PEG_R2D_C_P<1> - @m38_lib.M38 13B3 84B5 PEG_R2D_C_P<0> PEG_R2D_C_P<0> - @m38_lib.M38 13B3 84B5 PEG_R2D_C_N<15> PEG_R2D_C_N<15> - @m38_lib.M38 13B3 84D5 PEG_R2D_C_N<14> PEG_R2D_C_N<14> - @m38_lib.M38 13B3 84D5 PEG_R2D_C_N<13> PEG_R2D_C_N<13> - @m38_lib.M38 13B3 84D5 PEG_R2D_C_N<12> PEG_R2D_C_N<12> - @m38_lib.M38 13B3 84D5 PEG_R2D_C_N<11> PEG_R2D_C_N<11> - @m38_lib.M38 13B3 84C5 PEG_R2D_C_N<10> PEG_R2D_C_N<10> - @m38_lib.M38 13B3 84C5 PEG_R2D_C_N<9> PEG_R2D_C_N<9> - @m38_lib.M38 13B3 84C5 PEG_R2D_C_N<8> PEG_R2D_C_N<8> - @m38_lib.M38 13B3 84C5 PEG_R2D_C_N<7> PEG_R2D_C_N<7> - @m38_lib.M38 13B3 84C5 PEG_R2D_C_N<6> PEG_R2D_C_N<6> - @m38_lib.M38 13B3 84C5 PEG_R2D_C_N<5> PEG_R2D_C_N<5> - @m38_lib.M38 13B3 84B5 PEG_R2D_C_N<4> PEG_R2D_C_N<4> - @m38_lib.M38 13B3 84B5 PEG_R2D_C_N<3> PEG_R2D_C_N<3> - @m38_lib.M38 13B3 84B5 PEG_R2D_C_N<2> PEG_R2D_C_N<2> - @m38_lib.M38 13C3 84B5 PEG_R2D_C_N<1> PEG_R2D_C_N<1> - @m38_lib.M38 13C3 84B5
PEG_R2D_C_N<0> PEG_R2D_C_N<0> - @m38_lib.M38 13C3 84B5 PEG_D2R_P<15> PEG_D2R_P<15> - @m38_lib.M38 13C3 84D1 PEG_D2R_P<14> PEG_D2R_P<14> - @m38_lib.M38 13C3 84D1 PEG_D2R_P<13> PEG_D2R_P<13> - @m38_lib.M38 13C3 84D1 PEG_D2R_P<12> PEG_D2R_P<12> - @m38_lib.M38 13C3 84D1 PEG_D2R_P<11> PEG_D2R_P<11> - @m38_lib.M38 13C3 84D1 PEG_D2R_P<10> PEG_D2R_P<10> - @m38_lib.M38 13C3 84C1 PEG_D2R_P<9> PEG_D2R_P<9> - @m38_lib.M38 13C3 84C1 PEG_D2R_P<8> PEG_D2R_P<8> - @m38_lib.M38 13C3 84C1 PEG_D2R_P<7> PEG_D2R_P<7> - @m38_lib.M38 13C3 84C1 PEG_D2R_P<6> PEG_D2R_P<6> - @m38_lib.M38 13C3 84C1 PEG_D2R_P<5> PEG_D2R_P<5> - @m38_lib.M38 13C3 84B1 PEG_D2R_P<4> PEG_D2R_P<4> - @m38_lib.M38 13C3 84B1 PEG_D2R_P<3> PEG_D2R_P<3> - @m38_lib.M38 13C3 84B1 PEG_D2R_P<2> PEG_D2R_P<2> - @m38_lib.M38 13C3 84B1 PEG_D2R_P<1> PEG_D2R_P<1> - @m38_lib.M38 13C3 84B1 PEG_D2R_P<0> PEG_D2R_P<0> - @m38_lib.M38 13C3 84B1 PEG_D2R_N<15> PEG_D2R_N<15> - @m38_lib.M38 13C3 84D1 PEG_D2R_N<14> PEG_D2R_N<14> - @m38_lib.M38 13C3 84D1 PEG_D2R_N<13> PEG_D2R_N<13> - @m38_lib.M38 13C3 84D1 PEG_D2R_N<12> PEG_D2R_N<12> - @m38_lib.M38 13C3 84D1 PEG_D2R_N<11> PEG_D2R_N<11> - @m38_lib.M38 13C3 84C1 PEG_D2R_N<10> PEG_D2R_N<10> - @m38_lib.M38 13C3 84C1 PEG_D2R_N<9> PEG_D2R_N<9> - @m38_lib.M38 13D3 84C1 PEG_D2R_N<8> PEG_D2R_N<8> - @m38_lib.M38 13D3 84C1 PEG_D2R_N<7> PEG_D2R_N<7> - @m38_lib.M38 13D3 84C1 PEG_D2R_N<6> PEG_D2R_N<6> - @m38_lib.M38 13D3 84C1 PEG_D2R_N<5> PEG_D2R_N<5> - @m38_lib.M38 13D3 84B1 PEG_D2R_N<4> PEG_D2R_N<4> - @m38_lib.M38 13D3 84B1 PEG_D2R_N<3> PEG_D2R_N<3> - @m38_lib.M38 13D3 84B1 PEG_D2R_N<2> PEG_D2R_N<2> - @m38_lib.M38 13D3 84B1 PEG_D2R_N<1> PEG_D2R_N<1> - @m38_lib.M38 13D3 84B1 PEG_D2R_N<0> PEG_D2R_N<0> - @m38_lib.M38 13D3 84B1 PEG_D2R_C_P<15> PEG_D2R_C_P<15> - @m38_lib.M38 84B3 PEG_D2R_C_P<14> PEG_D2R_C_P<14> - @m38_lib.M38 84B3 PEG_D2R_C_P<13> PEG_D2R_C_P<13> - @m38_lib.M38 84B3 PEG_D2R_C_P<12> PEG_D2R_C_P<12> - @m38_lib.M38 84B3 PEG_D2R_C_P<11> PEG_D2R_C_P<11> - @m38_lib.M38 84B3 PEG_D2R_C_P<10> PEG_D2R_C_P<10> - @m38_lib.M38 84B3 PEG_D2R_C_P<9> PEG_D2R_C_P<9> - @m38_lib.M38 84C3 PEG_D2R_C_P<8> PEG_D2R_C_P<8> - @m38_lib.M38 84C3 PEG_D2R_C_P<7> PEG_D2R_C_P<7> - @m38_lib.M38 84C3 PEG_D2R_C_P<6> PEG_D2R_C_P<6> - @m38_lib.M38 84C3 PEG_D2R_C_P<5> PEG_D2R_C_P<5> - @m38_lib.M38 84C3 PEG_D2R_C_P<4> PEG_D2R_C_P<4> - @m38_lib.M38 84D3 PEG_D2R_C_P<3> PEG_D2R_C_P<3> - @m38_lib.M38 84D3 PEG_D2R_C_P<2> PEG_D2R_C_P<2> - @m38_lib.M38 84D3 PEG_D2R_C_P<1> PEG_D2R_C_P<1> - @m38_lib.M38 84D3 PEG_D2R_C_P<0> PEG_D2R_C_P<0> - @m38_lib.M38 84D3 PEG_D2R_C_N<15> PEG_D2R_C_N<15> - @m38_lib.M38 84B3 PEG_D2R_C_N<14> PEG_D2R_C_N<14> - @m38_lib.M38 84B3 PEG_D2R_C_N<13> PEG_D2R_C_N<13> - @m38_lib.M38 84B3 PEG_D2R_C_N<12> PEG_D2R_C_N<12> - @m38_lib.M38 84B3 PEG_D2R_C_N<11> PEG_D2R_C_N<11> - @m38_lib.M38 84B3 PEG_D2R_C_N<10> PEG_D2R_C_N<10> - @m38_lib.M38 84B3 PEG_D2R_C_N<9> PEG_D2R_C_N<9> - @m38_lib.M38 84C3 PEG_D2R_C_N<8> PEG_D2R_C_N<8> - @m38_lib.M38 84C3 PEG_D2R_C_N<7> PEG_D2R_C_N<7> - @m38_lib.M38 84C3 PEG_D2R_C_N<6> PEG_D2R_C_N<6> - @m38_lib.M38 84C3 PEG_D2R_C_N<5> PEG_D2R_C_N<5> - @m38_lib.M38 84C3 PEG_D2R_C_N<4> PEG_D2R_C_N<4> - @m38_lib.M38 84C3 PEG_D2R_C_N<3> PEG_D2R_C_N<3> - @m38_lib.M38 84D3 PEG_D2R_C_N<2> PEG_D2R_C_N<2> - @m38_lib.M38 84D3 PEG_D2R_C_N<1> PEG_D2R_C_N<1> - @m38_lib.M38 84D3 PEG_D2R_C_N<0> PEG_D2R_C_N<0> - @m38_lib.M38 84D3 PEG_COMP PEG_COMP - @m38_lib.M38 13D3 PCI_TRDY_L PCI_TRDY_L - @m38_lib.M38 22A6 26D2 44B5 PCI_STOP_L PCI_STOP_L - @m38_lib.M38 22A6 26D2 44B5 PCI_SERR_L PCI_SERR_L - @m38_lib.M38 22A6 26D2 44B5 PCI_RST_L PCI_RST_L - @m38_lib.M38 22A6 44A8 PCI_RST_FW_L PCI_RST_FW_L - @m38_lib.M38 44A7 44B5 PCI_REQ3_L PCI_REQ3_L - @m38_lib.M38 22B4 26D2 44B5 PCI_REQ2_L PCI_REQ2_L - @m38_lib.M38 22B6 26D2 PCI_REQ1_L PCI_REQ1_L - @m38_lib.M38 22B6 26D2 PCI_REQ0_L PCI_REQ0_L - @m38_lib.M38 22B6 26D2 PCI_PME_FW_L PCI_PME_FW_L - @m38_lib.M38 22B5 44B5 PCI_PERR_L PCI_PERR_L - @m38_lib.M38 22A6 26D2 44B5 PCI_PAR PCI_PAR - @m38_lib.M38 22A6 44B5 PCI_LOCK_L PCI_LOCK_L - @m38_lib.M38 22A6 26D2 PCI_IRDY_L PCI_IRDY_L - @m38_lib.M38 22A6 26D2 44B5 PCI_IDSEL PCI_IDSEL - @m38_lib.M38 44B5 PCI_GNT3_L PCI_GNT3_L - @m38_lib.M38 22B4 44B5 PCI_FRAME_L PCI_FRAME_L - @m38_lib.M38 22A7 26D2 44B5 PCI_DEVSEL_L PCI_DEVSEL_L - @m38_lib.M38 22A6 26D2 44B5 PCI_C_BE_L<3> PCI_C_BE_L<3> - @m38_lib.M38 22B6 44B5 PCI_C_BE_L<2> PCI_C_BE_L<2> - @m38_lib.M38 22B6 44B5 PCI_C_BE_L<1> PCI_C_BE_L<1> - @m38_lib.M38 22B6 44B5 PCI_C_BE_L<0> PCI_C_BE_L<0> - @m38_lib.M38 22B6 44B5 PCI_CLK_TPM PCI_CLK_TPM - @m38_lib.M38 34C4 67C6 PCI_CLK_SMC PCI_CLK_SMC - @m38_lib.M38 34C4 58C7 PCI_CLK_SB PCI_CLK_SB - @m38_lib.M38 5C8 22A6 34B4 PCI_CLK_PORT80 PCI_CLK_PORT80 - @m38_lib.M38 34B4 60C3 PCI_CLK_FW PCI_CLK_FW - @m38_lib.M38 34C4 44B5 PCI_AD<31> PCI_AD<31> - @m38_lib.M38 22A7 44B5 PCI_AD<30> PCI_AD<30> - @m38_lib.M38 22A7 44C5 PCI_AD<29> PCI_AD<29> - @m38_lib.M38 22A7 44C5 PCI_AD<28> PCI_AD<28> - @m38_lib.M38 22A7 44C5 PCI_AD<27> PCI_AD<27> - @m38_lib.M38 22A7 44C5 PCI_AD<26> PCI_AD<26> - @m38_lib.M38 22A7 44C5 PCI_AD<25> PCI_AD<25> - @m38_lib.M38 22A7 44C5 PCI_AD<24> PCI_AD<24> - @m38_lib.M38 22A7 44C5 PCI_AD<23> PCI_AD<23> - @m38_lib.M38 22A7 44C5 PCI_AD<22> PCI_AD<22> - @m38_lib.M38 22A7 44C5 PCI_AD<21> PCI_AD<21> - @m38_lib.M38 22A7 44C5 PCI_AD<20> PCI_AD<20> - @m38_lib.M38 22A7 44C5 PCI_AD<19> PCI_AD<19> - @m38_lib.M38 22A7 44C6 PCI_AD<18> PCI_AD<18> - @m38_lib.M38 22B7 44C5 PCI_AD<17> PCI_AD<17> - @m38_lib.M38 22B7 44C5 PCI_AD<16> PCI_AD<16> - @m38_lib.M38 22B7 44C5 PCI_AD<15> PCI_AD<15> - @m38_lib.M38 22B7 44C5 PCI_AD<14> PCI_AD<14> - @m38_lib.M38 22B7 44C5 PCI_AD<13> PCI_AD<13> - @m38_lib.M38 22B7 44C5 PCI_AD<12> PCI_AD<12> - @m38_lib.M38 22B7 44C5 PCI_AD<11> PCI_AD<11> - @m38_lib.M38 22B7 44C5 PCI_AD<10> PCI_AD<10> - @m38_lib.M38 22B7 44C5 PCI_AD<9> PCI_AD<9> - @m38_lib.M38 22B7 44C5 PCI_AD<8> PCI_AD<8> - @m38_lib.M38 22B7 44C5 PCI_AD<7> PCI_AD<7> - @m38_lib.M38 22B7 44C5 PCI_AD<6> PCI_AD<6> - @m38_lib.M38 22B7 44C5 PCI_AD<5> PCI_AD<5> - @m38_lib.M38 22B7 44C5 PCI_AD<4> PCI_AD<4> - @m38_lib.M38 22B7 44D5 PCI_AD<3> PCI_AD<3> - @m38_lib.M38 22B7 44D5 PCI_AD<2> PCI_AD<2> - @m38_lib.M38 22B7 44D5 PCI_AD<1> PCI_AD<1> - @m38_lib.M38 22B7 44D5
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8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ZH704P1 ZH704P1 - @m38_lib.M38 6B3 ZH703P1 ZH703P1 - @m38_lib.M38 6A3 ZH702P1 ZH702P1 - @m38_lib.M38 6A3 ZH701P1 ZH701P1 - @m38_lib.M38 6A3 XDP_TRST_L XDP_TRST_L - @m38_lib.M38 5D1 7C6 11B3 59A2 XDP_TMS XDP_TMS - @m38_lib.M38 5D1 7B8 7C6 11B3 59B1 XDP_TDO XDP_TDO - @m38_lib.M38 5D1 7C6 11B5 59A6 XDP_TDI XDP_TDI - @m38_lib.M38 5D1 7B8 7C6 11B3 59B2 59A1 59A6 XDP_TCK XDP_TCK - @m38_lib.M38 5D1 7A8 7C6 11B3 11B3 XDP_DBRESET_L XDP_DBRESET_L - @m38_lib.M38 7C6 11B4 26B5 XDP_BPM_L<5> XDP_BPM_L<5> - @m38_lib.M38 7C6 11B3 XDP_BPM_L<4> XDP_BPM_L<4> - @m38_lib.M38 7C6 11B3 XDP_BPM_L<3> XDP_BPM_L<3> - @m38_lib.M38 7C6 11B3 XDP_BPM_L<2> XDP_BPM_L<2> - @m38_lib.M38 7C6 11B3 XDP_BPM_L<1> XDP_BPM_L<1> - @m38_lib.M38 7C6 11B3 XDP_BPM_L<0> XDP_BPM_L<0> - @m38_lib.M38 7C6 11B3 VR_PWRGOOD_DELAY VR_PWRGOOD_DELAY - @m38_lib.M38 5C7 14B6 26D5 75C6 VR_PWRGD_CK410 VR_PWRGD_CK410 - @m38_lib.M38 23C5 26A8 VREG_FB VREG_FB - @m38_lib.M38 68A3 VOL_UP VOL_UP - @m38_lib.M38 68A6 68C7 VOL_DOWN VOL_DOWN - @m38_lib.M38 68A6 68C7 VMAIN_AVLBL VMAIN_AVLBL - @m38_lib.M38 41C7 VGA_VSYNC VGA_VSYNC - @m38_lib.M38 97A3 97C5 VGA_R VGA_R - @m38_lib.M38 97A6 97C5 VGA_HSYNC VGA_HSYNC - @m38_lib.M38 97A3 97C5 VGA_G VGA_G - @m38_lib.M38 97A6 97C5 VGA_B VGA_B - @m38_lib.M38 97B6 97C5 USB_RBIAS_PN USB_RBIAS_PN - @m38_lib.M38 22C2 USB_PORT2_P USB_PORT2_P - @m38_lib.M38 47A5 USB_PORT2_N USB_PORT2_N - @m38_lib.M38 47A5 USB_PORT1_P USB_PORT1_P - @m38_lib.M38 47B5 USB_PORT1_N USB_PORT1_N - @m38_lib.M38 47B5 USB_PORT0_P USB_PORT0_P - @m38_lib.M38 47C5 USB_PORT0_N USB_PORT0_N - @m38_lib.M38 47D5 USB_IR_P USB_IR_P - @m38_lib.M38 47C2 USB_IR_N USB_IR_N - @m38_lib.M38 47C2 USB_H_P USB_H_P - @m38_lib.M38 22C2 47C3 USB_H_N USB_H_N - @m38_lib.M38 22C2 47C3 USB_BT_P - @m38_lib.M38 47A3 USB_G_P USB_G_P - @m38_lib.M38 22C2 47A3 USB_BT_N - @m38_lib.M38 47A3 USB_G_N USB_G_N - @m38_lib.M38 22C2 47A3 USB_FLASH_P - @m38_lib.M38 49C5 USB_F_P USB_F_P - @m38_lib.M38 22C2 49C6 USB_FLASH_N - @m38_lib.M38 49C5 USB_F_N USB_F_N - @m38_lib.M38 22C2 49C6 USB_E_P USB_E_P - @m38_lib.M38 22C2 47A7 USB_E_OC_L USB_E_OC_L - @m38_lib.M38 22C4 22D8 47B7 USB_E_N USB_E_N - @m38_lib.M38 22C2 47A7 USB_D_P USB_D_P - @m38_lib.M38 22C2 47B3 USB_D_OC_L USB_D_OC_L - @m38_lib.M38 22C4 22D8 47B7 USB_D_N USB_D_N - @m38_lib.M38 22C2 47B3 USB_C_P USB_C_P - @m38_lib.M38 22C2 47B7 USB_C_OC_L USB_C_OC_L - @m38_lib.M38 22C4 22D8 47B7 47B8 USB_C_N USB_C_N - @m38_lib.M38 22C2 47B7 USB_CAMERA_P USB_CAMERA_P - @m38_lib.M38 47B2 USB_CAMERA_N USB_CAMERA_N - @m38_lib.M38 47B2 USB_B_P USB_B_P - @m38_lib.M38 22C2 53B2 USB_B_OC_L USB_B_OC_L - @m38_lib.M38 22C4 22D8 47B8 USB_B_N USB_B_N - @m38_lib.M38 22C2 53B2 USB_A_P USB_A_P - @m38_lib.M38 22C2 47C7 USB_A_OC_L USB_A_OC_L - @m38_lib.M38 22C4 22D8 47B8 47B8 USB_A_N USB_A_N - @m38_lib.M38 22C2 47D7 USB_AIRPORT_P USB_AIRPORT_P - @m38_lib.M38 53B4 USB_AIRPORT_N USB_AIRPORT_N - @m38_lib.M38 53B4 U8595_1 U8595_1 - @m38_lib.M38 85D2 U6100_VCC U6100_VCC - @m38_lib.M38 61C4 U3100_VDDQ U3100_VDDQ - @m38_lib.M38 31C5 U2698_4 U2698_4 - @m38_lib.M38 26C4 U600_11 U600_11 - @m38_lib.M38 6A7 U600_8 U600_8 - @m38_lib.M38 6B7 U600_6 U600_6 - @m38_lib.M38 6B7 U600_3 U600_3 - @m38_lib.M38 6C7 =PP1V5_S0_AIRPORT - @m38_lib.M38 6C4 53D3 =PP1V5_S0_CPU - @m38_lib.M38 6C4 8B6 8C5 =PP1V5_S0_NB - @m38_lib.M38 6C4 19B2 19D7
=PP1V5_S0_NB_3GPLL - @m38_lib.M38 6C4 19A6 19A6 =PP1V5_S0_NB_PCIE - @m38_lib.M38 6C4 13D2 19D7 =PP1V5_S0_NB_PLL - @m38_lib.M38 6C4 19C8 19D7 =PP1V5_S0_NB_TVDAC - @m38_lib.M38 6C4 19B2 19D7 19D7 =PP1V5_S0_NB_VCCAUX - @m38_lib.M38 6C4 6C4 16D1 17B6 19A7 @m38_lib.M38 =PP1V5_S0_NB_VCCD_HMPLL - 6C4 17C6 19D7 =PP1V5_S0_SB - @m38_lib.M38 6C4 25A8 25C8 @m38_lib.M38 =PP1V5_S0_SB_VCC1_5_A - 6C4 24A3 25C1 @m38_lib.M38 =PP1V5_S0_SB_VCC1_5_A_ARX - 6C4 24B5 25D6 @m38_lib.M38 =PP1V5_S0_SB_VCC1_5_A_ATX - 6C4 24A5 25C6 @m38_lib.M38 =PP1V5_S0_SB_VCC1_5_A_USB_CORE - 6C4 24A3 25B1 @m38_lib.M38 =PP1V5_S0_SB_VCCSATAPLL - 6C4 24B5 25D6 @m38_lib.M38 =PP1V5_S0_SB_VCCUSBPLL - 6C4 24A5 25B6 PP1V5_S0 - @m38_lib.M38 6C6 80C2 @m38_lib.M38 PP3V3_S0_NB_VCCA_TVBG - 17C6 19B1 @m38_lib.M38 PP3V3_S0_NB_VCCA_TVDACA - 17C6 19B1 @m38_lib.M38 PP3V3_S0_NB_VCCA_TVDACB - 17C6 19B1 @m38_lib.M38 PP3V3_S0_NB_VCCA_TVDACC - 17C6 19B1 TV_DACB_OUT - @m38_lib.M38 13C5 19B1 TV_DACC_OUT - @m38_lib.M38 13C5 19B1 TV_IREF - @m38_lib.M38 13C5 19B1 TV_IRTNA - @m38_lib.M38 13C5 19B1 TV_IRTNB - @m38_lib.M38 13C5 19B1 TV_IRTNC - @m38_lib.M38 13C5 19B1 =PP1V5_S0_CPU - @m38_lib.M38 6C4 8B6 8C5 =PP1V5_S0_NB_PCIE - @m38_lib.M38 6C4 13D2 19D7 @m38_lib.M38 =PP1V5_S0_NB_VCCD_HMPLL - 6C4 17C6 19D7 19D7 =PP1V5_S0_NB_VCCAUX - @m38_lib.M38 6C4 6C4 16D1 17B6 19A7 =PP1V5_S0_NB_PLL - @m38_lib.M38 6C4 19C8 19D7 =PP1V5_S0_NB_3GPLL - @m38_lib.M38 6C4 19A6 19A6 @m38_lib.M38 =PP1V5_S0_SB_VCC1_5_A_ARX - 6C4 24B5 25D6 @m38_lib.M38 =PP1V5_S0_SB_VCCSATAPLL - 6C4 24B5 25D6 @m38_lib.M38 =PP1V5_S0_SB_VCC1_5_A_ATX - 6C4 24A5 25C6 @m38_lib.M38 =PP1V5_S0_SB_VCCUSBPLL - 6C4 24A5 25B6 @m38_lib.M38 =PP1V5_S0_SB_VCC1_5_A_USB_CORE - 6C4 24A3 25B1 @m38_lib.M38 =PP1V5_S0_SB_VCC1_5_A - 6C4 24A3 25C1 =PP1V5_S0_SB - @m38_lib.M38 6C4 25A8 25C8 PP1V5_S0 - @m38_lib.M38 6C6 80C2 =PP1V5_S0_AIRPORT - @m38_lib.M38 6C4 53D3 =PP1V5_S0_NB_TVDAC - @m38_lib.M38 6C4 19B2 19D7 @m38_lib.M38 PP3V3_S0_NB_VCCA_TVDACA - 17C6 19B1 @m38_lib.M38 PP3V3_S0_NB_VCCA_TVDACB - 17C6 19B1 @m38_lib.M38 PP3V3_S0_NB_VCCA_TVDACC - 17C6 19B1 @m38_lib.M38 PP3V3_S0_NB_VCCA_TVBG - 17C6 19B1 TV_IREF - @m38_lib.M38 13C5 19B1 TV_IRTNC - @m38_lib.M38 13C5 19B1 TV_IRTNB - @m38_lib.M38 13C5 19B1 TV_IRTNA - @m38_lib.M38 13C5 19B1 TV_DACC_OUT - @m38_lib.M38 13C5 19B1 TV_DACB_OUT - @m38_lib.M38 13C5 19B1 TV_DACA_OUT TV_DACA_OUT - @m38_lib.M38 13C5 19B1 TSENSE_NB_GPU_DXN TSENSE_NB_GPU_DXN - @m38_lib.M38 61B5 TSENSE_NB_DXP TSENSE_NB_DXP - @m38_lib.M38 61B5 TSENSE_GPU_DXP TSENSE_GPU_DXP - @m38_lib.M38 61C5 TP_U9050_J3 TP_U9050_J3 - @m38_lib.M38 90A4 TP_U9050_J2 TP_U9050_J2 - @m38_lib.M38 90A4 TP_U9000_J3 TP_U9000_J3 - @m38_lib.M38 90A7 TP_U9000_J2 TP_U9000_J2 - @m38_lib.M38 90A7 TP_U8950_J3 TP_U8950_J3 - @m38_lib.M38 89A4 TP_U8950_J2 TP_U8950_J2 - @m38_lib.M38 89A4 TP_U8900_J3 TP_U8900_J3 - @m38_lib.M38 89A7 TP_U8900_J2 TP_U8900_J2 - @m38_lib.M38 89A7 TP_U8400_AG14 TP_U8400_AG14 - @m38_lib.M38 91A5 TP_U5999_P14 TP_U5999_P14 - @m38_lib.M38 59A5 TP_U5999_P13 TP_U5999_P13 - @m38_lib.M38 59A5 TP_U5999_P1 TP_U5999_P1 - @m38_lib.M38 59A7 TP_SB_XOR_Y2 TP_SB_XOR_Y2 - @m38_lib.M38 21C6 TP_SB_XOR_Y1 TP_SB_XOR_Y1 - @m38_lib.M38 21C6 TP_SB_XOR_W3 TP_SB_XOR_W3 - @m38_lib.M38 21C6 TP_SB_XOR_W1 TP_SB_XOR_W1 - @m38_lib.M38 21C6 TP_SB_XOR_V7 TP_SB_XOR_V7 - @m38_lib.M38 21C6 TP_SB_XOR_V6 TP_SB_XOR_V6 - @m38_lib.M38 21C6 TP_SB_XOR_V4 TP_SB_XOR_V4 - @m38_lib.M38 21C6 TP_SB_XOR_V3 TP_SB_XOR_V3 - @m38_lib.M38 21C6 TP_SB_XOR_U7 TP_SB_XOR_U7 - @m38_lib.M38 21C6 TP_SB_XOR_U5 TP_SB_XOR_U5 - @m38_lib.M38 21C6 TP_SB_XOR_U3 TP_SB_XOR_U3 - @m38_lib.M38 21C6 TP_SB_XOR_T5 TP_SB_XOR_T5 - @m38_lib.M38 21C6 TP_SB_XOR_AH8 TP_SB_XOR_AH8 - @m38_lib.M38 22A6 TP_SB_XOR_AH4 TP_SB_XOR_AH4 - @m38_lib.M38 22A7 TP_SB_XOR_AG8 TP_SB_XOR_AG8 - @m38_lib.M38 22A6 TP_SB_XOR_AG4 TP_SB_XOR_AG4 - @m38_lib.M38 22A7 TP_SB_XOR_AE9 TP_SB_XOR_AE9 - @m38_lib.M38 22A6 TP_SB_XOR_AE5 TP_SB_XOR_AE5 - @m38_lib.M38 22A7 TP_SB_XOR_AD9 TP_SB_XOR_AD9 - @m38_lib.M38 22A7 TP_SB_XOR_AD5 TP_SB_XOR_AD5 - @m38_lib.M38 22A7 TP_SB_SATALED_L TP_SB_SATALED_L - @m38_lib.M38 21C6 TP_SB_RSVD9 TP_SB_RSVD9 - @m38_lib.M38 22A6 TP_SB_GPIO38 TP_SB_GPIO38 - @m38_lib.M38 23C3 USE @m38_lib.M38 TP_SB_GPIO25_DO_NOT_ TP_SB_GPIO25_DO_NOT_USE - 23C3 TP_SB_GPIO23 TP_SB_GPIO23 - @m38_lib.M38 21D5 TP_SB_GPIO6 TP_SB_GPIO6 - @m38_lib.M38 23C5 TP_SB_DRQ0_L TP_SB_DRQ0_L - @m38_lib.M38 21D4 TP_SB_ACZ_SDIN2 TP_SB_ACZ_SDIN2 - @m38_lib.M38 21C6 TP_SB_ACZ_SDIN1 TP_SB_ACZ_SDIN1 - @m38_lib.M38 21C6 TP_PCI_PME_L TP_PCI_PME_L - @m38_lib.M38 22A6 TP_PCI_GNT4_L TP_PCI_GNT4_L - @m38_lib.M38 22B6 TP_PCI_GNT2_L TP_PCI_GNT2_L - @m38_lib.M38 22B6 TP_PCI_GNT1_L TP_PCI_GNT1_L - @m38_lib.M38 22B6
TP_PCI_GNT0_L TP_PCI_GNT0_L - @m38_lib.M38 22B6 TP_PCI_CLK_SPARE TP_PCI_CLK_SPARE - @m38_lib.M38 5B4 34C4 TP_NB_XOR_LVDS_D28 TP_NB_XOR_LVDS_D28 - @m38_lib.M38 14C6 TP_NB_XOR_LVDS_D27 TP_NB_XOR_LVDS_D27 - @m38_lib.M38 14C6 TP_NB_XOR_LVDS_A35 TP_NB_XOR_LVDS_A35 - @m38_lib.M38 14C6 TP_NB_XOR_LVDS_A34 TP_NB_XOR_LVDS_A34 - @m38_lib.M38 14C6 TP_NB_XOR_FSB2_H7 TP_NB_XOR_FSB2_H7 - @m38_lib.M38 14D6 TP_NB_TESTIN_L TP_NB_TESTIN_L - @m38_lib.M38 14D6 TP_MEM_B_A<15> TP_MEM_B_A<15> - @m38_lib.M38 5B4 29C3 TP_MEM_B_A<14> TP_MEM_B_A<14> - @m38_lib.M38 5B4 29C3 TP_MEM_A_A<15> TP_MEM_A_A<15> - @m38_lib.M38 28C3 TP_MEM_A_A<14> TP_MEM_A_A<14> - @m38_lib.M38 28C3 TP_LVDS_VBG TP_LVDS_VBG - @m38_lib.M38 13D5 TP_FW_VAUX_PRES TP_FW_VAUX_PRES - @m38_lib.M38 44B3 TP_FW_ROM_AD TP_FW_ROM_AD - @m38_lib.M38 44B3 TP_FW_NANDTREE TP_FW_NANDTREE - @m38_lib.M38 44B3 TP_FW_MPCIACT_L TP_FW_MPCIACT_L - @m38_lib.M38 44B3 TP_FW_LPS TP_FW_LPS - @m38_lib.M38 44B3 TP_FW_LKON TP_FW_LKON - @m38_lib.M38 44B3 TP_FW_CNA TP_FW_CNA - @m38_lib.M38 44B3 TP_FB_B_ODT<1> TP_FB_B_ODT<1> - @m38_lib.M38 87B1 TP_FB_B_ODT<0> TP_FB_B_ODT<0> - @m38_lib.M38 87B1 TP_FB_B_MA12 TP_FB_B_MA12 - @m38_lib.M38 87D1 TP_FB_A_ODT<1> TP_FB_A_ODT<1> - @m38_lib.M38 87B5 TP_FB_A_ODT<0> TP_FB_A_ODT<0> - @m38_lib.M38 87B5 TP_FB_A_MA12 TP_FB_A_MA12 - @m38_lib.M38 87D5 TP_CPU_SPARE7 TP_CPU_SPARE7 - @m38_lib.M38 7B6 TP_CPU_SPARE6 TP_CPU_SPARE6 - @m38_lib.M38 7B6 TP_CPU_SPARE5 TP_CPU_SPARE5 - @m38_lib.M38 7B6 TP_CPU_SPARE4 TP_CPU_SPARE4 - @m38_lib.M38 7B6 TP_CPU_SPARE3 TP_CPU_SPARE3 - @m38_lib.M38 7B6 TP_CPU_SPARE2 TP_CPU_SPARE2 - @m38_lib.M38 7B6 TP_CPU_SPARE1 TP_CPU_SPARE1 - @m38_lib.M38 7B6 TP_CPU_SPARE0 TP_CPU_SPARE0 - @m38_lib.M38 7B6 TP_CPU_HFPLL TP_CPU_HFPLL - @m38_lib.M38 7B7 TP_CPU_EXTBREF TP_CPU_EXTBREF - @m38_lib.M38 7B6 TP_CPU_CPUSLP_L TP_CPU_CPUSLP_L - @m38_lib.M38 21C4 TP_CPU_APM1_L TP_CPU_APM1_L - @m38_lib.M38 7B7 TP_CPU_APM0_L TP_CPU_APM0_L - @m38_lib.M38 7B7 TP_CPU_A39_L TP_CPU_A39_L - @m38_lib.M38 7B7 TP_CPU_A38_L TP_CPU_A38_L - @m38_lib.M38 7B7 TP_CPU_A37_L TP_CPU_A37_L - @m38_lib.M38 7B7 TP_CPU_A36_L TP_CPU_A36_L - @m38_lib.M38 7B7 TP_CPU_A35_L TP_CPU_A35_L - @m38_lib.M38 7B7 TP_CPU_A34_L TP_CPU_A34_L - @m38_lib.M38 7B7 TP_CPU_A33_L TP_CPU_A33_L - @m38_lib.M38 7B7 TP_CPU_A32_L TP_CPU_A32_L - @m38_lib.M38 7C7 TP_CLK14P3M_SPARE TP_CLK14P3M_SPARE - @m38_lib.M38 34C4 TP_AZ_DOCK_RST_L TP_AZ_DOCK_RST_L - @m38_lib.M38 23C5 TP_AZ_DOCK_EN_L TP_AZ_DOCK_EN_L - @m38_lib.M38 23C5 TP_ATI_ROMCS_L TP_ATI_ROMCS_L - @m38_lib.M38 91A3 TPM_XTALO TPM_XTALO - @m38_lib.M38 59B7 67C6 TPM_XTALI TPM_XTALI - @m38_lib.M38 59B7 67C6 TPM_RST_L TPM_RST_L - @m38_lib.M38 67B6 TPM_PP TPM_PP - @m38_lib.M38 59A5 67C6 TPM_LRESET_L TPM_LRESET_L - @m38_lib.M38 6B7 67B7 TPM_GPIO2 TPM_GPIO2 - @m38_lib.M38 59B5 67C6 TPM_GPIO1 TPM_GPIO1 - @m38_lib.M38 59B5 67C6 TPM_BADD TPM_BADD - @m38_lib.M38 67C4 TMDS_DATA_P<5> TMDS_DATA_P<5> - @m38_lib.M38 93C3 95D6 TMDS_DATA_P<4> TMDS_DATA_P<4> - @m38_lib.M38 93C3 95D6 TMDS_DATA_P<3> TMDS_DATA_P<3> - @m38_lib.M38 93C3 95D6 TMDS_DATA_P<2> TMDS_DATA_P<2> - @m38_lib.M38 93C3 97C8 TMDS_DATA_P<1> TMDS_DATA_P<1> - @m38_lib.M38 93C3 97C8 TMDS_DATA_P<0> TMDS_DATA_P<0> - @m38_lib.M38 93C3 97D8 TMDS_DATA_N<5> TMDS_DATA_N<5> - @m38_lib.M38 93C3 95D6 TMDS_DATA_N<4> TMDS_DATA_N<4> - @m38_lib.M38 93C3 95D6 TMDS_DATA_N<3> TMDS_DATA_N<3> - @m38_lib.M38 93C3 95D6 TMDS_DATA_N<2> TMDS_DATA_N<2> - @m38_lib.M38 93C3 97C8 TMDS_DATA_N<1> TMDS_DATA_N<1> - @m38_lib.M38 93C3 97D8 TMDS_DATA_N<0> TMDS_DATA_N<0> - @m38_lib.M38 93C3 97D8 TMDS_CONN_DP<2> TMDS_CONN_DP<2> - @m38_lib.M38 97C7 97D4 TMDS_CONN_DP<1> TMDS_CONN_DP<1> - @m38_lib.M38 97C4 97D7 TMDS_CONN_DP<0> TMDS_CONN_DP<0> - @m38_lib.M38 97C4 97D7 TMDS_CONN_DN<2> TMDS_CONN_DN<2> - @m38_lib.M38 97C7 97D4 TMDS_CONN_DN<1> TMDS_CONN_DN<1> - @m38_lib.M38 97C4 97D7 TMDS_CONN_DN<0> TMDS_CONN_DN<0> - @m38_lib.M38 97C4 97D7 TMDS_CONN_CLKP TMDS_CONN_CLKP - @m38_lib.M38 97C4 97C7 TMDS_CONN_CLKN TMDS_CONN_CLKN - @m38_lib.M38 97C4 97C7 TMDS_CLK_P TMDS_CLK_P - @m38_lib.M38 93C3 97C8 TMDS_CLK_N TMDS_CLK_N - @m38_lib.M38 93C3 97C8 TMDS_CK_TERM TMDS_CK_TERM - @m38_lib.M38 97C8 THRM_THM THRM_THM - @m38_lib.M38 10C4 THRM_ALERT_L THRM_ALERT_L - @m38_lib.M38 10D3 THERM_DX_P THERM_DX_P - @m38_lib.M38 10B5 10C5 THERM_DX_N THERM_DX_N - @m38_lib.M38 10B5 10C5 SYS_PWRUP_L SYS_PWRUP_L - @m38_lib.M38 6C7 SYS_POWERFAIL_L SYS_POWERFAIL_L - @m38_lib.M38 6D8 76D2 SYS_ONEWIRE SYS_ONEWIRE - @m38_lib.M38 58B7 59B4 SYS_LED_DRV_K SYS_LED_DRV_K - @m38_lib.M38 59D6 SYS_LED_DRV_C SYS_LED_DRV_C - @m38_lib.M38 59D6 SW_RST_DEBNC SW_RST_DEBNC - @m38_lib.M38 26C4 SW_RST_BTN_L SW_RST_BTN_L - @m38_lib.M38 5D1 26C6 SV_SET_UP SV_SET_UP - @m38_lib.M38 23B6 23C3 60B3 SMC_SUS_CLK - @m38_lib.M38 58C5 59B6 SUS_CLK_SB SUS_CLK_SB - @m38_lib.M38 23C3 59B5 SPKRAMP_SS SPKRAMP_SS - @m38_lib.M38 72B4 SPKRAMP_MUTE SPKRAMP_MUTE - @m38_lib.M38 72B5 SPI_WP_L SPI_WP_L - @m38_lib.M38 63C4 SPI_SO_R SPI_SO_R - @m38_lib.M38 63C3 SPI_SO SPI_SO - @m38_lib.M38 22C6 58D5 63C1 SPI_SI_R SPI_SI_R - @m38_lib.M38 63C3 SPI_SI SPI_SI - @m38_lib.M38 22C6 58D5 63C1 SPI_SCLK_R SPI_SCLK_R - @m38_lib.M38 63C4 SPI_SCLK SPI_SCLK - @m38_lib.M38 22C6 58D5 63C7 SPI_HOLD_L SPI_HOLD_L - @m38_lib.M38 63C4 SPI_CE_L SPI_CE_L - @m38_lib.M38 22C6 58B5 63C7 SPI_ARB SPI_ARB - @m38_lib.M38 22C6 58D5 SPARE_SRC7_P SPARE_SRC7_P - @m38_lib.M38 34D2 SPARE_SRC7_N SPARE_SRC7_N - @m38_lib.M38 34D2 SPARE_SRC3_P SPARE_SRC3_P - @m38_lib.M38 34D2 SPARE_SRC3_N SPARE_SRC3_N - @m38_lib.M38 34D2 NC_SMS_Z_AXIS - @m38_lib.M38 59B5 SMS_Z_AXIS SMS_Z_AXIS - @m38_lib.M38 58A7 59B6 NC_SMS_Y_AXIS - @m38_lib.M38 59B5 SMS_Y_AXIS SMS_Y_AXIS - @m38_lib.M38 58B7 59B6 NC_SMS_X_AXIS - @m38_lib.M38 59B5 SMS_X_AXIS SMS_X_AXIS - @m38_lib.M38 58B7 59B6 SMS_ONOFF_L SMS_ONOFF_L - @m38_lib.M38 58A5 59B4 SMS_INT_L SMS_INT_L - @m38_lib.M38 23C3 26C2 58B5 SMLINK<1> SMLINK<1> - @m38_lib.M38 23D5 SMLINK<0> SMLINK<0> - @m38_lib.M38 23D5 SMC_XTAL SMC_XTAL - @m38_lib.M38 58C3 59B8 SMC_XDP_TRST_L_R SMC_XDP_TRST_L_R - @m38_lib.M38 59A3
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C7510 CAP_402 m38[75C8] C7509 CAP_1210 m38[75D1] C7508 CAP_1210 m38[75C2] C7507 CAP_402 m38[75B7] C7506 CAP_402 m38[75B7] C7505 CAP_402 m38[75C8] C7504 CAP_402 m38[75B1] C7503 CAP_402 m38[75C1] C7502 CAP_402 m38[75B4] C7501 CAP_P_TH-MCZ m38[75C2] C7500 CAP_402 m38[75C4] C7423 CAP_402 m38[74A7] C7422 CAP_402 m38[74A7] C7421 CAP_402 m38[74A7] C7420 CAP_402 m38[74A7] C7419 CAP_603-1 m38[74A4] C7418 CAP_805 m38[74A5] C7417 CAP_402 m38[74A8] C7416 CAP_402 m38[74A8] C7415 CAP_402 m38[74A8] C7414 CAP_402 m38[74A7] C7413 CAP_402 m38[74A8] C7412 CAP_402 m38[74A8] C7411 CAP_402 m38[74B8] C7410 CAP_402 m38[74A8] C7409 CAP_402 m38[74B8] C7408 CAP_402 m38[74D7] C7407 CAP_402 m38[74D8] C7406 CAP_P_CASE-B-SM m38[74C6] C7405 CAP_P_CASE-B-SM m38[74C7] C7404 CAP_P_CASE-B-SM m38[74B6] C7403 CAP_P_CASE-B-SM m38[74B7] C7402 CAP_402 m38[74A4] C7401 CAP_402 m38[74C4] C7400 CAP_402 m38[74B4] C7324 CAP_402 m38[73A5] C7323 CAP_402 m38[73A6] C7322 CAP_402 m38[73C5] C7321 CAP_402 m38[73C5] C7318 CAP_805 m38[73B4] C7317 CAP_402 m38[73B4] C7315 CAP_402 m38[73A6] C7314 CAP_402 m38[73A7] C7313 CAP_402 m38[73A6] C7312 CAP_402 m38[73A6] C7311 CAP_402 m38[73A7] C7303 CAP_402 m38[73D6] C7302 CAP_402 m38[73D6] C7301 CAP_402 m38[73D6] C7300 CAP_402 m38[73D7] C7223 CAP_1210 m38[72D3] C7221 CAP_402 m38[72B7] C7220 CAP_402 m38[72B7] C7219 CAP_603 m38[72D4] C7218 CAP_603 m38[72D5] C7217 CAP_P_6.3X8-SM m38[72D6] C7216 CAP_402 m38[72C6] C7215 CAP_402 m38[72C6] C7214 CAP_603 m38[72B5] C7213 CAP_402 m38[72B2] C7212 CAP_402 m38[72B2] C7211 CAP_402 m38[72B2] C7210 CAP_402 m38[72B3] C7209 CAP_805 m38[72B4] C7208 CAP_603-1 m38[72C4] C7207 CAP_805 m38[72C6] C7206 CAP_805 m38[72C6] C7205 CAP_805 m38[72C6] C7204 CAP_805 m38[72D6] C7203 CAP_1210 m38[72D3] C7202 CAP_805 m38[72D4] C7201 CAP_1210 m38[72D5] C7200 CAP_P_6.3X8-SM m38[72D5] C6836 CAP_402 m38[68D3] C6835 CAP_402 m38[68D6] C6834 CAP_402 m38[68B2] C6833 CAP_402 m38[68B2] C6832 CAP_402 m38[68B2] C6830 CAP_402 m38[68D4] C6829 CAP_402 m38[68B3] C6826 CAP_603 m38[68A3] C6825 CAP_402 m38[68A3] C6823 CAP_402 m38[68A4] C6822 CAP_603 m38[68A5] C6821 CAP_402 m38[68C6] C6813 CAP_402 m38[68B3] C6812 CAP_402 m38[68B4] C6811 CAP_402 m38[68B2] C6810 CAP_P_SMA-LF m38[68B2] C6809 CAP_402 m38[68B2] C6808 CAP_402 m38[68B3] C6807 CAP_P_SMA-LF m38[68B3] C6806 CAP_805 m38[68B3] C6805 CAP_805 m38[68B3] C6804 CAP_P_SMA-LF m38[68B4] C6803 CAP_P_B2 m38[68D3] C6802 CAP_P_B2 m38[68D4] C6801 CAP_402 m38[68D6] C6800 CAP_603 m38[68D6] C6705 CAP_402 m38[59B7] C6704 CAP_402 m38[59B7] C6703 CAP_402 m38[67C3] C6702 CAP_402 m38[67C3] C6701 CAP_402 m38[67C4] C6700 CAP_402 m38[67C4] C6655 CAP_402 m38[66B2] C6654 CAP_402 m38[66B4] C6653 CAP_402 m38[66A3] C6652 CAP_402 m38[66B3] C6651 CAP_402 m38[66A5] C6650 CAP_402 m38[66B5] C6602 CAP_P_SM-LF m38[66C3] C6601 CAP_805 m38[66C5] C6600 CAP_603 m38[66D4] C6505 CAP_P_6.3X11-TH-LF m38[65B3] C6504 CAP_P_6.3X11-TH-LF m38[65C4] C6503 CAP_805 m38[65B5] C6502 CAP_603 m38[65B4] C6501 CAP_805 m38[65D5] C6500 CAP_603 m38[65D5] C6312 CAP_402 m38[63D3] C6311 CAP_402 m38[63C2] C6309 CAP_402 m38[63C6] C6308 CAP_402 m38[63C5]
C6301 CAP_402 m38[63C2] C6101 CAP_402 m38[61B5] C6100 CAP_402 m38[61B5] C6003 CAP_402 m38[60C6] C6002 CAP_402 m38[60C6] C6001 CAP_402 m38[60D6] C6000 CAP_402 m38[60D6] C5943 CAP_402 m38[59A5] C5942 CAP_603 m38[59A3] C5941 CAP_402 m38[59A3] C5940 CAP_402 m38[59A4] C5919 CAP_402 m38[59B4] C5903 CAP_402 m38[59A8] C5902 CAP_402 m38[59B7] C5901 CAP_402 m38[59D8] C5900 CAP_402 m38[59D8] C5820 CAP_402 m38[58C3] C5807 CAP_402 m38[58D2] C5806 CAP_402 m38[58D1] C5805 CAP_402 m38[58D2] C5804 CAP_402 m38[58D2] C5803 CAP_402 m38[58D2] C5802 CAP_805 m38[58D3] C5801 CAP_402 m38[59B8] C5800 CAP_402 m38[59B8] C5314 CAP_603 m38[53C4] C5313 CAP_402 m38[53C5] C5312 CAP_603 m38[53D4] C5311 CAP_603 m38[53C3] C5310 CAP_402 m38[53C4] C5309 CAP_402 m38[53C4] C5308 CAP_402 m38[53C5] C5307 CAP_402 m38[53C4] C5306 CAP_402 m38[53D4] C5305 CAP_402 m38[53D5] C5304 CAP_402 m38[53D5] C5301 CAP_402 m38[53B7] C5300 CAP_402 m38[53B7] C4951 CAP_402 m38[49C4] C4950 CAP_805-2 m38[49C4] C4799 CAP_805-2 m38[47A2] C4798 CAP_402 m38[47A2] C4797 CAP_805-2 m38[47D3] C4743 CAP_402 m38[47D1] C4742 CAP_402 m38[47D2] C4733 CAP_402 m38[47A5] C4732 CAP_402 m38[47A5] C4723 CAP_402 m38[47C5] C4722 CAP_402 m38[47C5] C4720 CAP_P_SMD m38[47C6] C4713 CAP_402 m38[47D5] C4712 CAP_402 m38[47D5] C4710 CAP_P_SMD2 m38[47D6] C4664 CAP_402 m38[46B7] C4660 CAP_402 m38[46C7] C4654 CAP_402 m38[46B8] C4650 CAP_402 m38[46C7] C4626 CAP_402 m38[46A2] C4625 CAP_603-1 m38[46A2] C4623 CAP_402 m38[46A4] C4622 CAP_402 m38[46A4] C4621 CAP_402 m38[46B4] C4620 CAP_402 m38[46B4] C4616 CAP_402 m38[46B2] C4615 CAP_603-1 m38[46C2] C4613 CAP_402 m38[46C4] C4612 CAP_402 m38[46C4] C4611 CAP_402 m38[46D4] C4610 CAP_402 m38[46D4] C4609 CAP_603-1 m38[46D5] C4523 CAP_402 m38[45D3] C4522 CAP_402 m38[45D3] C4521 CAP_402 m38[45D4] C4520 CAP_402 m38[45D5] C4515 CAP_603 m38[45D6] C4510 CAP_402 m38[45D5] C4509 CAP_402 m38[45D5] C4508 CAP_402 m38[45D5] C4507 CAP_402 m38[45C5] C4506 CAP_402 m38[45C5] C4505 CAP_402 m38[45C5] C4504 CAP_402 m38[45C4] C4503 CAP_603 m38[45C6] C4502 CAP_402 m38[45D3] C4501 CAP_402 m38[45D3] C4500 CAP_402 m38[45D4] C4412 CAP_402 m38[44D1] C4410 CAP_402 m38[44D6] C4402 CAP_402 m38[44C1] C4401 CAP_402 m38[44D1] C4305 CAP_402 m38[43B6] C4304 CAP_402 m38[43C6] C4301 CAP_402 m38[43D6] C4300 CAP_402 m38[43D7] C4210 CAP_402 m38[42B6] C4209 CAP_603 m38[42B7] C4206 CAP_402 m38[42C5] C4205 CAP_1210 m38[42C5] C4204 CAP_402 m38[42D6] C4203 CAP_1206-1 m38[42D6] C4202 CAP_1210 m38[42D7] C4201 CAP_402 m38[42D7] C4200 CAP_1210 m38[42D8] C4150 CAP_402 m38[41D5] C4140 CAP_402 m38[41B3] C4139 CAP_402 m38[41A4] C4138 CAP_402 m38[41A4] C4137 CAP_402 m38[41A5] C4136 CAP_402 m38[41A5] C4135 CAP_402 m38[41A5] C4134 CAP_402 m38[41A6] C4133 CAP_402 m38[41A6] C4132 CAP_402 m38[41A7] C4131 CAP_402 m38[41A7] C4130 CAP_402 m38[41A7] C4129 CAP_402 m38[41A8] C4128 CAP_402 m38[41A8] C4127 CAP_402 m38[41A8] C4126 CAP_402 m38[41A8] C4118 CAP_402 m38[41B2] C4117 CAP_402 m38[41B2] C4116 CAP_402 m38[41B5] C4115 CAP_402 m38[41B5] C4113 CAP_402 m38[41C4]
C4112 CAP_402 m38[41C4] C4111 CAP_402 m38[41D4] C4110 CAP_402 m38[41D4] C4107 CAP_402 m38[41D2] C4106 CAP_402 m38[41D2] C4105 CAP_402 m38[41D5] C4104 CAP_402 m38[41D6] C4103 CAP_402 m38[41D6] C4102 CAP_402 m38[41D6] C4101 CAP_402 m38[41D7] C3806 CAP_805-2 m38[38C1] C3805 CAP_402 m38[38C2] C3804 CAP_402 m38[38C3] C3803 CAP_402 m38[38B7] C3802 CAP_402 m38[38B7] C3801 CAP_402 m38[38B7] C3800 CAP_402 m38[38B7] C3390 CAP_402 m38[33C7] C3389 CAP_402 m38[33C7] C3317 CAP_603 m38[33D4] C3316 CAP_603 m38[33D7] C3315 CAP_402 m38[33D7] C3314 CAP_402 m38[33D8] C3312 CAP_603 m38[33C6] C3311 CAP_402 m38[33C6] C3310 CAP_402 m38[33D3] C3309 CAP_603 m38[33D4] C3308 CAP_402 m38[33D4] C3307 CAP_402 m38[33C4] C3306 CAP_402 m38[33D4] C3305 CAP_402 m38[33D4] C3304 CAP_402 m38[33D6] C3303 CAP_402 m38[33D6] C3302 CAP_402 m38[33D6] C3301 CAP_402 m38[33D6] C3110 CAP_402 m38[31B6] C3109 CAP_603 m38[31C5] C3105 CAP_P_SMC-LF m38[31B4] C3102 CAP_603 m38[31B4] C3101 CAP_603 m38[31B6] C3100 CAP_402 m38[31C4] C3035 CAP_402 m38[30C3] C3033 CAP_402 m38[30C3] C3030 CAP_402 m38[30C4] C3015 CAP_402 m38[30A3] C3014 CAP_402 m38[30A4] C3013 CAP_402 m38[30A4] C3011 CAP_402 m38[30D3] C3010 CAP_402 m38[30D4] C3009 CAP_402 m38[30A4] C3008 CAP_402 m38[30A3] C3007 CAP_402 m38[30D3] C3006 CAP_402 m38[30B3] C3005 CAP_402 m38[30D4] C3004 CAP_402 m38[30B4] C2952 CAP_402 m38[29A6] C2951 CAP_603 m38[29A7] C2950 CAP_603 m38[29D6] C2923 CAP_402 m38[29B1] C2922 CAP_402 m38[29B1] C2921 CAP_402 m38[29B2] C2920 CAP_402 m38[29B2] C2919 CAP_402 m38[29B1] C2918 CAP_402 m38[29B1] C2917 CAP_402 m38[29B2] C2916 CAP_402 m38[29B2] C2915 CAP_402 m38[29B1] C2914 CAP_402 m38[29B1] C2913 CAP_402 m38[29B2] C2912 CAP_402 m38[29B2] C2911 CAP_402 m38[29B1] C2910 CAP_402 m38[29B1] C2909 CAP_402 m38[29B2] C2908 CAP_402 m38[29B2] C2900 CAP_402 m38[29D6] C2852 CAP_402 m38[28A6] C2851 CAP_603 m38[28A6] C2850 CAP_603 m38[28D6] C2821 CAP_402 m38[28B1] C2820 CAP_402 m38[28B1] C2819 CAP_402 m38[28B2] C2818 CAP_402 m38[28B2] C2817 CAP_402 m38[28B1] C2816 CAP_402 m38[28B1] C2815 CAP_402 m38[28B2] C2814 CAP_402 m38[28B2] C2813 CAP_402 m38[28B1] C2812 CAP_402 m38[28B1] C2811 CAP_402 m38[28B2] C2810 CAP_402 m38[28B2] C2804 CAP_603 m38[28B1] C2803 CAP_603 m38[28B1] C2802 CAP_603 m38[28B2] C2801 CAP_603 m38[28B2] C2800 CAP_402 m38[28D6] C2699 CAP_402 m38[26C5] C2698 CAP_402 m38[26C4] C2611 CAP_402 m38[26B7] C2610 CAP_402 m38[26C7] C2609 CAP_402 m38[26D8] C2608 CAP_402 m38[26D8] C2607 CAP_402 m38[26D5] C2605 CAP_402 m38[26C7] C2534 CAP_402 m38[25D1] C2533 CAP_402 m38[25C1] C2532 CAP_402 m38[25C1] C2531 CAP_402 m38[25D1] C2530 CAP_402 m38[25A3] C2529 CAP_402 m38[25A3] C2528 CAP_402 m38[25A3] C2527 CAP_402 m38[25A3] C2526 CAP_402 m38[25A4] C2525 CAP_402 m38[25B3] C2524 CAP_603 m38[25B3] C2523 CAP_402 m38[25B4] C2522 CAP_402 m38[25B3] C2521 CAP_402 m38[25C3] C2520 CAP_402 m38[25B6] C2519 CAP_402 m38[25D3] C2518 CAP_402 m38[25D4] C2517 CAP_402 m38[25D6] C2516 CAP_P_CASE-C2 m38[25D3] C2515 CAP_402 m38[25B6] C2514 CAP_402 m38[25C6]
C2513 CAP_402 m38[25C6] C2512 CAP_402 m38[25B1] C2511 CAP_402 m38[25D6] C2510 CAP_402 m38[25C1] C2509 CAP_402 m38[25B8] C2508 CAP_603 m38[25A6] C2507 CAP_402 m38[25B7] C2506 CAP_402 m38[25B7] C2505 CAP_402 m38[25B7] C2504 CAP_402 m38[25C8] C2503 CAP_402 m38[25D8] C2502 CAP_402 m38[25D4] C2501 CAP_402 m38[25A6] C2500 CAP_P_SMB2 m38[25B8] C1982 CAP_603 m38[19B8] C1981 CAP_603 m38[19B6] C1976 CAP_402 m38[19A4] C1975 CAP_603 m38[19A4] C1972 CAP_603 m38[19A4] C1971 CAP_603 m38[19A4] C1970 CAP_P_SMB2 m38[19A5] C1968 CAP_P_CASE-C1 m38[19B7] C1967 CAP_402 m38[19B7] C1966 CAP_603 m38[19B7] C1965 CAP_603 m38[19B8] C1937 CAP_402 m38[19C7] C1936 CAP_805 m38[19C7] C1935 CAP_402 m38[19C7] C1934 CAP_805 m38[19C7] C1921 FILTER_3P_A_NFM18 m38[19B2] C1920 CAP_402 m38[19A2] C1918 CAP_402 m38[19A7] C1916 CAP_402 m38[19A8] C1915 CAP_402 m38[19A7] C1914 CAP_603 m38[19A8] C1907 CAP_402 m38[19B3] C1906 CAP_402 m38[19B3] C1905 CAP_402 m38[19B4] C1904 CAP_402 m38[19B4] C1903 CAP_603 m38[19B4] C1902 CAP_603 m38[19B5] C1901 CAP_P_CASE-C1 m38[19B5] C1900 CAP_P_CASE-C1 m38[19B5] C1713 CAP_402 m38[17B3] C1712 CAP_402 m38[17A3] C1711 CAP_402 m38[17A3] C1621 CAP_603 m38[16B5] C1620 CAP_603 m38[16B5] C1615 CAP_402 m38[16B6] C1614 CAP_402 m38[16B8] C1613 CAP_402 m38[16B8] C1612 CAP_402 m38[16B4] C1611 CAP_402 m38[16B4] C1610 CAP_402 m38[16B5] C1236 CAP_402 m38[12A6] C1226 CAP_402 m38[12B6] C1211 CAP_402 m38[12C3] C1100 CAP_402 m38[11A3] C1001 CAP_402 m38[10D4] C1000 CAP_402 m38[10C6] C953 CAP_402 m38[9D2] C952 CAP_402 m38[9D3] C951 CAP_402 m38[9D3] C950 CAP_402 m38[9D4] C946 CAP_P_3P_D2T m38[9A6] C945 CAP_P_3P_D2T m38[9A6] C944 CAP_P_3P_D2T m38[9A7] C943 CAP_P_3P_D2T m38[9A7] C942 CAP_P_3P_D2T m38[9A7] C941 CAP_P_3P_D2T m38[9A7] C940 CAP_P_CASE-C1 m38[9C7] C939 CAP_805 m38[9A5] C938 CAP_402 m38[9B6] C937 CAP_402 m38[9B6] C936 CAP_402 m38[9B7] C935 CAP_402 m38[9B7] C934 CAP_402 m38[9B7] C932 CAP_805 m38[9A6] C931 CAP_805 m38[9A5] C930 CAP_805 m38[9A6] C929 CAP_805 m38[9B5] C928 CAP_805 m38[9B6] C926 CAP_402 m38[9B7] C925 CAP_805 m38[9A7] C924 CAP_805 m38[9A7] C923 CAP_805 m38[9B7] C922 CAP_805 m38[9A7] C921 CAP_805 m38[9A7] C920 CAP_805 m38[9A5] C919 CAP_805 m38[9A7] C918 CAP_805 m38[9A7] C917 CAP_805 m38[9A7] C916 CAP_805 m38[9A7] C915 CAP_805 m38[9A7] C914 CAP_805 m38[9A7] C913 CAP_805 m38[9A7] C912 CAP_805 m38[9A7] C911 CAP_805 m38[9B7] C910 CAP_805 m38[9B7] C909 CAP_805 m38[9B5] C908 CAP_805 m38[9B7] C907 CAP_805 m38[9B5] C906 CAP_805 m38[9A6] C905 CAP_805 m38[9A6] C904 CAP_805 m38[9A6] C903 CAP_805 m38[9A6] C902 CAP_805 m38[9A6] C901 CAP_805 m38[9B6] C900 CAP_805 m38[9B6] C0801 CAP_603 m38[8B5] C0800 CAP_402 m38[8B5] C699 CAP_P_CASE-C1 m38[6D7] C610 CAP_402 m38[6C7] C604 CAP_402 m38[6A4] C603 CAP_402 m38[6A3] C602 CAP_402 m38[6A3] C601 CAP_402 m38[6A3] C600 CAP_402 m38[6C7] C85A0 CAP_402 m38[85D1]
Date: Dec 8 15:02:55 2005 Design: m38 Title: Cref Part Report
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8 7 6 5 4 3 2 1
-BLK-LF J3 CON_2RTSM_125_SM-2MT m38[61B6] -BLK-LF J2 CON_2RTSM_125_SM-2MT m38[61B7] GV3808 HOLE_VIA m38[38A7] GV3807 HOLE_VIA m38[38A8] GV3806 HOLE_VIA m38[38A7] GV3805 HOLE_VIA m38[38A8] GV3804 HOLE_VIA m38[38A7] GV3803 HOLE_VIA m38[38A8] GV3802 HOLE_VIA m38[38A7] GV3801 HOLE_VIA m38[38A8] FLE021 FILTER_4P_2012 m38[46B3] FLE011 FILTER_4P_2012 m38[46C3] LF FL9742 FILTER_LC_SM-220MHZ- m38[97A7] LF FL9741 FILTER_LC_SM-220MHZ- m38[97A7] LF FL9740 FILTER_LC_SM-220MHZ- m38[97B7] FL4620 FILTER_4P_2012 m38[46B3] FL4610 FILTER_4P_2012 m38[46C3] F9710 FUSE_SM-LF m38[97D5] F4701 FUSE_MINISMD-LF m38[47D3] F4602 FUSE_MINISMD-LF m38[46D3] F4601 FUSE_SM-LF m38[46D2] F4600 FUSE_SM-LF m38[46D2] 0405 DZ7304 SUPPR_TRANSIENT_4P1_ m38[73C4] 0405 DZ7303 SUPPR_TRANSIENT_4P1_ m38[73C5] 0405 DZ7302 SUPPR_TRANSIENT_4P1_ m38[73A4] 0405 DZ7301 SUPPR_TRANSIENT_4P1_ m38[73A5] 0405 DZ7300 SUPPR_TRANSIENT_4P1_ m38[73C6] 3 DP4621 DIODE_DUAL_6P_SOT-36 m38[46A4 46A3] 3 DP4620 DIODE_DUAL_6P_SOT-36 m38[46B4 46B3] 3 DP4611 DIODE_DUAL_6P_SOT-36 m38[46C4 46C3] 3 DP4610 DIODE_DUAL_6P_SOT-36 m38[46D4 46D3] D9700 ZENER_CASE425 m38[97C1] D8520 DIODE_SCHOT_SMB m38[85C3] D7599 DIODE_SOT23 m38[76D6] D7501 DIODE_SCHOT_SMB m38[75B2] D7500 DIODE_SCHOT_SMB m38[75C3] D6601 DIODE_SCHOT_SMB m38[66C3] D6600 DIODE_SOT23 m38[66C4] D6503 DIODE_SCHOT_SMB m38[65B4] D6502 DIODE_SCHOT_SMB m38[65C4] D6501 DIODE_SOT23 m38[65B4] D6500 DIODE_SOT23 m38[65C4] 75 D4900 DIODE_SCHOT_3P_A_SC- m38[49B4] 75 D4707 DIODE_SCHOT_3P_A_SC- m38[47A6] 75 D4706 DIODE_SCHOT_3P_A_SC- m38[47B6] 75 D4705 DIODE_SCHOT_3P_A_SC- m38[47C6] 75 D4702 DIODE_SCHOT_3P_A_SC- m38[47A5] 75 D4701 DIODE_SCHOT_3P_A_SC- m38[47B5] 75 D4700 DIODE_SCHOT_3P_A_SC- m38[47C5] D4690 ZENER_SOT23 m38[46A6] D4600 DIODE_SMC m38[46D5] D2601 DIODE_SCHOT_SOT23 m38[26C8] D2600 DIODE_SCHOT_SOT23 m38[26D8] D2501 DIODE_SCHOT_SOT23 m38[25D8] D2500 DIODE_SCHOT_SOT23 m38[25C8] C9742 CAP_402 m38[97A6] C9741 CAP_402 m38[97A6] C9740 CAP_402 m38[97A7] C9714 CAP_402 m38[97C2] C9713 CAP_402 m38[97C2] C9711 CAP_402 m38[97D3] C9710 CAP_603 m38[97C3] C9700 CAP_402 m38[97C8] C9470 CAP_402 m38[94B2] C9450 CAP_805 m38[94C2] C9420 CAP_1210 m38[94C5] C9410 CAP_402 m38[94C6] C9401 CAP_402 m38[94C6] C9400 CAP_603-1 m38[94C7] C9347 CAP_402 m38[93A5] C9346 CAP_402 m38[93A5] C9345 CAP_805 m38[93A6] C9342 CAP_402 m38[93A5] C9341 CAP_402 m38[93A6] C9340 CAP_805 m38[93A6] C9332 CAP_402 m38[93B5] C9331 CAP_402 m38[93B6] C9330 CAP_805 m38[93B6] C9327 CAP_402 m38[93B7] C9326 CAP_402 m38[93B8] C9325 CAP_805 m38[93B8] C9322 CAP_402 m38[93B5] C9321 CAP_402 m38[93B6] C9320 CAP_805 m38[93B6] C9317 CAP_402 m38[93B7] C9316 CAP_402 m38[93B8] C9315 CAP_805 m38[93B8] C9312 CAP_402 m38[93C5] C9311 CAP_402 m38[93C6] C9310 CAP_805 m38[93C6] C9307 CAP_402 m38[93C5] C9306 CAP_402 m38[93C6] C9305 CAP_805 m38[93C6] C9302 CAP_402 m38[93C5] C9301 CAP_402 m38[93C6] C9300 CAP_805 m38[93C6] C9191 CAP_402 m38[91D2] C9142 CAP_402 m38[91A5] C9141 CAP_402 m38[91A6] C9140 CAP_805 m38[91A6] C9137 CAP_402 m38[91A5] C9136 CAP_402 m38[91A6] C9135 CAP_805 m38[91A6]
C9132 CAP_402 m38[91A5] C9131 CAP_402 m38[91A6] C9130 CAP_805 m38[91A6] C9127 CAP_402 m38[91B5] C9126 CAP_402 m38[91B5] C9125 CAP_805 m38[91B5] C9122 CAP_402 m38[91B5] C9121 CAP_402 m38[91B5] C9120 CAP_805 m38[91B5] C9117 CAP_402 m38[91B5] C9116 CAP_402 m38[91B5] C9115 CAP_805 m38[91B5] C9112 CAP_402 m38[91C5] C9111 CAP_402 m38[91C5] C9110 CAP_805 m38[91C5] C9103 CAP_402 m38[91C5] C9102 CAP_402 m38[91C5] C9101 CAP_402 m38[91C5] C9100 CAP_805 m38[91C5] C9083 CAP_402 m38[90C3] C9081 CAP_402 m38[90C3] C9076 CAP_402 m38[90C3] C9075 CAP_402 m38[90C3] C9074 CAP_402 m38[90C4] C9073 CAP_402 m38[90C4] C9072 CAP_402 m38[90C4] C9071 CAP_402 m38[90C4] C9070 CAP_805 m38[90C5] C9065 CAP_402 m38[90D3] C9060 CAP_402 m38[90D3] C9054 CAP_402 m38[90D3] C9053 CAP_402 m38[90D3] C9052 CAP_402 m38[90D4] C9051 CAP_402 m38[90D4] C9050 CAP_805 m38[90D4] C9033 CAP_402 m38[90C6] C9031 CAP_402 m38[90C7] C9026 CAP_402 m38[90C6] C9025 CAP_402 m38[90C7] C9024 CAP_402 m38[90C7] C9023 CAP_402 m38[90C7] C9022 CAP_402 m38[90C7] C9021 CAP_402 m38[90C8] C9020 CAP_805 m38[90C8] C9015 CAP_402 m38[90D6] C9010 CAP_402 m38[90D7] C9004 CAP_402 m38[90D6] C9003 CAP_402 m38[90D7] C9002 CAP_402 m38[90D7] C9001 CAP_402 m38[90D7] C9000 CAP_805 m38[90D7] C8983 CAP_402 m38[89C3] C8981 CAP_402 m38[89C3] C8976 CAP_402 m38[89C3] C8975 CAP_402 m38[89C3] C8974 CAP_402 m38[89C4] C8973 CAP_402 m38[89C4] C8972 CAP_402 m38[89C4] C8971 CAP_402 m38[89C4] C8970 CAP_805 m38[89C5] C8965 CAP_402 m38[89D3] C8960 CAP_402 m38[89D3] C8954 CAP_402 m38[89D3] C8953 CAP_402 m38[89D3] C8952 CAP_402 m38[89D4] C8951 CAP_402 m38[89D4] C8950 CAP_805 m38[89D4] C8933 CAP_402 m38[89C6] C8931 CAP_402 m38[89C7] C8926 CAP_402 m38[89C6] C8925 CAP_402 m38[89C7] C8924 CAP_402 m38[89C7] C8923 CAP_402 m38[89C7] C8922 CAP_402 m38[89C7] C8921 CAP_402 m38[89C8] C8920 CAP_805 m38[89C8] C8915 CAP_402 m38[89D6] C8910 CAP_402 m38[89D7] C8904 CAP_402 m38[89D6] C8903 CAP_402 m38[89D7] C8902 CAP_402 m38[89D7] C8901 CAP_402 m38[89D7] C8900 CAP_805 m38[89D7] C8726 CAP_402 m38[87A3] C8725 CAP_402 m38[87A4] C8723 CAP_402 m38[87B4] C8721 CAP_402 m38[87B4] C8716 CAP_402 m38[87A6] C8715 CAP_402 m38[87A7] C8713 CAP_402 m38[87B7] C8711 CAP_402 m38[87B7] C8697 CAP_402 m38[86D3] C8696 CAP_402 m38[86D3] C8695 CAP_805 m38[86D2] C8692 CAP_402 m38[86D5] C8691 CAP_402 m38[86D5] C8690 CAP_805 m38[86D5] C8683 CAP_402 m38[86A5] C8682 CAP_402 m38[86A5] C8681 CAP_402 m38[86A6] C8680 CAP_402 m38[86A6] C8679 CAP_402 m38[86A6] C8678 CAP_402 m38[86B5] C8677 CAP_402 m38[86B5] C8676 CAP_402 m38[86B5] C8675 CAP_402 m38[86B6] C8674 CAP_402 m38[86B6] C8673 CAP_402 m38[86B6] C8672 CAP_402 m38[86B5] C8671 CAP_402 m38[86B5] C8670 CAP_402 m38[86B5] C8669 CAP_402 m38[86B6] C8668 CAP_402 m38[86B6] C8667 CAP_402 m38[86B6] C8666 CAP_402 m38[86B5] C8665 CAP_402 m38[86B5] C8664 CAP_402 m38[86B5] C8663 CAP_402 m38[86B6] C8662 CAP_402 m38[86B6] C8661 CAP_402 m38[86B6] C8660 CAP_402 m38[86B5] C8659 CAP_402 m38[86B5] C8658 CAP_402 m38[86B5] C8657 CAP_402 m38[86B6]
C8656 CAP_402 m38[86B6] C8655 CAP_402 m38[86B6] C8653 CAP_805 m38[86B6] C8652 CAP_805 m38[86B7] C8651 CAP_805 m38[86B7] C8650 CAP_805 m38[86B7] C8634 CAP_402 m38[86C5] C8633 CAP_402 m38[86C5] C8632 CAP_402 m38[86C5] C8631 CAP_402 m38[86C6] C8630 CAP_805 m38[86C6] C8616 CAP_402 m38[86C5] C8615 CAP_402 m38[86C5] C8614 CAP_402 m38[86C6] C8613 CAP_402 m38[86C6] C8612 CAP_402 m38[86C6] C8611 CAP_402 m38[86C7] C8610 CAP_402 m38[86C5] C8609 CAP_402 m38[86C5] C8608 CAP_402 m38[86C5] C8607 CAP_402 m38[86C6] C8606 CAP_402 m38[86C6] C8605 CAP_402 m38[86C6] C8604 CAP_402 m38[86C7] C8601 CAP_805 m38[86C7] C8600 CAP_805 m38[86C7] C8599 CAP_1206 m38[85C4] C8598 CAP_402 m38[85D2] C8595 CAP_402 m38[85D1] C8592 CAP_402 m38[85C2] C8590 CAP_402 m38[85D3] C8589 CAP_805 m38[85A3] C8586 CAP_402 m38[85A3] C8585 CAP_402 m38[85A4] C8580 CAP_603 m38[85A4] C8570 CAP_402 m38[85A5] C8560 CAP_402 m38[85A6] C8557 CAP_805 m38[85B6] C8556 CAP_805 m38[85B6] C8555 CAP_402 m38[85B7] C8551 CAP_603 m38[85B8] C8543 CAP_P_CASE-D2E-LF m38[85C2] C8542 CAP_P_CASE-D2E-LF m38[85C2] C8541 CAP_805 m38[85C2] C8540 CAP_805 m38[85C2] C8532 CAP_1210 m38[85D4] C8531 CAP_1210 m38[85D4] C8530 CAP_1210 m38[85D4] C8523 CAP_402 m38[85B2] C8522 CAP_402 m38[85C5] C8521 CAP_402 m38[85C4] C8520 CAP_603 m38[85C3] C8509 CAP_402 m38[85C5] C8508 CAP_402 m38[85C7] C8507 CAP_402 m38[85C7] C8506 CAP_402 m38[85C8] C8502 CAP_603 m38[85D6] C8501 CAP_603 m38[85D6] C8500 CAP_603 m38[85D6] C8486 CAP_402 m38[84B2] C8485 CAP_402 m38[84B2] C8484 CAP_402 m38[84B2] C8483 CAP_402 m38[84B2] C8482 CAP_402 m38[84B2] C8481 CAP_402 m38[84B2] C8480 CAP_402 m38[84B2] C8479 CAP_402 m38[84B2] C8478 CAP_402 m38[84B2] C8477 CAP_402 m38[84B2] C8476 CAP_402 m38[84B2] C8475 CAP_402 m38[84B2] C8474 CAP_402 m38[84C2] C8473 CAP_402 m38[84C2] C8472 CAP_402 m38[84C2] C8471 CAP_402 m38[84C2] C8470 CAP_402 m38[84C2] C8469 CAP_402 m38[84C2] C8468 CAP_402 m38[84C2] C8467 CAP_402 m38[84C2] C8466 CAP_402 m38[84C2] C8465 CAP_402 m38[84C2] C8464 CAP_402 m38[84C2] C8463 CAP_402 m38[84D2] C8462 CAP_402 m38[84D2] C8461 CAP_402 m38[84D2] C8460 CAP_402 m38[84D2] C8459 CAP_402 m38[84D2] C8458 CAP_402 m38[84D2] C8457 CAP_402 m38[84D2] C8456 CAP_402 m38[84D2] C8455 CAP_402 m38[84D2] C8451 CAP_402 m38[84B5] C8450 CAP_402 m38[84B5] C8449 CAP_402 m38[84B5] C8448 CAP_402 m38[84B5] C8447 CAP_402 m38[84B5] C8446 CAP_402 m38[84B5] C8445 CAP_402 m38[84B5] C8444 CAP_402 m38[84B5] C8443 CAP_402 m38[84B5] C8442 CAP_402 m38[84B5] C8441 CAP_402 m38[84B5] C8440 CAP_402 m38[84B5] C8439 CAP_402 m38[84C5] C8438 CAP_402 m38[84C5] C8437 CAP_402 m38[84C5] C8436 CAP_402 m38[84C5] C8435 CAP_402 m38[84C5] C8434 CAP_402 m38[84C5] C8433 CAP_402 m38[84C5] C8432 CAP_402 m38[84C5] C8431 CAP_402 m38[84C5] C8430 CAP_402 m38[84C5] C8429 CAP_402 m38[84C5] C8428 CAP_402 m38[84D5] C8427 CAP_402 m38[84D5] C8426 CAP_402 m38[84D5] C8425 CAP_402 m38[84D5] C8424 CAP_402 m38[84D5] C8423 CAP_402 m38[84D5] C8422 CAP_402 m38[84D5] C8421 CAP_402 m38[84D5] C8420 CAP_402 m38[84D5] C8413 CAP_402 m38[84B7]
C8412 CAP_402 m38[84B7] C8411 CAP_402 m38[84B7] C8410 CAP_805 m38[84B6] C8407 CAP_402 m38[84B7] C8406 CAP_402 m38[84B7] C8405 CAP_805 m38[84B7] C8402 CAP_402 m38[84C7] C8401 CAP_402 m38[84C7] C8400 CAP_805 m38[84C7] C8399 CAP_603 m38[83C4] C8398 CAP_603 m38[83B4] C8199 CAP_402 m38[81A5] C8198 CAP_1210 m38[81D3] C8192 CAP_603 m38[81D6] C8190 CAP_P_CASE-D2E-LF m38[81C3] C8115 CAP_805-1 m38[81C2] C8114 CAP_P_CASE-D2E-LF m38[81C3] C8112 CAP_1210 m38[81D3] C8111 CAP_1210 m38[81D3] C8110 CAP_1210 m38[81D4] C8109 CAP_1206 m38[81C4] C8108 CAP_402 m38[81C5] C8107 CAP_402 m38[81C3] C8106 CAP_402 m38[81C5] C8103 CAP_603 m38[81C7] C8102 CAP_402 m38[81C5] C8101 CAP_603 m38[81C5] C8100 CAP_402 m38[81D6] C8099 CAP_P_CASE-D2E-LF m38[80C2] C8016 CAP_805-1 m38[80C2] C8015 CAP_1210 m38[80D3] C8014 CAP_P_TH-MCZ m38[80D4] C8012 CAP_402 m38[80C5] C8011 CAP_402 m38[80C5] C8010 CAP_603 m38[80C4] C8009 CAP_603 m38[80C6] C8006 CAP_402 m38[80D6] C8005 CAP_402 m38[80C4] C8004 CAP_1206 m38[80C4] C8003 CAP_402 m38[80C3] C8002 CAP_603 m38[80D6] C8001 CAP_P_CASE-D2E-LF m38[80C3] C8000 CAP_1210 m38[80D3] C7998 CAP_P_CASE-D2E-LF m38[79C3] C7992 CAP_603 m38[79D6] C7980 CAP_402 m38[79B3] C7913 CAP_1206 m38[79C2] C7912 CAP_P_CASE-D2E-LF m38[79C3] C7911 CAP_1210 m38[79D3] C7910 CAP_P_SM-3 m38[79D4] C7909 CAP_1206 m38[79C4] C7908 CAP_402 m38[79C5] C7907 CAP_402 m38[79C3] C7906 CAP_402 m38[79C5] C7903 CAP_603 m38[79C7] C7902 CAP_402 m38[79C5] C7901 CAP_603 m38[79D5] C7900 CAP_402 m38[79D6] C7817 CAP_P_CASE-D2E-LF m38[78B2] C7814 CAP_402 m38[78B5] C7813 CAP_1206 m38[78B4] C7811 CAP_402 m38[78B5] C7810 CAP_402 m38[78B4] C7809 CAP_402 m38[78B3] C7807 CAP_P_CASE-D2E-LF m38[78B3] C7806 CAP_805-1 m38[78B2] C7805 CAP_603 m38[78C4] C7804 CAP_402 m38[78C6] C7803 CAP_603 m38[78B6] C7802 CAP_603 m38[78C6] C7801 CAP_P_SM-LF m38[78C4] C7800 CAP_1210 m38[78C3] C7799 CAP_402 m38[77A3] C7757 CAP_402 m38[77A6] C7756 CAP_805 m38[77B3] C7755 CAP_805 m38[77B3] C7754 CAP_402 m38[77B6] C7753 CAP_402 m38[77A7] C7752 CAP_805 m38[77B4] C7751 CAP_805 m38[77B4] C7750 CAP_402 m38[77A5] C7712 CAP_402 m38[77C7] C7711 CAP_402 m38[77B7] C7710 CAP_402 m38[77C7] C7709 CAP_805 m38[77C3] C7706 CAP_402 m38[77C4] C7704 CAP_402 m38[77C4] C7703 CAP_402 m38[77C4] C7700 CAP_603 m38[77D4] C7669 CAP_402 m38[76D4] C7659 CAP_402 m38[76D4] C7633 CAP_402 m38[76C7] C7612 CAP_402 m38[76B2] C7603 CAP_402 m38[76C4] C7602 CAP_402 m38[76D2] C7601 CAP_402 m38[76D3] C7600 CAP_402 m38[76D3] C7599 CAP_402 m38[76D6] C7598 CAP_1210 m38[75D1] C7597 CAP_1210 m38[75D1] C7596 CAP_402 m38[75D6] C7592 CAP_402 m38[75B3] C7590 CAP_402 m38[75C3] C7551 CAP_603 m38[75D1] C7550 CAP_603 m38[75D1] C7535 CAP_603 m38[75D5] C7534 CAP_402 m38[75B5] C7533 CAP_402 m38[75B6] C7532 CAP_402 m38[75B6] C7531 CAP_402 m38[75B5] C7530 CAP_402 m38[75D6] C7529 CAP_402 m38[75B5] C7528 CAP_402 m38[75B5] C7527 CAP_603 m38[75C5] C7526 CAP_603 m38[75D6] C7521 CAP_402 m38[75A6] C7518 CAP_P_SM-3 m38[75D2] C7517 CAP_P_SM-3 m38[75D2] C7516 CAP_402 m38[75B4] C7515 CAP_603 m38[75C4] C7514 CAP_402 m38[75B8] C7513 CAP_402 m38[75B7] C7512 CAP_603 m38[75C2] C7511 CAP_603 m38[75B2]
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8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
9-LF Q8102 TRA_NTD60N02R_CASE36 m38[81D4] Q8003 TRA_2N7002_SOT23-LF m38[80C7] 9-LF Q8001 TRA_NTD60N02R_CASE36 m38[80C4] 9-LF Q8000 TRA_NTD60N02R_CASE36 m38[80D4] Q7902 TRA_2N7002_SOT23-LF m38[79C7] 9-LF Q7901 TRA_NTD60N02R_CASE36 m38[79C4] 9-LF Q7900 TRA_NTD60N02R_CASE36 m38[79D4] Q7802 TRA_2N7002_SOT23-LF m38[78B7] 9-LF Q7801 TRA_NTD60N02R_CASE36 m38[78B4] 9-LF Q7800 TRA_NTD60N02R_CASE36 m38[78C4] Q7799 TRA_2N7002_SOT23-LF m38[77A6] Q7703 TRA_2N7002DW_SOT-363 m38[77C7 77D7] Q7701 TRA_SI3446DV_TSOP-LF m38[77A3] -6 Q7642 TRA_FDC796N_SUPERSOT m38[76A4] -6 Q7641 TRA_FDC796N_SUPERSOT m38[76A5] HN_SOT-23 Q7640 TRA_SINGLE_MOSFET_PC m38[76A6] Q7639 TRA_2N7002_SOT23-LF m38[76A7] Q7572 TRA_HAT2168H_LFPAK m38[75C3] Q7570 TRA_HAT2168H_LFPAK m38[75D2] Q7505 TRA_HAT2165H_LFPAK m38[75B3] Q7504 TRA_HAT2165H_LFPAK m38[75D3] Q7503 TRA_HAT2165H_LFPAK m38[75B3] Q7502 TRA_HAT2168H_LFPAK m38[75C3] Q7501 TRA_HAT2165H_LFPAK m38[75D3] Q7500 TRA_HAT2168H_LFPAK m38[75D3] Q7402 TRA_2N7002DW_SOT-363 m38[74B2 74B2] Q7401 TRA_2N7002_SOT23-LF m38[74C3] Q7400 TRA_2N7002DW_SOT-363 m38[74B3 74B3] Q7200 TRA_2N7002DW_SOT-363 m38[72B6 72B7] Q6602 TRA_2N7002DW_SOT-363 m38[66D8 66C5] -03-LF Q6600 TRA_NTHS5443T1_1206A m38[66D4] Q6505 TRA_2N7002DW_SOT-363 m38[65C8 65B6] -03-LF Q6503 TRA_NTHS5443T1_1206A m38[65B4] Q6502 TRA_2N7002DW_SOT-363 m38[65D8 65D6] -03-LF Q6500 TRA_NTHS5443T1_1206A m38[65D4] Q5911 TRA_2N7002_SOT23-LF m38[59A4] HN_SOT-23 Q5910 TRA_SINGLE_MOSFET_PC m38[59A4] T-363-LF Q5903 TRA_DUAL_MMDT3904_SO m38[59A2 59A1] Q5902 TRA_2N7002DW_SOT-363 m38[59B1 59B2] Q5901 TRA_2N7002DW_SOT-363 m38[59C7 59C7] Q5900 TRA_FDV301N_SOT23-LF m38[59D7] HN_SOT23 Q4400 TRA_SINGLE_MOSFET_NC m38[44A7] Q4201 TRA_PBSS5540Z_SOT223 m38[42C6] Q4200 TRA_2N7002_SOT23-LF m38[42D2] PP9036 PROBEPOINT_SM m38[5A4] PP9035 PROBEPOINT_SM m38[5A4] PP9034 PROBEPOINT_SM m38[5A4] PP9033 PROBEPOINT_SM m38[5A4] PP9032 PROBEPOINT_SM m38[5A4] PP9031 PROBEPOINT_SM m38[5A4] PP9030 PROBEPOINT_SM m38[5A4] PP9029 PROBEPOINT_SM m38[5A4] PP9028 PROBEPOINT_SM m38[5A4] PP9027 PROBEPOINT_SM m38[5A4] PP9026 PROBEPOINT_SM m38[5A4] PP9025 PROBEPOINT_SM m38[5A4] PP9024 PROBEPOINT_SM m38[5A4] PP9023 PROBEPOINT_SM m38[5A4] PP9022 PROBEPOINT_SM m38[5A4] PP9021 PROBEPOINT_SM m38[5A4] PP9020 PROBEPOINT_SM m38[5A4] PP9016 PROBEPOINT_SM m38[5A4] PP9015 PROBEPOINT_SM m38[5A4] PP9014 PROBEPOINT_SM m38[5A4] PP9013 PROBEPOINT_SM m38[5B4] PP9012 PROBEPOINT_SM m38[5B4] PP9011 PROBEPOINT_SM m38[5B4] PP9010 PROBEPOINT_SM m38[5B4] PP9009 PROBEPOINT_SM m38[5B4] PP9008 PROBEPOINT_SM m38[5B4] PP9007 PROBEPOINT_SM m38[5B4] PP9006 PROBEPOINT_SM m38[5B4] PP9005 PROBEPOINT_SM m38[5B4] PP9004 PROBEPOINT_SM m38[5B4] PP9003 PROBEPOINT_SM m38[5B4] PP9002 PROBEPOINT_SM m38[5B4] PP9001 PROBEPOINT_SM m38[5B4] PP9000 PROBEPOINT_SM m38[5B4] PP8936 PROBEPOINT_SM m38[5A5] PP8935 PROBEPOINT_SM m38[5A5] PP8934 PROBEPOINT_SM m38[5A5] PP8933 PROBEPOINT_SM m38[5A5] PP8932 PROBEPOINT_SM m38[5A5] PP8931 PROBEPOINT_SM m38[5A5] PP8930 PROBEPOINT_SM m38[5A5] PP8929 PROBEPOINT_SM m38[5A5] PP8928 PROBEPOINT_SM m38[5A5] PP8927 PROBEPOINT_SM m38[5A5] PP8926 PROBEPOINT_SM m38[5A5] PP8925 PROBEPOINT_SM m38[5A5] PP8924 PROBEPOINT_SM m38[5A5] PP8923 PROBEPOINT_SM m38[5A5] PP8922 PROBEPOINT_SM m38[5A5] PP8921 PROBEPOINT_SM m38[5A5] PP8920 PROBEPOINT_SM m38[5A5] PP8916 PROBEPOINT_SM m38[5A5] PP8915 PROBEPOINT_SM m38[5A5] PP8914 PROBEPOINT_SM m38[5A5] PP8913 PROBEPOINT_SM m38[5B5] PP8912 PROBEPOINT_SM m38[5B5] PP8911 PROBEPOINT_SM m38[5B5] PP8910 PROBEPOINT_SM m38[5B5] PP8909 PROBEPOINT_SM m38[5B5] PP8908 PROBEPOINT_SM m38[5B5] PP8907 PROBEPOINT_SM m38[5B5] PP8906 PROBEPOINT_SM m38[5B5] PP8905 PROBEPOINT_SM m38[5B5] PP8904 PROBEPOINT_SM m38[5B5]
PP8903 PROBEPOINT_SM m38[5B5] PP8902 PROBEPOINT_SM m38[5B5] PP8901 PROBEPOINT_SM m38[5B5] PP8900 PROBEPOINT_SM m38[5B5] PP8736 PROBEPOINT_SM m38[5C5] PP8735 PROBEPOINT_SM m38[5C5] PP8734 PROBEPOINT_SM m38[5C5] PP8733 PROBEPOINT_SM m38[5C5] PP8732 PROBEPOINT_SM m38[5C5] PP8731 PROBEPOINT_SM m38[5C5] PP8730 PROBEPOINT_SM m38[5C5] PP8729 PROBEPOINT_SM m38[5C5] PP8728 PROBEPOINT_SM m38[5C5] PP8727 PROBEPOINT_SM m38[5C5] PP8726 PROBEPOINT_SM m38[5C5] PP8725 PROBEPOINT_SM m38[5C5] PP8724 PROBEPOINT_SM m38[5C5] PP8723 PROBEPOINT_SM m38[5C5] PP8722 PROBEPOINT_SM m38[5D5] PP8721 PROBEPOINT_SM m38[5D5] PP8720 PROBEPOINT_SM m38[5D5] PP8716 PROBEPOINT_SM m38[5D5] PP8715 PROBEPOINT_SM m38[5D5] PP8714 PROBEPOINT_SM m38[5D5] PP8713 PROBEPOINT_SM m38[5D5] PP8712 PROBEPOINT_SM m38[5D5] PP8711 PROBEPOINT_SM m38[5D5] PP8710 PROBEPOINT_SM m38[5D5] PP8709 PROBEPOINT_SM m38[5D5] PP8708 PROBEPOINT_SM m38[5D5] PP8707 PROBEPOINT_SM m38[5D5] PP8706 PROBEPOINT_SM m38[5D5] PP8705 PROBEPOINT_SM m38[5D5] PP8704 PROBEPOINT_SM m38[5D5] PP8703 PROBEPOINT_SM m38[5D5] PP8702 PROBEPOINT_SM m38[5D5] PP8701 PROBEPOINT_SM m38[5D5] PP8700 PROBEPOINT_SM m38[5D5] PP8401 PROBEPOINT_SM m38[5C5] PP8400 PROBEPOINT_SM m38[5C5] PP4101 PROBEPOINT_SM m38[5D4] PP4100 PROBEPOINT_SM m38[5D4] PP2802 TP_SM-TP50-TOP m38[5C3] PP2801 TP_SM-TP50-TOP m38[5C3] PP2800 TP_SM-TP50-TOP m38[5C3] PP1202 TP_SM-TP50-TOP m38[5D3] PP1201 TP_SM-TP50-TOP m38[5D3] PP1200 TP_SM-TP50-TOP m38[5D3] PP702 TP_SM-TP50-TOP m38[5D3] PP701 TP_SM-TP50-TOP m38[5D3] PP700 TP_SM-TP50-TOP m38[5D3] PP699 PROBEPOINT_SM m38[5B6] PP698 PROBEPOINT_SM m38[5B6] PP697 PROBEPOINT_SM m38[5B6] PP696 PROBEPOINT_SM m38[5B6] PP695 PROBEPOINT_SM m38[5B6] PP694 PROBEPOINT_SM m38[5B6] PP693 PROBEPOINT_SM m38[5B6] PP692 PROBEPOINT_SM m38[5B6] PP691 PROBEPOINT_SM m38[5B6] PP690 PROBEPOINT_SM m38[5B6] PP689 PROBEPOINT_SM m38[5B6] PP688 PROBEPOINT_SM m38[5B6] PP687 PROBEPOINT_SM m38[5B6] PP686 PROBEPOINT_SM m38[5B6] PP685 PROBEPOINT_SM m38[5B6] PP684 PROBEPOINT_SM m38[5B6] PP683 PROBEPOINT_SM m38[5B6] PP682 PROBEPOINT_SM m38[5B6] PP681 PROBEPOINT_SM m38[5B6] PP680 PROBEPOINT_SM m38[5B6] PP679 PROBEPOINT_SM m38[5B6] PP678 PROBEPOINT_SM m38[5B6] PP677 PROBEPOINT_SM m38[5B6] PP676 PROBEPOINT_SM m38[5B6] PP675 PROBEPOINT_SM m38[5B6] PP674 PROBEPOINT_SM m38[5C6] PP673 PROBEPOINT_SM m38[5C6] PP668 PROBEPOINT_SM m38[5C6] PP667 PROBEPOINT_SM m38[5C6] PP666 PROBEPOINT_SM m38[5C6] PP665 PROBEPOINT_SM m38[5C6] PP664 PROBEPOINT_SM m38[5C6] PP663 PROBEPOINT_SM m38[5C6] PP662 PROBEPOINT_SM m38[5C6] PP661 PROBEPOINT_SM m38[5C6] PP660 PROBEPOINT_SM m38[5C6] PP659 PROBEPOINT_SM m38[5C6] PP658 PROBEPOINT_SM m38[5C6] PP657 PROBEPOINT_SM m38[5C6] PP656 PROBEPOINT_SM m38[5C6] PP655 PROBEPOINT_SM m38[5C6] PP654 PROBEPOINT_SM m38[5C6] PP653 PROBEPOINT_SM m38[5C6] PP652 PROBEPOINT_SM m38[5C6] PP651 PROBEPOINT_SM m38[5D6] PP650 PROBEPOINT_SM m38[5D6] PP649 PROBEPOINT_SM m38[5D6] PP648 PROBEPOINT_SM m38[5D6] PP647 PROBEPOINT_SM m38[5D6] PP646 PROBEPOINT_SM m38[5D6] PP645 PROBEPOINT_SM m38[5D6] PP644 PROBEPOINT_SM m38[5D6] PP643 PROBEPOINT_SM m38[5D6] PP642 PROBEPOINT_SM m38[5D6] PP641 PROBEPOINT_SM m38[5D6] PP640 PROBEPOINT_SM m38[5D6] PP639 PROBEPOINT_SM m38[5D6] PP638 PROBEPOINT_SM m38[5D6] PP637 PROBEPOINT_SM m38[5D6] PP636 PROBEPOINT_SM m38[5D6] PP635 PROBEPOINT_SM m38[5D6] PP634 PROBEPOINT_SM m38[5D6] PP633 PROBEPOINT_SM m38[5D6] PP632 PROBEPOINT_SM m38[5D6] PP631 PROBEPOINT_SM m38[5D6] PP630 PROBEPOINT_SM m38[5C8] PP629 PROBEPOINT_SM m38[5C8] PP628 PROBEPOINT_SM m38[5C8] PP627 PROBEPOINT_SM m38[5C8] PP626 PROBEPOINT_SM m38[5C8] PP625 PROBEPOINT_SM m38[5C8] PP624 PROBEPOINT_SM m38[5C8] PP623 PROBEPOINT_SM m38[5C8]
PP622 PROBEPOINT_SM m38[5C8] PP621 PROBEPOINT_SM m38[5C8] PP620 PROBEPOINT_SM m38[5D8] PP619 PROBEPOINT_SM m38[5D8] PP618 PROBEPOINT_SM m38[5D8] PP617 PROBEPOINT_SM m38[5D8] PP616 PROBEPOINT_SM m38[5D8] PP615 PROBEPOINT_SM m38[5D8] PP614 PROBEPOINT_SM m38[5D8] PP613 PROBEPOINT_SM m38[5D8] PP612 PROBEPOINT_SM m38[5D8] PP611 PROBEPOINT_SM m38[5D8] PP610 PROBEPOINT_SM m38[5D8] PP609 PROBEPOINT_SM m38[5D8] PP608 PROBEPOINT_SM m38[5D8] PP607 PROBEPOINT_SM m38[5D8] PP606 PROBEPOINT_SM m38[5D8] PP605 PROBEPOINT_SM m38[5D8] PP604 PROBEPOINT_SM m38[5D8] PP603 PROBEPOINT_SM m38[5D8] PP602 PROBEPOINT_SM m38[5D8] PP601 PROBEPOINT_SM m38[5D8] PP600 PROBEPOINT_SM m38[5D8] PP6E1 PROBEPOINT_SM m38[5B6] PP6E0 PROBEPOINT_SM m38[5B8] PP6D9 PROBEPOINT_SM m38[5B8] PP6D8 PROBEPOINT_SM m38[5B8] PP6D7 PROBEPOINT_SM m38[5B8] PP6D6 PROBEPOINT_SM m38[5B8] PP6D5 PROBEPOINT_SM m38[5B8] PP6D4 PROBEPOINT_SM m38[5B8] PP6D3 PROBEPOINT_SM m38[5B8] PP6D2 PROBEPOINT_SM m38[5B8] PP6D1 PROBEPOINT_SM m38[5C8] PP6D0 PROBEPOINT_SM m38[5C8] PP6C8 PROBEPOINT_SM m38[5C8] PP6C7 PROBEPOINT_SM m38[5C8] PP6C6 PROBEPOINT_SM m38[5C8] PP6C5 PROBEPOINT_SM m38[5C8] PP6C4 PROBEPOINT_SM m38[5C8] PP6C3 PROBEPOINT_SM m38[5A6] PP6C2 PROBEPOINT_SM m38[5A6] PP6C1 PROBEPOINT_SM m38[5A6] PP6C0 PROBEPOINT_SM m38[5A6] PP6B9 PROBEPOINT_SM m38[5A6] PP6B8 PROBEPOINT_SM m38[5A6] PP6B7 PROBEPOINT_SM m38[5A6] PP6B6 PROBEPOINT_SM m38[5A6] PP6B5 PROBEPOINT_SM m38[5A6] PP6B4 PROBEPOINT_SM m38[5A6] PP6B3 PROBEPOINT_SM m38[5A6] PP6B2 PROBEPOINT_SM m38[5A6] PP6B1 PROBEPOINT_SM m38[5A6] PP6B0 PROBEPOINT_SM m38[5A6] PP6A9 PROBEPOINT_SM m38[5A6] PP6A8 PROBEPOINT_SM m38[5A6] PP6A7 PROBEPOINT_SM m38[5A6] PP6A6 PROBEPOINT_SM m38[5A6] PP6A5 PROBEPOINT_SM m38[5A6] PP6A4 PROBEPOINT_SM m38[5A6] PP6A3 PROBEPOINT_SM m38[5A6] PP6A2 PROBEPOINT_SM m38[5A6] PP6A1 PROBEPOINT_SM m38[5A6] PP6A0 PROBEPOINT_SM m38[5A6] PP5E2 PROBEPOINT_SM m38[5B8] PP5E1 PROBEPOINT_SM m38[5B8] LED8100 LED_2.0X1.25MM-SM m38[81A4] LED8000 LED_2.0X1.25MM-SM m38[80A4] LED7900 LED_2.0X1.25MM-SM m38[79A4] LED4303 LED_2.0X1.25MM-SM m38[43D1] LED4302 LED_2.0X1.25MM-SM m38[43D1] LED4301 LED_2.0X1.25MM-SM m38[43D2] LED4300 LED_2.0X1.25MM-SM m38[43D2] LED3800 LED_2.0X1.25MM-SM m38[38B3] LED2901 LED_3X2MM-SM m38[59D6] LED602 LED_2.0X1.25MM-SM m38[6A7] LED601 LED_2.0X1.25MM-SM m38[6A8] LED600 LED_2.0X1.25MM-SM m38[6A7] L9710 IND_SM-1 m38[97D5] L9703 FILTER_4P_SM m38[97C7] L9702 FILTER_4P_2012H m38[97C7] L9701 FILTER_4P_2012H m38[97D7] L9700 FILTER_4P_2012H m38[97D7] L9400 IND_SM m38[94C6] L9345 IND_0402 m38[93B7] L9330 IND_0402 m38[93B7] L9325 IND_0402 m38[93B7] L9320 IND_0402 m38[93B7] L9315 IND_0402 m38[93C7] L9310 IND_0402 m38[93C7] L9305 IND_0402 m38[93C7] L9300 IND_0402 m38[93C7] L9140 IND_0402 m38[91A7] L9135 IND_0402 m38[91A7] L9130 IND_0402 m38[91B7] L9125 IND_0402 m38[91B6] L9120 IND_0402 m38[91B6] L9065 IND_0402 m38[90D4] L9060 IND_0402 m38[90D4] L9015 IND_0402 m38[90D7] L9010 IND_0402 m38[90D7] L8965 IND_0402 m38[89D4] L8960 IND_0402 m38[89D4] L8915 IND_0402 m38[89D7] L8910 IND_0402 m38[89D7] L8725 IND_0402 m38[87A4] L8715 IND_0402 m38[87A7] 0-SM L8585 IND_4P_2COIL_SDQ1215 m38[85A3] L8520 IND_IHLP m38[85C3] L8400 IND_0402 m38[84B7] L8100 IND_IHLP m38[81C3] L8000 IND_3P_SM m38[80C3] L7900 IND_3P_SM m38[79C3] L7800 IND_3P_SM m38[78B3] L7750 IND_SM-LF m38[77B4] L7700 IND_SM1-LF m38[77C4] L7502 IND_TH-VERT-LF m38[76D8] L7501 IND_SM m38[75B2] L7500 IND_SM m38[75D1] L7328 IND_SM m38[73A5] L7327 IND_SM m38[73B5] L7326 IND_SM m38[73B5] L7325 IND_SM m38[73A5]
L7324 IND_SM m38[73B5] L7323 IND_SM m38[73B5] L7322 IND_SM m38[73B5] L7320 IND_SM m38[73A7] L7319 IND_SM m38[73B7] L7318 IND_SM m38[73B7] L7317 IND_SM m38[73A7] L7316 IND_SM m38[73B7] L7315 IND_SM m38[73B7] L7314 IND_SM m38[73B7] L7313 IND_SM m38[73C4] L7312 IND_SM m38[73C4] L7310 IND_SM m38[73C6] L7309 IND_SM m38[73C6] L7307 IND_SM m38[73D5] L7306 IND_SM m38[73D5] L7305 IND_SM m38[73D5] L7304 IND_SM m38[73D5] L7303 IND_SM m38[73D7] L7302 IND_SM m38[73D7] L7301 IND_SM m38[73D7] L7300 IND_SM m38[73D7] L7208 IND_0603 m38[72C6] L7207 IND_0603 m38[72C6] L7206 IND_0603 m38[72C6] L7205 IND_0603 m38[72D6] L7204 IND_0603 m38[72C3] L7203 IND_0603 m38[72C3] L7202 IND_0603 m38[72C2] L7201 IND_0603 m38[72C2] L7200 IND_SM-1 m38[72D6] L6801 IND_0402 m38[68D6] L6800 IND_0402 m38[68A5] L5300 FILTER_4P_2012 m38[53B3] L4752 FILTER_4P_2012 m38[47B2] L4742 FILTER_4P_2012 m38[47C2] L4740 IND_SM m38[47D2] L4732 FILTER_4P_2012 m38[47A6] L4730 IND_SM m38[47B6] L4722 FILTER_4P_2012 m38[47B6] L4720 IND_SM m38[47C6] L4712 FILTER_4P_2012 m38[47C6] L4710 IND_SM m38[47D6] L4690 IND_SM-1 m38[46A6] L4620 IND_1206-LF m38[46B2] L4610 IND_1206-LF m38[46D2] L4409 IND_0402 m38[44D6] L4300 IND_SM m38[43D7] L4201 IND_SM m38[42B7] L4200 IND_SM m38[42D7] L3302 IND_0402 m38[33D3] L3301 IND_0402 m38[33D7] L2507 IND_1206 m38[25A7] L2500 IND_SM-3 m38[25B8] L1975 IND_0805 m38[19A5] L1970 IND_1210 m38[19A5] L1936 IND_0603 m38[19C7] L1934 IND_0603 m38[19C7] RT-SM JE350 CON_M14RT_S2MT_SM_M- m38[47C1] _F-ST-TH JE330 CON_F4ST_USB_S3MT_TH m38[47A4] _F-ST-TH JE320 CON_F4ST_USB_S3MT_TH m38[47B4] _F-ST-TH JE310 CON_F4ST_USB_S3MT_TH m38[47D4] ST-TH JE001 CON_F6ST_S4MT_TH1_F- m38[46B2] ST-TH JE000 CON_F6ST_S4MT_TH1_F- m38[46C2] TH1_F-ANG-TH JD600 CON_RJ45_10ANG_S3MT_ m38[43C6] ST-SM JC901 CON_F50ST_D2MT_SM_F- m38[38D2] T-SM JC900 CON_M7ST_SATA_SM_M-S m38[38B8] M_F-ST-SM J9710 CON_DVI_F32ST_Q2MT_S m38[97D5] M J9410 CON_M4ST_S_SM_M-ST-S m38[94A3] SM J9402 CON_F30ST_D_SM_F-ST- m38[94B6] M J9401 CON_M4ST_S_SM_M-ST-S m38[94C2] -ANG-TH J7303 CON_F9ANG_S4MT_TH1_F m38[73B3] T-SM J7301 CON_M7RT_S2MT_SM_M-R m38[73D1] ST-TH J7300 CON_F4ST_S4MT_TH1_F- m38[73D8] T-SM J6602 CON_M4RT_S2MT_SM_M-R m38[66B3] T-SM J6601 CON_M4RT_S2MT_SM_M-R m38[66B5] T-SM J6600 CON_F4ST_S2MT_SM_F-S m38[66C2] RT-SM J6501 CON_M5RT_S2MT_SMA_M- m38[65B2] T-SM J6500 CON_M4RT_S2MT_SM_M-R m38[65D3] J6000 CON_F30STSM_5047_SM1 m38[60B5] RT-SM J5300 CON_F52RT_D2MT_SM_F- m38[53C5] T-SM J4950 CON_M4RT_S2MT_SM_M-R m38[49C4] -SM J4700 CON_F10ST_D_SMA_F-ST m38[47A2] T-SM J2903 CON_M2ST_S2MT_SM_M-S m38[59C8] T-SM J2901 CON_F4ST_S2MT_SM_F-S m38[59C7] 5MT_SM_F-RT-SM1 J2900 CON_F200RT_DDR2DIMM_ m38[29D5] 5MT_SM_F-RT-SM1 J2800 CON_F200RT_DDR2DIMM_ m38[28D5] J2600 BATTERY_2P_TH m38[26C8] RT-SM J1101 CON_F28RT_S2MT_SM_F- m38[11C2] -BLK-LF J1000 CON_2RTSM_125_SM-2MT m38[10B7] J0700 CPU_YONAH_SKT_BGA m38[8D4 8D8] J0700 CPU_YONAH_SKT_BGA m38[7C3 7D7] -TH J600 CON_M12RT_D_THA_M-RT m38[6D7]
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8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R7212 RES_402 m38[72B8] R7208 RES_402 m38[72A4] R6818 RES_805 m38[68B4] R6817 RES_402 m38[68B4] R6816 RES_402 m38[68B4] R6815 RES_402 m38[68A7] R6814 RES_402 m38[68A7] R6813 RES_402 m38[68A7] R6812 RES_402 m38[68B7] R6811 RES_402 m38[68A3] R6810 RES_402 m38[68A3] R6808 RES_402 m38[68D3] R6807 RES_402 m38[68D7] R6803 RES_402 m38[68A4] R6802 RES_402 m38[68A5] R6801 RES_805 m38[68B5] R6800 RES_402 m38[68C6] R6799 RES_402 m38[67B6] R6798 RES_402 m38[67B6] R6705 RES_805 m38[67C3] R6704 RES_805 m38[67C2] R6703 RES_402 m38[67C4] R6702 RES_402 m38[67C4] R6700 RES_402 m38[67C6] R6698 RES_402 m38[66C8] R6697 RES_402 m38[66C8] R6681 RES_402 m38[66D7] R6680 RES_402 m38[66D8] R6607 RES_805 m38[66C3] R6606 RES_805 m38[66C5] R6605 RES_402 m38[66D6] R6604 RES_1206 m38[66D5] R6603 RES_805 m38[66D5] R6602 RES_805 m38[66C4] R6601 RES_805 m38[66D5] R6600 RES_402 m38[66C7] R6599 RES_402 m38[65C7] R6598 RES_402 m38[65A7] R6597 RES_402 m38[65A7] R6581 RES_402 m38[65B7] R6580 RES_402 m38[65B8] R6515 RES_805 m38[65C4] R6514 RES_805 m38[65B4] R6513 RES_805 m38[65B5] R6512 RES_805 m38[65C5] R6511 RES_402 m38[65B6] R6510 RES_1206 m38[65B6] R6509 RES_805 m38[65B5] R6508 RES_805 m38[65B5] R6507 RES_805 m38[65B5] R6506 RES_402 m38[65D6] R6505 RES_805 m38[65D5] R6504 RES_805 m38[65C5] R6503 RES_805 m38[65D5] R6502 RES_1206 m38[65D6] R6501 RES_402 m38[65A7] R6500 RES_402 m38[65C7] R6399 RES_402 m38[63D2] R6309 RES_402 m38[63C5] R6307 RES_402 m38[63C5] R6306 RES_402 m38[63C2] R6303 RES_402 m38[63C2] R6302 RES_402 m38[63D4] R6301 RES_402 m38[63D4] R6104 RES_402 m38[61B6] R6103 RES_402 m38[61C6] R6102 RES_402 m38[61C5] R6101 RES_402 m38[61C5] R6100 RES_402 m38[61C4] R5995 RES_402 m38[59A5] R5942 RES_402 m38[59A4] R5941 RES_402 m38[59A5] R5940 RES_402 m38[59A3] R5935 RES_402 m38[59A6] R5934 RES_402 m38[59A6] R5933 RES_402 m38[59A7] R5932 RES_402 m38[59A7] R5931 RES_402 m38[59B6] R5930 RES_402 m38[59B6] R5927 RES_402 m38[59A3] R5925 RES_402 m38[59A1] R5924 RES_402 m38[59B5] R5923 RES_402 m38[59B5] R5922 RES_402 m38[59B5] R5921 RES_402 m38[59B5] R5920 RES_402 m38[59B5] R5919 RES_402 m38[59B4] R5917 RES_402 m38[59C2] R5916 RES_402 m38[59C2] R5915 RES_402 m38[59C2] R5914 RES_402 m38[59C2] R5913 RES_402 m38[59D2] R5912 RES_402 m38[59D2] R5911 RES_402 m38[59D2] R5910 RES_402 m38[59D2] R5907 RES_402 m38[59B7] R5906 RES_402 m38[59D2] R5905 RES_402 m38[59D2] R5904 RES_402 m38[59D2] R5903 RES_402 m38[59D2] R5902 RES_402 m38[59D7] R5901 RES_402 m38[59D6] R5900 RES_402 m38[59D7] R5899 RES_402 m38[58D3] R5898 RES_402 m38[58C2] R5833 RES_402 m38[59B3] R5832 RES_402 m38[59C3] R5831 RES_402 m38[59C3] R5830 RES_402 m38[59C3] R5829 RES_402 m38[59C3] R5828 RES_402 m38[59B3] R5827 RES_402 m38[59C5] R5826 RES_402 m38[59B3] R5825 RES_402 m38[59B3] R5824 RES_402 m38[59B3] R5823 RES_402 m38[59B3] R5822 RES_402 m38[59B3] R5821 RES_402 m38[59B3] R5819 RES_402 m38[59B3] R5818 RES_402 m38[59B3] R5817 RES_402 m38[59B3] R5815 RES_402 m38[59B3] R5809 RES_402 m38[58C2] R5808 RES_402 m38[59C3]
R5803 RES_402 m38[58C2] R5802 RES_402 m38[58C2] R5801 RES_402 m38[58C2] R5304 RES_402 m38[53C6] R5303 RES_402 m38[53B4] R5302 RES_402 m38[53B4] R5301 RES_402 m38[53B3] R5300 RES_402 m38[53C3] R4755 RES_402 m38[47B2] R4754 RES_402 m38[47C2] R4746 RES_805 m38[47D2] R4743 RES_402 m38[47C2] R4742 RES_402 m38[47C2] R4736 RES_805 m38[47D6] R4735 RES_805 m38[47C6] R4734 RES_805 m38[47A6] R4733 RES_402 m38[47A6] R4732 RES_402 m38[47A6] R4723 RES_402 m38[47B6] R4722 RES_402 m38[47B6] R4713 RES_402 m38[47C6] R4712 RES_402 m38[47C6] R4690 RES_402 m38[46A7] R4664 RES_402 m38[46B7] R4663 RES_402 m38[46B7] R4662 RES_402 m38[46B7] R4661 RES_402 m38[46C7] R4660 RES_402 m38[46C7] R4656 RES_2512-1 m38[46D6] R4654 RES_402 m38[46B7] R4653 RES_402 m38[46B7] R4652 RES_402 m38[46B8] R4651 RES_402 m38[46C7] R4650 RES_402 m38[46C8] R4602 RES_2512-1 m38[46D5] R4455 RES_402 m38[44B3] R4454 RES_402 m38[44B3] R4453 RES_402 m38[44B3] R4452 RES_402 m38[44B3] R4451 RES_402 m38[44B3] R4450 RES_402 m38[44B3] R4416 RES_402 m38[44A5] R4414 RES_402 m38[44C3] R4413 RES_402 m38[44C3] R4412 RES_402 m38[44C1] R4411 RES_402 m38[44D6] R4410 RES_402 m38[44D2] R4409 RES_402 m38[44B3] R4407 RES_402 m38[44A7] R4404 RES_402 m38[44A7] R4403 RES_402 m38[44B5] R4402 RES_402 m38[44B3] R4357 RES_402 m38[43B7] R4356 RES_402 m38[43C7] R4355 RES_402 m38[43C7] R4354 RES_402 m38[43C7] R4353 RES_402 m38[43C7] R4352 RES_402 m38[43C7] R4351 RES_402 m38[43C7] R4350 RES_402 m38[43C7] R4304 RES_603 m38[43D1] R4303 RES_603 m38[43D1] R4302 RES_603 m38[43D2] R4301 RES_603 m38[43D2] R4300 RES_402 m38[43D7] R4202 RES_402 m38[42D6] R4201 RES_402 m38[42C2] R4200 RES_402 m38[42D2] R4151 RES_402 m38[41D7] R4150 RES_402 m38[41C8] R4131 RES_402 m38[41C4] R4130 RES_402 m38[41C4] R4123 RES_402 m38[41A2] R4122 RES_402 m38[41A3] R4120 RES_402 m38[41B2] R4119 RES_402 m38[41B2] R4118 RES_402 m38[41B2] R4117 RES_402 m38[41B2] R4106 RES_402 m38[41C2] R4105 RES_402 m38[41C2] R4104 RES_402 m38[41C2] R4103 RES_402 m38[41C2] R4102 RES_402 m38[41C7] R4101 RES_402 m38[41D7] R3899 RES_402 m38[38B5] R3897 RES_402 m38[38B7] R3859 RES_402 m38[38B2] R3858 RES_402 m38[38B3] R3857 RES_402 m38[38B3] R3853 RES_402 m38[38D2] R3852 RES_402 m38[38D2] R3851 RES_402 m38[38D3] R3824 RES_402 m38[38D2] R3499 RES_402 m38[34D5] R3498 RES_402 m38[34D5] R3497 RES_402 m38[34D4] R3496 RES_402 m38[34C5] R3495 RES_402 m38[34D7] R3494 RES_402 m38[34D7] R3493 RES_402 m38[34D7] R3492 RES_402 m38[34D2] R3491 RES_402 m38[34D2] R3490 RES_402 m38[34D2] R3489 RES_402 m38[34D2] R3488 RES_402 m38[34D1] R3487 RES_402 m38[34D1] R3486 RES_402 m38[34D1] R3485 RES_402 m38[34D1] R3471 RES_402 m38[34A5] R3470 RES_402 m38[34A5] R3463 RES_402 m38[34A7] R3462 RES_402 m38[34A8] R3461 RES_402 m38[34A7] R3460 RES_402 m38[34A7] R3459 RES_402 m38[34A7] R3458 RES_402 m38[34B8] R3457 RES_402 m38[34B7] R3456 RES_402 m38[34B7] R3455 RES_402 m38[34B8] R3454 RES_402 m38[34B7] R3453 RES_402 m38[34B8] R3452 RES_402 m38[34B7] R3451 RES_402 m38[34C4] R3446 RES_402 m38[34B1]
R3445 RES_402 m38[34B1] R3444 RES_402 m38[34B1] R3443 RES_402 m38[34B1] R3442 RES_402 m38[34C1] R3441 RES_402 m38[34C1] R3440 RES_402 m38[34C1] R3439 RES_402 m38[34C1] R3438 RES_402 m38[34C1] R3437 RES_402 m38[34C1] R3436 RES_402 m38[34C1] R3435 RES_402 m38[34C1] R3434 RES_402 m38[34C1] R3433 RES_402 m38[34C1] R3432 RES_402 m38[34C1] R3431 RES_402 m38[34C1] R3430 RES_402 m38[34C1] R3429 RES_402 m38[34C1] R3424 RES_402 m38[34A5] R3423 RES_402 m38[34A5] R3422 RES_402 m38[34A5] R3421 RES_402 m38[34A5] R3420 RES_402 m38[34A5] R3419 RES_402 m38[34A5] R3418 RES_402 m38[34B5] R3417 RES_402 m38[34B5] R3416 RES_402 m38[34B5] R3415 RES_402 m38[34B5] R3414 RES_402 m38[34B5] R3413 RES_402 m38[34B5] R3412 RES_402 m38[34B5] R3411 RES_402 m38[34B5] R3410 RES_402 m38[34B5] R3409 RES_402 m38[34B5] R3408 RES_402 m38[34B5] R3407 RES_402 m38[34B5] R3406 RES_402 m38[34C5] R3405 RES_402 m38[34C5] R3404 RES_402 m38[34C5] R3403 RES_402 m38[34C5] R3402 RES_402 m38[34B5] R3401 RES_402 m38[34B5] R3400 RES_402 m38[34C5] R3304 RES_402 m38[33C7] R3303 RES_402 m38[33C4] R3302 RES_402 m38[33D4] R3301 RES_402 m38[33B7] R3300 RES_402 m38[33B6] R3101 RES_402 m38[31C5] R3100 RES_402 m38[31C5] R3035 RES_402 m38[30B4] R3025 RES_402 m38[30C4] R3011 RES_402 m38[30C4] R3009 RES_402 m38[30D4] R3001 RES_402 m38[30D4] R2900 RES_402 m38[29A3] R2801 RES_402 m38[28C7] R2800 RES_402 m38[28C7] R2719 RES_402 m38[27B7] R2718 RES_402 m38[27B7] R2699 RES_402 m38[26C5] R2698 RES_402 m38[26C5] R2697 RES_402 m38[26C3] R2696 RES_402 m38[26B4] R2651 RES_402 m38[26C1] R2650 RES_402 m38[26C4] R2643 RES_402 m38[26C2] R2642 RES_402 m38[26C2] R2641 RES_402 m38[26C2] R2640 RES_402 m38[26C2] R2639 RES_402 m38[26D2] R2638 RES_402 m38[26D2] R2637 RES_402 m38[26D2] R2636 RES_402 m38[26D2] R2634 RES_402 m38[26D2] R2633 RES_402 m38[26D2] R2632 RES_402 m38[26D2] R2631 RES_402 m38[26D2] R2630 RES_402 m38[26D2] R2629 RES_402 m38[26D2] R2628 RES_402 m38[26D2] R2627 RES_402 m38[26D2] R2626 RES_402 m38[26D2] R2625 RES_402 m38[26D2] R2624 RES_402 m38[26D2] R2623 RES_402 m38[26D2] R2622 RES_402 m38[26D4] R2612 RES_402 m38[26D5] R2611 RES_402 m38[26D5] R2609 RES_402 m38[26D7] R2607 RES_402 m38[26C8] R2606 RES_402 m38[26C7] R2600 RES_402 m38[26C7] R2502 RES_402 m38[25D8] R2501 RES_402 m38[25C8] R2500 RES_603 m38[25A8] R2399 RES_402 m38[23C1] R2398 RES_402 m38[23D8] R2397 RES_402 m38[23D6] R2396 RES_402 m38[23D6] R2395 RES_402 m38[23D7] R2390 RES_402 m38[23B3] R2389 RES_402 m38[38D5] R2388 RES_402 m38[23A3] R2343 RES_402 m38[23D1] R2327 RES_402 m38[23D6] R2326 RES_402 m38[23D6] R2323 RES_402 m38[23D5] R2320 RES_402 m38[23D7] R2319 RES_402 m38[23D2] R2318 RES_402 m38[23D7] R2317 RES_402 m38[23D7] R2316 RES_402 m38[23D7] R2314 RES_402 m38[23A7] R2313 RES_402 m38[23A7] R2311 RES_402 m38[23A7] R2310 RES_402 m38[23A7] R2309 RES_402 m38[23A7] R2308 RES_402 m38[23B7] R2307 RES_402 m38[23A7] R2306 RES_402 m38[23B7] R2305 RES_402 m38[23D3] R2303 RES_402 m38[23D3] R2302 RES_402 m38[23D3] R2299 RES_402 m38[22B5]
R2298 RES_402 m38[22B5] R2255 RES_402 m38[22D7] R2254 RES_402 m38[47B8] R2253 RES_402 m38[47B8] R2252 RES_402 m38[47B8] R2251 RES_402 m38[22D6] R2250 RES_402 m38[22D7] R2226 RES_402 m38[22D5] R2225 RES_402 m38[22D7] R2223 RES_402 m38[22D6] R2222 RES_402 m38[22D6] R2211 RES_402 m38[22B3] R2207 RES_402 m38[22C5] R2206 RES_402 m38[22C5] R2205 RES_402 m38[22C6] R2204 RES_402 m38[22C2] R2203 RES_402 m38[22C2] R2200 RES_402 m38[22D7] R2199 RES_402 m38[21C3] R2198 RES_402 m38[21C6] R2197 RES_402 m38[21C6] R2196 RES_402 m38[21C6] R2195 RES_402 m38[21C6] R2194 RES_402 m38[21D4] R2110 RES_402 m38[21C2] R2108 RES_402 m38[21C2] R2107 RES_402 m38[21C2] R2105 RES_402 m38[21D6] R2101 RES_402 m38[21C4] R2100 RES_402 m38[21C3] R2085 RES_402 m38[20C4] R2079 RES_402 m38[20B7] R2077 RES_402 m38[20B7] R2075 RES_402 m38[20C7] R2060 RES_402 m38[20A4] R2059 RES_402 m38[20B4] R2058 RES_402 m38[20B4] R1983 RES_402 m38[19B8] R1982 RES_402 m38[19B8] R1981 RES_402 m38[19B7] R1980 RES_402 m38[19B7] R1975 RES_402 m38[19A4] R1441 RES_402 m38[14D6] R1440 RES_402 m38[14D6] R1430 RES_402 m38[14B6] R1420 RES_402 m38[14B6] R1411 RES_402 m38[14C3] R1410 RES_402 m38[14C3] R1310 RES_402 m38[13D3] R1236 RES_402 m38[12A7] R1235 RES_402 m38[12A7] R1231 RES_402 m38[12A7] R1230 RES_402 m38[12A7] R1226 RES_402 m38[12B7] R1225 RES_402 m38[12B7] R1221 RES_402 m38[12B7] R1220 RES_402 m38[12B7] R1211 RES_402 m38[12C3] R1210 RES_402 m38[12C3] R1106 RES_402 m38[11A3] R1104 RES_402 m38[11B5] R1103 RES_402 m38[11C5] R1102 RES_402 m38[11B4] R1101 RES_402 m38[11C5] R1100 RES_402 m38[11B5] R1019 RES_402 m38[10B6] R1018 RES_402 m38[10B6] R1017 RES_402 m38[10C6] R1005 RES_402 m38[10D3] R1002 RES_402 m38[10C6] R1001 RES_402 m38[10D3] R1000 RES_402 m38[10D3] R0803 RES_402 m38[8A7] R0802 RES_402 m38[8B7] R0730 RES_402 m38[7A4] R0722 RES_402 m38[7A7] R0721 RES_402 m38[7B7] R0720 RES_402 m38[7B7] R0719 RES_402 m38[7B1] R0718 RES_402 m38[7B1] R0717 RES_402 m38[7B1] R0716 RES_402 m38[7B1] R0712 RES_402 m38[7A3] R0707 RES_402 m38[7A4] R0706 RES_402 m38[7B5] R0705 RES_402 m38[7B4] R0704 RES_402 m38[7C5] R0703 RES_402 m38[7C6] R0702 RES_402 m38[7D6] R619 RES_402 m38[6B7] R618 RES_402 m38[6C7] R617 RES_402 m38[6A7] R616 RES_402 m38[6A7] R615 RES_402 m38[6B7] R614 RES_402 m38[6B7] R612 RES_402 m38[6B7] R611 RES_402 m38[6B7] R605 RES_603 m38[6A7] R603 RES_402 m38[6B1] R602 RES_603 m38[6A8] R601 RES_402 m38[6D8] R600 RES_603 m38[6A7] R85A0 RES_402 m38[85D1] R75A0 RES_402 m38[75C7] Q9711 TRA_2N7002DW_SOT-363 m38[97D2 97C2] Q9401 TRA_2N7002_SOT23-LF m38[94C7] Q9400 TRA_SI3443DV_TSOP-LF m38[94C7] -6 Q8576 TRA_FDC796N_SUPERSOT m38[85A2] -6 Q8575 TRA_FDC796N_SUPERSOT m38[85B6] Q8570 TRA_2N7002_SOT23-LF m38[85A5] Q8554 TRA_2N7002_SOT23-LF m38[85A8] Q8523 TRA_2N7002DW_SOT-363 m38[85B3 85B2] Q8522 TRA_HAT2165H_LFPAK m38[85C5] Q8521 TRA_HAT2165H_LFPAK m38[85C4] Q8520 TRA_HAT2168H_LFPAK m38[85D4] Q8303 TRA_2N7002DW_SOT-363 m38[83C5] Q8302 TRA_2N7002DW_SOT-363 m38[83B5] Q8301 TRA_IRF7413_SO-8 m38[83B4] Q8300 TRA_IRF7413_SO-8 m38[83C4] Q8104 TRA_2N7002_SOT23-LF m38[81C7] 9-LF Q8103 TRA_NTD60N02R_CASE36 m38[81C4]
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8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
XW9310 SHORT_SM m38[93C7] XW9305 SHORT_SM m38[93C7] XW9300 SHORT_SM m38[93C7] XW9140 SHORT_SM m38[91A4] XW9135 SHORT_SM m38[91A4] XW8725 SHORT_SM m38[87A4] XW8715 SHORT_SM m38[87A7] XW8500 SHORT_SM m38[85C6] XW8100 SHORT_SM m38[81C6] XW8000 SHORT_SM m38[80C6] XW7900 SHORT_SM m38[79C6] XW7800 SHORT_SM m38[78B6] XW7750 SHORT_SM m38[77A5] XW7700 SHORT_SM m38[77C4] XW7598 SHORT_SM m38[76D7] XW7504 SHORT_SM m38[75D1] XW7503 SHORT_SM m38[75D2] XW7502 SHORT_SM m38[75B1] XW7501 SHORT_SM m38[75B2] XW7500 SHORT_SM m38[75A6] XW7400 SHORT_SM m38[74D2] XW7300 SHORT_SM m38[73C5] XW7201 SHORT_SM m38[72B2] XW6800 SHORT_SM m38[74A4] XW5900 SHORT_SM m38[59B1] XW5800 SHORT_SM m38[58B3] XW605 SHORT_SM m38[6A5] XW604 SHORT_SM m38[6A5] XW602 SHORT_SM m38[6C2] XW601 SHORT_SM m38[6C2] XC7200 MTGHOLE m38[72B3] -6 VR6800 LREG_TPS79501_SOT223 m38[68A4] U9751 74AHC1G32_SM-LF m38[97A4] U9750 74AHC1G32_SM-LF m38[97A4] LF U9470 MC74VHC1G08_SOT23-5- m38[94B2] 36H_FBGA U9050 SGRAM_16MX32_GDDR3_1 m38[90D3 90B3] 36H_FBGA U9000 SGRAM_16MX32_GDDR3_1 m38[90D6 90B6] 36H_FBGA U8950 SGRAM_16MX32_GDDR3_1 m38[89D3 89B3] 36H_FBGA U8900 SGRAM_16MX32_GDDR3_1 m38[89D6 89B6] 5 U8595 OPAMP_LMV2011_SOT23- m38[85D2] U8580 LT3483_TSOT23-6 m38[85A4] U8560 74LVC1G125LF_SOT23-5 m38[85A6] U8550 FAN2558_SOT23-6-LF m38[85B7] U8500 ISL6269_QFN m38[85D6] U8400 ATI_M56P_BGA m38[93C4] U8400 ATI_M56P_BGA m38[91D4] U8400 ATI_M56P_BGA m38[87D2 87D6] U8400 ATI_M56P_BGA m38[86D4] U8400 ATI_M56P_BGA m38[84C8 84D4] U8100 ISL6549_QFN m38[81D6] U8000 ISL6549_QFN m38[80D6] I-LF U7910 COMPARATOR_LM339A_SO m38[81B3] I-LF U7910 COMPARATOR_LM339A_SO m38[80B2] I-LF U7910 COMPARATOR_LM339A_SO m38[79A3 79B3] I-LF U7901 COMPARATOR_LM339A_SO m38[81A5] I-LF U7901 COMPARATOR_LM339A_SO m38[80A4] I-LF U7901 COMPARATOR_LM339A_SO m38[79A5] U7900 ISL6549_QFN m38[79D6] U7800 ISL6549_QFN m38[78C6] U7750 LTC3412_TSSOP-LF m38[77B5] LF U7712 MC74VHC1G08_SOT23-5- m38[77B7] LF U7711 MC74VHC1G08_SOT23-5- m38[77B7] LF U7710 MC74VHC1G08_SOT23-5- m38[77C7] U7700 LTC3411_MSOP-LF m38[77D5] 5 U7600 OPAMP_LMV2011_SOT23- m38[76D3] U7501 INA138_SOT23-5-LF m38[76D7] U7500 ISL6262_QFN m38[75C6] U7200 MAX9714_QFN-LF m38[72C5] U6800 AUDIO_STAC9220_LQFP m38[68D5] U6700 TPM_TSSOP m38[67C5] I_SOI U6301 FLASH_SST25VF016B_SO m38[63D3] U6100 MAX6695_UMAX m38[61C4] SOP U5999 COMPARATOR_LMV339_TS m38[59A6 59A6 59A8 59A8] U5940 VREF_REF3133_SOT23-3 m38[59A4] U5900 VDET_RN5VD_SOT23-5 m38[59D8] U5800 SMC_H8S2116_BGA m38[58A8 58C3 58C6 58D6] U4700 SWI_TPS2024_SOI m38[47C8] U4400 FW32306_TQFP m38[44D5] U4102 EEPROM_M24C08_SO8 m38[41A3] U4101 88E8053_QFN m38[41D5] U3301 CLK_GEN_CY284455_QFN m38[33C5] 8 U3100 LREG_BD3533FVM_MSOP- m38[31C5] U2699 MAX6816_SOT143 m38[26C5] LF U2698 MC74VHC1G08_SOT23-5- m38[26C4] U2603 SN74LVC1G04_SOT23-5 m38[26A7] LF U2601 MC74VHC1G08_SOT23-5- m38[26D5] U2100 SB_ICH7M_BGA m38[24D4 24D7] U2100 SB_ICH7M_BGA m38[23D4] U2100 SB_ICH7M_BGA m38[22B7 22D3] U2100 SB_ICH7M_BGA m38[21D6] U1200 NB_945GM_BGA m38[18D4 18D7] U1200 NB_945GM_BGA m38[17D5] U1200 NB_945GM_BGA m38[16D2 16C8] U1200 NB_945GM_BGA m38[15D3 15D7] U1200 NB_945GM_BGA m38[14D5] U1200 NB_945GM_BGA m38[13D4] U1200 NB_945GM_BGA m38[12D5] U1000 ADT7461_MSOP m38[10D5] U601 SN74LVC1G04_SOT23-5 m38[6C7] U600 74LC125_TSSOP m38[6A7 6B7 6B7 6C7] M-LF SW5901 SWI_TACT_4SM_EVQPH_S m38[59B8]
M-LF SW5900 SWI_TACT_4SM_EVQPH_S m38[59D8] M-LF SW2600 SWI_TACT_4SM_EVQPH_S m38[26C6] SDF9402 PCB_STANDOFF m38[94A6] SDF9401 PCB_STANDOFF m38[94A6] SDF9400 PCB_STANDOFF m38[94B6] SDF5301 PCB_STANDOFF m38[53A5] SDF5300 PCB_STANDOFF m38[53A5] SDF4701 PCB_STANDOFF m38[47A2] SDF4700 PCB_STANDOFF m38[47A2] RP7200 RPAK4P_SM-LF m38[72A4] RP3011 RPAK4P_SM-LF m38[30B4 30A4 30B4 30B4] RP3010 RPAK4P_SM-LF m38[30B4 30B4 30B4 30B4] RP3009 RPAK4P_SM-LF m38[30B4 30B4 30C4 30C4] RP3008 RPAK4P_SM-LF m38[30C4 30C4 30C4 30C4] RP3007 RPAK4P_SM-LF m38[30C4 30C4 30C4 30C4] RP3006 RPAK4P_SM-LF m38[30B4 30B4 30A4 30D4] RP3005 RPAK4P_SM-LF m38[30B4 30A4 30A4 30D4] RP3004 RPAK4P_SM-LF m38[30C4 30C4 30D4] RP3003 RPAK4P_SM-LF m38[30C4 30C4 30C4 30D4] RP3002 RPAK4P_SM-LF m38[30A4 30A4 30A4 30D4] RP3001 RPAK4P_SM-LF m38[30C4 30A4 30A4 30D4] RP3000 RPAK4P_SM-LF m38[30B4 30C4 30D4 30D4] RP2300 RPAK4P_SM-LF m38[23D5] R9751 RES_402 m38[97A3] R9750 RES_402 m38[97A3] R9742 RES_402 m38[97A7] R9741 RES_402 m38[97A8] R9740 RES_402 m38[97A8] R9722 RES_402 m38[97C2] R9721 RES_402 m38[97D1] R9720 RES_402 m38[97D1] R9717 RES_402 m38[97C8] R9716 RES_402 m38[97C8] R9715 RES_402 m38[97C7] R9714 RES_402 m38[97C2] R9713 RES_402 m38[97C2] R9712 RES_402 m38[97D2] R9711 RES_402 m38[97D2] R9710 RES_402 m38[97D2] R9709 RES_402 m38[97C7] R9708 RES_402 m38[97C7] R9707 RES_402 m38[97C8] R9706 RES_402 m38[97D8] R9705 RES_402 m38[97C7] R9704 RES_402 m38[97C7] R9703 RES_402 m38[97D7] R9702 RES_402 m38[97D7] R9701 RES_402 m38[97D8] R9700 RES_402 m38[97D7] R9491 RES_805 m38[94D6] R9490 RES_805 m38[94C6] R9475 RES_402 m38[94B1] R9474 RES_402 m38[94B2] R9473 RES_402 m38[94B2] R9472 RES_402 m38[94B3] R9470 RES_402 m38[94C7] R9450 RES_402 m38[94C2] R9411 RES_402 m38[94C6] R9410 RES_402 m38[94C6] R9401 RES_402 m38[94C7] R9400 RES_402 m38[94C8] R9391 RES_402 m38[93A1] R9390 RES_402 m38[93A1] R9373 RES_402 m38[93C1] R9372 RES_402 m38[93C1] R9371 RES_402 m38[93D1] R9370 RES_402 m38[93D1] R9351 RES_402 m38[93A8] R9350 RES_402 m38[93A8] R9250 RES_402 m38[92C6] R9202 RES_402 m38[92C6] R9195 RES_402 m38[91A3] R9191 RES_402 m38[91D2] R9190 RES_402 m38[91D2] R9099 RES_402 m38[90A4] R9098 RES_402 m38[90A4] R9097 RES_402 m38[90B4] R9096 RES_402 m38[90B4] R9095 RES_402 m38[90B4] R9094 RES_402 m38[90B4] R9093 RES_402 m38[90B4] R9092 RES_402 m38[90B4] R9091 RES_402 m38[90B4] R9090 RES_402 m38[90B5] R9083 RES_402 m38[90C4] R9082 RES_402 m38[90C4] R9081 RES_402 m38[90C4] R9080 RES_402 m38[90C4] R9049 RES_402 m38[90A7] R9048 RES_402 m38[90A7] R9047 RES_402 m38[90B7] R9046 RES_402 m38[90B7] R9045 RES_402 m38[90B7] R9044 RES_402 m38[90B7] R9043 RES_402 m38[90B7] R9042 RES_402 m38[90B7] R9041 RES_402 m38[90B8] R9040 RES_402 m38[90B8] R9033 RES_402 m38[90C7] R9032 RES_402 m38[90C7] R9031 RES_402 m38[90C7] R9030 RES_402 m38[90C7] R8999 RES_402 m38[89A4] R8998 RES_402 m38[89A4] R8997 RES_402 m38[89B4] R8996 RES_402 m38[89B4] R8995 RES_402 m38[89B4] R8994 RES_402 m38[89B4] R8993 RES_402 m38[89B4] R8992 RES_402 m38[89B4] R8991 RES_402 m38[89B4] R8990 RES_402 m38[89B5] R8983 RES_402 m38[89C4] R8982 RES_402 m38[89C4] R8981 RES_402 m38[89C4] R8980 RES_402 m38[89C4] R8949 RES_402 m38[89A7] R8948 RES_402 m38[89A7] R8947 RES_402 m38[89B7] R8946 RES_402 m38[89B7] R8945 RES_402 m38[89B7] R8944 RES_402 m38[89B7]
R8943 RES_402 m38[89B7] R8942 RES_402 m38[89B7] R8941 RES_402 m38[89B8] R8940 RES_402 m38[89B8] R8933 RES_402 m38[89C7] R8932 RES_402 m38[89C7] R8931 RES_402 m38[89C7] R8930 RES_402 m38[89C7] R8850 RES_402 m38[88B4] R8833 RES_402 m38[88B4] R8832 RES_402 m38[88B4] R8831 RES_402 m38[88B4] R8830 RES_402 m38[88B4] R8813 RES_402 m38[88D4] R8812 RES_402 m38[88C4] R8811 RES_402 m38[88B4] R8810 RES_402 m38[88C4] R8809 RES_402 m38[88C4] R8808 RES_402 m38[88C4] R8807 RES_402 m38[88C4] R8806 RES_402 m38[88C4] R8805 RES_402 m38[88C4] R8804 RES_402 m38[88D4] R8803 RES_402 m38[88D4] R8802 RES_402 m38[88D4] R8801 RES_402 m38[88A7] R8800 RES_603 m38[88D7] R8733 RES_402 m38[87A1] R8732 RES_402 m38[87A3] R8731 RES_402 m38[87A3] R8730 RES_402 m38[87A3] R8723 RES_402 m38[87A4] R8722 RES_402 m38[87B4] R8721 RES_402 m38[87A4] R8720 RES_402 m38[87B4] R8713 RES_402 m38[87A7] R8712 RES_402 m38[87B7] R8711 RES_402 m38[87A8] R8710 RES_402 m38[87B8] R8630 RES_603 m38[86C7] R8599 RES_1206 m38[85C4] R8598 RES_402 m38[85D2] R8597 THERMISTER_0603-LF m38[85D3] R8596 RES_402 m38[85D3] R8594 RES_402 m38[85D3] R8593 RES_402 m38[85D3] R8592 RES_402 m38[85D2] R8591 RES_402 m38[85D3] R8590 RES_402 m38[85C3] R8588 RES_402 m38[85C5] R8586 RES_402 m38[85A3] R8585 RES_603 m38[85A3] R8570 RES_402 m38[85A5] R8561 RES_402 m38[85A7] R8560 RES_402 m38[85A6] R8556 RES_402 m38[85B6] R8555 RES_402 m38[85B6] R8554 RES_402 m38[85B7] R8540 RES_402 m38[85C2] R8526 RES_402 m38[85B3] R8525 RES_402 m38[85B3] R8524 RES_402 m38[85B3] R8523 RES_402 m38[85C3] R8522 RES_402 m38[85C3] R8521 RES_402 m38[85C3] R8510 RES_402 m38[85C5] R8508 RES_402 m38[85C7] R8507 RES_402 m38[85D7] R8506 RES_402 m38[85C8] R8505 RES_402 m38[85C7] R8504 RES_402 m38[85D7] R8503 RES_402 m38[85D7] R8502 RES_402 m38[85D6] R8497 RES_402 m38[84A2] R8496 RES_402 m38[84A2] R8495 RES_402 m38[84A2] R8303 RES_402 m38[83C4] R8302 RES_402 m38[83B5] R8301 RES_402 m38[83C5] R8300 RES_402 m38[83B4] R8199 RES_402 m38[81A5] R8198 RES_402 m38[81A5] R8192 RES_402 m38[81C7] R8191 RES_402 m38[81C7] R8190 RES_402 m38[81C3] R8140 RES_402 m38[81C5] R8110 RES_402 m38[81B3] R8107 RES_402 m38[81A4] R8105 RES_402 m38[81D7] R8104 RES_402 m38[81C5] R8103 RES_402 m38[81C3] R8102 RES_1206 m38[81C4] R8101 RES_402 m38[81C3] R8099 RES_402 m38[80C3] R8092 RES_402 m38[80C7] R8040 RES_402 m38[80C5] R8012 RES_402 m38[80B3] R8011 RES_402 m38[80B3] R8010 RES_402 m38[80B2] R8007 RES_402 m38[80A4] R8005 RES_402 m38[80D7] R8004 RES_402 m38[80C5] R8003 RES_402 m38[80C3] R8002 RES_1206 m38[80C4] R8001 RES_402 m38[80C7] R8000 RES_402 m38[80C3] R7999 RES_402 m38[79C3] R7992 RES_402 m38[79C7] R7991 RES_402 m38[79C7] R7940 RES_402 m38[79D5] R7915 RES_402 m38[79A3] R7914 RES_402 m38[79A3] R7913 RES_402 m38[79A2] R7912 RES_402 m38[79B3] R7911 RES_402 m38[79B3] R7910 RES_402 m38[79B2] R7906 RES_402 m38[79A4] R7905 RES_402 m38[79D7] R7904 RES_402 m38[79C5] R7903 RES_402 m38[79C3] R7902 RES_1206 m38[79C4] R7901 RES_402 m38[79C3] R7892 RES_402 m38[78B7] R7840 RES_402 m38[78C5]
R7812 RES_402 m38[78B3] R7805 RES_402 m38[78B5] R7804 RES_1206 m38[78B4] R7803 RES_402 m38[78B3] R7802 RES_402 m38[78B3] R7801 RES_402 m38[78B7] R7800 RES_402 m38[78C7] R7794 RES_402 m38[77C7] R7793 RES_402 m38[77D7] R7757 RES_402 m38[77B6] R7756 RES_402 m38[77B5] R7755 RES_402 m38[77B5] R7754 RES_402 m38[77B6] R7753 RES_402 m38[77B7] R7752 RES_402 m38[77A5] R7751 RES_402 m38[77A5] R7750 RES_402 m38[77A5] R7710 RES_402 m38[77D5] R7708 RES_402 m38[77C3] R7707 RES_402 m38[77C3] R7706 RES_402 m38[77C4] R7705 RES_402 m38[77C5] R7704 RES_402 m38[77C5] R7701 RES_402 m38[77C5] R7700 RES_402 m38[77D5] R7669 RES_402 m38[76D4] R7659 RES_402 m38[76D5] R7644 RES_1206 m38[76B4] R7643 RES_1206 m38[76B5] R7642 RES_402 m38[76A6] R7641 RES_402 m38[76A7] R7640 RES_402 m38[76A7] R7639 RES_402 m38[76B7] R7632 RES_402 m38[76C7] R7631 RES_402 m38[76C8] R7630 RES_402 m38[76C8] R7623 RES_402 m38[76D1] R7620 RES_402 m38[76D2] R7612 RES_402 m38[76B2] R7607 RES_402 m38[76C3] R7606 RES_402 m38[76D4] R7605 RES_402 m38[76D4] R7604 RES_402 m38[76C3] R7603 RES_402 m38[76C3] R7602 RES_402 m38[76D3] R7600 RES_402 m38[76D3] R7599 RES_2512-1 m38[76D7] R7598 RES_402 m38[76C7] R7597 RES_402 m38[76D6] R7596 RES_402 m38[75D7] R7595 RES_402 m38[75C7] R7594 RES_402 m38[75C7] R7593 RES_402 m38[75C7] R7592 RES_402 m38[75C7] R7591 RES_402 m38[75C7] R7590 RES_402 m38[75C7] R7531 THERMISTER_0603-LF m38[75B4] R7530 RES_402 m38[75B4] R7529 RES_402 m38[75A5] R7528 RES_402 m38[75A5] R7527 RES_402 m38[75C8] R7526 THERMISTER_402 m38[75C8] R7523 RES_402 m38[75A5] R7522 RES_402 m38[75A5] R7521 RES_402 m38[75D7] R7520 RES_402 m38[75D7] R7519 RES_402 m38[75C7] R7518 RES_402 m38[75B5] R7517 RES_402 m38[75B5] R7516 RES_402 m38[75B4] R7515 RES_402 m38[75B4] R7514 RES_402 m38[75B8] R7513 RES_402 m38[75B7] R7512 RES_402 m38[75D7] R7511 RES_402 m38[75B7] R7510 RES_402 m38[75B6] R7509 RES_402 m38[75B8] R7508 RES_402 m38[75B8] R7507 RES_402 m38[75B1] R7506 RES_603 m38[75B2] R7505 RES_402 m38[75B2] R7504 RES_402 m38[75C1] R7503 RES_1206 m38[75D2] R7502 RES_1206 m38[75B2] R7501 RES_603 m38[75C2] R7500 RES_402 m38[75C2] R7432 RES_402 m38[74B1] R7431 RES_402 m38[74C2] R7430 RES_402 m38[74C1] R7429 RES_805 m38[74C2] R7427 RES_402 m38[74A4] R7426 RES_402 m38[74A4] R7425 RES_402 m38[74A5] R7424 RES_402 m38[74B6] R7423 RES_402 m38[74B6] R7422 RES_402 m38[74D7] R7421 RES_402 m38[74D8] R7420 RES_402 m38[74D4] R7419 RES_402 m38[74B6] R7418 RES_402 m38[74B6] R7417 RES_805 m38[74C8] R7416 RES_805 m38[74C7] R7415 RES_805 m38[74B8] R7414 RES_805 m38[74B7] R7413 RES_402 m38[74B4] R7412 RES_805 m38[74D2] R7411 RES_805 m38[74C2] R7410 RES_805 m38[74D2] R7409 RES_402 m38[74B4] R7408 RES_402 m38[74A4] R7407 RES_402 m38[74B4] R7405 RES_402 m38[74D3] R7404 RES_402 m38[74C4] R7400 RES_402 m38[74B4] R7314 RES_402 m38[73C2] R7313 RES_402 m38[73C2] R7302 RES_402 m38[73A3] R7219 RES_402 m38[72B4] R7218 RES_402 m38[72A5] R7217 RES_402 m38[72B5] R7216 RES_402 m38[72C5] R7215 RES_402 m38[72C7] R7214 RES_402 m38[72C5] R7213 RES_402 m38[72B7]
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B
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8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ZH610 MTGHOLE m38[9D2] ZH609 MTGHOLE m38[9D2] ZH608 MTGHOLE m38[9D3] ZH607 MTGHOLE m38[9D4] ZH606 MTGHOLE m38[6A1] ZH604 MTGHOLE m38[6B3] ZH603 MTGHOLE m38[6A3] ZH602 MTGHOLE m38[6A3] ZH601 MTGHOLE m38[6A3] ZH529 HOLE_VIA m38[5B1] ZH528 HOLE_VIA m38[5B1] ZH527 HOLE_VIA m38[5B1] ZH526 HOLE_VIA m38[5B1] ZH525 HOLE_VIA m38[5B1] ZH524 HOLE_VIA m38[5B1] ZH523 HOLE_VIA m38[5C1] ZH522 HOLE_VIA m38[5C1] ZH521 HOLE_VIA m38[5C1] ZH520 HOLE_VIA m38[5C1] ZH519 HOLE_VIA m38[5B1] ZH518 HOLE_VIA m38[5B1] ZH517 HOLE_VIA m38[5B1] ZH516 HOLE_VIA m38[5B1] ZH515 HOLE_VIA m38[5B1] ZH514 HOLE_VIA m38[5B1] ZH513 HOLE_VIA m38[5C1] ZH512 HOLE_VIA m38[5C1] ZH511 HOLE_VIA m38[5C1] ZH510 HOLE_VIA m38[5C1] ZH509 HOLE_VIA m38[5B1] ZH508 HOLE_VIA m38[5B1] ZH507 HOLE_VIA m38[5B1] ZH506 HOLE_VIA m38[5B1] ZH505 HOLE_VIA m38[5B1] ZH504 HOLE_VIA m38[5B1] ZH503 HOLE_VIA m38[5C1] ZH502 HOLE_VIA m38[5C1] ZH501 HOLE_VIA m38[5C1] ZH500 HOLE_VIA m38[5C1] Y6700 CRYSTAL_4PIN_SM-LF m38[59B7] Y5800 CRYSTAL_SM-3 m38[59B8] Y4400 CRYSTAL_HC49-USMD m38[44D2] Y4101 CRYSTAL_4PIN_SM-3 m38[41B5] Y3301 CRYSTAL_5X3.2-SM m38[33C7] Y2600 CRYSTAL_4PIN_SM-LF m38[26D8] XW9345 SHORT_SM m38[93A7] XW9330 SHORT_SM m38[93B7] XW9324 SHORT_SM m38[93B7] XW9320 SHORT_SM m38[93B7] XW9314 SHORT_SM m38[93C7]
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