LOGIC GATES FLIP-FLOPS REGISTERS ADDERS Digital Electronics Jordan Nash - Microprocessor Course 1.

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LOGIC GATES FLIP-FLOPS REGISTERS ADDERS Digital Electronics Jordan Nash - Microprocessor Course 1
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Transcript of LOGIC GATES FLIP-FLOPS REGISTERS ADDERS Digital Electronics Jordan Nash - Microprocessor Course 1.

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LOGIC GATES FLIP-FLOPS REGISTERS ADDERS Digital Electronics Jordan Nash - Microprocessor Course 1 Slide 2 Numbers in a computer: Jordan Nash - Microprocessor Course 2 In the Microprocessor and memory Bits are stored electronically Each bit is represented by an electrical signal which is either a high or low voltage level. high 1 and low 0 high 0 and low 1 Normal Logic Normal Logic Inverse Logic Inverse Logic Slide 3 High and Low Jordan Nash - Microprocessor Course 3 CMOS NO MAN S LAND 74HCxx 0.1 1.0 Volts 3.5 4.9 Volts Transistor Logic (TTL) Transistor Logic (TTL) NO MAN S LAND 74LSxx 0.8 0.4 Volts 2.0 2.4 Volts It is actually a bit more complicated than this since there are different thresholds for inputs and outputs and their noise margins (indicated here in RED).. Slide 4 Making a Zero or and One Jordan Nash - Microprocessor Course 4 How do you actually make a 0 or 1 ? It is clear that depending upon the position of the J1 switch the line will be either 0 or 1 Slide 5 Binary Logic Jordan Nash - Microprocessor Course 5 Once the bits are stored, we want to be able to perform various operations on the bits The operations which the microprocessor carries out can all be constructed with a few simple circuits The basic building blocks are logic gates Slide 6 Binary Logic truth tables Jordan Nash - Microprocessor Course 6 You may remember from the first year lab the gates AND, OR, NOT Any digital device can be made out of either ORs and NOTs or ANDs and NOTs. You may remember from the first year lab the gates AND, OR, NOT Any digital device can be made out of either ORs and NOTs or ANDs and NOTs. Slide 7 DeMorgan s Theorem Jordan Nash - Microprocessor Course 7 You can swap ANDs with ORs if at the same time you invert all inputs and outputs : Exercise: Write truth table for both and prove that this is correct Slide 8 An AND out of NOTs and ORs Jordan Nash - Microprocessor Course 8 Exercise: Test the claim that you can make any logic device exclusively out of NOTs and ORs by making an AND out of NOTs and ORs: Slide 9 Answer: Jordan Nash - Microprocessor Course 9 Show that this device has an identical truth table as the AND gate. Slide 10 Exercise: Exclusive OR Jordan Nash - Microprocessor Course 10 Construct an exclusive OR (XOR) gate using OR, ANDs, and NOT: Slide 11 The Exclusive OR Jordan Nash - Microprocessor Course 11 Solution: Slide 12 Storing Zeros and Ones: Registers Jordan Nash - Microprocessor Course 12 Registers are electronic devices capable of storing 0s or 1s D-FLIP-FLOPs are the most elementary registers can store one bit 8 DFFs clocked together make a one byte register Capable of storing 8 bits Slide 13 SR Latch: Set and Reset Jordan Nash - Microprocessor Course 13 Gate level design of an SR latch When S* is low and R* High, Q is high (Set) When S* is high and R* is low Q is cleared (Reset) Q and Q* are complements When S* is low and R* High, Q is high (Set) When S* is high and R* is low Q is cleared (Reset) Q and Q* are complements Slide 14 SR Latch: Hold Jordan Nash - Microprocessor Course 14 Gate level design of an SR latch When S* and R* are high both states for Q are possible (and stable) The latch remembers the last state it was in, and holds Q in that state When S* and R* are high both states for Q are possible (and stable) The latch remembers the last state it was in, and holds Q in that state Slide 15 SR Latch: Dont do this Jordan Nash - Microprocessor Course 15 Gate level design of an SR latch When S* and R* are low Q and Q* are no longer complementary The latch can also enter a race condition where it oscillates When S* and R* are low Q and Q* are no longer complementary The latch can also enter a race condition where it oscillates Slide 16 SR Latch: 1 bit memory Jordan Nash - Microprocessor Course 16 Gate level design of an SR latch S/R high is ambiguous, but stable This circuit remembers that S went low S/R high is ambiguous, but stable This circuit remembers that S went low Ambiguous but stable Slide 17 Gated D Latch Jordan Nash - Microprocessor Course 17 Ensures that S and R are always complementary. When the Clock is high D is set on the outputs of the latch and it is held there when the clock is low Exercise: Fill out the truth table for this circuit. Ensures that S and R are always complementary. When the Clock is high D is set on the outputs of the latch and it is held there when the clock is low Exercise: Fill out the truth table for this circuit. Slide 18 D latch timing Jordan Nash - Microprocessor Course 18 The input Data to the gated D latch appears on the output (Q)while the clock is high. Sometimes we want to transfer the data into the register only at a specified moment (for example when the clock changes) The D Flip-Flop uses two d-latches to latch the data on the edge (depending on the design either positive or negative) of the input clock Slide 19 Master Slave D Flip Flop Jordan Nash - Microprocessor Course 19 Data is stored in the Master latch (Q m ) when the clock is high When the clock goes from high to low The data is held in the Master The Data is stored in the slave latch output The Q s output can only change when the clock goes from high to low Slide 20 A real D-Flip-Flop (DFF) Jordan Nash - Microprocessor Course 20 When S and R are High, on the rising edge of the clock the data are transferred and stored in Q. One can Set or Reset (Clear) the DFF using S or R Slide 21 4-bit Register Jordan Nash - Microprocessor Course 21 A register that stores 4 bits Data coming in D0,D1,D2,D3 Data coming in D0,D1,D2,D3 Data Stored on rising edge of clock in Q0,Q1,Q2,Q3 Data Stored on rising edge of clock in Q0,Q1,Q2,Q3 Slide 22 Byte Register Jordan Nash - Microprocessor Course 22 8 bit register in a single package 74F574 Also contains tri-state outputs CLK Byte coming in Byte Stored Slide 23 Addition with Binary Logic Gates J. Nash - Microprocessor Course 23 Example: Adding two 4 bit numbers results in a 4 bit number plus one carry bit or effectively a 5 bit number Lets construct this adder from gates Example: Adding two 4 bit numbers results in a 4 bit number plus one carry bit or effectively a 5 bit number Lets construct this adder from gates Computers carry out addition with binary addition of bits stored in registers We can build additions of large numbers of bits out of units which add two bits $3+$4$3+$C$D+$4$D+$C 0011 1101 + 0100+ 1100+ 0100+ 1100 = 0111= 1111=10001=11001 $7$F$11$19 Slide 24 Additions of two bits: The half adder Jordan Nash - Microprocessor Course 24 ABCS 0000 1001 0101 1110 Adding two bits generates two bits of output 1 Sum Bit S 1 Carry Bit C The truth table for this operation is shown along with an implementation using two gates Slide 25 Full Adder Jordan Nash - Microprocessor Course 25 In order to add larger numbers, we need to be able to bring the carry from the lower order bits, and add this to the sum The inputs are: the two bits to be added (A,B) The Carry Bit (C) The outputs are: The Sum Bit (S) The Carry Out Bit (C+) We can build this from two half adders and an XOR gate ABCC+S 00000 01001 10001 11010 00101 01110 10110 11111 Slide 26 Two bit adder Jordan Nash - Microprocessor Course 26 We can construct logic that adds more than 1 bit together by using multiple full adder circuits Exercise: Construct a circuit that adds two two bit words (Ao,A1) and (B0,B1) and produces three Sum Bits (S0,S1,S2) Exercise: Construct a circuit that adds two two bit words (Ao,A1) and (B0,B1) and produces three Sum Bits (S0,S1,S2) Slide 27 Solution Jordan Nash - Microprocessor Course 27 With the Full adder building block we can generalize to produce a circuit which adds larger numbers Slide 28 Four plus Four bit addition This can clearly be generalized to any number of bits There is a problem in building circuits this way as the carry bits need to propogate through the circuit before the answer is correct There are other ways to construct adder circuits which avoid this problem 28 Jordan Nash - Microprocessor Course Slide 29 Arithmetic Logic Unit (ALU) Jordan Nash - Microprocessor Course 29 Centre of every computer Composed of building blocks we have been learning about Adders Flip Flops Registers We also need to have a data bus to move data in and out - we will learn about this soon