LIC-unit-3.pptx

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Linear Integrated Circuits Unit-III Analog Multiplier and PLL

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LIC-unit-3.

Transcript of LIC-unit-3.pptx

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Linear Integrated Circuits

Unit-III

Analog Multiplier and PLL

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Multiplier Non linear operation Output proportional to the product of two signals Uses log and antilog circuits Applications

Frequency doubling, measurement of real power, detecting phase angle, multiplication, division, squaring a signal and square root of a signal

Single quadrant, two quadrant, four quadrant multiplier

Xx

y

xy / vref

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Terminologies Accuracy: deriving actual output from ideal output Linearity: maximum percentage derivation from the

ideal output Linearity error: maximum absolute derivation,

imposes lower limit on accuracy Squaring mode accuracy: maximum derivation from

absolute square law curve Bandwidth: 3-dB Bw => output reduces by 3dB, Transconductance BW: transcon reduced by 3dB

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Linear Error

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Squaring Error

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Analog multiplier using Emitter coupled transistor

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Gilbert Multiplier cell

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Gilbert Multiplier cell (DC Analysis)

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Applications of Gilbert multiplier cell If V1 and V2 < VT Gilbert cell behaves as a

multiplier as tanh function becomes linear however, inclusion of non linearity can extend the input voltage range

One of the input is >VT the transistor associated with that behaves as switch; works as a modulator

Both inputs > VT all transistors behave as non saturating switches; useful in detection of phase difference between signals

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Gilbert cell as a Multiplier

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Pre-warping circuit – Inverse tanh

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Continued… Differential o/p current is proportional to the product of

input voltages This holds good for output currents of differential voltage

to current convertors are positive Compensating non-linearity on V2 makes collector

current of Q1 and Q2 directly proportional to V2 rather than its tanh

Hence combination of Q1 and Q2 is redundant, output current of voltage-current converter can be fed to Q3-Q4, Q5-Q6 pairs

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A Complete Analog Multiplier

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Continued.. Complete analog multiplier consists of core transistors,

input voltage-current converters and output current to voltage amplifier

Core configuration is common to most four quadrant transconductance multipliers

The circuit has the transresistance The output voltage usually chosen so that And all the voltages have a ±10V range.

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Variable Transconductance techniques The differential output of the basic

transconductance multiplier is Where is the transconductance Second input Vy applied w.r.t current source

can vary transconductance If then The overall output voltage is

It depends on absolute termeratureT It has a drawback, common mode voltage

swing caused being emitter current as a function of second input

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Continued… This is overcome by using two differential stages in

parallel and cross coupling their output – Gilbert However the dynamic range is limited for linear multiplier

applications Features:

Simpler to integrate into a monolithic chip Cheaper, has good accuracy with reduced error It is available in four quadrant unlike logarithmic multiplier Available with high speed of operation Bandwidth of 10MHz an higher values are available

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Generation of Logarithmic bias input for differential stage The voltage current transfer

characteristics of differential pair