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Simone Buso - University of Padova September 1999

Lesson #1 1

DigitalDigital Control Applications inControl Applications inPower ElectronicsPower Electronics

Simone BusoSimone Buso

University of PadovaUniversity of Padova -- ItalyItaly

Department of Electronics and InformaticsDepartment of Electronics and InformaticsPower Electronics LaboratoryPower Electronics Laboratory

e-e-mailmail:: simonesimone@[email protected]

September 1999 Simone Buso - University of Padova - Lesson 1 2

LessonLesson 11

DigitalDigital Control ToolsControl Tools:: MicrocontrollersMicrocontrollers

andand DigitalDigital Signal ProcessorsSignal Processors..

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Lesson #1 2


IntroductionIntroduction

DigitalDigital Control AdvantagesControl Advantages::

FlexibilityFlexibility

Ease ofEase ofupgradeupgrade

Man toMan to MachineMachine Interface (MMI)Interface (MMI)

Sophisticated control techniquesSophisticated control techniques

Reduced number of componentsReduced number of components

UnsensitivityUnsensitivity toto components ageingcomponents ageing

DigitalDigital Control DisadvantagesControl Disadvantages:: Design complexityDesign complexity

CostCost

DynamicDynamic performance (performance (sampling frequencysampling frequency,,

quantizationquantization...)...)



Available toolsAvailable tools for digitalfor digital control implementationcontrol implementation

MicrocontrollersMicrocontrollers ((CC))

CISCCISC ((CComplexomplex IInstructionnstruction SSetet CComputeromputer))

machinesmachines (micro-(micro-coded instructionscoded instructions))

RISC (RISC (RReducededuced IInstructionnstruction SSetet CComputeromputer))

machinesmachines ((withwith//withoutwithout hardwarehardware multipliermultiplier)) 4 to 324 to 32 bit CPUbit CPU andand busbus

DigitalDigital Signal ProcessorsSignal Processors (DSP)(DSP)

FixedFixed--pointpoint arithmeticarithmetic

FloatingFloating--pointpoint arithmeticarithmetic

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Lesson #1 3



GeneralGeneralC featuresC features::

specifically designedspecifically designed forforcontrol taskscontrol tasks A/DA/D convertersconverters almost alwaysalmost always included on chipincluded on chip capturecapture andand comparecompare input pins availableinput pins available several programmableseveral programmable I/OI/O pinspins timerstimers andand counterscounters availableavailable (PWM)(PWM) different kinds ofdifferent kinds ofexternal memoryexternal memory availableavailable (ROM,(ROM,

EEPROM, FLASH)EEPROM, FLASH)

differentdifferent computational powerscomputational powers availableavailable ((fromfrom 3232 bitbitRISC toRISC to simplesimple 88 bitbit CPUs and evenCPUs and even lessless))

lots of third party development toolslots of third party development tools (EV-(EV-BoardsBoards,, inin--circuit emulatorscircuit emulators ((ICEsICEs))))



General DSPGeneral DSP featuresfeatures::

notnot specifically designedspecifically designed forforcontrol taskscontrol tasks A/DA/D convertersconverters not alwaysnot always included on chipincluded on chip usefuluseful peripheral unitsperipheral units ((CapComCapCom,, timerstimers, PWM), PWM)

normallynormally not present on chipnot present on chip

very highvery high computational power availablecomputational power available (32 bit RISC(32 bit RISCCPUs both fixed and floating pointCPUs both fixed and floating point)) relatively few third party development toolsrelatively few third party development tools (EV-(EV-

BoardsBoards)) newnew DSPDSP solutionssolutions forforpower electronic applicationspower electronic applications

areare now becomingnow becoming availableavailable (TMS320F240,(TMS320F240,

ADMC401)ADMC401)

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Lesson #1 4


MicrocontrollersMicrocontrollers AAC is essentiallyC is essentially aa computingcomputing machine wheremachine where,, on theon the

same chipsame chip, a, a CPUCPU corecore is interfaced with differentis interfaced with differentperipheral unitsperipheral units,, allowing itallowing it toto perform variousperform various controlcontrolfunctionsfunctions..

InIn modernmodern CsCs,, the typicalthe typical CPUCPU architecture is the soarchitecture is the so--calledcalled HarvardHarvard architecturearchitecture,, based onbased on separateseparate programprogramandand datadata memories and busesmemories and buses.. AnAn hardwarehardware multipliermultiplierisisquitequite often present inoften present in state of the artstate of the art productsproducts..

The typical peripheral units includeThe typical peripheral units include:: A\DA\D convertersconverters Timers and countersTimers and counters PWMPWM modulatorsmodulators


InIn the selection ofthe selection ofaaC unitC unit forforany given controlany given controlapplicationapplication somesome keykey parameters must beparameters must beconsideredconsidered::

performanceperformance parametersparameters cost parameterscost parameters

AsAs in any projectin any project,, these two aspects typically havethese two aspects typically have totobe tradedbe traded--offoff..

MicrocontrollersMicrocontrollers

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Lesson #1 5



TypicalTypical performanceperformance parametersparameters are:are:

CPUCPU clock periodclock period instruction cycleinstruction cycle instruction setinstruction set (RISC(RISC ororCISC)CISC) memory areamemory area

interrupt managementinterrupt management peripheral unit availabilityperipheral unit availability

The cost is indirectly determined also byThe cost is indirectly determined also by::

avaliability of development toolsavaliability of development tools cost of the evalution boardcost of the evalution board, ICE,, ICE, etcetc.. etcetc..

and strongly depends on productionand strongly depends on production volumevolume



TheThe C market isC market is very large and rich of productsvery large and rich of products.. AA lotlot

of manufacturers offerof manufacturers offercompletecomplete sets ofsets ofCC solutionssolutions,,with increasing complexitywith increasing complexity,, level oflevel ofperformanceperformance andand

costcost..

AnAn exhaustiveexhaustive overview is practicallyoverview is practically impossibleimpossible;;

somesome examplesexamples can be shown of different productscan be shown of different productswith different complexitieswith different complexities,, which allowwhich allow toto getget aaglimpseglimpse of what can be found on the marketof what can be found on the market..

Common featuresCommon features in terms ofin terms ofsystem architecturesystem architecture andandperipheral unitsperipheral units can be easily identifiedcan be easily identified..

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Lesson #1 6


ExampleExample: ST6: ST6 microcontrollermicrocontroller[1][1]

Very simpleVery simple (16(16 pinspins)) and low costand low cost CC,, withwith 8-bit CPU8-bit CPUandand 9 I/O9 I/O pinspins..

Low supply voltageLow supply voltage (3V, 6V).(3V, 6V).

Low clock frequencyLow clock frequency (8Mhz(8Mhz maxmax.).) Minimum instruction cycleMinimum instruction cycle 1.6251.625s.s. Low computational powerLow computational power:: onlyonly 4040 simple instructionssimple instructions

areare availableavailable (no(no multiply instructionmultiply instruction).). Peripheral units limitedPeripheral units limited toto TimerTimerandand A\D converterA\D converter(8(8

bit).bit). Typical applicationsTypical applications:: sequence controlsequence control,, displaydisplay driver,driver,simple and low speed closed loop controlssimple and low speed closed loop controls..


ST6ST6 microcontroller block diagrammicrocontroller block diagram

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Lesson #1 7


CPUCPU block diagramblock diagramST6ST6 microcontrollermicrocontroller


ExampleExample:: SiemensSiemens 8xC1668xC166CC [2][2]

TypicalTypical ((butbut notnot widely usedwidely used)) 16-bit16-bitCC.. High clock frequencyHigh clock frequency (20MHz(20MHz maximummaximum ((internalinternal)).)). RISCRISC machine withmachine with aa largelarge majority of singlemajority of single--cyclecycle

instructionsinstructions (100ns)(100ns) thanksthanks toto an internalan internal pipelinepipeline.. Von NeumannVon Neumann architecturearchitecture (a(a singlesingle memory space ismemory space is

usedused bothboth for datafor data andand program codeprogram code).). MediumMedium computational powercomputational power(no(no hardwarehardware multipliermultiplier).). Available peripheral unitsAvailable peripheral units::

2 general2 general purposepurpose timerstimers 16 bit;16 bit;

22 independentindependent serialserial communication channelscommunication channels;; 1010 channelschannels, 10-bit, 10, 10-bit, 10ss A\DA\D converter;converter; 1616 capturecapture andand comparecompare (CAPCOM)(CAPCOM) channelschannels..

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Lesson #1 8


SiemensSiemens 8xC166 series8xC166 series overviewoverview

SABSAB

8080

8383

8888

C166C166

C166WC166W

C166C166

C166WC166W

C166C166

C166WC166W

(-)(-)

(-)(-)

55

55

55

55

MM

MM

MM

MM

MM

MM

(-)(-)

T3T3(-)(-)

T3T3T4T4

(-)(-)

T3T3T4T4

(-)(-)

T3T3

(-)(-)

(-)(-)

Prefix Memory Type Memory Package Temp. Range

Type Code Designation Size Code Code Code

W = without prescaler M = MetricQuad Flatpack

ROMLess

Flash EEPROM

Metal Mask ROM

32KBytes

(-) no suffix

-40 / 110

-40 / 850 / 70

-40 / 850 / 70

-40 / 110-40 / 85

0 / 70-40 / 85

0 / 70

0 / 70

0 / 70


SAB 80C166SAB 80C166 Block DiagramBlock Diagram

up to

ROM/Flash-

EPROM

32 KByte

OSC

P

o

r

t

P

o

r

t

Port 1 Port 5 Port 3 Port 2

SAB 8xC166SAB 8xC166CPU CORECPU CORE D

ualPort

RAM

1 KByte

Interrupt ControllerWatchdog

Peripheral Data

External Instr./Data

Instr./Data

External

Bus

Controller

10-BitADC

USART

ASC

BRG BRG

ASC

GPT1

T3

T4

GPT2

T2

T5

T6

CAPCOM

Timer

1

Timer

0

16 10 16 16

16

2

16

16

16

1632

PEC

Interrupt Bus

Data

Data

USART

XTAL

16 Channels

19 ext. IR

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Lesson #1 9


SAB 80C167SAB 80C167 Block DiagramBlock Diagram

C166-CoreC166-Core

167

PLL(input: 5 MHz)

OSC(output: 20MHz)

2KBXRAM

P

o

r

t

6

P

o

r

t

0

P

o

r

t

4

Port 1 Port 5 Port 3 Port 2 Port 8 Port 7

CPUDua

lPort

RAM

2 KByte

Interrupt ControllerWatchdog

Peripheral Data

External Instr./Data

Instr./Data

USART

ASC

BRG BRG

SSC

Sync.

Channel

(SPI)

GPT1

T3

T4

GPT2

T2

T5

T6

CAPCOM1, 2

32 Channels

Timer7

Timer

1

Timer

0

Timer8

PWM Module

PT 1

PT 2

PT 3

PT 4

16 16 16 16 8 8

16

8

8

16

16

16

1632

PEC

Interrupt Bus

Data

Data

EPROM

ROM/Flash

up to128 KByte

XBUS(16-b

itNON

MUXDa

ta/Addresses

)

ExternalBus,XBUS Control,

5 * CS Logic

Multi Funktional

10-Bit

ADC16 Channels

36 ext. IR

XTAL


22 GeneralGeneral Purpose Timer unitsPurpose Timer units (GPT1 & GPT2)(GPT1 & GPT2) 55 TimersTimers (200/400ns)(200/400ns) with multiple Inputwith multiple Input/Output,/Output,

Reload andReload and CaptureCapture functions and complexfunctions and complexconcatenation capabilitiesconcatenation capabilities

Capture/CompareCapture/Compare unitunit (CAPCOM)(CAPCOM)

22 timerstimers (400ns)(400ns) each with Reload register andeach with Reload register and 1616independentindependent 16-bit Capture/Compare16-bit Capture/Compare channelschannelsprogrammableprogrammable to 6to 6 modes of operationmodes of operation

44 high resolutionhigh resolution PWMPWM channelschannels with independentwith independent time-basetime-base of upof up toto 50ns50ns

resolution and programmable operation modesresolution and programmable operation modes

......

Peripherals Set of thePeripherals Set of the SAB 80C167SAB 80C167

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Lesson #1 1


Fast and accurateFast and accurate A/D ConverterA/D Converter 10-bit10-bit resolutionresolution, 10, 10 input channelsinput channels, 9.7s, 9.7s

conversionconversion time,time, continuous and scan modescontinuous and scan modes

I/OI/O PortsPorts 88 ports provideports provide 111111 I/OI/O lineslines

WatchdogWatchdog:: 16-bit16-bit ReloadReload--timertimercausescauses reset onreset onoverflowoverflow

22 independent identicalindependent identical USARTsUSARTs

maxmax 625KBaud625KBaud asynchronousasynchronous maxmax 2.5Mbit/2.5Mbit/sec synchronoussec synchronous datadata transfertransfer

Peripherals Set of thePeripherals Set of the SAB 80C167SAB 80C167


44 completely independentcompletely independent PWMPWM channelschannels each with itseach with itsownown time-basetime-base 50ns50ns oror12.8s12.8s timertimer--resolutionresolution providesprovides aa veryvery

wide frequencywide frequency range torange to generategenerate PWMPWM signalssignals ProgrammableProgrammable outputoutput polaritypolarity UpUp toto 7878 KHz atKHz at 8-bit PWM8-bit PWM resolutionresolution

Four operation modesFour operation modes Standard,Standard, edgeedge--alignedaligned PWMPWM SymmetricalSymmetrical,, centercenter--alignedaligned PWMPWM forfor

asynchronousasynchronous motormotorcontrolcontrol BurstBurst--modemode forformodulatedmodulated PWMPWM signalssignals SingleSingle--shotshot modemode

PulsePulse Width Modulation UnitWidth Modulation Unit (PWM)(PWM)

FPWM =1

2 x 50ns=78 KHz8-bit

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Lesson #1 1


PMW Unit Frequencies and Resolution in Mode 1 Operation(SYMMETRICAL)(SYMMETRICAL)

PMW Unit Frequencies and Resolution in Mode 0 Operation(EDGE-ALIGNED)(EDGE-ALIGNED)

ResolutionResolution

Input ClockInput Clock(CPU @ 20 MHz)

8 Bit 10 Bit 12 Bit 14 Bit 16 Bit

CPU Clock (50ns Resolution)

CPU Clo ck / 64 (3.2s Res.)

39.1 KHz

610 Hz

9.77 KHz

152.6 Hz

2.44 KHz

38.15 Hz

610 Hz

9.54 Hz

152.6 Hz

2.4 Hz

ResolutionResolution

Input ClockInput Clock(CPU @ 20 MHz)

8 Bit 10 Bit 12 Bit 14 Bit 16 Bit

CPU Clock (50ns Resolution)

CPU Clo ck / 64 (3.2s Res.)

78.1 KHz

1.22 KHz

19.5 KHz

305 Hz

4.88 KHz

76.3 Hz

1.22 KHz

13.1 Hz

305 Hz

4.77 Hz

PulsePulse Width Modulation UnitWidth Modulation Unit (PWM)(PWM)


PWMPWM unit Modeunit Mode 00 andand 1...1...

Contents of thePWx Register

Interrupt Request andLatch of the Shadow Register

Contents of the PWxRegister

IR and Latch of the

Shadow Register

Timer

Perio

d

Timer

Perio

d TimerPeriod

Contents of the Period Register (PP x)

PWM Mode 0:Standard PWMs or Edge-Aligned PWMs

PWM Mode 1:Symmetrical or Center-Aligned PWMs

PWM Signal

If all channels are programmed to mode 0,edge-aligned PWM signals will be generated.A duty cycle from 0 to 100% is programmable

If all channels are programmed to mode 1,center-aligned PWM signals will be generated.A duty cycle from 0 to 100% is programmable

PWM Signal

Possible PWM Signals from other channels programmed to the same mode

PWMx

PWMy

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Lesson #1 1


Burst Mode :Burst Sequence by combiningPWM channel 0 and 1

Single Shot :Only one PWM Pulse is generatedMode available for channel 2 and 3

Period Value Period Value

Pulse widthValue

PeriodValue

Internal Signalof Channel 0

Period of

Timer PT1

Int. Signalof Channel 1

Output Result: Channel 1 is modulated byChannel 0

OutputSignal

Timer isautomatically

stopped

Timer isreleased by

Software again

The Timer can be dynamicallychanged to lengthen (retrigger) orshorten the output pulse

Tim

erPerio

d

TimerPe

riodP

T0

PWMPWM unit Modeunit Mode 00 andand 11


ExampleExample:: HitachiHitachi H8S series [3]H8S series [3]

RecentRecent 16-bit16-bitCC ((evolution ofevolution ofH8/500H8/500 series).series). High clock frequencyHigh clock frequency (20MHz(20MHz and higherand higher).). Single cycle instructionsSingle cycle instructions (200ns @20MHz).(200ns @20MHz).

RichRich set of instructionset of instruction (CISC(CISC machinemachine).). HardwareHardware multipliermultiplierandand accumulatoraccumulatorfor DSP-for DSP-likelike

applicationsapplications..

MediumMedium//highhigh computational powercomputational power.. Available peripheral unitsAvailable peripheral units::

timertimerunitunit for CAPCOMfor CAPCOM ororPWMPWM functionsfunctions

serialserial communicationcommunication interfaceinterface 88 channelchannel, 10-bit, 1, 10-bit, 1ss A\DA\D converterconverter 22 channelchannel, 10, 10s D\A converters D\A converter((only inonly in somesome

versionsversions))

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Lesson #1 1


H83032H83032microcontrollermicrocontrollerblock diagramblock diagram

CPUCPU

TimerTimer

A\D ConverterA\D Converter


State of the artState of the art 16-bit16-bitCC (5V(5V supplysupply,, standstand--byby

currentcurrent < 1< 1A).A). High clock frequencyHigh clock frequency (33MHz(33MHz maximummaximum).).

Single cycle instructionsSingle cycle instructions (121ns @33MHz).(121ns @33MHz). RISCRISC machinemachine (58(58 singlesingle--wordword 16-bit16-bit instructionsinstructions).). Modified HarvardModified Harvard architecture witharchitecture with hardwarehardware

multipliermultiplier.. HighHigh computational powercomputational power.. Available peripheral unitsAvailable peripheral units::

44 timerstimers 8-16 bit;8-16 bit; serialserial communicationcommunication interface;interface; 12-1612-16 channelschannels, 10-bit, 16, 10-bit, 16ss A\DA\D converter;converter; 3 PWM3 PWM 10 bit10 bit outputsoutputs..

ExampleExample:: MicrochipMicrochip PIC17C7xx [4]PIC17C7xx [4]

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Lesson #1 1


MicrochipMicrochipPIC17C7xxPIC17C7xx


MicrochipMicrochipPIC17C7xxPIC17C7xx

CPUCPU

DataData memorymemory

Program memoryProgram memory

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Lesson #1 1


ExampleExample:: HitachiHitachi SH7000 Series [3]SH7000 Series [3] State of the artState of the art 32-bit32-bitCC (5V(5V oror3.3V3.3V supplysupply).). High clock frequencyHigh clock frequency (28MHz @(28MHz @ VVcccc = 5V).= 5V). RISCRISC machinemachine (61(61 singlesingle--wordword 16-bit16-bit instructionsinstructions).).

Single cycle instructionsSingle cycle instructions (35ns)(35ns) thanksthanks toto internalinternalfivefive--stage pipelinestage pipeline..

Modified HarvardModified Harvard architecture witharchitecture with hardwarehardwaremultipliermultiplier(MAC: 32x32 bit, 64 bit(MAC: 32x32 bit, 64 bit 64 bit).64 bit).

HighHigh computational powercomputational power.. Available peripheral unitsAvailable peripheral units::

16 bit, 516 bit, 5 channelschannels multifunctionmultifunction timer unittimer unit(PWM);(PWM);

16 bit,16 bit, 22 channelchannel comparecompare and matchand match;; 88 channelschannels, 10-bit, 2.9, 10-bit, 2.9ss, A\D, A\D converter;converter;watchdog timerwatchdog timer..


SH7040 A\DSH7040 A\Dconverterconverter

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Lesson #1 1


DigitalDigital Signal ProcessorsSignal Processors [5][5]

First development in theFirst development in the late 70s (TMS320C10 -late 70s (TMS320C10 - 1979).1979).Typically designedTypically designed forforopen loopopen loop digitaldigital signal processingsignal processinge.g.:e.g.:

real time FFTreal time FFT calculationcalculation;; digitaldigital filtering of sampled signalsfiltering of sampled signals..

The marketThe market forforthis kind of applications isthis kind of applications is enormousenormous (10(10billionbillion US$/US$/yearyear)) and isand is steadily growingsteadily growing,, includingincludingtelecom and consumer electronicstelecom and consumer electronics..

Applications inApplications in industrialindustrial electronicselectronics ((control taskscontrol tasks) are) arerather insignificant inrather insignificant in volume.volume. The manifacturers offer veryThe manifacturers offer veryfew control oriented solutionsfew control oriented solutions..


DigitalDigital Signal ProcessorsSignal Processors

Two types of DSPs can be foundTwo types of DSPs can be found::

fixed pointfixed point DSP (16, 24 bit);DSP (16, 24 bit); floating pointfloating point ((typicallytypically 32 bit32 bit orormore).more).

ForForcontrol applicationscontrol applications,, fixed point DSPsfixed point DSPs areare veryvery closeclose totomodern topmodern top--levellevel CsCs (RISC(RISC machines with Harvardmachines with Harvard

architecture andarchitecture and hardwarehardware multipliermultiplier)) in terms ofin terms ofperformance.performance. TheyThey areare normallynormally muchmuch less effectiveless effective inin

terms ofterms ofperipheralsperipherals.. GloballyGlobally,, they appearthey appearmoremore expensiveexpensive..

Floating point DSPsFloating point DSPs areare very advantageousvery advantageous,, but onlybut only forforthose applications wherethose applications where high costhigh cost forforthe control systemthe control system

can be affordedcan be afforded.. TheThe lacklack of peripheral units is almostof peripheral units is almost totaltotal(( youyou mustmust addadd themthem).).

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Lesson #1 1



InstructionInstructionMemoryMemory

InstructionInstructionProcessorProcessor

ProcessingProcessingUnitUnit

DataDataMemoryMemory

Schematic diagram ofSchematic diagram ofaaDSPDSP withwith HarvardHarvardarchitecturearchitecture..

ParallelParallel processing ofprocessing ofinstructions andinstructions and datadata isisallowed byallowed by multiplemultiple busbusarchitecturearchitecture..

The instructionThe instructionprocessor takes care ofprocessor takes care ofaddress computationsaddress computations..

InstructionInstructionStreamStream

InstructionInstruction

StreamStream

DataDataStreamStream



Modern DSPs normally adoptModern DSPs normally adopt modifiedmodified HarvardHarvardarchitectures featuringarchitectures featuring::

improvedimproved instruction processors withinstruction processors with moremore thanthan aasinglesingle address generatoraddress generator;;

improved processing units withimproved processing units with multiplemultiple

independentindependent logic unitslogic units (ALU, MAC, SHIFT);(ALU, MAC, SHIFT); application specificapplication specific hardware moduleshardware modules (e.g.(e.g.registersregisters,, timers etctimers etc. ). ) in thein the CPU toCPU to speedspeed--upuptypical calculationstypical calculations (e.g.(e.g. DFT);DFT);

differentdifferent internal memory structuresinternal memory structures withwith multiplemultipledatadata memories and busesmemories and buses orormixed program andmixed program and

datadata memoriesmemories ((usefuluseful forforfilter coefficientsfilter coefficients).).

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Lesson #1 1


ExampleExample:: Analog DevicesAnalog Devices ADSP2186 [5]ADSP2186 [5]

State of the artState of the art fixed pointfixed point DSP.DSP. 2525 nsns instruction cycleinstruction cycle forfor40 MIPS40 MIPS performance.performance. SingleSingle--cyclecycle instruction executioninstruction execution..

SingleSingle--cyclecycle context switchcontext switch.. 3-bus3-bus architecturearchitecture forfordualdual operandoperand fetchfetch in everyin every

instruction cycleinstruction cycle.. DualDual address generatoraddress generator.. IndependentIndependent ALU, MACALU, MAC andand SHIFTERSHIFTER unitsunits..

4040 kbytekbyte on chipon chip RAM.RAM. DualDual purposepurpose program memory allowing bothprogram memory allowing both

instructioninstruction andand datadata storagestorage..


ExampleExample:: Analog DevicesAnalog Devices ADSP2186ADSP2186

1:1: AddressAddress BusBus

2: Data Bus2: Data Bus

3:3: Internal ResultInternal Result BusBus

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Lesson #1 1


ExampleExample:: Analog DevicesAnalog Devices ADSP2186ADSP2186

AA very highvery high level oflevel ofparallelismparallelism is achieved by meansis achieved by meansofofmultiple processing unitsmultiple processing units,, multiple busesmultiple buses andandcomplex address generatorscomplex address generators.. In aIn a single cycle thesingle cycle the DSPDSPcancan::

generategenerate the next program addressthe next program address;;

fetchfetch the next instructionthe next instruction;; performperform one or twoone or two data moves;data moves; updateupdate one or twoone or two datadata address pointersaddress pointers;;

performperform aa computationalcomputational operationoperation..The program sequencer allowsThe program sequencer allows conditional jumpsconditional jumps,,subroutine callssubroutine calls andand returnsreturns inin aa single cyclesingle cycle..



State of the artState of the art floating pointfloating point DSP.DSP. 2525 nsns instruction cycleinstruction cycle forfor40 MIPS40 MIPS performance.performance. SingleSingle--cyclecycle instruction executioninstruction execution..

32 bit32 bit single precision andsingle precision and 40 bit40 bit extended precisionextended precisionIEEEIEEE floating pointfloating point datadata formatformat (24 bit(24 bit mantissamantissa 8 bit8 bitexponentexponent / 11 bit/ 11 bit exponentexponent)) oror32 bit32 bit fixed pointfixed point datadata

formatformat.. 48 bit48 bit instruction wordinstruction word forforvarious parallel operationsvarious parallel operations.. 44 independent busesindependent buses for dual datafor dual data fetchfetch,, instructioninstruction

fetch andfetch and I/O (super-I/O (super-Harvard architectureHarvard architecture).). 33 independentindependent 32 bit32 bit floating pointfloating point computationalcomputational

unitsunits.. Specific instructionsSpecific instructions forforacceleratedaccelerated FFTFFT computationcomputation..

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Lesson #1 2




NewNew DSPDSP solutionssolutions

RecentlyRecently,, newnew DSPDSP solutionssolutions have been proposedhave been proposedbyby somesome manufacturers which merge themanufacturers which merge the DSPDSP

computational capabilitiescomputational capabilities withwith somesome typicaltypical CCperipheral unitsperipheral units..The idea isThe idea is toto provide theprovide the designerdesignerwithwith aa controlcontrolorientedoriented DSP,DSP, allowing the direct implementation ofallowing the direct implementation ofclosed loopclosed loop digitaldigital control of power converterscontrol of power converters withwithminimum additionalminimum additional interfaceinterface circuitrycircuitry..

The main advantage with respectThe main advantage with respect toto anyany C is in theC is in thevery high computational capabilityvery high computational capability of theof the DSP.DSP.Since these devicesSince these devices areare notnot veryvery popularpopularyetyet,, thethecostcost factor may be theirfactor may be theirweakweak pointpoint..

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Lesson #1 2


ExampleExample:: Analog DevicesAnalog Devices ADMC401 [5]ADMC401 [5]

FixedFixed--pointpoint DSP coreDSP core featuresfeatures:: 26 MIPS26 MIPS performance;performance;ADSP 21xxADSP 21xx compatiblecompatible;;

Single cycleSingle cycle instruction executioninstruction execution(38.5(38.5 nsns @ 13@ 13 MHz clock frequencyMHz clock frequency););

16 bit16 bit arithmetic and logic unitarithmetic and logic unit;;Single CycleSingle Cycle 16 bit X 16 bit16 bit X 16 bit MAC.MAC.

BuiltBuilt--in peripheral unitsin peripheral units::HighHigh resolutionresolution multimulti--channelchannel ADC;ADC;ThreeThree--phasephase 16 bit16 bit PWMPWM generationgeneration unitunit;;dualdual channelchannel event timer unitevent timer unit (CAPCOM);(CAPCOM);

IncrementalIncremental encoderencoderinterfaceinterface unitunit..


ExampleExample:: Analog DevicesAnalog Devices ADMC401ADMC401

Functional Block DiagramFunctional Block Diagram

21xx core21xx coreC peripheral unitsC peripheral units

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Lesson #1 2


ADMC401:ADMC401: AnalogAnalog to Digital Converterto Digital Converter

88 analog inputsanalog inputs.. 12 bit12 bit resolutionresolution..

conversionconversion time:time: 22ss ((allallchannels thankschannels thanks toto fourfourstagestage pipelinepipeline architecturearchitecture).).

4 V p-p4 V p-p input voltageinput voltage rangerange 22 channelschannels can becan be

simultaneouslysimultaneously sampledsampled..

conversion can beconversion can besynchronizedsynchronized toto PWMPWM ororexternallyexternally triggeredtriggered..


ADMC401: PWMADMC401: PWM Generation UnitGeneration Unit

66 PWMPWM outputsoutputs.. 16 bit16 bit counter resolutioncounter resolution.. programmableprogrammable outputoutput

polaritypolarity.. static or choppedstatic or chopped outputoutput

signalssignals.. programmableprogrammable deaddead-time-time andand

minimumminimum pulsepulse widthwidth.. single updatesingle update andand doubledouble

updateupdate modemode (for(forasymmetricalasymmetrical PWMPWM patternspatterns).).

switching frequency fromswitching frequency from 198198HzHz toto 102 kHz.102 kHz.

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Lesson #1 2


ADMC401: IncrementalADMC401: Incremental EncoderEncoderInterfaceInterface

16 bit16 bit upup--down counterdown counter((frequency and direction offrequency and direction ofrotation detectionrotation detection).).

programmableprogrammable input noiseinput noisefilterfilter(to(to avoid spuriousavoid spurioustriggeringtriggering).).

twotwo additionaladditional strobestrobeinputsinputs (to(to latch the counterlatch the counter

contents into registerscontents into registers).). 16 bit16 bit loop timerloop timer((positionposition

and speed loops set pointand speed loops set pointgenerationgeneration).).


ADMC401:ADMC401: Event Timer UnitEvent Timer Unit

16 bit16 bit dedicateddedicated timertimerwithwithprogrammable frequencyprogrammable frequency..

22 independentindependent channelschannels..

22 programmableprogrammable ((rising edgerising edgeororfalling edgefalling edge)) eventsevents forfor

each channeleach channel.. single shotsingle shot andand freefree--runningrunning

modes of operationmodes of operation.. onlyonly capturecapture functionfunction,, nono

possibility ofpossibility ofcomparecompare modemode..

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Lesson #1 2


ADMC401:ADMC401: Other Ancillary FuctionsOther Ancillary Fuctions

22 auxiliaryauxiliary 8 bit8 bit PWMPWM timerstimers 16 bit16 bit watchdogwatchdog timertimer ProgrammableProgrammable digitaldigital I/OI/O portport (12(12 pinpin)) 22 synchronoussynchronous serialserial portsports


ExampleExample: Texas: Texas InstrumentsInstruments TMS320F240 [6]TMS320F240 [6]

FixedFixed--pointpoint DSP coreDSP core featuresfeatures:: 20 MIPS20 MIPS performance;performance;TMS320C25TMS320C25 source code compatiblesource code compatible;;

Single cycleSingle cycle instruction executioninstruction execution(50(50 nsns @ 20@ 20 MHzMHz CPUCPU clock frequencyclock frequency););

16 bit16 bit arithmetic and logic unitarithmetic and logic unit;;Single CycleSingle Cycle 16 bit X 16 bit16 bit X 16 bit signed productsigned product..

Main builtMain built--in peripheral unitsin peripheral units:: 10 bit10 bit resolutionresolution,, 1616 channelchannel ADC;ADC; 1212 channelchannel 16 bit16 bit PWMPWM generationgeneration unitunit;; 33 16 bit16 bit generalgeneral purposepurpose timerstimers;;

44 independentindependent capturecapture circuitscircuits..

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Lesson #1 2


TMS320F240TMS320F240 Functional Block DiagramFunctional Block Diagram

CentralCentral ArithmeticArithmeticLogic UnitLogic Unit (CALU)(CALU)

Event ManagerEvent Manager::TimersTimersCompareCompare UnitsUnits ......

Dual 10 bit ADCDual 10 bit ADC


TMS320F240 CentralTMS320F240 Central Arithmetic and Logic UnitArithmetic and Logic Unit

AdvancedAdvanced HarvardHarvardarchitecture witharchitecture with multiplemultiplebus.bus.

16 bit X 16 bit16 bit X 16 bit hardwarehardwaremultiplier withmultiplier with 32 bit32 bit

accumulatoraccumulator(1(1 cyclecycleexecutionexecution).). 16 bit16 bit input scalinginput scaling shiftershifter

((usedused forfordatadata alignmentalignment

before logic or arithmeticbefore logic or arithmeticoperationsoperations).).

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Lesson #1 2


TMS320F240TMS320F240 Event ManagerEvent Manager 33 generalgeneral purposepurpose timerstimers forfor

16 bit16 bit upup//down counts anddown counts andcomparecompare functionsfunctions ((includingincluding

additionaladditional PWMPWM generationgeneration).). 66 fullfull comparecompare ouputsouputs forfor

PWMPWM applicationsapplications with deadwith dead--timetime generatorsgenerators (0 to 102(0 to 102s).s).

33 simplesimple comparecompare unitsunits.. TheThe 1212 availableavailable PWMPWM outputsoutputs

have allhave all 5050 ns resolutionns resolution andand16 bit16 bit dynamicdynamic range.range.

44 channelchannel capturecapture unitunitoperating onoperating on GPT1GPT1 ororGPT2,GPT2,withwith 22 levellevel FIFO.FIFO.


TMS320F240TMS320F240 AnalogAnalog to Digital Converterto Digital Converter

2 10 bit2 10 bit ADCs withADCs withbuiltbuilt--inin S/HS/H circuitscircuits..

1616 input channelsinput channelsavailableavailable,, but onlybut only 22can be sampledcan be sampledsimultaneouslysimultaneously..

Minimum conversionMinimum conversiontimetime 6.16.1ss..

Single shotSingle shot ororcontinuouscontinuous mode ofmode ofoperationoperation..

22 levellevel FIFOFIFO forforresultresultstoringstoring..

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TMS320F240TMS320F240 Ancillary Peripheral FunctionsAncillary Peripheral Functions

44 pinpin serialserial peripheralperipheral interfaceinterface watchdogwatchdog timertimer QuadratureQuadrature -- encoderencoderpulsepulse circuitcircuit 2828 programmableprogrammable I/OI/O pinspins


ReferencesReferences

[1][1] STST 19991999 Product and Company InformationProduct and Company Information

[2][2] SiemensSiemens 19991999 Technical Product InformationTechnical Product Information -- EditionEdition 77

[3][3] HitachiHitachi 19981998 Electronic Components DatabookElectronic Components Databook

[4][4] MicrochipMicrochip 19991999 Technical LibraryTechnical Library

[5] P.[5] P. PirschPirsch,, ArchitecturesArchitectures for Digitalfor Digital Signal ProcessingSignal Processing,, 1998,1998,

John Wiley andJohn Wiley and Sons (ISBN 0-471-97145-6)Sons (ISBN 0-471-97145-6)[6][6] Analog DevicesAnalog Devices WinterWinter1999 Designers1999 Designers ReferenceReference ManualManual

[7][7] TexasTexas InstrumentsInstruments 1999 TMS320 DSP1999 TMS320 DSP SolutionsSolutions CD-ROMCD-ROM

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