Lecture1- Introduction to Programmable Logic

8/9/2019 Lecture1- Introduction to Programmable Logic

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Introduction to FPGA technology

and programmable logic

FYS4220/9220

Reading: chapter 1 in ZwolinskiJ. K. Bekkeng, 3.7.2011

Lecture #1


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Plasma and Space Physics

Lecturer

Jan Kenneth Bekkeng (Senior Scientist FFI, Ass. prof-IIUIO)

Email: j.k.bekkeng[at]fys.uio.no

Sounding rockets

T&E


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Goals

Learn digital design using programmable logiccircuits (FPGA and CPLD) Circuits

Design tools

Design methods

Learn VHDL to program hardware (FPGAs andCPLDs) for use in e.g. embedded systems


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Curriculum (VHDL & FPGA part)

Lectures (and other handout material)

Laboratory exercises

Textbook: Digital System Design with VHDL, 2nd Edition (by Mark Zwolinski)

The textbook readings complementthe lectures!


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Lab 1:

Switches, LEDs, counters, debouncer, testbenches

Lab 2: Use of components and packages, LPMs, FSM (vending machine)

Lab 3:

Control of ADC (state machine), timing

Lab 4: Mandatory for PhD students only

NIOS II processor in FPGA (other projects may be possible)

Altera Laboratory Exercises
http://www.altera.com/education/univ/materials/comp_org/labs/unv-labs.htmlhttp://www.altera.com/education/univ/materials/comp_org/labs/unv-labs.htmlhttp://www.altera.com/education/univ/materials/comp_org/labs/unv-labs.htmlhttp://www.altera.com/education/univ/materials/comp_org/labs/unv-labs.html


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Room V442, Physics buildingTeaching assistant available from 10.15 to 14.00 for guidanceon the lab days

Lab availability (without guidance): The lab at V442 is available Monday - Friday

Read the lab text and the corresponding manuals, and try tofind solutions before you come to the lab.

All mandatory labs (3 labs for FYS4220, 4 labs for FYS9220)must be approved in order to take the exam

All labs must be approved before 1. December

Note that Quartus II Web Edition andModelsim-Altera Starter Edition softwarecan be downloaded for free from the

Altera web page: Altera Free software
http://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.htmlhttp://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.htmlhttp://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.htmlhttp://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.html


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Other Recommended books for

VHDL

The Designer's Guide to VHDL, Volume 3, ThirdEdition (by Peter J. Ashenden)



What is an embedded system?

An embedded system is designed to perform oneor a few dedicated functions .

Often has real-time computing constraints.By contrast, a general-purpose computer, such as apersonal computer (PC), is designed to be flexibleand to meet a wide range of end-user needs.

Embedded systems are controlled by one or moremain processing cores that are typically eithermicrocontrollers, digital signal processors (DSP) orFPGAs



Examples of embedded systems

MP3 player

Digital camera

Washing machine

GPS mottaker

Blu-ray / DVD player



Examples of FPGA use

Aerospace

Defence

Medicine

Imaging / Image processing

Digital signal processingASIC prototyping

Software defined Radio

Software defined GPS

Pico satellite (OBC)

Air-to-Air missile

NSM



What is an FPGA?

FPGA = Field Programmable Gate ArrayLogic Array Blocks (LABs) Each LAB contains a given number of Logic Elements (LE)



Cyclone II LE



Cyclone II Family Summary



Altera circuit families



FPGA advantages

High reliability

High determinism

High performance

True parallelism

Reconfigurability

FPGAs in DAQ-systems (intelligent DAQ)DAQ-cards with a programmable FPGA

Multi-rate sampling

User defined processing in the FPGA

FPGA based hardware timing/synchronization

NI R-series FPGA DAQ

DAQ = Data Acquisition



Examples on use of FPGAs

High-speed control

Intelligent DAQ

Digital communication protocolsSensor simulation

Onboard processing and data reduction

Co-processing

Hardware In the Loop (HIL)-testing



Why use FPGA in an embedded

system?

Develop a low cost DSP system

Scalability

System integration (system on chip)

True parallelism

Many I/O (Input/Output) lines

Note: All Altera IPs can be used free of charge for universities!

DSP = Digital Signal Processor



System Integration System On a

Chip (SOC)Replace several DSPs with a single chip

Integrate several different system

components on a single chipA circuit design demanding e.g.10FPGAs a few years ago can no fit into asingle FPGA

DSP Processor

General

Purpose

Processor

FPGA

Custom

Interface

Logic

DSP LogicNios

Processor

Custom

Interface

Logic

Spare gates

SOPC

E I ti l R f U it



Ex: Inertial Reference Unit(IRU)

Roll (X)

Pitch (Y)Yaw (Z)

Roll



IRU PCBs

Roll PCB Pitch /Yaw PCB

DAQ PCB Power & I/O PCB

FPGA



Development kit used in the lab


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Programmable logic

FPGA

CPLD

Circuit manufacturers: Altera (www.altera.com)

Xilinx (www.xilinx.com)

Tools: QUARTUS II (Altera)

Modelsim Altera (Mentor VHDL simulator)

NIOS II Embedded design suite (+ C2H compiler)

DSP builder (Altera)

ISE (Xilinx)

CPLDFPGA

Flash
http://www.altera.com/http://www.xilinx.com/http://www.xilinx.com/http://www.altera.com/


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Design using FPGA/CPLD


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Examples of programming

languages for programmable logicVHDL

SystemC

Handel-CVerilog (mainly used for ASICs, VHDL is better forFPGAs)

Schematic tools (e.g. in Quartus II)


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Altera System Level Design Tools


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IP Integration

Altera System-Level Design Tools

Software

Development

System

Integration

DSP AlgorithmDevelopment

SOPC = System-On-a-Programmable-Chip


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Altera DSP Builder

Interface between Quartus II (Altera) and

MATLAB/Simulink (Mathworks)Library Add On to Simulink

Automatic Generation of VHDL design From aMATLAB/Simulink Representation

Creates HDL Code


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Automatic code generation


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Automatic code generation


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LabVIEW FPGA

LabVIEW from National Instrument (NI) can be used to

program (graphically) NIs RIO (RIO = ReconfigurableI/O) cards

Requires license on NI LabVIEW and NI FPGA Module

Can write/import VHDL code


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Circuit technologies

Programmable logic device (PLD):

Simple Programmable Logic Device (SPLD)

Complex Programmable Logic Devices (CPLD)Field Programmable Gate Array (FPGA)

Application Specific Integrated Circuit (ASICs)

System On Chip (SoC)


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When to use FPGAs / CPLDs

Usually the first choice for digital logic, except for: Very simple designs

Large production volumes (ASIC better)

Very complex designs e.g. mixed signal (analog and digital on the same chip)

Very high speed or need for very low powerconsumption

Can replace microcontrollers in designs with: A demand for many I/O lines

Need for flexible I/O

Requirements for parallel processing /fast processing

High requirements on timing/triggering


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The difference between a

processor and programmable

logic

A processor is programmed with ins t ruc t ions

A programmable logic circuit is programmed with acircui t descr ipt ion

A programmable logic circuit contains configurable

blocks with logics and configurable connection linesbetween these blocks


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Programmable logic


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CPLD - Complex

Programmable Logic Device

Programming technology: non-volatile memory, suchas EEPROM or FLASH.

Configuration stored in the circuit (even without power) High voltage (EEPROM) or logic voltage (FLASH)

Used in small and medium size designs

Circuit family example: MAX II from Altera Up to 1270 LE


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FPGA - Field Programmable

Gate Array

Typically contains more logic then a CPLD

Have many flip-flops (memory elements)

Circuit examples: Virtex-series (Xilinx)

Cyclone and Stratix-series (Altera)

Stratix V: 28 nm technologi, > 106 LE

Programming technology: usually static memory(SRAM)

Needs an external configuration circuit with a non-volatile memory(based on EEPROM/FLASH) which loads the configuration intothe FPGA at power on.

SRAM memory inside the FPGA stores the circuit configuration(when the power is on).

FPGA

Flash


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Additional support in modern

FPGAs

On-chip memory, e.g. RAM blocks dual port RAM -> can read and write the RAM in the same clock

cycle

Processor cores (floating point operations possible)

DSP blocks (floating point operations possible)

Multiplier blocks

High speed input/output blocksPLL (Phase locked loop)

DLL (Delay locked loop)

Intellectual Property (IP)

E.g. FFT, UART


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FPGA vs ASIC

ASIC = Application Specific Integrated Circuit

circuits that are fabricated in a silicon foundry

FPGA advantages Dramatically reduce the cost of errors (by reprogramming)

Much cheaper than an ASIC for small volumes

FPGA disadvantages (compared to ASICs) Lower performance (due to overhead of programmability)

Higher power consumption

Same logic requires a lager chip area


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Fast calculations DSP blocks


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Reduction of power consumption


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Reduction of power consumption

P i FPGA


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Processor cores in FPGA

Processor cores inside the FPGAMany designs need a processor, and it is possible toavoid an external processor chip

Soft core CPU Programmable logic in the FPGA is used to implement a processor

(when needed) together with other functionality

Hard core CPU The processor is implemented in the FPGA at the production of the

circuit

Xilinx processor cores for FPGA Power PC (hard core processor)

MicroBlaze (soft core processor)

Altera processor core for FPGA NIOS II (soft core processor)


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Soft core processor

Pros:

Include the processor core only when.

The number of cores is flexible. Can reuse the design in newer generations ofFPGAs in the future.

Cons:

Slower and simpler than hard processor cores.

Less area efficient compared to hard cores.


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Hardware vs Software

Hardware (digital logic): Time critical parts

Software (on the CPU):

Less time critical parts.

Interface (Ethernet, RS232, USB, Wi-Fi, etc.)

Code that normally would have been executed on an externalprocessor.

Nios II C-to-Hardware Acceleration Compiler (C2H) boosts the performance of yourtime-critical ANSI C functions by

converting them into hardware accelerators in the FPGA.

tool for software engineers who need to increase the performance

of their embedded software applications.


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Intellectual Properties - IPs

With today's large FPGA designs it is almostimpossible to design everything from scratch.

Solution: Use already developed blocks for the partsof the design where these are available. They arecalled In tellectual Proper ties (IP).

IP types:

made internally available from an FPGA manufacturer

available from a third part supplier

Alt E b dd d


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Altera Embedded

processing

http://www.altera.com/technology/embedded/emb-index.html


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Embedded development tools


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Some supported I/O standards


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How to simulate VHDL code

Testbench(stimuli/test input is made using VHDL code)

Waveforms(make a waveform input stimuligraphically)

Examples of COTS


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Examples of COTS

hardware for embedded systems

National Instruments PXI rack with FPGA-card(s)and a real-time controller

CompactRIO from NI

BeMicro (from Altera) Low cost ($49)

Altera CycloneIII FPGA

Altera NiosII embedded processor

18-slot PXI Express chassisNI R-series FPGA DAQController with

Windows and/or RT-OS

Real-time processor

and FPGA

Lecture1- Introduction to Programmable Logic

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