Lecture 8 Testing - artist-embedded.org · Informationsteknologi Overview Introduction Conformance...
Transcript of Lecture 8 Testing - artist-embedded.org · Informationsteknologi Overview Introduction Conformance...
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Real Time Testing
WithMariius Mikucionis, Brian Nielsen, Arne
Skou, Anders Hessel, Paul Pettersson
using UPPAAL
TRONTRONTRON
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Overview
Introduction Conformance for Real-Time System
Off-line Test GenerationControllable Timed AutomataObservable Timed Automata
On-line Test Generation
Conclusion and Future Work
CLASSICCLASSICCLASSIC CORACORACORA
TIGATIGATIGA
TRONTRONTRON
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Testing
Primary validation technique used in industry• In general avg. 10-20 errors per 1000 LOC• 30-50 % of development time and cost in embedded software
To find errorsTo determine risk of releasePart of system development life-cycle
Expensive, error prone, time consuming (for Real-Time Systems)UPPAAL model can be used to generate test specifications
Output
InputEnviron-
mentSystem
Under Test
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Real-time Model-Based Testing
sensors
actuators
PlantContinuous
Controller ProgramDiscrete
a
cb
1 2
43
a
cb
1 2
43
1 2
43
1 2
43
a
cb
UPPAAL Model
inputs
outputs
Test generation(offline oronline) wrt.Design Model
Conforms-to?
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Conformance Relation
Specification Implementation
•Timed Automata with Timed-LTS semantics•Input actions (?) are controlled by the environment•Output actions (!) are controlled by the implementation•Implementations are input enabled•Testing hypothesis: IUT can be modeled by some (unknown) TA
give?
coin?
coin?give?
coin?give?
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I1 I2 I3 I4 I5
I6I7
Does In conform-to S1 ?S1
?
I8
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Timed Conformance
• Derived from Tretman’s IOCO
• Let I, S be timed I/O LTS, P a set of states• TTr(P): the set of timed traces from P
•eg.: σ = coin?.5.req?.2.thinCoffee!.9.coin?
• Out(P after σ) = possible outputs and delays after σ•eg. out ({l2,x=1}): {thinCoffee, 0...2}
• Intuition• no illegal output is produced and• required output is produced (at right time)
•I rt-ioco S =def
• ∀σ ∈ TTr(S): Out(I after σ) ⊆ Out(S after σ)
• TTr(I) ⊆ TTr(S) if s and I are input enabled
l2
See also [Krichen&Tripakis, Khoumsi]
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Does In conform-to S1 ?
S1 I1
σ=coin.give.10σ∈TTr(I1), σ ∉TTr(S1)
out(I1 after coin.give.3)={0... ∞}⊄out(S1 after coin.give.3)={coffee,0…2}
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Does In conform-to S1 ?S1 I3 I4
σ=coin.give.7.coffeeσ∈TTr(I3), σ ∉TTr(S1)
out(I3 after coin.give.7)={coffee,0}⊄out(S1 after coin.give.7)={}
σ=coin.give.1.coffeeσ∈TTr(I4), σ ∉TTr(S1)
out(I4 after coin.give.1)={coffee,0...4}⊄out(S1 after coin.give.1)={0...4}
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Does In conform-to S1 ?S1
σ=coin.give.5.teaσ∈TTr(I7), σ ∉TTr(S1)
out(I7 after coin.give.5)={tea, coffee,0}⊄out(S1 after coin.give.5)={coffee,0}
I8
σ=token.5.vodkaσ∈TTr(I8), σ ∉TTr(S1)But σ was not specified
I7
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Sample Cooling ControllerIUT-model Env-model
On!
Off!
Low?
Med?
High?
Cr
•When T is high (low) switch on (off) cooling within r secs.•When T is medium cooling may be either on or off (impl freedom)
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Environment Modeling
EL
EM
E1 E2
EL E2 E1 EM
Temp.
time
High!
Med!
Low!
EM Any action possible at any timeE1 Only realistic temperature variationsE2 Temperature never increases when coolingEL No inputs (completely passive)
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Implementation relationRelativized real-time io-conformance
•I rt-iocoE S =def
∀σ ∈ TTr(E): Out((E,I) after σ) ⊆ Out((E,S) after σ)
•I rt-iocoE s iff TTr(I) ∩ TTr(E) ⊆ TTr(S) ∩ TTr(E) // input enabled
•Intuition, for all assumed environment behaviors, the IUT•never produces illegal output, and•always produces required output in time
•E,S, I are input enabled Timed LTS•Let P be a set of states•TTr(P): the set of timed traces from states in P•P after σ = the set of states reachable after timed trace σ•Out(P) = possible outputs and delays from states in P
SystemModel
Environmentassumptions ε0’,o0,ε1’,o1…
ε0,i0,ε1,i1…E
IUT
S I
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Re-use Testing Effort
Given I, E, SAssume I rt-iocoE S
If S S’ then I rt-iocoE S’
1. Given new (weaker) system specification S’
If E’ E then I rt-iocoE’ S
2. Given new (stronger) environment specification E’
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Off-Line Test GenerationControllable
Timed Automata
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TestGene-ratortool
TestGene-ratortool
click?x:=0
click?x<2
x>=2
DBLclick!
Model Based Conformance Testing
fail
pass
Testexecution
tool
Testexecution
toolEvent
mapping
Driver
Model Test suite
TestGenerator
tool
TestGenerator
tool
Implementation Relation
Selection &optimization
Does the behavior of the (blackbox) implementation comply to that of the specification?
ImplementationUnder Test
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Model-Based Testing
SystemModel
EnvironmentModel
Output
Input
FSM model of system and environmentDeterminizable/deterministic models Test purpose P ≈ reachability property φP
Test-case generation ≈ witness generationTest input sequence σφp = i0,i1,i2,…Test suite T = {σ1, …, σn }, minimized by excluding all σi substring of some other σj
Σ
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Testing Verdict
Test program σφp = i0,i1,i2,…Test in/output δφp = i0,o0,i1,o1,i2,i3,…Test Verdict:
OK, if δφp = i0,o0,i1,o0,i2,i3,… run of system modelNOK, otherwise
SystemUnder Test i0,i1,i2,…
o0,o1,o2,…Test
Program
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Testing Real-Time Systems
SystemModel
EnvironmentModel
Test input sequence σφp = ε0,i0,ε1,i1,ε2,i2,…
Test in/output δφp = ε0,i0,ε1,o0,ε1,i1,o1,…Test Verdict:
OK, if δφp = ε0,i0,ε1,o0,ε1,i1,o1,…run of system modelNOK, otherwise
Timed Automata?
ε0’,o0,ε1’,o1…
ε0,i0,ε1,i1…
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This work
Test case generation from timed automataby reachability analysisimplementation in UPPAAL
Testing Criteria:single test purposecoverage criteria: location, branching, definition/use pairs, etc.
Optimality: Test Cases: σφp = ε0,i0,ε1,i1,ε2,i2,… with minimum cost e.g. min(ε0 + ε1 + …+εn )Test Suites: T = {σ1, …, σn } with minimum cost
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Controllable Timed Automata
Input Enabled: all inputs can always be accepted.
Output Urgent: enabled outputs will occur immediately.
Determinism: two transitions with same input/output leads to the same state.
Isolated Outputs: if an output is enabled, no other output is enabled.
Assumption aboutmodel of SUT
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Example Light Controller
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Off-Line Testing = Optimal Reachability
Specific Test PurposesModel CoverageOptimal test-suites
Specific Test PurposesModel CoverageOptimal test-suites
transition covered
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Off-Line Testing = Optimal Reachability
transition covered
out(IGrasp); //touch:switch light onsilence(200);out(IRelease);in(OSetLevel,0);
out(IGrasp); //@200 // touch: switch light offsilence(200); out(IRelease);//touchin(OSetLevel,0);
//9out(IGrasp); //@400 //Bring dimmer from ActiveUpsilence(500); //hold //To Passive DN (level=0)in(OSetLevel,0);out(IRelease);
//13out(IGrasp); //@900 // Bring dimmer PassiveDn->ActiveDN->silence(500);//hold // ActiveUP+increase to level 10silence(1000); in(OSetLevel,1);silence(1000); in(OSetLevel,2); silence(1000); in(OSetLevel,3); silence(1000); in(OSetLevel,4);silence(1000); in(OSetLevel,5); silence(1000); in(OSetLevel,6); silence(1000); in(OSetLevel,7); silence(1000); in(OSetLevel,8); silence(1000); in(OSetLevel,9);silence(1000); in(OSetLevel,10silence(1000); in(OSetLevel,9); //bring dimm State to ActiveDN
out(IRelease); //check release->grasp is ignoredout(IGrasp); //@12400out(IRelease);silence(dfTolerance);
Page 1Page 2
Fastest Transition Coverage =12600 ms
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Off-Line Testing = Optimal Reachability
Specific Test PurposesModel CoverageOptimal test-suites
Specific Test PurposesModel CoverageOptimal test-suites
transition covered1W
1W
50W 100W
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Timed Automata
T_sw=4T_idle=20
(E)FSM+clocks+guards+resets
WANT: if touch is issued twice quickly then the light will get brighter; otherwise the light is turned off.
Solution: Add real-valued clock x
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Timed Tests
T_sw=4T_idle=20
EXAMPLE test cases
0·touch!·0·dim?·2·touch!·0·bright?·2·touch!·off?·PASS
0·touch!·0.dim?·2½·touch!·0·bright?·3·touch!·off?·PASS
0·touch!·0·dim?·5touch!·0·off?·PASS
0·touch!·0·dim?·5·touch!·0·off?·50·touch!·0·bright?·6·touch!·0·dim?·PASS
INFINITELY MANY SEQUENCES!!!!!!
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Optimal Tests
T_sw=4T_idle=20
•Fastest test for bright light??
•Fastest edge-covering test suite??
•Least power consuming test??
1W 50W 100W
•Shortest test for bright light??
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Simple Light Controller
T_react=2T_sw=4T_idle=20
Environment model System model
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Test Purposes
TP1: Check that the light can become bright: E<> LightController.bright
Environment model System model
A specific test objective (or observation) the tester wants to make on SUT
•Shortest Test: 20·touch!·0·bright?·PASS•Fastest Test: 0·touch!·0·dim?·2·touch!·0·bright ?·PASS
T_react=2T_sw=4T_idle=20
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Test Purposes 2
TP2: Check that the light switches off after three successive touches
Use restricted environment and E<> tpEnv.goal
Environment model*TP2 System model
T_react=2T_sw=4T_idle=20
•The fastest test sequence is 0·touch!·0·dim?·2·touch!·0·bright?·2·touch!·0·off?·PASS
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Coverage Based Test Generation
Multi purpose testingCover measurementExamples:
Location coverage, Edge coverage, Definition/use pair coverage
l1
l4 l3
l2a? x:=0
x≥2 a?
x<2
b!c!
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Coverage Based Test Generation
Multi purpose testingCover measurementExamples:
Location coverage, Edge coverage, Definition/use pair coverage
l1
l4 l3
l2a? x:=0
x≥2 a?
x<2
b!c!
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Coverage Based Test Generation
Multi purpose testingCover measurementExamples:
Location coverage, Edge coverage, Definition/use pair coverage
l1
l4 l3
l2a? x:=0
x≥2 a?
x<2
b!c!
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Coverage Based Test Generation
Multi purpose testingCover measurementExamples:
Location coverage, Edge coverage, Definition/use pair coverage
l1
l4 l3
l2a? x:=0
x≥2
x<2
b!c!
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Coverage Based Test Generation
Multi purpose testingCover measurementExamples:
Locations coverage, Edge coverage, Definition/use pair coverageAll Definition/Use pairs
Generated by min-cost reachability analysis of annotated graph
l1
l4 l3
l2a? x:=0
x≥2 a?
x<2
b!c!
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Location Coverage
Test sequence traversing all locationsEncoding:
Enumerate locations l0,…,lnAdd an auxiliary variable li for each location Label each ingoing edge to location i li:=trueMark initial visited l0:=true
Check: EF( l0=true ∧ … ∧ ln=true )
ljlj:=true
lj:=true
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Edge Coverage
Test sequence traversing all edgesEncoding:
Enumerate edges e0,…,enAdd auxiliary variable ei for each edge Label each edge ei:=true
Check: EF( e0=true ∧ … ∧ en=true )
l1
l4 l3
l2
a? x:=0 e0:=1
x≥2
a? e2:=1
x<2
b! e1:=1c!
e3:=1
e4:=1
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Edge Coverage
EC: T_react=00·touch!·0·dim?·0·touch!·0·bright?·0·touch!·0·off?·20·touch!·0·bright?·4·touch!·0·dim?·4·touch!·0·off?·PASS Time=28
EC': T_react=20·touch!·0·dim?·4·touch!·0·off?· 20·touch!·0·bright?·4·touch!·0·dim?·2·touch!·0·bright?·2·touch!·0·off?·PASS Time=32
EC'': pausing user T_react=2, T_pause=50·touch!·0·dim?·2·touch!·0·bright?·5·touch!·0·dim?·4·touch!·0·off?·20·touch!·0·bright?·2·touch!·0·off?·PASS Time=33
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Definition/Use Pair Coverage
Dataflow coverage techniqueDef/use pair of variable x:
Encoding: vd ∈ { false} ∪{ e0, …, en }, initially falseBoolean array du of size |E| x |E|At definition on edge i: vd:=ei
At use on edge j: if( vd ) then du[vd,ej]:=true
.
.
x:=0 x≥4...
definition useno defs
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Definition/Use Pair Coverage
Dataflow coverage techniqueDef/use pair of variable x:
Encoding: vd ∈ { false} ∪{ e0, …, en }, initially falseBoolean array du of size |E| x |E|At definition on edge i: vd:=ei
At use on edge j: if( vd ) then du[vd,ej]:=true
Check: EF( all du[i,j] = true )
x:=0 x≥4...
definition useno defs
0 n-10
n-1
i
j
du:
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Test Suite Generation
In general a set of test cases is needed to cover a test criteriaAdd global reset of SUT and environment model and associate a cost (of system reset)
Same encodings and min-cost reachability
Test sequence σ = ε0,i0,…,ε1, i1, reset ε2,i2, …,ε0,i0,reset,ε1, i1,ε2,i2,…Test suite T = {σ1, …, σn } with minimum cost
initial
reset
reset?
x=C x:=0x≤ C
R
σi
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The Philips Audio Protocol
A bus based protocol for exchanging control messages between audio components
CollisionsTolerance on timing events
01 1 10 0 0Bit streamManchester encoding
TX RX
TX RXin0 in1 empty coll
up dn in0isUP
out0 out1 end
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Philips Audio Protocol
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Benchmark Example
Philips Audio Protocol
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Off-Line Test GenerationObservable
Timed Automata
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Observable Timed Automata
Determinism:two transitions with same input/output leads to the same stateInput Enabled:all inputs can always be acceptedTime Uncertainty of outputs:timing of outputs uncontrollable by tester Uncontrollable output:IUT controls which enabled output will occur in what order
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Timed Games and Test Generation
Off-line test-case generation =Compute winning strategy for reaching Bright
Assign verdicts st. lost game means IUT not conforming
Tidle=20Tsw=4
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A trick light control
How to test for Bright ?
E<> (control: A<> Bright)or
<<c,u>> ♦(<<c>> ♦ Bright)
Tidle=20Tsw=4
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Cooperative Strategies
winning
loosing
possibly winning
initialgoal
• Play the game (execute test) while time available or game is lost • Possibly using ranomized online testing
Model Statespace
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On-Line Testing
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TestGene-ratortool
TestGene-ratortool
click?x:=0
click?x<2
x>=2
DBLclick!
Automated Model Based Conformance Testing
fail
pass
Testexecution
tool
Testexecution
tool
Adaptor
Model Test suite
TestGenerator
tool
TestGenerator
tool
Correctness Relation
Selection &optimization
Does the behavior of the (blackbox) implementation comply to that of the specification?
ImplementationUnder Test
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TestGene-ratortool
TestGene-ratortool
click?x:=0
click?x<2
x>=2
DBLclick!
input
Online Testing
fail
pass
Testexecution
tool
Testexecution
tool
Adaptor
Model
TestGenerator
tool
TestGenerator
tool output
Correctness Relation
Selection &optimization
•Test generated and executed event-by-event (randomly)
•A.K.A on-the-fly testing
ImplementationUnder Test
inputinputinput
outputoutputoutput
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An Algorithm
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Algorithm Idea:State-set tracking
Dynamically compute all potential states that the model M can reach after the timed trace ε0,i0,ε1,o1,ε2,i2,o2,…
Z=M after (ε0,i0,ε1,o1,ε2,i2,o2)
If Z= ∅ the IUT has made a computation not in model: FAIL
i is a relevant input in Env iff I ∈ EnvOutput(Z)
[Tripakis] Failure Diagnosis
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Online State Estimation
State-set explorer: maintain and analyse a set of symbolicstates in real time!
Z2
Z4
Z0
Z1Z3Z7
Z5
Z8
Z6Z9
Z11
Z14
Z12
Z15Z18
Z17
Z16
Timed AutomataSpecification
i!2.75O?
SystemUnderTest
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(Abstract) Online Algorithm
Algorithm TestGenExe (S, E, IUT, T ) returns {pass, fail)Z := {(s0, e0)}.
while Z ≠ ∅ and ♯iterations ≤ T do either randomly:1. // offer an input
if EnvOutput(Z) ≠ ∅randomly choose i∈ EnvOutput(Z)send i to IUTZ := Z After i
2. // wait d for an outputrandomly choose d∈ Delays(Z)wait (for d time units or output o at d′ ≤ d)if o occurred then
Z := Z After d′
Z := Z After o // may become ∅ (⇒fail)else
Z := Z After d // no output within d delay3. restart:
Z := {(s0, e0)}, reset IUT //reset and restartif Z = ∅ then return fail else return pass
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(Abstract) Online Algorithm
Algorithm TestGenExe (S, E, IUT, T ) returns {pass, fail)Z := {(s0, e0)}.
while Z ≠ ∅ � ♯iterations ≤ T do either randomly:1. // offer an input
if EnvOutput(Z) ≠ ∅randomly choose i � EnvOutput(Z)send i to IUTZ := Z After i
2. // wait d for an outputrandomly choose d �Delays(Z)wait (for d time units or output o at d′ ≤ d)if o occurred then
Z := Z After d′
Z := Z After o // may become ∅ (⇒fail)else
Z := Z After d // no output within d delay3. restart:
Z := {(s0, e0)}, reset IUT //reset and restartif Z = ∅ then return fail else return pass
•Sound •Complete (as T →∞)(Under some technical assumptions)
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State-set Operations
Can be computed efficiently using the symbolic data structures and algorithms in Uppaal
τ→
τ→
τ→
a→
a→
a→
τ→τ
→τ→
τ→τ→
τ→
Z after a: possible states after action a (and τ*)
Z
Z after ε :possible states after τ* and εi , totaling a delay of ε
5→
τ→
τ→
τ→
1→
2→
τ→4
→τ→
2→1
→τ→
timeε (5)
Z
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Online Testing Example
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Online Testing
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Online Testing
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Online Testing
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Online Testing
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Online Testing
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Online Testing
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Online Testing
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Online Testing
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Online Testing
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Online Testing
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Online Testing
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Online Testing
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Industrial Application:Danfoss Electronic Cooling Controller
Output Relays•compressor relay•defrost relay•alarm relay•(fan relay)Display Output•alarm / error indication•mode indication•current calculated temperature
Sensor Input•air temperature sensor•defrost temperature sensor•(door open sensor) Keypad Input•2 buttons (~40 user settableparameters)
•Optional real-time clock or LON network module
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Industrial Application:Danfoss Electronic Cooling Controller
Output Relays•compressor relay•defrost relay•alarm relay•(fan relay)Display Output•alarm / error indication•mode indication•current calculated temperature
Sensor Input•air temperature sensor•defrost temperature sensor•(door open sensor) Keypad Input•2 buttons (~40 user settableparameters)
•Optional real-time clock or LON network module
![Page 76: Lecture 8 Testing - artist-embedded.org · Informationsteknologi Overview Introduction Conformance for Real-Time System Off-line Test Generation ¾Controllable Timed Automata ¾Observable](https://reader034.fdocuments.us/reader034/viewer/2022042114/5e90309d8789e84b620bcddf/html5/thumbnails/76.jpg)
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Example Test Run (log visualization)
150016001700180019002000210022002300240025002600270028002900300031003200330034003500360037003800
0 100000 200000 300000 400000 500000 600000 700000 800000 900000
setTempmodelTempekcTempCONCOFFAONAOFFalarmRstHADOnHADOffDONDOFFmanDefrostOnmanDefrostOff
defrostOff?
alarmOn!alarmDisplayOn!
resetAlarm?AOFF!
HighAlarmDisplayOff!
manualDefrostOn?COFF!DON!
compressorOn!
//defrost completeDOFF!CON!
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Model-based Testing
of Real Time Systems
Conclusions
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Conclusions
Testing real-time systems is theoretically and practically challengingPromising techniques and toolsExplicit environment modeling
Realism and guidingSeparation of concernsModularityCreative tool usesTheoretical properties
Real-time online testing from timed automata is feasible, but
Many open research issues
![Page 79: Lecture 8 Testing - artist-embedded.org · Informationsteknologi Overview Introduction Conformance for Real-Time System Off-line Test Generation ¾Controllable Timed Automata ¾Observable](https://reader034.fdocuments.us/reader034/viewer/2022042114/5e90309d8789e84b620bcddf/html5/thumbnails/79.jpg)
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Research Problems
Testing TheoryTimed games with partial observabilityHybrid extensionsOther Quantitative Properties Probabilistic Extensions, Performance testingEfficient data structures and algorithms for state set computationDiagnosis & DebuggingGuiding and Coverage MeasurementReal-Time execution of TRONAdaptor Abstraction, IUT clock synchronizationFurther Industrial Cases
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Related Work
Formal Testing Frameworks[Brinksma, Tretmans]
Real-Time Implementation Relations[Khoumsi’03, Briones’04, Krichen’04]
Symbolic Reachability analysis of TimedAutomata
[Dill’89, Larsen’97,…]
Online state-set computation[Tripakis’02]
Online Testing[Tretmans’99, Peleska’02, Krichen’04]