Lecture 4
description
Transcript of Lecture 4
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 1
ECE2072/TRC2300/TEC2172 Digital Systems:Working with combinational logic
based on textbook
Contemporary Logic Design, 2nd Editionby R. H. Katz and G. Borriello
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III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 2
Working with combinational logic Summary: (Ch 3 Katz 2e)
Simplificationtwo-level simplificationexploiting don’t caresalgorithm for simplification
Logic realizationtwo-level logic and canonical forms realized with NANDs and NORsmulti-level logic, converting between ANDs and ORs
Time behavior
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 3
we'll need a 4-variable Karnaugh map for each of the 3 output functions
Design example: two-bit comparator (Ex3.1 Katz 2e)
block diagram
LTEQGT
A B < C DA B = C DA B > C D
ABCD
N1
N2
A B C D LT EQ GT0 0 0 0 0 1 0
0 1 1 0 01 0 1 0 01 1 1 0 0
0 1 0 0 0 0 10 1 0 1 01 0 1 0 01 1 1 0 0
1 0 0 0 0 0 10 1 0 0 11 0 0 1 01 1 1 0 0
1 1 0 0 0 0 10 1 0 0 11 0 0 0 11 1 0 1 0
andtruth table
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 4
A' B' D + A' C + B' C D
B C' D' + A C' + A B D'
LT =
EQ =
GT =
K-map for EQK-map for LT K-map for GT
0 0
1 0
0 0
0 0
Design example: two-bit comparator (cont’d)
D
A
1 1
1 1
0 1
0 0
B
C
1 0
0 1
0 0
0 0D
A
0 0
0 0
1 0
0 1
B
C
0 1
0 0
1 1
1 1D
A
0 0
0 0
0 0
1 0
B
C
= (A xnor C) • (B xnor D)
LT and GT are similar (flip A/C and B/D)
A' B' C' D' + A' B C' D + A B C D + A B' C D’
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 5
two alternativeimplementations of EQwith and without XOR
XNOR is implemented with at least 3 simple gates
A B C D
EQ
EQ
Design example: two-bit comparator (cont’d)
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 6
block diagramand
truth table
4-variable K-mapfor each of the 4output functions
A2 A1 B2 B1 P8 P4 P2 P10 0 0 0 0 0 0 0
0 1 0 0 0 01 0 0 0 0 01 1 0 0 0 0
0 1 0 0 0 0 0 00 1 0 0 0 11 0 0 0 1 01 1 0 0 1 1
1 0 0 0 0 0 0 00 1 0 0 1 01 0 0 1 0 01 1 0 1 1 0
1 1 0 0 0 0 0 00 1 0 0 1 11 0 0 1 1 01 1 1 0 0 1
Design example: 2x2-bit multiplier
P1P2P4P8
A1A2B1B2
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 7
K-map for P8 K-map for P4
K-map for P2 K-map for P1
Design example: 2x2-bit multiplier (cont’d)
0 0
0 0
0 0
0 0B1
A2
0 0
0 0
0 1
1 1
A1
B2
0 0
0 1
0 0
1 0B1
A2
0 1
0 0
1 0
0 0
A1
B2
0 0
0 0
0 0
1 1B1
A2
0 1
0 1
0 1
1 0
A1
B2
0 0
0 0
0 0
0 0B1
A2
0 0
0 0
1 0
0 0
A1
B2 P8 = A2A1B2B1
P4 = A2B2B1'+ A2A1'B2
P2 = A2'A1B2+ A1B2B1'+ A2B2'B1+ A2A1'B1
P1 = A1B1
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 8
I8 I4 I2 I1 O8 O4 O2 O10 0 0 0 0 0 0 10 0 0 1 0 0 1 00 0 1 0 0 0 1 10 0 1 1 0 1 0 00 1 0 0 0 1 0 10 1 0 1 0 1 1 00 1 1 0 0 1 1 10 1 1 1 1 0 0 01 0 0 0 1 0 0 11 0 0 1 0 0 0 01 0 1 0 X X X X1 0 1 1 X X X X1 1 0 0 X X X X1 1 0 1 X X X X1 1 1 0 X X X X1 1 1 1 X X X Xblock diagram
andtruth table
4-variable K-map for each of the 4 output functions
O1O2O4O8
I1I2I4I8
Design example: BCD increment by 1(Ex3.3 Katz Ed2)
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 9
O8 = I4 I2 I1 + I8 I1'
O4 = I4 I2' + I4 I1' + I4’ I2 I1
O2 = I8’ I2’ I1 + I2 I1'
O1 = I1'
O8 O4
O2 O1
Design example: BCD increment by 1 (cont’d)
0 0
0 0
X 1
X 0I1
I8
0 1
0 0
X X
X X
I4
I2
0 0
1 1
X 0
X 0I1
I8
0 0
1 1
X X
X X
I4
I2
0 1
0 1
X 0
X 0I1
I8
1 0
0 1
X X
X X
I4
I2
1 1
0 0
X 1
X 0I1
I8
0 0
1 1
X X
X X
I4
I2
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 10
Definition of terms for two-level simplification
Implicantsingle element of ON-set or DC-set or any group of these elements that can be combined to form a grouping
Prime implicantimplicant that can't be combined with another to form a larger grouping
Essential prime implicantprime implicant is essential if it alone covers an element of ON-setwill participate in ALL possible covers of the ON-setDC-set used to form prime implicants but not to make implicant essential
Objective:grow implicant into prime implicants(minimize literals per term)cover the ON-set with as few prime implicants as possible(minimize number of product terms)
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 11
0 X
1 1
1 0
1 0D
A
1 0
0 0
1 1
1 1
B
C
5 prime implicants:BD, ABC', ACD, A'BC, A'C'D
Examples to illustrate terms
0 0
1 1
1 0
1 0D
A
0 1
0 1
1 1
0 0
B
C
6 prime implicants:A'B'D, BC', AC, A'C'D, AB, B'CD
minimum cover: AC + BC' + A'B'D
essential
minimum cover: 4 essential implicants
essential
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 12
Algorithm for two-level simplification
Algorithm: minimum sum-of-products expression from a Karnaugh map
Step 1: choose an element of the ON-setStep 2: find "maximal" groupings of 1s and Xs adjacent to that element
consider top/bottom row, left/right column, and corner adjacenciesthis forms prime implicants (number of elements always a power of 2)
Repeat Steps 1 and 2 to find all prime implicants
Step 3: revisit the 1s in the K-mapif covered by single prime implicant, it is essential, and participates in final cover1s covered by essential prime implicant do not need to be revisited
Step 4: if there remain 1s not covered by essential prime implicantsselect the smallest number of prime implicants that cover the remaining 1s
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 13
X 1
0 1
0 1
1 1D
A
0 X
0 1
X 0
0 1
B
C
3 primes around AB'C'D'
X 1
0 1
0 1
1 1
Algorithm for two-level simplification (example) (Ex3.4 Katz Ed2)
D
A
0 X
0 1
X 0
0 1
B
C
2 primes around A'BC'D'
X 1
0 1
0 1
1 1D
A
0 X
0 1
X 0
0 1
B
C
2 primes around ABC'D
X 1
0 1
0 1
1 1D
A
0 X
0 1
X 0
0 1
B
C
minimum cover (3 primes)
X 1
0 1
0 1
1 1D
A
0 X
0 1
X 0
0 1
B
C
X 1
0 1
0 1
1 1D
A
0 X
0 1
X 0
0 1
B
C
2 essential primes
X 1
0 1
0 1
1 1D
A
0 X
0 1
X 0
0 1
B
C
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 14
Activity
X 0
0 1
X 0
X 1D
A
0 X
X 1
X 0
1 1
B
C
BC BD AB AC’DCD’
BDCD’ AC’D
BDCD’ AC’D
List all prime implicants for the following K-map:
Which are essential prime implicants?
What is the minimum cover?
X 0
0 1
X 0
X 1D
A
0 X
X 1
X 0
1 1
B
C
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 15
Gate Logic: Two-Level Simplification5-Variable K-maps
ƒ(A,B,C,D,E) = Σm(2,5,7,8,10,13,15,17,19,21,23,24,29 31)
=
BC DE
BC DE
A =0
A =1
00 01 11 10 00
01
11
10
00 01 11 10 00
01
11
10
0 4 12 8
1 5 13 9
3 7 15 11
2 6 14 10
16 20 28 24
17 21 29 25
19 23 31 27
18 22 30 26
1
00
1
10
1
10 BC
DE 00 01 11 00
01
11
10
A=0
BC DE 00 01 11
01
11
10
A=1
1 1
1
1 1
1
1 1
1 1 1
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 16
Gate Logic: Two-Level Simplification5-Variable K-maps
ƒ(A,B,C,D,E) = Σm(2,5,7,8,10,13,15,17,19,21,23,24,29 31)
= C E + A B' E + B C' D' E' + A' C' D E'
BC DE 00 01 11 10
00
01
11
10
A=0
BC DE 00 01 11 10
00
01
11
10
A=1
1 1
1
1
1 1
1
1
1 1 1
1 1 1
BC DE
BC DE
A =0
A =1
00 01 11 10 00
01
11
10
00 01 11 10 00
01
11
10
0 4 12 8
1 5 13 9
3 7 15 11
2 6 14 10
16 20 28 24
17 21 29 25
19 23 31 27
18 22 30 26
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 17
Gate Logic: Two-Level Simplification6- Variable K-Maps
ƒ(A,B,C,D,E,F) =Σm(2,8,10,18,24,
26,34,37,42,45,50,53,58,61)
=
CD EF
CD EF
AB =00
AB =01
00 01 11 10 00
01
11
10
00 01 11 10 00
01
11
10
0 4 12 8
1 5 13 9
3 7 15 11
2 6 14 10
16 20 28 24
17 21 29 25
19 23 31 27
18 22 30 26
CD EF
AB =11
00 01 11 10 00
01
11
10
48 52 60 56
49 53 61 57
51 55 63 59
50 54 62 58
CD EF
AB =10
00 01 11 10 00
01
11
10
32 36 44 40
33 37 45 41
35 39 47 43
34 38 46 42
CD EF
CD EF
AB =00
AB =01
00 01 11 10 00
01
11
10
00 01 11 10 00
01
11
10
CD EF
AB =11
00 01 11 10 00
01
11
10
CD EF
AB =10
00 01 11 10 00
01
11
10
1
1 1
1
1 1
1 1
1 1
1 1
1 1
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 18
Gate Logic: Two-Level Simplification6- Variable K-Maps
ƒ(A,B,C,D,E,F) =Σm(2,8,10,18,24,
26,34,37,42,45,50,53,58,61)
= D' E F' + A D E' F+ A' C D' F'
CD EF
CD EF
AB =00
AB =01
00 01 11 10 00
01
11
10
00 01 11 10 00
01
11
10
0 4 12 8
1 5 13 9
3 7 15 11
2 6 14 10
16 20 28 24
17 21 29 25
19 23 31 27
18 22 30 26
CD EF
AB =11
00 01 11 10 00
01
11
10
48 52 60 56
49 53 61 57
51 55 63 59
50 54 62 58
CD EF
AB =10
00 01 11 10 00
01
11
10
32 36 44 40
33 37 45 41
35 39 47 43
34 38 46 42
CD EF
CD EF
AB =00
AB =01
00 01 11 10 00
01
11
10
00 01 11 10 00
01
11
10
CD EF
AB =11
00 01 11 10 00
01
11
10
CD EF
AB =10
00 01 11 10 00
01
11
10
1
1 1
1
1 1
1 1
1 1
1 1
1 1
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 19
Gate Logic: CAD Tools for SimplificationQuine-McCluskey Method
Tabular method to systematically find all prime implicants
Implication Table
Column I 0000
0100 1000
0101 0110 1001 1010
0111 1101
1111
ƒ(A,B,C,D) = Σ m(4,5,6,8,9,10,13) + Σ d(0,7,15)
Step 1: Fill Column 1 with ON-set andDC-set minterm indices. Groupby number of 1's.
Stage 1: Find all prime implicants
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 20
Gate Logic: CAD Tools for SimplificationQuine-McCluskey Method
Tabular method to systematically find all prime implicants
Column II 0-00 -000
010-01-0 100-10-0
01-1 -101 011-1-01
-111 11-1
ƒ(A,B,C,D) = Σm(4,5,6,8,9,10,13) + Σd(0,7,15)
Step 2: Apply Uniting Theorem—Compare elements of group w/N 1's against those with N+1 1's.Differ by one bit implies adjacent.Eliminate variable and place innext column.
E.g., 0000 vs. 0100 yields 0-000000 vs. 1000 yields -000
When used in a combination,mark with a check. If cannot becombined, mark with a star. These are the prime implicants.
Repeat until no further combinations can be made.
Stage 1: Find all prime implicantsStep 1: Fill Column 1 with ON-set and
DC-set minterm indices. Groupby number of 1's.
Column 0000
0100 1000
0101 0110 1001 1010
0111 1101
1111
Implication Table
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 21
Gate Logic: CAD Tools for SimplificationQuine-McCluskey Method
Tabular method to systematically find all prime implicants
Implication Table
Column I Column II Column III0000 0-00 * 01-- *
-000 *0100 -1-1 *1000 010-
01-0 0101 100- *0110 10-0 *1001 1010 01-1
-101 0111 011-1101 1-01 *
1111 -111 11-1
ƒ(A,B,C,D) = Σm(4,5,6,8,9,10,13) + Σd(0,7,15)
Step 1: Fill Column 1 with ON-set andDC-set minterm indices. Groupby number of 1's.
Step 2: Apply Uniting Theorem—Compare elements of group w/N 1's against those with N+1 1's.Differ by one bit implies adjacent.Eliminate variable and place innext column.
E.g., 0000 vs. 0100 yields 0-000000 vs. 1000 yields -000
When used in a combination,mark with a check. If cannot becombined, mark with a star. Theseare the prime implicants.
Repeat until no further combinations can be made.
Stage 1: Find all prime implicants
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 22
Gate Logic: CAD Tools for SimplificationQuine-McCluskey Method Continued
Prime Implicants:
0-00 = A' C' D'
100- = A B' C'
1-01 = A C' D
-1-1 = B D
-000 = B' C' D'
10-0 = A B' D'
01-- = A' B
AB CD 00 01 11 10
00
01
11
10
D
B
C
A
X 1 0 1
0 1 1 1
0 X X 0
0 1 0 1
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 23
Gate Logic: CAD Tools for SimplificationQuine-McCluskey Method Continued
Prime Implicants:
0-00 = A' C' D'
100- = A B' C'
1-01 = A C' D
-1-1 = B D
-000 = B' C' D'
10-0 = A B' D'
01-- = A' B
Stage 2: find smallest set of prime implicants that cover the ON-set
recall that essential prime implicants must be in all covers
another tabular method– the prime implicant chart
AB CD 00 01 11 10
00
01
11
10
D
B
C
A
X 1 0 1
0 1 1 1
0 X X 0
0 1 0 1
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 24
Gate Logic: CAD Tools for Simplification
rows = prime implicantscolumns = ON-set elementsplace an "X" if ON-set element is
covered by the prime implicant
Prime Implicant Chart
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 25
Gate Logic: CAD Tools for Simplification
rows = prime implicantscolumns = ON-set elementsplace an "X" if ON-set element is
covered by the prime implicant
Prime Implicant Chart
If column has a single X, than theimplicant associated with the rowis essential. It must appear inminimum cover
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 26
Gate Logic: CAD Tools for SimplificationPrime Implicant Chart (Continued)
Eliminate all columns covered byessential primes
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 27
Gate Logic: CAD Tools for SimplificationPrime Implicant Chart (Continued)
Eliminate all columns covered byessential primes
Find minimum set of rows thatcover the remaining columns
ƒ = A B' D' + A C' D + A' Bƒ = A B' D' + A C' D + A' B
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 28
Gate Logic: CAD Tools for SimplificationESPRESSO Method
Problem with Quine-McCluskey: the number of prime implicantsgrows rapidly with the number of inputs
upper bound: 3 /n, where n is the number of inputsn
finding a minimum cover is NP-complete, i.e., a computationalexpensive process not likely to yield to any efficientalgorithm
Espresso: trades solution speed for minimality of answer
don't generate all prime implicants (Quine-McCluskey Stage 1)
judiciously select a subset of primes that still covers the ON-set
operates in a fashion not unlike a human finding primes in a K-map
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 29
Gate Logic: CAD Tools for SimplificationEspresso Method: Overview
1. Expands implicants to their maximum sizeImplicants covered by an expanded implicant are removed from
further considerationQuality of result depends on order of implicant expansionHeuristic methods used to determine orderStep is called EXPAND
Irredundant cover (i.e., no proper subset is also a cover) is extractedfrom the expanded primes
Just like the Quine-McCluskey Prime Implicant ChartStep is called IRREDUNDANT COVER
Solution usually pretty good, but sometimes can be improvedMight exist another cover with fewer terms or fewer literalsShrink prime implicants to smallest size that still covers ON-setStep is called REDUCE
Repeat sequence REDUCE/EXPAND/IRREDUNDANT COVER to findalternative prime implicants
Keep doing this as long as new covers improve on last solution
A number of optimizations are tried, e.g., identify and remove essential primes early in the process
2.
3.
4.
5.
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 30
Gate Logic: CAD Tools for SimplificationEspresso: Why Iterate on Reduce, Irredundant Cover, Expand?
Initial Set of Primes found bySteps1 and 2 of the Espresso
Method
4 primes, irredundant cover,but not a minimal cover!
Result of REDUCE:Shrink primes while still
covering the ON-set
Choice of order in which to perform shrink is important
AB CD 00 01 11 10
00
01
11
10
D
B
C
A
1 1 0 0
1 1 1 1
0 0 1 1
1 1 1 1
AB CD 00 01 11 10
00
01
11
10
D
B
C
A
1 1 0 0
1 1 1 1
0 0 1 1
1 1 1 1
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 31
Gate Logic: CAD Tools for Simplification
Espresso Iteration (Continued)
Second EXPAND generates adifferent set of prime implicants
IRREDUNDANT COVER found byfinal step of espresso
Only three prime implicants!
AB CD 00 01 11 10
00
01
11
10
D
B
C
A
1 1 0 0
1 1 1 1
0 0 1 1
1 1 1 1
AB CD 00 01 11 10
00
01
11
10
D
B
C
A
1 1 0 0
1 1 1 1
0 0 1 1
1 1 1 1
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 32
Gate Logic: CAD Tools for SimplificationEspresso Inputs and Outputs
.i 4
.o 1
.ilb a b c d
.ob f
.p 100100 10101 10110 11000 11001 11010 11101 10000 -0111 -1111 -.e
-- # inputs-- # outputs-- input names-- output name-- number of product terms-- A'BC'D'-- A'BC'D-- A'BCD'-- AB'C'D'-- AB'C'D-- AB'CD'-- ABC'D-- A'B'C'D' don't care-- A'BCD don't care-- ABCD don't care-- end of list
ƒ(A,B,C,D) = Σm(4,5,6,8,9,10,13) + Σd(0,7,15)
Espresso Input Espresso Output.i 4.o 1.ilb a b c d.ob f.p 31-01 110-0 101-- 1.e
ƒ = A C' D + A B' D' + A' B
A 1 in an output columnmeans ONLY that this row’s
product term is includedin the sum of products
for that output
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 33
Interpreting Espresso Output Files
Example: Construct a truth table for f and g
.i 3
.o 2
.ilb a b c
.ob f g
.p 301- 1 00-1 0 1-11 1 1.e
a b c f g0 0 0 0 0 10 1 00 1 11 0 01 0 11 1 01 1 1
?
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 34
Interpreting Espresso Output Files
Example: Construct a truth table for f and g
.i 3
.o 2
.ilb a b c
.ob f g
.p 301- 1 00-1 0 1-11 1 1.e
a b c f g0 0 0 0 0 10 1 0 10 1 1 11 0 01 0 11 1 01 1 1
?
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 35
Interpreting Espresso Output Files
Example: Construct a truth table for f and g
.i 3
.o 2
.ilb a b c
.ob f g
.p 301- 1 00-1 0 1-11 1 1.e
a b c f g0 0 0 0 0 1 10 1 0 10 1 1 11 111 0 01 0 11 1 01 1 1 1 1
?
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 36
Interpreting Espresso Output Files
Example: Construct a truth table for f and g
.i 3
.o 2
.ilb a b c
.ob f g
.p 301- 1 00-1 0 1-11 1 1.e
a b c f g0 0 0 0 00 0 1 0 10 1 0 1 00 1 1 1 11 0 0 0 01 0 1 0 01 1 0 0 01 1 1 1 1
?Remaining terms 0
ƒ = A’B + BC = A’BC’+A’BC+ABC
g = A’ C + BC = A’B’C+A’BC+ABC
III - Working with Combinational Logic © Copyright 2004, Gaetano Borriello and Randy H. Katz 37
Two-Level Logic: SummaryPrimitive logic building blocks
INVERTER, AND, OR, NAND, NOR, XOR, XNOR
Canonical FormsSum of Products, Products of Sums
Incompletely specified functions/don't cares
Logic MinimizationGoal: two-level logic realizations with fewest gates and fewest
number of gate inputs
Obtained via Laws and Theorems of Boolean Algebra
or the Uniting Theorem
or K-map Methods up to 6 variables
or Quine-McCluskey Algorithm (optimal but slow for large problems)
or Espresso CAD Tool