Lecture 2.0Lecture 2.0

Thermodynamics in Chip Processing

Terry Ring

Field Effect Transistor (FET)Field Effect Transistor (FET)

Gate OxideGate Oxide

Capacitor connecting Gate to center of npn or pnp heterojunction

Capacitance– Area– Thickness– Dielectric constant of oxide

Dictates the Speed of the Switch

Gate Oxide CapacitanceGate Oxide Capacitance

C=oA/d

=C/Co

=1+e

e =electric susceptibility

Field Effect Transistor (FET)Field Effect Transistor (FET)

Silicon OxidationSilicon Oxidation Thermodynamics

• (yes/no? How Far? Heat/cool)

– Furnace at T=850C– Pure Oxygen

• Si + O2 SiO2

Kinetics (how fast)– BL-Mass Transfer

• J=Kg(CA-0)

– SS-Diffusion• J=DO-SiO2 (dC/dx)

– Heat Transfer• BL, q=h(T1-T)• Solid, q=kSiO2(dT/dx)

– J=q/Hrxn

Thermodynamics of ReactionsThermodynamics of Reactions

Thermodynamics Can Tell you Three Things– Is reaction spontaneous

• Gibbs Free Energy, ΔGrxn(T) Grxn<0, Spontaneous Grxn>0, Non-Spontaneous

– What are Equilibrium Ratios?• ΔGrxn(T)= - RT ln(Keq)

– Does Reaction create heat?• Heat of Reaction, ΔHrxn(T)

– Exothermic, ΔHrxn(T)<0, get hot!– Endothermic, ΔHrxn(T)>0

Reaction to Make SiOReaction to Make SiO22

Si (s) + O2 (g) SiO2(s)

– Done in Vacuum Furnace.Does the Reaction Go?

– Po2 =0.001 atm

– T= 600 C

Gibbs Free EnergyGibbs Free Energy

Si (s) + O2 (g) SiO2(s)

ΔGrxn(T)=GSiO2 (T)- GSi(T) - GO2 (T) = - RT ln(Keq) -ΔGo

rxn(T)=GSiO2 (T)- GSi(T) - GO2 (T) Keq=Xo2=Po2/PTot

If ΔGrxn(T)=0, then • ΔGo

rxn(T) = - RT ln(Po2)

GSiO2 (T) = ΔHSiO2(T) -TΔSoSiO2

• ΔHSiO2(T) =Hof-SiO2+To∫TCp-SiO2(T) dT

GSi (T) = ΔHSi(T) -TΔSoSi

• ΔHSi(T) =Hof-Si+To∫TCp-Si(T) dT

Grxn<0, Spontaneous

webbook.nist.gov/chemistry/

Po2 = 0.001 atm

T = 600 C

ΔGrxn(T)= ΔGo

rxn(T) - RTln(Po2)-180 kcal/mole-(-10kcal/mole)= -170 kcal/moleSpontaneous!

Want to Create OWant to Create O22 with wet H with wet H22

H2O(g) H2(g) + ½ O2(g)

Equilibium ΔGrxn(T)= - RT ln(Keq)Keq = (XH2 √Xo2)/XH2O

ΔGrxn(T)= ΔGH2 (T)+1/2 ΔG o2 (T)- ΔGH2O(T)

At T = 600 C What H2/H2O

Ratio?

Want to Create OWant to Create O22 with CO/CO with CO/CO22 ratio ratio

2CO2(g) 2CO(g) + O2(g)

Equilibium ΔGrxn(T)= - RT ln(Keq)

Keq = (XCO2 Xo2)/XCO22

ΔGrxn(T)= 2ΔGCO (T)+ΔG o2 (T) - 2ΔGCO2(T)

At T = 600 C What CO/CO2

Ratio?

What Memory Chip Really Looks LikeWhat Memory Chip Really Looks Like

MetalizationMetalization

Transistor Contacts– Base– Emitter– Gate

Metal Deposition– Chemical Vapor Deposition

CVD of Poly Si – Gate conductorCVD of Poly Si – Gate conductor

SiH4 Si (s) + 2 H2

– 620C, vacuum

– N2 Carrier gas with SiH4 and dopant precursor

Stack of wafer into furnace– Higher temperature at exit to compensate for

gas conversion losses

Add gases Stop after layer is thick enough

CVD ReactorCVD Reactor

Wafers in Carriage (Quartz)

Gasses enterPumped out via

vacuum systemPlug Flow

Reactor

Vacuum

CVD of W – Metal plugsCVD of W – Metal plugs

3H2+WF6 W (s) + 6HF– T>800C, vacuum– He carrier gas with WF6

– Side Reactions at lower temperatures• Oxide etching reactions• 2H2+2WF6+3SiO2 3SiF4 + 2WO2 + 2H2O• SiO2 + 4HF 2H2O +SiF4

Stack of wafer into furnace Add gases Stop after layer is thick enough

Chemical EquilibriumChemical Equilibrium

DRAM Memory DRAM Memory CellCell

1 Bit1 Bit

Capacitor

Gate or Row Line

Column Line

N P N

SiO2

Si

Wafer

CVD of SiOCVD of SiO22 – Dielectric – Dielectric

Si(0C2H5)4 +7O2SiO2(s)+ 10 H2+ 8CO2

– 400C, vacuum– He carrier gas with vaporized(or atomized)

Si(0C2H5)4 and O2 and B(CH3)3 and/or P(CH3)3 dopants for BSG and BPSG

Stack of wafer into furnace– Higher temperature at exit to compensate for

gas conversion losses Add gases Stop after layer is thick enough

CVD of SiCVD of Si33NN44 - Implantation mask - Implantation mask

3 SiH2Cl2 + 4 NH3Si3N4(s)+ 6 HCl + 6 H2

– 780C, vacuum

– Carrier gas with NH3 / SiH2Cl2 >>1

Stack of wafer into furnace– Higher temperature at exit to compensate for

gas conversion losses

Add gases Stop after layer is thick enough