Lecture 11: Q-M Simplification and Combinational Logic …wlu/Teaching/Winter/lecture 11.pdf ·...

Computer Organization I

Lecture 11: Q-M Simplification and Combinational Logic Circuits

� Q-M Tabular Approach for Function Simplification

� Combinational Logic Circuits

Overview

Objectives

� To know how to simplify logic function using Q-M approach

� To understand the functions of additional logic gates

Boolean Function Optimization- Approach 3: Q-M Method (Tabular Method)

• The Quine-McCluskey (Q-M) method provides a systematic simplification procedure for large number of variables that can be implemented by program in a digital computer

• The method reduces the minterm expansion (sum-of-products form) of a function to obtain a minimum sum-of-products. There are two steps: 1. Eliminate as many literals as possible by applying XY+XY = X.

Resulting terms are prime implicants.

2. Use a prime implicant chart to select a minimum set of prime

implicants.

Advantage:

It may work for any no. of variablesDisadvantage:

Simplification from table is quite involved


• Function must be given in sum of minterms form.

• Minterms are combined using:

XY+XY = X

A B C D + A B C D = A BC

1 0 1 0 + 1 0 1 1 = 1 0 1 - (dash indicates a missing variable)

|_____| |____| |____|

X Y X Y X


• Step1: Determination of Prime Implicants

e.g. given function F (A,B,C,D) = ƩƩƩƩm

(0,1,2,5,6,7,8,9,10,14)

(1)To reduce the number of comparisons, binary minterms are sorted in groups according to number of 1's in each term.

(2)To find prime implicants, all possible pairs of minterms should be compared and combined if possible.

(3)Terms can be combined if they differ in one variable. Comparing terms in non-adjacent groups or in the same group is unnecessary



1. Terms be checked if they can be combined with other terms in the adjacent group

2. Terms that have not been checked off because they cannot be combined with

other terms are called prime implicants



PI1 = m1 + m5 = ACD PI3 = m6 + m7 = ABC PI5 = m0 + m2 + m8 + m10 = BD

PI2 = m5 + m7 = ABD PI4 = m0 + m1 + m8 + m9 = BC PI6 = m2 + m6 + m10 + m14 = CD


• Step2: Determination of Essential Prime Implicants

1. Use prime implicant chart to select essential prime implicants.

2. Chart is constructed as follows:

_ Minterms are placed across

top, and Prime implicants

listed down the side

_ X placed at intersections if

prime implicant covers minterm

_ If Minterm is covered by only one implicant � essential

prime implicant, and must be included in the minimum sum-

of-products, From the chart, column that has one X, then

corresponding row is essential prime implicant (bc and cd)


• Step3: Determination of Minimum SOP

1. Each time a prime implicant is selected for inclusion in the minimum sum, the

corresponding row is crossed out. The columns which correspond to all

minterms covered by that prime implicant should also be crossed out.

2. A minimum set of prime implicants must be selected to cover the remaining

columns, i.e., a bd (covers the remaining two columns).

3. F = b c + c d + a bd


• Another example using QM for simplifying function

e.g. given function F (A,B,C,D) = ƩƩƩƩm (2,4,6,8,9,10,12,13,15)

F = BCD + ABD + ABD + AC

Combinational Logic Circuits

• AND-OR Combinational Logic Circuits

In Sum-of-Products (SOP) form, basic combinational circuits can be

directly implemented with AND-OR combinations if the necessary

complement terms are available.

JKJ

K

A

BAB

Product terms

Sum-of-products

Product term

C

D

CD

AB + CD + + JK. . .


• AND-OR-Invert Combinational Logic Circuits

When the output of a SOP form is inverted, the circuit is called an

AND-OR-Invert circuit. The AOI configuration lends itself to

product-of-sums (POS) implementation.

An example of an AOI implementation is shown. The output expression can be

changed to a POS expression by applying DeMorgan’s theorem twice.

DE

ABCA

B

C

E

D

X = ABC + DE X = ABC + DE

X = (A + B + C)(D + E)

X = (ABC)(DE)

AOI


• Additional Logic Gates: NAND Gate

• The basic NAND gate has the following symbol, illustrated for

three inputs:

– AND-Invert (NAND)

• NAND represents NOT AND, i. e., the AND function with a NOT

applied. The symbol shown is an AND-Invert. The small circle

(“bubble”) represents the invert function.

X

Y

Z

ZYX)Z,Y,X(F ==== · ·


• Additional Logic Gates: NAND Gate (cont.)

• Applying DeMorgan's Law gives Invert-OR (NAND)

• This NAND symbol is called Invert-OR, since inputs are inverted and then ORed together.

• AND-Invert and Invert-OR both represent the NAND gate. Having both makes visualization of circuit function easier.

X

Y

Z

ZYX)Z,Y,X(F ++++++++====


• Additional Logic Gates: NOR Gate

• The basic NOR gate has the following symbol, illustrated

for three inputs:

– OR-Invert (NOR)

• NOR represents NOT - OR, i. e., the OR function with a

NOT applied. The symbol shown is an OR-Invert. The

small circle (“bubble”) represents the invert function.

X

Y

Z

ZYX)Z,Y,X(F ++====


• Additional Logic Gates: NOR Gate (cont.)

• Applying DeMorgan's Law gives Invert-AND (NOR)

• This NOR symbol is called Invert-AND, since inputs are inverted

and then ANDed together.

• OR-Invert and Invert-AND both represent the NOR gate. Having

both makes visualization of circuit function easier.

X

Y

Z


• Universal Gate

NAND gates are sometimes called universal gates because they can

be used to produce the other basic Boolean functions.

Inverter

AA

AND gate

A

BAB

A

B

A + B

OR gate

A

B

NOR gate


• Universal Gate (cont.)

NOR gates are also universal gates and can form all of the basic gates.

Inverter

AA

OR gate

A

BA + B

A

B

AB

AND gate

A

B

AB

NAND gate


• Exclusive-OR Logic Gate (XOR)

The truth table for an exclusive-OR gate is

A

B

OutputInputs

A B X

0011

0101

0110

Notice that the output is HIGH whenever

A and B disagree.

The Boolean expression is

The circuit can be drawn as

X

Symbol:

X = AB + AB BA ⊕⊕⊕⊕= The XOR function

means: X OR Y, but

NOT BOTH


• Exclusive-NOR Logic Gate (XNOR)

The truth table for an exclusive-NOR gate is

Notice that the output is HIGH whenever

A and B agree.

The Boolean expression is

The circuit can be drawn as

Symbol:

X = AB + AB BA ⊕⊕⊕⊕=

OutputInputs

A B X

0011

0101

1001

A

B

X

XNOR function

also known as the

equivalence function

Because it equals 1 if

and only if A = B

implying A is

equivalent to B.


• XOR Gate Implementation

Chapter 2 - Part 3 22

• The simple SOP implementation uses the following structure:

• A NAND only implementation is:

X

Y

X Y

X

Y

X Y

Summary

• Applying Q-M tabular approach to simplify logic function with any number of variables

• Some Basic Combinational Logic Circuits

Thank youQ & A

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