Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

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Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU

Transcript of Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Page 1: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Lecture 10ALU and Control Unit Design

Presented ByDr. Shazzad Hosain

Asst. Prof. EECS, NSU

Page 2: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

ALU Design• Arithmetic Unit• Logic Unit

4-bit parallel adder

Cin

Cout

x3

x2

x1

x0

y3

y2

y1

y0

X

Y

Arithmetic Unit

Ff3

f2

f1

f0

A3

A2

A1

A0

B3

B2

B1

B0

Page 3: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Arithmetic UnitLets take the following two operations

F = X + Y F = X – Y

4-bit parallel adder

Cin

Cout

XF

Y

S0

01

= X + Y + 0= X + (-Y) = X + (Y + 1) = X + Y + 1

4-bit parallel adder

MUX0

1

MUX0

1

MUX0

1

MUX0

1

Cin

Cout

x3

x2

x1

x0

y3

y2

y1

y0

S0

Ff3

f2

f1

f0

Page 4: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Block Diagram of Arithmetic Unit

Arithmetic Unit

4

4

X

Y

4F

S0

Page 5: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Logic UnitS0 Operation

0 X AND Y

1 X XOR Y

Page 6: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Block Diagram of Logic Unit

LogicUnit

4

4

X

Y

4G

S0

Page 7: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Block Diagram of ALU

LogicUnit

4

4X

Y

4 G

S0

Arithmetic Unit

4

4

X

Y

4 F

S0

4

Mul

tiple

xer 4

Z

S1

Page 8: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.
Page 9: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.
Page 10: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Design of the Control Unit

• Two types of control unit design– Hardwired Control Design– Micro-programmed Control Unit Design

Page 11: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Basic Concepts Transfer to

Transfer 14th bit of to 1st bit of

Transfer to if E is enabled

Page 12: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Multiplication Using Addition

Microprocessor speed depends on bus architecture

Page 13: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Bus Architecture

• Three types of bus architectures– Single-bus architecture– Two-bus architecture– Three-bus architecture

Page 14: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Single Bus Architecture

Page 15: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Two-bus Architecture

Page 16: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

• One of the main task of control unit is to sequence a set of operations properly

• Use a ring counter to implement this

Timing Signals

Page 17: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Hardwired Control Design• Eight Steps to follow

Page 18: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Step 1: Derive the Flow ChartStart

Stop

R 0M Multiplicand via inbus

Q Multiplier via inbus

R R + MQ Q – 1

Q=0

Outbus R

no

yes

Page 19: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Step 2: Obtain register transfer description

Page 20: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Step 3: Specify processing hardware along with various components

Page 21: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Step 4: Complete the design of the processing section

M

L

CD

C0: R ← 0C1: M ← inbusC2: Q ← inbusC3: F ← r + lC4: Q ← Q – 1 C5: outbus ← RC6: R ← F

R

CL

DQ

LD

C

4 4

C0

44

4-bitadder

F

C1 C2

C3

C4

C5

C6

Z

Page 22: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

Step 5: Determine the block diagram of the controller

0

1

2

3

4

5

6

Page 23: Lecture 10 ALU and Control Unit Design Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

References

• Chapter 7, Fundamental of Digital Logic and Microcomputer Design – by M. Rafiquzzaman