Lead Compensator - gtu.edu.tr
Transcript of Lead Compensator - gtu.edu.tr
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Lead Compensator
Design Example :
For the system with the following block diagram representation
Find so that the dominant closed loop poles are at
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Solution : Start with
Compensator design with is not sufficient
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However if the compensator is in the form
with
The closed loop Char. Eq . will be in the form
Centriod at
3 closed loop poles (an additional at c )
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By changing the values of and we can chance the place of the centroid, and hence bend the root locus to go through the desired closed loop poles.
Note that we need to ensure are more dominant compared to the new pole located at
The problem is now to design and to ensure the closed loop dominant poles are at
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Method 1 :
● Using Magnitude and Angle conditions
The closed loop transfer function :
Characteristic equation :
Magnitude condition dictates
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Also from Angle condition
select in order to reduce the unknowns, now we have
or simply
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How did we selected 'a'
Selection of 'a'
● There is no unique value for 'a'
● If it is selected to big, we might not be able to find an apropriate value for 'b'
● If it is picked to small, the extra pole inserted might become the dominant pole
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● Back to the Magnitude condition with the values of a and b selected
● Now we can calculate the value for K
The equation of the compensator
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Method 2:
● Coefficient matching
From the root locus we know that there are 3 closed loop poles
the closed loop ch. equation
the desired ch. equation
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● From we have
then
Solution is
4 unknown 3 equations
Select a=3
Same result with the value of c also obtained
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A side note
● From the previous solution we can determine how big the value of 'a' can be selected.
We had
when simplified
Eliminate
K and b
for c to be positive
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Final value
initial value
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The time domain behavior
How does the compensated system behaves ?
The compensated overall transfer function
for a step input we would have
use PFE to find the values of
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SSE Specification
How to decrease the steady state error (SSE) so that the output goes close to the input ?
Consider
Let
error
Transfer function
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For a step input the SSE becomes
SSE
SSE goes down as K increases...
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Transient Responce + SSE ?
Can we place the closed poles at desired values and decrease SSE at the same time ??
Back to the same example :
Given
Find K so that the closed loop poles are at
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Root locus
-6 -5 -4 -3 -2 -1 0 1 2-4
-3
-2
-1
0
1
2
3
4
Real Axis
Imag
Axi
s
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Magnitude condition
SSE
● The value of SSE is fixed. Then how to we shape the transient response (place dominant poles) and reduce SSE at the same time ??
Fixed for specific value of K= 13
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Lag Compensation
This time; consider
where
Design
Error (from the block diagram)
and let to meet transient specs
typical values for c,d are
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The SSE is then (with unit step input)
SSE
for our case
SSE (approximately)
– When we have and K=13 SSE = 1/3
– The Lag compensator have improved the SSE performance !!!!
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Lead/Lag Compensators
Example
with
Design so that
– Dominant closed loop poles are at
– The SSE is 0.01 for a step input
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Method
● Design a Lead compensator to place the dominant poles at the desired places while neglecting the effects of the Lag compensator. Then design the Lag compensator to meet the SSE specifications.
Solution :
let
ch.eq.
(required for Root Locus)
The closed loop TF
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The Root Locus
Need to find the values of a and b
-15 -10 -5 0 5-25
-20
-15
-10
-5
0
5
10
15
20
25
Real Axis
Imag
Axi
s
-b -c -a
j5
- j5
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Angle condition
pick
then
Magnitude Condition
Guess why ??
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Lag Compensator Design
SSE
That is for a step input
pick
LeadLag
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How accurate is our desing?
With the designed compensator we have
chac. eq.
Angle condition
Magnitude condition
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The reason for small offsets is
Hence by selecting the lag compensator zero close to jw axis and lag compensator pole relatively close to the lag compensator zero, the overall desing changed the angle and magnitude conditions very little.
The above approximation seems fairly accurate.
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Example
For the system of the form
with
Design a lead/lag compensator that has
– Dominant closed-loop poles at
– SSE = 0.01 for a step input
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● Start with the design of the lead compensator
(neglect the lag compensator part for now)
Lead compensator
Ch. Equation
-12 -10 -8 -6 -4 -2 0 2 4-15
-10
-5
0
5
10
15
Imag
Axi
s
Real Axis
j2
- j2-b-c-a Draw the root locus
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Use Angle condition to select „a“
Let
Now apply Magnitude condition to find the value of K
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● Now desing the lag compensator part
use SSE for the design of the Lag compensator parameters
Let then
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Overall Compensator
check the angle and magnitude conditions to ensure the accurisy of the design
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How does the system behaves now
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