Latches and Flip Flops

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Latches and Flip-Flops

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Latches and Flipflops

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  • Latches and Flip-Flops

  • Combinational logic

    Memory elements

    A sequential circuit consists of a feedback path, and employs some memory elements.

    Combinationaloutputs Memory outputs

    External inputs

    Sequential circuit = Combinational logic + Memory Elements

    Sequential Circuit

  • Latches

    S - R (Set-Reset) latch

    Gated S - R latch

    Gated D latch

  • S R Latch

  • S R Latch

  • Gated S R Latch

  • Gated D Latch

  • Edge -Triggered Flip-Flops

    Edge-triggered S-R flip-flop

    Edge-triggered D flip-flop

    Edge-triggered J-K flip-flop

  • Edge-Triggered Flip-flops

    S-R, D and J-K edge-triggered flip-flops. Note the > symbol at the clock input.

    S C R

    Q

    SC

    R

    Q

    Q' Q'

    Positive edge-triggered flip-flops

    Q' Q'

    Negative edge-triggered flip-flops

    D C

    Q

    DC

    Q

    JC

    K

    Q

    Q'

    JC

    K

    Q

    Q'

  • Edge -Triggered Flip-Flops

    Waveforms

  • Edge -Triggered S-R Flip-Flop

  • Edge -Triggered D Flip-Flop

    Waveforms

  • Edge -Triggered D Flip-Flop

  • Waveforms

    Edge -Triggered J-K Flip-Flop

  • Edge -Triggered J-K Flip-Flop

  • Flip-Flop Applications

    Parallel data storage

    Frequency division

    Counting

  • Parallel Data Storage

  • Frequency Division

  • Counting

  • References

    Digital Fundamentals FLOYD

    9th Edition

  • QUESTIONS

    Slide Number 1Slide Number 2Slide Number 3Slide Number 4Slide Number 5Slide Number 6Slide Number 7Slide Number 8Slide Number 9Slide Number 10Slide Number 11Slide Number 12Slide Number 13Slide Number 14Slide Number 15Slide Number 16Slide Number 17Slide Number 18Slide Number 19Slide Number 20Slide Number 21Slide Number 22Slide Number 23Slide Number 24QUESTIONS


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