Latches and Flip-Flops
15
Latches and Flip-Flops ELEC 311 Digital Logic and Circuits Dr. Ron Hayne Images Courtesy of Cengage Learning
description
Latches and Flip-Flops. ELEC 311 Digital Logic and Circuits Dr. Ron Hayne Images Courtesy of Cengage Learning. Set-Reset Latch. S. Q'. Q. R. Set-Reset Latch. S. 0. Q'. 1. 0. 1. 0. Q. 0. R. Set-Reset Latch. S. 0. / 1. / 0. / 1. Q'. 1. / 0. 0. / 1. 1. - PowerPoint PPT Presentation
Transcript of Latches and Flip-Flops
Latches and Flip-Flops
ELEC 311Digital Logic and Circuits
Dr. Ron Hayne
Images Courtesy of Cengage Learning
311_11 2
Set-Reset Latch
S
R
Q'
Q
311_11 3
Set-Reset Latch
S
R
Q'
Q
0
0
1
0
0
1
311_11 4
Set-Reset Latch
S
R
Q'
Q
0
0
1
0
0
1
/ 1/ 0
/ 0/ 1
/ 1
/ 0/ 1
311_11 5
0
/ 1
/ 0
0
/ 1/ 0
Set-Reset Latch
S
R
Q'
Q1
0
0
1/ 0
/ 1
/ 1
6
Switch Debouncing
311_11 7
D Latch
311_11 8
Edge-Triggered D Flip-Flop
311_11 9
Timing Parameters
311_11 10
J-K and T Flip-Flops
311_11 11
J-K FF Timing Diagram
311_11 12
T FF Timing Diagram
(Falling-Edge Triggered)
311_11 13
Additional Inputs
311_11 14
Sequential Circuits
311_11 15
Summary
Latches S-R (Set-Reset) D (Data)
Flip-Flops (Edge-Triggered) D (Data) J-K (Set-Reset-Toggle) T (Toggle)
