A Mixed-Signal CMOS VLSI Image Convolution Circuit using Error Spectrum Shaping
Large Signal Modeling of CMOS TransistorsLarge Signal Modeling of CMOS Transistors Author Michael H....
Transcript of Large Signal Modeling of CMOS TransistorsLarge Signal Modeling of CMOS Transistors Author Michael H....
M.H. Perrott
Analysis and Design of Analog Integrated CircuitsLecture 3
Large Signal Modeling of CMOS Transistors
Michael H. PerrottJanuary 29, 2012
Copyright © 2012 by Michael H. PerrottAll rights reserved.
M.H. Perrott
Introducing CMOS Devices
CMOS: Complementary Metal Oxide Semiconductor- Current flow through channel between Drain and Source
is controlled by Gate- Complementary: both PMOS and NMOS are available
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(Gate)
(Drain)
(Source)
(Bulk)
D
G
S
B (Gate)
(Source)
(Drain)
(Bulk)
S
G
D
B
(Source) (Drain)(Gate)
(Bulk)
n+ n+p- p+ p+
n-
p-
NMOS PMOS
(Source) (Drain)(Gate)
(Bulk)
p+
(Bulk)
n+
(Bulk)
M.H. Perrott
Simplified MOS Symbol for Typical Bulk Connections
Bulk silicon below the channel under the gate also has an impact on the channel current- We often tie the Bulk to Gnd/Vdd for NMOS/PMOS devices
In such case, the symbol does not include the bulk terminal3
(Gate)
(Drain)
(Source)
D
G
S
(Gate)
(Source)
(Drain)
S
G
D
(Source) (Drain)(Gate)
(Bulk)
n+ n+p- p+ p+
n-
p-
NMOS PMOS
(Source) (Drain)(Gate)
(Bulk)
p+
(Bulk)
n+
(Bulk)VddGnd
M.H. Perrott
Symbol Notation Often Includes Size
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M1WL L
W
The designer is generally free to choose the width (W) and length (L) of the device- Wider width is often chosen to achieve higher channel
current for a given gate bias voltage- Longer length is often avoided since it lowers the channel
current and decreases the operating speed of the device The minimum length for the gate is often used to define the
process name (i.e., 0.18u CMOS or 0.13u CMOS) Longer length is used in cases where better matching or
high resistance is desired
M.H. Perrott
Channel Current as a Function of Gate Voltage
If Vgs < VTH, then current density Id/W is small- The device is in the subthreshold operating region
For Vgs > VTH, then Id/W is much larger- The device is in strong inversion- If Vds > V, then Id is relatively independent of Vds
The device is in the saturation operating region- If Vds < V, then Id is strongly dependent on Vds
The device is in the triode operating region5
Id
Vgs
Id_op
ΔV
VTH Vgs_op
Vds > ΔV
M1
Id
Vgs
NMOS
g
s
d Note that we designateV as the overdrive voltage
and that V = Vdsatin strong inversion
M.H. Perrott
PMOS Devices are Complementary to NMOS Devices
Same observations and definitions apply to PMOS- However, voltage and current signs are flipped
Note that Vsg = -Vgs, Vsd = -Vds
Note that Id as defined above for PMOS is in the opposite direction as for NMOS
Note that VTH becomes negative
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M2
Vsg
Id
Id
Vsg
Id_op
ΔV
-VTH Vsg_opPMOS
gd
sVsd > ΔV
M.H. Perrott
Examine MOS Behavior As Vds is Increased
S D
G
Cchannel = Cox(VGS-VTH)
VGS
VDS=0
S D
GVGS
VD=ΔV
S D
GVGS
VD>ΔV
Triode
Pinch-off
SaturationVDS
ID
ID
ID
ID
Triode
Pinch-offSaturation
ΔV
Overall I-V Characteristic
How does VGS influence Id in the above curve ? 7
M.H. Perrott
MOS Behavior Is A Function of Vgs and Vds
VDS
ID
Triode
Pinch-offSaturation
ΔV
Overall I-V Characteristic
Increasing Vgs
See page 15-23 of Razavi…
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M.H. Perrott
MOS Current Equations in Triode and Saturation Regions
S D
G
Cchannel = Cox(VGS-VTH)
VGS
VDS=0
S D
GVGS
VD=ΔV
S D
GVGS
VD>ΔV
Triode
Pinch-off
Saturation
ID
ID
ID
ID = μnCoxWL
(VGS - VTH - VDS/2)VDS
ID μnCoxWL
(VGS - VTH)VDS
for VDS << VGS - VTH
ID = μnCoxWL
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(VGS-VTH)2(1+λVDS)
(where λ corresponds tochannel length modulation)
ΔV = VGS-VTH
ΔV =μnCoxW
2IDL
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M.H. Perrott
The Issue of Velocity Saturation
When in saturation, the MOS current is calculated as
Which is really
- Here Vdsat,l is the saturation voltage at a given length It may be shown that
- If Vgs-VTH approaches LEsat in value, then We say that the device is in velocity saturation The current becomes linearly related to Vgs-VTH
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M.H. Perrott
Example: Current Versus Voltage for 0.18 Device
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 20
0.2
0.4
0.6
0.8
1
1.2
1.4
Vgs
(Volts)
I d (m
illiA
mps
)
Id versus V
gsM1
IdVgs
WL = 1.8μ
0.18μ
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M.H. Perrott
The Tricky Issue of Modeling MOS Devices
The device characteristics of modern CMOS devices lead to complicated analytical models- This creates challenges for achieving accurate hand
calculations with reasonable effort Hand calculations are essential in achieving deeper
understanding and intuition of circuit and device behavior- Simple hand calculations lack accuracy- Detailed hand calculations often do not yield the desired
insight and understanding to make them worthwhile A typical compromise
- Assume simple models for hand calculations- Use SPICE to get a more accurate picture of the actual
circuit and device characteristics and performance
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M.H. Perrott
What is the Key Role of Large Signal Calculations?
In analog circuits, we are often focused on amplifiers in which the small signal behavior is of high importance- Large signal calculations lead to the operating point
information of the circuit which is used to determine the small signal model of the device
Example amplifier circuit:
RS
RG
RD
vinvout
Vbias
ID 1) Solve for bias current Id2) Calculate small signal parameters (such as gm, ro)3) Solve for small signal response using transistor hybrid-π small signal model
Small Signal Analysis Steps
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M.H. Perrott
A Key Small Signal Parameter: Transconductance
Transconductance from input gate voltage, Vgs, to channel current, Id, is very important for amplifier circuits- Assuming device is in saturation:
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Id
Vgs
Id_op
ΔV
VTH Vgs_op
Vds > ΔV
M1
Id
Vgs
NMOS
g
s
d
gm = ΔVgs
ΔId
Vgs_op
M.H. Perrott
A Key Small-Signal Nonideality: Output Resistance
Ideally, Id would not change with Vds when the device is in saturation- Practical CMOS transistors exhibit Id dependence on Vds
due to channel length modulation- The parameter is often used to characterize this effect
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Vds
ID
Triode
Pinch-offSaturation
ΔV
gds =ΔVds
ΔId
Vds_op
Vds_op
M.H. Perrott
Another Non-Ideality: Back-Gate Effect
The threshold voltage of the device, VTH, is dependent on the potential between the source and bulk
- This implies that changes in the source node voltage, Vs, lead to changes in the channel current, Id
We model this effect as backgate transconductance, gmb
- MIC503 will provide details (also see pages 34-36 of Razavi) 16
(Source) (Drain)(Gate)
(Bulk)
n+ n+p- p+ p+
n-
p-
NMOS PMOS
(Source) (Drain)(Gate)
(Bulk)
p+
(Bulk)
n+
(Bulk)VddGnd
M.H. Perrott
MOS DC Small Signal Model
Assuming transistor is in saturation:- Note that designers often determine gmb impact from SPICE
RS
RG
RDRD
RS
RG
-gmbvsvgs
vs
rogmvgs
gm = μnCox(W/L)(VGS - VTH)(1 + λVDS)
= 2μnCox(W/L)ID (assuming λVDS << 1)
Cox
2qεsNA
2 2|ΦF| + VSB
γgm where γ =gmb =
In practice: gmb = gm/5 to gm/3
λID1ro =
ID
See Chapter 2 of Razavifor more discussion of
these formulas
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M.H. Perrott
MOS DC Small Signal Model
Assuming transistor is in triode region:- The channel of the device can be approximated as a
resistor whose value depends on the DC operating point of Vgs
RS
RG
RDRD
RS
RG
vgs
vs
rds
μnCox(W/L)(VGS - VTH)
ID
rds = 1
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M.H. Perrott
Example: Determine V and Operating Region (NMOS)
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1V0.2V
0.2V1V
1V0.7V
1V0.2V
0.4V
1V1V
0.7V0.2V
0.4V0.4V
ΔV =
Region =
ΔV =
Region =
ΔV =
Region =
ΔV =
Region =
ΔV =
Region =
ΔV =
Region =
Assume VTHn = 0.5V
M.H. Perrott
Example: Determine V and Operating Region (PMOS)
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1.3V
0.5V
0.7V
1.3V
0.9V
0.7V
1.3V
0.5V
1.1V
1.2V
0.5V
1.3V
0.8V
0.9V
0.7V
1.3V
1.1V
ΔV =
Region =
ΔV =
Region =
ΔV =
Region =
ΔV =
Region =
ΔV =
Region =
ΔV =
Region =
Assume VTHp = -0.5V
M.H. Perrott
Determine operating region for M1 and M2 assuming:- Vbias = 1.2- Vbias = 0.2- Vbias = 0.65
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Example: Determine Operating Region of M1 and M2
M2
M1
Vbias
vout
1.3V
Assume VTHn = 0.5V, VTHp = -0.5V, nCox = 50A/V2, pCox = 20A/V2, = 0, and M1 and M2 have the same value of W and L
M.H. Perrott
Determine Vbiasn such that Vout = 0.5V- Note that with = 0, a variety of Vout solutions will exist for
the same Vbiasn – I’m just trying to keep calculations simple Determine the resulting operating region of M1 and M2
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Example: Determine V and Operating Region
M2
M1Vbiasn
vout
1.3V
Vbiasp
1.3u0.13u
3.25u0.13u
Assume Vbiasp = 0.7V, VTHn = 0.5V, VTHp = -0.5V, nCox = 50A/V2, pCox = 20A/V2, = 0