Lab 1: The Bipolar Junction Transistor (B.J.T): D.C. and...

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ELEC 3509 Electronics II Lab 1 Page 1 Lab 1: The Bipolar Junction Transistor (B.J.T): D.C. and ac Operation. Schedule For This Lab: Week 1: BJT D.C. Characteristics and the Current Mirror. Week 2: BJT A.C. Characteristics. Report Your report should be a semi-formal engineering report. It may make liberal reference to other sources, but it should be complete in itself including brief theory section and all data, all well presented. Most of the report's emphasis should be on content, presentation and demonstrating understanding. The ini- tialed lab data must also be attached, to prove attendance in the lab and to help the marker in cases of ques- tionable results. Report Grading Points will be awarded for: Presentation of measured data Parts 1 and 2 /20 Part 3 /30 Parts 4 and 5 /20 Overall quality Understanding /10 Accuracy and completeness /10 Organization and presentation /10 Signed lab work (data) (ok or no) Lab work on time (ok or no) Report on time (ok or no) Extra effort max. 10 __________ /100

Transcript of Lab 1: The Bipolar Junction Transistor (B.J.T): D.C. and...

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Lab 1: The Bipolar Junction Transistor (B.J.T): D.C. and ac Operation.

Schedule For This Lab:

Week 1: BJT D.C. Characteristics and the Current Mirror. Week 2: BJT A.C. Characteristics.

Report

Your report should be a semi-formal engineering report. It may make liberal reference to other sources, but it should be complete in itself including brief theory section and all data, all well presented. Most of the report's emphasis should be on content, presentation and demonstrating understanding. The ini-tialed lab data must also be attached, to prove attendance in the lab and to help the marker in cases of ques-tionable results.

Report Grading

Points will be awarded for: Presentation of measured data Parts 1 and 2 /20 Part 3 /30 Parts 4 and 5 /20

Overall quality Understanding /10 Accuracy and completeness /10 Organization and presentation /10

Signed lab work (data) (ok or no) Lab work on time (ok or no) Report on time (ok or no) Extra effort max. 10

__________

/100

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WEEK 1: B.J.T. D.C. Characteristics and the current mirror.

Purpose:

The purpose of this laboratory is to become familiar with the D.C. operation of the bipolar junction transistor (BJT), and a basic D.C. circuit using the BJT, namely, the current mirror.

Introduction:

After reading the following elementary introduction to the BJT, be sure to read Sedra and Smith, “Micro-Electronic Circuits” 4th edition, SS4 pp. 221-253, (5th edition, SS5 377-401, 421-436), ending with the D.C. analysis of transistor circuits, SS4 pp. 509-511 (SS5 567-569), on the current mirror.

The BJT is a three-terminal semiconductor device containing two pn junctions. If checked with an ohmmeter it appears to be two diodes of opposite polarity connected in series. However, unlike two series diodes, the BJT can be used to amplify. There are two basic types of BJT, as illustrated in Fig. 1.1:

(a) Basic structure. (b) Symbol. (c) Practical structure. E=Emitter B=Base C=collector

Figure 1.1 BJT(pnp top figure and npn bottom figure). The npn BJT is similar to the pnp device, but with the n and p regions exchanged. There should be

a diode-like behaviour between the B-E and B-C terminals.

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BJT(npn) Operating Regions: A BJT (npn) has three1 regions of operation; for example:

Fig. 1.2 BJT (npn) Operating Regions.

(i) Saturation Region In this region, both BIT junctions are forward biased. VCE is small, e.g. 50-100 mV, but quite large

collector and base currents (ic & iB) can flow. This region is not used for amplification. There is a low resis-tance between the C and E terminals: the BJT acts like a closed switch.

An actual circuit.(npn) Approximate equivalent circuit.

Fig. 1.3 Saturation Region.

1. There is actually a fourth region. the inverse active region. but here the β is so low that it is not useful in practice.

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(ii) Active Region

Here the B-E junction is forward biased but the B-C junction is reverse biased. Because the two junctions are very close together, the emitter "emits" carriers which shoot across the central base region and are "collected" by the collector region. This flow of carriers manifests itself externally as a relatively large collector current ic. The process is strongly influenced by the external injection of a much smaller current iB into the base region. This is the origin of the BJT current gain, defined by

Eqs. (1.1)

An actual circuit (npn). Approximate equivalent circuit for silicon BJT.

Fig. 1.4 Active Region, B-E diode is forward biased.

(iii) Cutoff Region

If both the junctions are reverse-biased, only very small reverse leakage currents can flow across them. No gain is available in this mode, and there is a high resistance between the C and E terminals.

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Experiment:

Part 1: Diode-Like behaviour of BJT Junctions, and BJT Type

Using an ohmmeter on the "diode" range, measure the forward and reverse "resistances" of the B-E and B-C junctions of a 2N3904 transistor, shown in Fig. 1.5. The Digital Volt Meter (DVM) on the "diode" range actually forces an output current of 1mA from its "V" terminal, and then measures the voltage devel-oped between the "V" and common terminals. Thus, the DVM can directly measure the forward voltage drop of PN junction under 1mA of bias.

Fig. 1.5 Lead Configuration of a 2N3904 Transistor.

There should be diode-like behaviour between the B-E and B-C terminals, but not between the C-E terminals in either direction. Any other behaviour usually indicates a damaged BJT. Remember to record the type of meter used, the range, and which meter lead is connected to which transistor terminal. By meas-uring the polarity of the voltage appearing across the ohmmeter leads, determine whether the 2N3904 is a pnp or npn type.

Part 2 (a): BJT IC vs. VCE Characteristic Curves - Point-by-Point Plotting This part will measure and plot, point-by-point, one of the constant base-current lines of the IC vs.

VCE characteristics of the 2N3904 transistor. This line will be verified in the next part of the experiment by using the laboratory's curve tracer.

(To identify the leads of this potentiometer correctly, use an ohmmeter.)

Fig 1.6 Circuit Used to Obtain Characteristic Curves.

Fig. 1.6 shows the circuit that will be used in this part of the experiment. In it, the base current, IB.

and the collector current, IC will be determined indirectly from voltage measurements in the circuit. IB will be kept constant by adjusting the potentiometer.

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Mark one of the 2N3904 transistors for use in this part of the experiment and future reference. Measure all of the RC resistors, RB, and VCC. Then set up the circuit with RC = 100 ohms.

Experimentally find the value of IB, from IB = 2, 3, 4, 5, 6, 8, 10, or 12 µA, that sets IC nearest to 1mA, and fix IB at that integer value. Note that if IC = 1 mA can't be achieved with an IB between 2 and 12 µA, the transistor may be defective and should be replaced. Use the different values of RC listed on the schematic to get a number of sets of data representing the three voltages shown there. IB may have to be reset for every new value of RC. The input impedance of the voltmeter is 22 Mohm on D.C. voltage ranges and so can be ignored as it will have negligible effect on this circuit The IC-VCE points that the reduction of this data will give should be well distributed in the transistor's active region, with a few in its saturation re-gion.

Plot the IC-VCE line for the base current that was used. Determine the D.C. β for the transistor around VCE = 15, 10, 5 and 1 volt. What happens to the D.C. β when the transistor goes into saturation?

Does VBE change very much as VCE is changed? Why?

Part 2(b): BJT IC vs. VCE Characteristic Curves Curve Tracer Plot Use the laboratory's curve tracer to automatically obtain a family of IC vs. VCE curves for the

2N3904 transistor that was tested in part 2a. Have a TA set up the curve tracer to display VCE from 0-20 volts, IC from 0-1.6mA, and using an IB step-size of 2 µA, or less, such that one of the displayed lines will be the same as the line plotted in part 2a. Obtain a hardcopy plot of the curves of your BJT.

Part 3 (a): The Current Mirror An npn current mirror with emitter degeneration resistors is shown in Fig. 1.7. The emitter resis-

tors, RE1 and RE2, reduce the effect that mismatches in VBE between the two discrete transistors have on the matching of the output current to the reference current. These resistors can also be conveniently used to alter the ratio between the two currents.

Fig. 1.7 The Current Mirror and Test Circuit.

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Measure the actual values of REl, RE2, RREF and RCS, and assemble the circuit. Verify its operation as a current mirror by measuring IOUT for the listed values of RL connected to VCC. Plot VOUT vs. IOUT, us-ing an expanded current scale and omitting points that took the circuit out of its normal operating mode. From the plot, calculate the output impedance of the current mirror.

For one of the above load conditions in which both transistors are in their active mode, also meas-ure the VBE and VE of the two transistors, and the actual value of RL,

The following steps should be dealt with in the report. i) Explain how the circuit works. ii) Using the variables IREF, VBE1, VBE2, β1(dc), β2(dc) , RE1, RE2, VCC and VEE, analytically de-

termine an exact equation specifying the output current, IOUT, Then simplify this equation by assuming that VBE1 = VBE2 and that the β's are large.

iii) Find a simple approximate equation for IREF using reasonable assumptions. iv) With this second equation, calculate IREF using the measured circuit values. Then use this

value of IREF and β2(dc) from part 2(a) in the equation derived for IOUT, and so confirm the experimental results at which the parameters were measured.

Part 3 (b): PNP-Based Current Mirror

Propose a current-mirror based on PNP transistors, which can be added to the previous circuit to turn its output current into a source that can be applied to a grounded resistor to produce a positive output voltage.

Construct this circuit using 2N3906 transistors and test it with the previous one. (The 2N3906 has the same lead configuration as the 2N3904.)

Also, propose and test an alternation to this circuit, i.e. the PNP current mirror that will make its output current exactly double its reference current no matter what value of reference current is flowing.

WEEK 2: BJT ac Characteristics

Purpose:

The purpose of this part of the laboratory exercise is to become familiar with the h-parameters and hybrid-pi model of the bipolar junction transistor.

Introduction:

Before doing this exercise, read Sedra and Smith, "Micro-Electronic Circuits", SS4 pp. B4-B5 (SS5 B4-B5), on the h-parameters, and SS4 pp. 259-261, Ex.4.9, pp. 262 and pp. 322-325, (SS5 448-449, Ex. 5.14 p 450, and pp. 487-490) on the hybrid-pi models for BJTs.

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Experiment:

Note: Before continuing with this lab, calibrate the ac gain of your oscilloscope's probes. For details on

doing this, see ELEC 2507 lab #4. Note, not all probes allow calibration, but if they do, then it is a good idea to get into the practice of calibrating the oscilloscope probes every time you use them.

Part 4: The Transistor's h-Parameters and Bandwidth:

The four h-parameters describe all of a transistor's small-signal ac characteristics for a given set of dc bias conditions, at one frequency. At low to medium frequencies, they are independent of frequency. The four parameters are:

hie: the ac input impedance with the output short-circuited

hoe: the output admittance with the input open-circuited

hfe: the ac forward current gain with the output short-circuited, and

hre: the reverse, or feedback, voltage ratio with the input open-circuited

The second subscript, e, indicates that these parameters are measured with respect to the emitter, the emitter being the terminal common to both the input circuit and the output circuit. All but the last h-parameter will be measured in this exercise, the last one being so close to zero as to be practically unob-servable using the equipment of the ELEC 3509 laboratory.

The one other transistor parameter of major interest is its unity-gain bandwidth, fT, the frequency at which its ac current gain is reduced to one. In the ELEC 3509 laboratory, equipment bandwidth limitations prevent the direct measurement of fT, however it can be determined knowing the low-frequency hfe, and by measurements of the beta cut-off frequency, fβ, the frequency at which hfe drops by 3dB; fT is the product of fβ and hfe.

Part 4 (a): Dc-Biasing Circuit To establish a set of dc bias conditions on the BJT that will allow its use as an ac amplifier whose

characteristics can be determined, set up the circuit shown in Fig. 1.8. Be sure to use the same transistor that was partially characterized in part 2.

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Fig. 1.8 Dc-Bias Circuit.

Adjust the potentiometer to set IC to 1 mA, and measure VCE so that during the subsequent tests the dc collector conditions in the circuit will be known.

Part 4 (b): Ac-Coupling of Input and Output Signals

To the circuit shown in Fig. 1.8, add the additional circuitry shown in Fig. 1.91, after measuring the values of R4 and RL, This additional circuitry couples ac test signals into and out of the dc-biased transis-tor circuit, which is the Device Under Test, or D.U.T. It is the ac characteristics of the D.U.T. that will be determined in the following sections of this exercise, by related measurements on the D.U.T.'s input and output Fig, 1.10 represents a "black-box" view of the D.U.T. in the test circuit.

Fig. 1.9 Ac Test Circuit for the Biased BJT

1. Be certain to observe the POLARITY of the electrolytic capacitors when connecting them; if reversed, they will conduct dc current and upset the carefully established dc bias conditions, or worse BANG!

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Fig. 1.10 "Black-Box" View of the D.U.T. in the ac Test Circuit.

Part 4 (c): The ac Input Impedance, hie, and the ac Forward Current Gain, hfe

To measure these parameters, connect one channel of the oscilloscope to monitor vo, and the other channel to monitor the output signal of the generator, vs, Be sure to use 10x probes for this measurement as the shunt capacitance can usually be found printed on the probe.

Set the signal source to provide a 1 kHz sinusoid, and use the source's "low-amplitude" output con-nector. Set the ac base current, ib, to 0.5 µA by adjusting the output level of the source while using the DVM's to monitor vib across R4. The input impedance of the DVM is high enough on the "ac-volts" range (2.2 Mohm in parallel with 75 pf), relative to the transistor's expected rbe and the source impedance, that its effect on measurements in this circuit can be ignored.

By observing the oscilloscope, ensure that the circuit is not distorting the signal. Next, using the DVM, measure vbe and vo. Here the DVM's impedance can also be ignored since the circuit impedances are small.

Finally, calculate the ac input impedance: Eqs. (1.2)

and the ac forward current gain: Eqs. (1.3)

The expected range of results for hie and hfe can be found in the attached specifications for the 2N3904 transistor.

Note that the output short-circuit condition properly required for measuring hie and hfe is only ap-proximately met by the 100 ohm load resistance that was used in the test circuit However, the en-or that it produces here is small. (In later calculations of the hybrid-pi parameters, the fact that there exists an ac output voltage will have to be taken into account).

Why can't the value of the load resistor be made to be zero?

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Part 4(d): The ac Output Admittance, hoe, and the ac Reverse, or Feedback, Voltage Ratio, hre

The ac output admittance, hoe, is the slope of the IC vs. VCE characteristic curve at the point of dc op-eration. Use the IC vs. VCE graph from part 2 (a) to find hoe, ignoring the fact that IC may not be exactly the same in the graph as it is in this part of the experiment, but it will be close. The units of hoe are amps/volt, or mhos. Express the admittance in µmhos, as this is usual since its value will be quite small. The expected range of hoe can be found in the attached specifications.

The ac feedback voltage ratio, as previously mentioned, is too small to measure in the ELEC 3509 1aboratory. Therefore, take hre = 0.

Part 4 (e): The Unity-Gain Bandwidth, fT, and the Beta Cut-Off Frequency, or -3dB Bandwidth, fβ

For this part of the experiment keep ib set to 0.5 µA at 1 kHz, and remove the DVM from the circuit Continue to use the oscilloscope to observe vs and vo.

Note the amplitudes of vs and vo, and then raise the input frequency until the transistor's current gain is observed to drop by 3dB; the frequency at which this drop occurs is the beta cut-off frequency, fβ. Then calculate the unity-gain bandwidth.

fT = hfe (low frequencies) × fβ Eqs. (1.4)

Part 5: The BJT High-Frequency Hybrid-Pi Model

Fig. 1.11 The High-Frequency Hybrid-Pi Model of a BJT.

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Fig. 1.11 shows the high-frequency hybrid-pi model of a BIT. The equations given below define its elemental values in terms of the previously measured circuit parameters. Calculate all of these values, and make a copy of them as they will be needed for designing the amplifiers of the first project

Eqs. (1.5)

Eqs. (1.6)

rx = hie - rπ (If through experimental error rx becomes negative, then set rx = 0. ) Eqs. (1.7)

Eqs. (1.8)

Eqs. (1.9)

Eqs. (1.10)

Cµ = CBCjunction + Cboard ≈ 2pf + 2pf = 4pf Eqs. (1.11)

Eqs. (1.12)

Notice that Eq. (1.12) is modified to account for vo ≠ 0. If Cπ negative set Cπ = 0.

Note that these equations are for a model of the BJT installed on the prototype board as they take into account the effect of board inter-connection capacitances. This model is useful as it accurately repre-sents the BJT as it will be used in the circuits of Lab 2.

The 2N3904 transistor specifications are provided in the following page.

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