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Associative Memory

Also called as Content-addressable memory (CAM), associative

storage, orassociative array

Content-addressed or associative memory refers to a memory

organization in which the memory is accessed by its content (asopposed to an explicit address).

It is a special type of computer memory used in certain very high

speed searching applications.

In standard computer memory (random access memory or RAM) the

user supplies a memory address and the RAM returns the data word

stored at that address.

In CAM the user supplies a data word and then CAM searches its

entire memory to see if that data word is stored anywhere in it. If the

data word is found, the CAM returns a list of one or more storage

addresses where the word was found. CAM is designed to search its entire memory in a single operation.

It is much faster than RAM in virtually all search applications.

An associative memory is more expensive than RAM, as each cell

must have storage capability as well as logic circuits for matching its

content with an external argument.

Associative memories are used in applications where the search time

is very critical and short.

Associative memories are exkpensive compared to RAMs because of

the adde logic associated with each cell.

Hardware organization : (Block Diagram of Associative Memory)

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Compare each word in CAM in parallel with the

Content of A (Argument Register)

1. If CAM Word[i] = A, M(i) = 1

2. Read sequentially accessing CAM for CAM Word(i) for M(i) = 1

3. K(Key Register) provides a mask for choosing a particular

field or key in the argument in A (only those bits in the argumentthat have 1s in their corresponding position of K are compared)

Semiconductor implementations

Because a CAM is designed to search its entire memory in a single

operation, it is much faster than RAM in virtually all search applications.

There are cost disadvantages to CAM however. Unlike a RAM chip, which

has simple storage cells, each individual memory bit in a fully parallel CAM

must have its own associated comparison circuit to detect a match between

the stored bit and the input bit. Additionally, match outputs from each cell in

the data word must be combined to yield a complete data word match signal.

The additional circuitry increases the physical size of the CAM chip which

increases manufacturing cost. The extra circuitry also increases power

dissipation since every comparison circuit is active on every clock cycle.

Argument Register (A)

Key Register (K)

Associative memory

array & logic

M wordsN bits per word

M

Match Register

I/P

Read

Write

O/P

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Consequently, CAM is only used in specialized applications where

searching speed cannot be accomplished using a less costly method.

Example applications

Content-addressable memory is often used in computer networking devices.For example, when a network switch receives a Data Frame from one of its

ports, it updates an internal table with the frame's source MAC address and

the port it was received on. It then looks up the destination MAC address in

the table to determine what port the frame needs to be forwarded to, and

sends it out that port. The MAC address table is usually implemented with a

binary CAM so the destination port can be found very quickly, reducing the

switch's latency.

Ternary CAMs are often used in networkrouters, where each address hastwo parts: the network address, which can vary in size depending on the

subnet configuration, and the host address, which occupies the remaining

bits. Each subnet has a network mask that specifies which bits of the address

are the network address and which bits are the host address. Routing is done

by consulting a routing table maintained by the router which contains each

known destination network address, the associated network mask, and the

information needed to route packets to that destination. Without CAM, the

router compares the destination address of the packet to be routed with each

entry in the routing table, performing alogical AND with the network mask

and comparing it with the network address. If they are equal, thecorresponding routing information is used to forward the packet. Using a

ternary CAM for the routing table makes the lookup process very efficient.

The addresses are stored using "don't care" for the host part of the address,

so looking up the destination address in the CAM immediately retrieves the

correct routing entry; both the masking and comparison are done by the

CAM hardware.

Other CAM applications include:

- CPU cache controllers and Translation Lookaside Buffers

- Database engines

- Data compression hardware

- Artificial neural networks

- Intrusion Prevention System

Interleaved memory

http://en.wikipedia.org/wiki/Computer_networking_devicehttp://en.wikipedia.org/wiki/Network_switchhttp://en.wikipedia.org/wiki/Data_Framehttp://en.wikipedia.org/wiki/MAC_addresshttp://en.wikipedia.org/wiki/Routerhttp://en.wikipedia.org/wiki/Subnetworkhttp://en.wikipedia.org/wiki/Routinghttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Central_processing_unithttp://en.wikipedia.org/wiki/CPU_cachehttp://en.wikipedia.org/wiki/Translation_Lookaside_Bufferhttp://en.wikipedia.org/wiki/Databasehttp://en.wikipedia.org/wiki/Data_compressionhttp://en.wikipedia.org/wiki/Neural_networkhttp://en.wikipedia.org/wiki/Intrusion_Detection_Systemhttp://en.wikipedia.org/wiki/Computer_networking_devicehttp://en.wikipedia.org/wiki/Network_switchhttp://en.wikipedia.org/wiki/Data_Framehttp://en.wikipedia.org/wiki/MAC_addresshttp://en.wikipedia.org/wiki/Routerhttp://en.wikipedia.org/wiki/Subnetworkhttp://en.wikipedia.org/wiki/Routinghttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Central_processing_unithttp://en.wikipedia.org/wiki/CPU_cachehttp://en.wikipedia.org/wiki/Translation_Lookaside_Bufferhttp://en.wikipedia.org/wiki/Databasehttp://en.wikipedia.org/wiki/Data_compressionhttp://en.wikipedia.org/wiki/Neural_networkhttp://en.wikipedia.org/wiki/Intrusion_Detection_System

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Interleaved Memory refers to the memory in which is divided into a set of

banks.

An interleaved memory with n banks is said to be n-way interleaved. One

way of allocating virtual addresses to memory modules is to divide the

memory space into contiguous blocks. The CPU can access alternate

sections immediately, without waiting for memory to catch up (through wait

states). Interleaved memory is one technique for compensating for the

relatively slow speed of dynamic RAM (DRAM).

Interleaved memory uses a technique that results in a performance gain in

the time it takes a computer to access memory. In non-interleaved memory

systems (the most common), memory is divided into banks of RAM. A

computer sees each bank individually, and treats it as a separate unit of

memory. Most memory is available in 8-bit data bus widths, but computers

use larger bus widths internally to store data. As a result, when a computerneeds data that is 32 bits in length (known as a long word), it must access

four individual addresses in a bank of RAM to retrieve all of the data. Each

time the computer needs to access a separate unit of memory, delays in

access time and refresh rates occur.

With interleaved memory architecture, there are still multiple banks of

RAM, but the computer sees every two banks of RAM as a single, larger

bank. When the computer needs to access 32 bits of data, it can send out a

single address, which is sent to both banks of memory. The first bank is

activated and the computer reads the first 8 bits of data (known as a byte).

Meanwhile, the second bank of RAM is already in the process of decoding

the address presented to it and getting the data ready to send. When the

computer switches to the second bank, the data is ready, so there are no

refresh or address delays in retrieving the data. This process works for all

memory access, speeding up the time it takes to decode and make data ready

for the processor.

Interleaved memory is not commonly used today because memory modules

and the bus to which they connect have increased the speed at which theyperform. So interleaving no longer provides an effective boost in

performance.