L11 BAB7 E5163
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Transcript of L11 BAB7 E5163
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INTEGRATED CIRCUIT LAYOUTAND SIMULATION
Prepared by Charles SumionJKE
POLITEKNIK KOTA KINABALU
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INTEGRATED CIRCUIT LAYOUT ANDSIMULATION
1. INTEGRATED CIRCUIT LAYOUT Define
Function
Colour Code
Design Rules
2. INTEGRATED CIRCUIT DESIGNSIMULATION;
Define
4 levels of simulation
Simulations software
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INTEGRATED CIRCUIT LAYOUTDEFINE
1.LAYOUT is a pattern drawing showingthe metallurgical tracks, the position of
N @ P diffusion and polysilicon on thewafer.
2.It is produced with the aid of computer
software or by hand.3.Layout designed by through the stick
diagram designed.
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INTEGRATED CIRCUIT LAYOUTPURPOSE
1. To provide the physical sizes of the
MOS devices such as length andwidth of the transistor used.
2. Each component in an integrated
circuit represented in each 2-dimensional.
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INTEGRATED CIRCUIT LAYOUTSTICK DIAGRAM
3. Stick diagram is a conversion of
schematic diagram CMOS transistor tothe diagram that represents informationabout the layers that form the
transistors in a device..
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INTEGRATED CIRCUIT LAYOUTSTICK DIAGRAM
4. Stick diagram not just maintain theproperties of the schematic diagram butalso can provide information on layerupon complete processing circuitproduced.
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INTEGRATED CIRCUIT LAYOUTFUNCTION OF LAYOUT
1.Layer determines the number of
connections and floor plan for the
restructuring layer on wafer.
2.To create the layout, the pattern on
the mask should be provided inaccordance with certain rules.
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INTEGRATED CIRCUIT LAYOUTCOLOUR CODE
Color representation of the transistorlayers.
COLOUR LAYER
Green N-diffusion
Yellow P-diffusion
Red Polysilicon
Blue Metal
Black Contact
Brown P-well
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INTEGRATED CIRCUIT LAYOUTDESIGN RULES
1. Design rule is a feature of the law on the legaldimensions of a practiced in the design ofintegrated circuits.
2. It is necessary in the production of masks and itprovides communication between processengineers and circuit designers.
There are two types of layout design rules:1. Standard Design Rules.2. Rules based on geometry (lambda @ micron).
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INTEGRATED CIRCUIT LAYOUTStandard Design Rules
1. Layout arrangement must be in asmall chip area.
2. Avoid the formation of junctions over awide area so that it is a lot of leakagecurrent.
3. Total path intersecting the interfacemust be reduced.4. Touch pads must be placed in a
peripheral chip that does not intersect.
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INTEGRATED CIRCUIT LAYOUTGeometry Design Rules
1. Micron and lambda.
2. Two categories, namely the definition of :-
If the overlap between the two layers can lead todisaster, such as short circuit, then the pattern must beremoved at least two lambda. (1 = 2.5 um)
If overlap is allowed, but can be avoided then the
pattern must be separated by a distance of 1 lambda.
3. Rationale, the design will cause very close to theleakage current and sheet layout software and sometimes
there are errors.
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1. A process of copying @ emulatethrough the study of the relationshipbetween the parameters in the system.
2. Simulation is a process to verify the
circuit operation designed usingcomputer aided design software.
SIMULATION DESIGN OFINTEGRATED CIRCUITS
Definition
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4-Level of Simulation:
Circuit level simulation Gate level simulation Switch level simulation Device level simulation
SIMULATION DESIGN OFINTEGRATED CIRCUITS
Level Of Simulation
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SIMULATION DESIGN OFINTEGRATED CIRCUITS
Design Level Simulation
Circuit Level Simulation
Simulations are performed to check the truth of a circuitschematic by inserting the values of voltage or current to
the circuit model.
Gate Level SimulationGate level simulation will accept and produce only logic 1
and 0 during the simulation. All input and output of a gate willbe examined to determine all consistent with the expressionlogic design.
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Switch Level Simulation
This simulation model provides an overview of thetransistors as switches and logic gate transistor as a
switch network. Results from the simulation of this switchshould be the same level as in the simulation gate.
Device Level Simulation
This simulation will simulate an actual device as a device.For example, a transistor to be simulated as a transistor (not
just as a switch) and a voltage is simulated as the actualvoltage value (not just a logic 1 and 0).
SIMULATION DESIGN OFINTEGRATED CIRCUITS
Level Of Simulation
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SIMULATION DESIGN OFINTEGRATED CIRCUITS
Advantages and Disadvantages
Advantages Disadvantages
Can provide proper
guidance for thedesign for optimumperformance.
Can cause errors in
the design whichcauses the designdoes not operate.
Able to detect any
changes and operationof each componentwith other componentsin the same circuit.
Can not explain in
detail for each variableand the relationshipbetween them.