KING FAHD UNIVERSITY OF PETROLEUM & …faculty.kfupm.edu.sa/coe/aimane/coe202/quiz5sol_102.docx ·...

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Name: KEY Id# COE 202, Term 102 Fundamentals of Computer Engineering Quiz# 5 (Take Home) Due date: Saturday, May 7, 2011 Q.1. It is required to design a 4-bit arithmetic and logic unit that has two 4-bit inputs A=A 3 A 2 A 1 A 0 and B=B 3 B 2 B 1 B 0 and one 6-bit output C= C 5 C 4 C 3 C 2 C 1 C 0 . The circuit implements the following functions based on the values of the four selection inputs S3, S2, S1 and S0. S3 S2 S1 S0 Function 0 0 0 0 C = A + B 0 0 0 1 C = A – B 0 0 1 0 C = A+1 0 0 1 1 C = A-1 0 1 0 0 C = A+ 2 0 1 0 1 C = A – 2 0 1 1 0 C = B 0 1 1 1 C = -B 1 0 0 0 C = 2B 1 0 0 1 C = 3B 1 0 1 0 C = 4B 1 0 1 1 C = A and B 1 1 0 0 C = A or B 1 1 0 1 C = A xor B 1 1 1 0 C = A xnor B 1 1 1 1 C = not B

Transcript of KING FAHD UNIVERSITY OF PETROLEUM & …faculty.kfupm.edu.sa/coe/aimane/coe202/quiz5sol_102.docx ·...

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Name: KEY Id#

COE 202, Term 102Fundamentals of Computer Engineering

Quiz# 5 (Take Home)

Due date: Saturday, May 7, 2011

Q.1. It is required to design a 4-bit arithmetic and logic unit that has two 4-bit inputs A=A3A2A1A0 and B=B3B2B1B0 and one 6-bit output C= C5C4C3C2C1C0. The circuit implements the following functions based on the values of the four selection inputs S3, S2, S1 and S0.

S3 S2 S1 S0 Function 0 0 0 0 C = A + B0 0 0 1 C = A – B0 0 1 0 C = A+10 0 1 1 C = A-10 1 0 0 C = A+ 20 1 0 1 C = A – 20 1 1 0 C = B0 1 1 1 C = -B1 0 0 0 C = 2B1 0 0 1 C = 3B1 0 1 0 C = 4B1 0 1 1 C = A and B1 1 0 0 C = A or B1 1 0 1 C = A xor B1 1 1 0 C = A xnor B1 1 1 1 C = not B

(i) Show the block diagram design of your circuit using MSI components like Adder, Multiplexor, as needed.

(ii) Model your design in logic works.

(iii) Test your design and verify its correctness by simulation. Show snapshots of your simulation to demonstrate its correctness. For each function, test at least 4 input combinations of your choice to demonstrate correct functionality.

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The design has been implemented in logic works and the following devices were created:

Device Name

Device Symbol Logic Diagram

2x1 mux

2x1mux4bit

2x1mux6bit

4x1mux

4x1mux4bit

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8x1mux

8x1mux6bit

6bitadder

LogicUnit

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The whole ALU after integrating all the components and adding input and output is shown below:

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We will show next Verification of correct functionality of the ALU by setting A=6 and B=5:

Function VerificationC = A + B

C = A – B

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C = A+1

C = A-1

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C = A+ 2

C = A – 2

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C = B

C = -B

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C = 2B

C = 3B

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C = 4B

C = A and B

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C = A or B

C = A xor B

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C = A xnor B

C = not B