Jawaharlal Nehru Engineering College

Laboratory Manual

DIGITAL LOGIC DESIGN

For

Second Year Students

Manual made by

Prof. M. A. Mulay

Author JNEC, Aurangabad

MGM’S

Jawaharlal Nehru Engineering College

N-6, CIDCO, Aurangabad

Department of Electronics &Telecommunication

Vision of the Department:

To develop GREAT technocrats and to establish centre of excellence in the field of Electronics and Telecommunications.

Global technocrats with human values

Research and lifelong learning attitude,

Excellent ability to tackle challenges

Awareness of the needs of society

Technical expertise

Mission of the Department:

1. To provide good technical education and enhance technical competency by

providing good infrastructure, resources, effective teaching learning

process and competent, caring and committed faculty.

2. To provide various platforms to students for cultivating professional

attitude and ethical values.

3. Creating a strong foundation among students which will enable them to

pursue their career choice.

Jawaharlal Nehru Engineering College

Technical Document

This technical document is a series of Laboratory manuals of Electronics and Telecommunication Department and is a certified document of Jawaharlal Nehru Engineering College. The care has been taken to make the document error-free. But still if any error is found. Kindly bring it to the notice of subject teacher and HOD.

Recommended by,

HOD

Approved by,

Principal

Copies: 1. Departmental Library 2. Laboratory 3. HOD 4. Principal

FOREWORD

It is my great pleasure to present this laboratory manual for second year engineering students for the subject of Digital Logic Design keeping in view the vast coverage required for visualization of concepts of Digital electronics.

As a student, many of you may be wondering with some of the questions in your mind regarding the subject and exactly what has been tried is to answer through this manual.

Faculty members are also advised that covering these aspects in initial stage itself, will greatly relived them in future as much of the load will be taken care by the enthusiasm energies of the students once they are conceptually clear.

H.O.D.

LABORATORY MANUAL CONTENTS

This manual is intended for the Second year students of engineering branches in the subject of Digital Logic Design. This manual typically contains practical/Lab Sessions related Digital Electronics covering various aspects related to the subject to enhance understanding.

Students are advised to thoroughly go through this manual rather than only topics mentioned in the syllabus as practical aspects are the key to understanding and conceptual visualization of theoretical aspects covered in the books.

Good Luck for your Enjoyable Laboratory Sessions

Prof. M. A. Mulay

SUBJECT INDEX

1. Do’s and Don’ts in the laboratory

2. Lab Experiments:

Prerequisit

1. Study of Basic Logic Gates and Universal Gates.

2. Design the circuit for given Boolean algebraic

equation ( SOP and POS) using K-Map

Lab Exercise

3. Study of Half Adder and Half Subs tractor

4. Study of Binary to Gray Code Conversion

5. Study of Gray to Binary Code Conversion

6. Study of Multiplexer

7. Study of De-multiplexer

8. Study of Flip- Flops.

9. Study of Counter

10. Study of ALU.

11. Study of Shift register.

Beyond Syllabus

12. Study of A to D & D to A Convertors

3. Quiz on the subject

4. Conduction of Viva-Voce Examinations

5. Evaluation and Marking System

DOs and DON’ TS in Laboratory:

1. Do not handle any equipment before reading the instructions/Instruction manuals

2. Read carefully the power ratings of the equipment before it is switched on whether ratings 230 V/50Hz or 115V/60 Hz. For Indian equipments, the power ratings are normally 230V/50Hz. If you have equipment with 115/60 Hz ratings, do not insert power plug, as our normal supply is 230V/50 Hz, which will damage the equipment.

3. Observe type of sockets of equipment power to avoid mechanical damage

4. Do not forcefully place connectors to avoid the damage

5. Strictly observe the instructions given by the teacher/Lab Instructor

Instruction for Laboratory Teachers:: 1. Submission related to whatever lab work has been completed should be done during the next lab session.

2. The promptness of submission should be encouraged by way of marking and evaluation patterns that will benefit the sincere students.

Experiment No.1

(A) Study of basic logic Gates Aim: To Study basic logic gates such as AND, OR, NOT

Apparatus: Bread board, wires, IC-7408(AND), 7432(OR), 7404 (NOT)

Theory:

1. AND: Logical AND operation is defined as “the output is 1 if all the inputs are

1” Circuit of logical AND is shown below. It has N inputs (N >= 2) and one output. Digital signals are applied at the input terminal marked A,B,C….,N ,the other terminal being grounded(not shown in diagram)The output is obtained at the terminal marked Y, and it is also a digital signal.

Fig1. LOGIC DIAGRAM OF AND GATE

Truth Table for AND operation

INPUTS OUTPUTS

A B Y

0 0 0

0 1 0

1 0 0

1 1 1

Mathematically, AND operation is written as

Y=A AND B AND C Y=A .B. C Y=ABC…..N

2. OR: Logical OR operation is defined as “the output is 1 if at least one of the inputs is 1”.

Circuit of logical OR is shown below. It has N inputs (N>=2) and one output. Digital signals are applied at the input terminal marked A,B,C….,N, the other terminal being grounded(not shown in diagram).The output is obtained at the terminal marked Y, and it is also a digital signal.

Fig 2.LOGIC DIAGRAM OF OR GATE

Mathematically ,

OR operation is written as Y=A OR B OR C Y=A +B+C+……+N

Truth Table for OR operation

INPUTS OUTPUTS

A B Y

0 0 0

0 1 1

1 0 1

1 1 1

3. NOT: Logical NOT operation is also called as Inverter. It has One input (A) and one output (Y).Its logic Equation is written as

Y = NOT A

And is read as “Y equals not A” or “Y equals complement of A”.

Fig 3.LOGIC DIAGRAM OF NOT GATE

Truth Table for NOT operation

INPUT OUTPUTS

A Y

0 1

1 0

Procedure: -1) Apply Vcc to pin number 14 of all IC’s & ground to pin number 7 .

2) Assemble the circuit on breadboard according to the pin configuration.

3) Give the logical inputs and check for the proper output.

Conclusion: Hence verified the logical AND, OR, NOT Operation.

(B) Study of Universal Gates

Aim: To Study Universal gates such as NAND, NOR and Special gate X-OR Apparatus: Bread board, wires,IC-740O(NAND),7402 (NOR),7486 (NOT)

Theory:

1. NAND: Combination of NOT and AND gate is called NAND gate It is a Reverse operation of AND gate. Logical NAND operation is defined as “ Its output only be at “0” when all its inputs are also at “1” otherwise its output will be “1”.

Logical equation of NAND

Y = complement( A. B)

Logic symbol of NAND Gate

Truth Table for NAND operation

INPUTS OUTPUTS

A B Y

0 0 1

0 1 1

1 0 1

1 1 0

Fig1. LOGIC DIAGRAM OF NAND GATE IC 7400

2 NOR: It is a combination of NOT and OR gate and the operation of NOR gate is inverse of the OR gate. Logical NOR operation is defined as “Its output only be at “1” when all its inputs are also at “0” otherwise its output will be “0”.

Logical equation of NOR

Y = complement( A+B)

Logic symbol of NOR gate

Truth Table for NOR operation

INPUTS OUTPUTS

A B Y

0 0 1

0 1 0

1 0 0

1 1 0

Fig 2.LOGIC DIAGRAM OF NOR GATE IC 7402

EX-OR: Ex-or stands for exclusive OR. EX-OR gate counts the number of “1s” available at their inputs and if it is even number,the output is “0”,and if it is odd number,the output will be “1”

Logical equation of EX-OR Y =A’B+AB’

Logic symbol of EX-ORgate

Truth Table for EX-OR operation

INPUTS OUTPUTS

A B Y

0 0 0

0 1 1

1 0 1

1 1 0

Fig 3.LOGIC DIAGRAM OF EX-OR GATE IC 7486

Procedure: -1) Apply Vcc to pin number 14 of all IC’s & ground to pin number 7 .

2) Assemble the circuit on breadboard according to the pin configuration.

3) Give the logical inputs and check for the proper output.

Conclusion: Hence verified the logical NAND, NOR, EX-OR Operation.

Experiment No.2

Aim: Design the circuit for given Boolean algebraic equation ( SOP and POS) using

K-Map

Apparatus: Bread board, wires, IC-7408(AND), 7432(OR), 7404 (NOT)

Theory:- Minimise the given Boolean algebraic equation by using K-Map

Design the circuit for given Boolean algebraic equation ( SOP and POS) using K-

Map

SOP Equation:-

F(A,B,C,D)= ∑m (0,1,2,3,7,11,15)

BINARY NUMBERS

A B C D F

0 0 0 0 1

0 0 0 1 1

0 0 1 0 1

0 0 1 1 1

0 1 0 0 0

0 1 0 1 0

0 1 1 0 0

0 1 1 1 1

1 0 0 0 0

1 0 0 1 0

1 0 1 0 0

1 0 1 1 1

1 1 0 0 0

1 1 0 1 0

1 1 1 0 0

1 1 1 1 1

By using K-Map reduce equation and verify the table.

POS Equation:-

F(A,B,C,D)= πM (4,5,6,7.8,9,11,12,13)

BINARY NUMBERS

A B C D F

0 0 0 0 1

0 0 0 1 1

0 0 1 0 1

0 0 1 1 1

0 1 0 0 0

0 1 0 1 0

0 1 1 0 0

0 1 1 1 0

1 0 0 0 0

1 0 0 1 0

1 0 1 0 1

1 0 1 1 0

1 1 0 0 0

1 1 0 1 0

1 1 1 0 1

1 1 1 1 1

By using K-Map reduce equation and verify the table.

Procedure:- 1)Apply Vcc to pin number 14 of both IC’s & ground to pin number 7

2)Assemble the circuit on bread board.

3) Give the logical inputs and check for the proper output.

Conclusion: Hence verified operation of the circuit.

Experiment No.3

(A) Study of Half Adder

Aim: To perform addition of binary digits using half adder circuit. Apparatus: Bread board ,wires IC-7486(EX-OR),7408(AND) Theory:-

A logic circuit for the addition of two one bit numbers is referred to as an half adder. A half adder can be constructed using EX-OR(IC-7486) and AND (IC7408) gates.

Figure below shows half adder circuit diagram & its truth table.

Fig 1.Circuit diagram of Half Adder

INPUT OUTPUT

A B SUM CARRY

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

The truth table shows, that in the first three rows there is no carry, whereas in the fourth row a carry is present. From the truth table, we obtain the logical expression for SUM and CARRY as,

SUM=A’B+AB’ CARRY=AB

Procedure:- 1)Apply Vcc to pin number 14 of both IC’s & ground to pin number 7

. 2)Assemble the circuit on bread board.

3) Give the logical inputs and check for the proper output.

Conclusion: Hence verified Half Adder operation

(B) Study of Half Subs tractor

Aim:-To perform Subs traction of binary digits using half Subs tractor circuit. Apparatus:- Bread board ,wires IC-7486(EX-OR),7408(AND) Theory:-

A logic circuit for the subs traction of two one bit numbers is referred to as an Half Subs tractor. A Half Subs tractor can be constructed using EX-OR(IC-7486) and AND (IC-7408) gates.

Figure below shows half Subs tractor circuit diagram & its truth table.

Fig 1.Circuit diagram of Half Subs tractor

INPUT OUTPUT

A B Difference Borrow

0 0 0 0

0 1 1 1

1 0 1 0

1 1 0 1

The truth table shows, that in the first three rows there is no Borrow, whereas in the fourth row a Borrow is present.

From the truth table, we obtain the logical expression for DIFFERENCE and BORROW as,

Difference = A’B+AB’

Borrow = A’B

Procedure:- 1) Apply Vcc to pin number 14 of both IC’s & ground to pin number 7

. 2) Assemble the circuit on bread board. 3) Give the logical inputs and check for the proper output.

Conclusion: Hence verified Half Subs tractor operation

Experiment No.4

Aim:- To perform Binary to Gray Code Conversion

Apparatus :- Bread board , wires IC-7486(EX-OR)

Theory :- Digital codes are required to handle data which may be numeric,

alphabets or special characters. Since digital circuits work in binary manner, therefore numerals and other characters are to be converted to binary format. This conversion process is known as encoding.

Gray code:-

This code is often used in digital systems because it has the advantage that only one bit in the numerical representation changes between successive numbers. For example,0111 represents 5 and 0101 represents 6 in Gray code .These two consecutive numbers differ only in one bit (third from left).Its primary application is in the location of angles on a rotating shaft.

Figure below shows circuit diagram of binary to gray code conversion & its truth table

Fig 1. Circuit Diagram of Binary to Gray code Conversion

BINARY NUMBERS CONVERTED GARY CODE

NUMBERS

B3 B2 B1 B0 G3 G2 G1 G0

0 0 0 0 0 0 0 0

0 0 0 1 0 0 0 1

0 0 1 0 0 0 1 1

0 0 1 1 0 0 1 0

0 1 0 0 0 1 1 0

0 1 0 1 0 1 1 1

0 1 1 0 0 1 0 1

0 1 1 1 0 1 0 0

1 0 0 0 1 1 0 0

1 0 0 1 1 1 0 1

1 0 1 0 1 1 1 1

1 0 1 1 1 1 1 0

1 1 0 0 1 0 1 0

1 1 0 1 1 0 1 1

1 1 1 0 1 0 0 1

1 1 1 1 1 0 0 0

Procedure:- 1) Apply Vcc to pin number 14 of both IC’s & ground to pin number 7 . 2) Assemble the circuit on bread board, as per above diagram. 3) Give the logical inputs and check for the proper output, as per the

truth table.

Conclusion: Hence verified Binary to Gray code conversion operation

Experiment No.5

Aim:- To perform Gray Code to Binary Code Conversion

Apparatus:- Bread board , wires IC-7486(EX-OR)

Theory :-

Digital codes are required to handle data which may be numeric, alphabets or special characters. Since digital circuits work in binary manner, therefore numerals and other characters are to be converted to binary format. This conversion process is known as encoding.

Gray code:

This code is often used in digital systems because it has the advantage that only one bit in the numerical representation changes between successive numbers. For example,0111 represents 5 and 0101 represents 6 in Gray code .These two consecutive numbers differ only in one bit (third from left).Its primary application is in the location of angles on a rotating shaft.

Figure below shows circuit diagram of gray code to binary conversion & its truth table.

Fig 1. Circuit Diagram for Gray to Binary Conversion

Truth Table:-

GARY CODE NUMBERS CONVERTED BINARY

NUMBERS

G3 G2 G1 G0 B3 B2 B1 B0

0 0 0 0 0 0 0 0

0 0 0 1 0 0 0 1

0 0 1 1 0 0 1 0

0 0 1 0 0 0 1 1

0 1 1 0 0 1 0 0

0 1 1 1 0 1 0 1

0 1 0 1 0 1 1 0

0 1 0 0 0 1 1 1

1 1 0 0 1 0 0 0

1 1 0 1 1 0 0 1

1 1 1 1 1 0 1 0

1 1 1 0 1 0 1 1

1 0 1 0 1 1 0 0

1 0 1 1 1 1 0 1

1 0 0 1 1 1 1 0

1 0 0 0 1 1 1 1

Procedure:- 1) Apply Vcc to pin number 14 of both IC’s & ground to pin number 7 2) Assemble the circuit on bread board, as per above diagram. 3) Give the logical inputs and check for the proper output, as per the truth table.

Conclusion: Hence verified Gray code to Binary conversion operation

Experiment No.6

Aim:- To study Multiplexer operation using IC-74153 Apparatus:- Bread board , wires . Theory :-

A Multiplexer (or a data selector) is a logic circuit that accepts several data inputs and allows only one of them at a time to get through to the output. The selection of the desired data input is controlled by the select (or address) inputs.

Figure below shows the block diagram of a Multiplexer.

Block diagram of a Multiplexer

In this diagram the inputs and outputs are indicated by means of arrows . Depending upon the digital code applied at the SELECT inputs, one out of the data sources is selected and transmitted to the single output channel. The Multiplexer becomes enabled when the strobe signal is active LOW.

Note :- There are various Multiplexers available ex:74151 (8:1),74152--- etc. one can refer to data sheet for specification and pin Configuration

Procedure:- 1) Assemble the circuit on bread board, as per above diagram. 2) Give the logical inputs and check for the proper output, as per the truth table.

Conclusion: Hence verified the Multiplexer(4:1) operation using IC-74153

Experiment No.7 Aim:- To study Deultiplexer/Decoder operation using IC-74138 Apparatus:- Bread board , wires . Theory:-

A Demultiplexer performs the reverse operation of a Multiplexer. It accepts a single input and distributes it over several outputs. The SELECT input code determines to which output the data input will be transmitted. The Demultiplexer becomes enabled when the strobe signal is active LOW.

This circuit can also be used as binary-to-decimal decoder with binary inputs applied at the select input lines and the output will be obtained on the corresponding line. These devices are available as 2-line-to-4-line decoder, 3-line-to-8-line decoder, 4-line-to- 16-line decoder. The output of these devices is active LOW. Also there is an active low enable/data input terminal available

Figure below shows the block diagram of a Decoder.

74LS138 Decoder

Fig 1 Pin diagram of a decoder 74LS138

Table 1 Function table of decoder 74LS138

Depending upon the digital code applied at the SELECT inputs, one data is transmitted to the single output channel out of many.

Note: There are various Demultiplexers/Decoder available ex: 74156 1of 4 Decoder,74139---etc one can refer to data Sheet for specification and pin Configuration

Procedure:- 1) Assemble the circuit on bread board, as per above Pin diagram. 2) Give the logical inputs and check for the proper output, as per the function table.

Conclusion: Hence verified the decoder (8::1) operation using IC-74138

Experiment No.8

Aim:- To verify truth table for JK .D and T flip-flop. Apparatus:- Bread board , wires .IC 7476(JK flip-flop),IC7474(D flip-flop)

Theory:- 1 Explain operation of SR flip flop, master slave JK flip flop with diagram. 2 Explain race around condition. 3 Draw symbols of JK,SR,D,T Flip Flops with truth tables.

Fig1 pin diagram and Function table of 7476

JK Flip Flop as T Flip flop

Fig 2 Function table and pin diagram of IC 7474 D flip flop

JK Flip-Flop as D flip flop

Procedure:- 1) Assemble the circuit on bread board, as per Pin diagram. 2) Verify operation of flip flops according to function /truth table

Conclusion: Hence verified flip flop operation using IC 7476 and IC 7474.

Experiment No.9

Aim:- To study Decade Counter using IC-7490 Apparatus:- Bread board , wires . Theory :- A circuit used for counting the pulses is known as a Counter. Basically there are two types of counter:

1. Asynchronous counter (ripple counter) 2. Synchronous counter

In case of asynchronous counter all the flip-flops are not clocked simultaneously,

whereas in a Synchronous counter all the flip-flops are clocked simultaneously. A

Ring counter and twisted ring counter is the examples of synchronous counter.

Figure below shows the internal structure of 7490.

It consists of four flip-flop internally connected to provide a mod-2 and a mod-5 counter. The mod -2 and mod-5counters can be used independently or in combination. There are two reset inputs R0(1)and R0(2) both of which are to be connected to logic 1 level for clearing all the flip-flops. The two inputs R9(1) and R9(2) when connected to logic 1 level, are used for setting the counter to 1001.

Table 1 count sequence

Procedure:- 1) Assemble the circuit on bread board, short Pin no.12 and 1 2) Give the Clock/trigger signal manually or auto clock at pin no.14 and check the count sequence.

Conclusion: Hence ,studied the decade counter using IC-7490

Experiment No.10

Aim:- To study various logic and Arithmetic operations using IC 74181 ALU Apparatus:- Bread board , wires , IC 74181

Theory :-

The TTL-series 4-bit 74181 arithmetic-logical unit takes 4-bit operands and a carry input and calculates one of 16 logical or 16 arithmetic functions. Two additional active-low outputs X (/propagate) and Y (/generate) allow to interface to the 74182 carry-look ahead generator IC for fast addition.

The M input selects whether the ALU should calculate logical functions (M=1) or arithmetic functions (M=0). In each mode, the four S3..S0 inputs select one of the available operations; check the table in the schematics for the specific functions selected by each select input. For example, M=0 and S=(1001) select the normal binary addition including carry, Z=(A+B+Cin).

Fig 1 Pin diagram of IC 74181

Table 1 Function table of ALU

Procedure:- Assemble the circuit on bread board and verify various logic and Arithmetic operations according to select inputs.

Conclusion: Hence ,studied the various logic and Arithmetic operations using IC 74181 ALU

Experiment No.11

Aim: Study of shift register. Apparatus: Bread board, system, IC 7495, connecting wires

Theory:

A register is used to store digital data. A shift register is a memory in which information is shifted one position at a time when one clock pulse is applied. The data can be shifted in either direction i.e. towards right (right- shift register) or towards left (left-shift register). A shift register can be used in four different configuration depending upon the way in which the data are entered into and taken out of it. These configurations are:

1. Serial-input, serial output 2. Parallel-input, parallel output 3. Serial-input, parallel output and 4. Parallel-input, serial output

R-S or J-K flip-flops are used for constructing the shift registers. IC 7495 is a 4-bit shift register. The data can be entered both in the serial as well as in the parallel form.

The output can also be taken in the serial as well as parallel form. The data can be shifted in the right or left direction.

Procedure: 1. Serial-in right shift operation:

Connect M to logic ‘0’ and apply serial data at the serial input terminal starting from the LSB. Apply the clock pulses at clock-1 terminal, and observe the output QA, QB, QC and QD. Verify its operation as a right shift register. The output can be taken in the parallel form at QA, QB, QC and QD after entering the data. For taking out the data in the serial form, apply clock pulses at clock-1 and take the output at QD.

2. Parallel-in shift register

Connect M to logic ‘1’ and apply the parallel 4-bit data at A, B, C and D inputs. Apply one clock pulse at clock-2 and observe the outputs at QA, QB, QC and QD. The data can be taken out in the serial or parallel form as discussed in 1.

3. Serial-in left shift

Connect QB to A, QC to B and QD to C. Connect M to logic ‘1’ and apply the serial 4-bit data at the D input starting from the MSB. Apply clock pulses at clock-2 and observe the outputs at QA, QB, QC and QD. Verify the left-shift operation. The parallel output can be obtained at QA, QB, QC and QD (after entering the data) and the serial output can be obtained at QA with the clock pulses applied at clock-2.

IC7495

Fig. Pin diagram of IC 7495.

Conclusion: Verified left-shift, right-shift of data using IC 7495 shift register.

Experiment No.12

AIM: a) Study of ADC 0808/0809 b) Verify the operation of DAC IC 0808

a) Study of analog to digital converter IC ADC 0809.

Theory:

The input to ADC is analog input voltage and at the output we get an “n” bit digital data. A large number of ADCs are produced by manufacturing companies like National Semiconductor, Motorola, Intersil, etc.

IC Number Manufacturer Number of

bits

ADC National 8-bits

0808/0809 Semiconductor

ICL 7109 Intersil 12-bits

Fig. Pin diagram of IC ADC 0808/ 0809

IC ADC 0809 is a monolithic CMOS device with an 8-bit analog to digital converter, 8-channel multiplexer and microprocessor compatible control logic. The 8-bit ADC uses successive approximation as the conversion technique. Due to the use of multiplexer, at a time only one analog input will be converted into equivalent 8-bit digital output. The analog input channels can be selected using three address lines A, B and C.

b) Verify the operation of DAC IC 0808

APPARATUS: Dual regulated DC power supply, bread board/ digital trainer kit, connecting wires, resistor (5 kΩ), IC DAC 0808, IC LF 351, capacitor (0.1 µF), multimeter

THEORY: The IC DAC 0808 series is 8-bit monolithic digital-to-analog converter (DAC). It uses R-2R ladder along with current switching and reference current amplifier. The analog output is available in the form of current Io . That means “Io” is proportional to the 8-bit digital input. The LF 351 then converts these currents into analog voltages. The resulting voltage is equal to Vout. A large number of DAC ICs have been produced by manufacturing companies like National Semiconductor, Texas Instruments etc.

IC Number Manufacturer No. of bits

DAC 0808/0807/ 0806 National Semiconductor 8 bit

DAC 0808/ 0802 Texas Instruments 8 bit

Pin Diag of DAC 0808:

Circuit Diagram for DAC

PROCEDURE: 1. Assemble the circuit on bread board as shown in circuit diagram. 2. Switch on the power supply.

3. Check the supply voltage +5V at pin no. 13 of DAC IC and +/- 15 V to op-

amp IC 741.

4. Apply the digital logic inputs at A 1 - A 8. Note the corresponding analog output Vout.

OBSERVATIONS: For Digital to Analog Converter (DAC)

Analog output

A 1 A 2 A 3 A 4

A 5 A 6

A 7

A 8 Vout = 10 (A 1 /2+ A 2 /4 + A3/8-

MSB

LSB ---------+ A 8/256)

0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 1

1 1 1 1 1 1 1 1

Result: For input 0000 0000 analog output is ----- V

For input 1111 1111 analog output is ------- V

3. Quiz on the Subject

1. Which of the following systems are analog and which are digital? Why?

a) Pressure Gauge. b) Clinical Thermometer. c) Electronic Calculator d) Transistor radio receiver. f) Ordinary electric switch.

2. Name the code in full form.

1.ASCII code 2.EBCDIC code

3. What are Combinational circuits? 4 . What are flip-flops?

5. What are sequential circuits? 6. What is meant by bit, nibble and byte? 7. Name different Number systems. 8 What is the significance of Gray code?

9. What are basic gates? 10. What are universal gates? 11. State De Morgan’s theorem. 12. What is the difference between demultiplexer and decoder? 13. What is the difference between asynchronous and synchronous counter? 14. What is ALU? 15. Why logical Expressions are reduced? 16. What is meant by minterm and maxterm?

17. State advantages and disadvantages of TTL.

18. List out the applications of comparators?

19. What is the difference between Combinational & Sequential Circuits?

20. What are the different types of flip-flop?

21. What is the operation of JK flip-flop?

22. Define race around condition.

23. Give the comparison between synchronous & Asynchronouscounters.

24. What is programmable logic array? How it differs from ROM?

25. Comparison between PROM, PAL, PLA.

4. Conduction of VIVA-VOCE Examinations : -

Teacher should conduct oral exams of the students with full preparation. Normally the objective questions with guess are to be avoided. To make it meaningful, the questions should be such that depth of the student in the subject is tested. Oral Exams are to be conducted in co-cordial situation. Teachers taking oral exams should not have ill thoughts about each other & courtesies should be offered to each other in case of opinion, which should be critically suppressed in front of the students.

5. Evaluation and marking system: -

Basic honesty in the evaluation and marking system is essential and in the process impartial nature of the evaluator is required in the exam system. It is a primary responsibility of the teacher to see that right students who really put their effort &intelligence are correctly awarded.

The marking pattern should be justifiable to the students without any ambiguity and teacher should see that students are faced with just circumstance.