IRF840

Document Number: 91065 www.vishay.comS11-0506-Rev. B, 21-Mar-11 1

This datasheet is subject to change without notice.THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Power MOSFET

IRF840A, SiHF840AVishay Siliconix

FEATURES• Low Gate Charge Qg Results in Simple Drive

Requirement

• Improved Gate, Avalanche and Dynamic dV/dtRuggedness

• Fully Characterized Capacitance and Avalanche Voltageand Current

• Effective Coss Specified

• Compliant to RoHS Directive 2002/95/EC

APPLICATIONS• Switch Mode Power Supply (SMPS)

• Uninterruptable Power Supply

• High Speed Power Switching

TYPICAL SMPS TOPOLOGIES• Two Transistor Forward

• Half Bridge

• Full Bridge

Notesa. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).b. VDD = 50 V, starting TJ = 25 °C, L = 16 mH, Rg = 25 , IAS = 8.0 A (see fig. 12).c. ISD 8.0 A, dI/dt 100 A/μs, VDD VDS, TJ 150 °C.d. 1.6 mm from case.

PRODUCT SUMMARYVDS (V) 500

RDS(on) () VGS = 10 V 0.85

Qg (Max.) (nC) 38

Qgs (nC) 9.0

Qgd (nC) 18

Configuration Single

N-Channel MOSFET

G

D

S

TO-220AB

GDS

Available

RoHS*COMPLIANT

ORDERING INFORMATIONPackage TO-220AB

Lead (Pb)-freeIRF840APbFSiHF840A-E3

SnPbIRF840ASiHF840A

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage VDS 500V

Gate-Source Voltage VGS ± 30

Continuous Drain Current VGS at 10 VTC = 25 °C

ID8.0

ATC = 100 °C 5.1

Pulsed Drain Currenta IDM 32

Linear Derating Factor 1.0 W/°C

Single Pulse Avalanche Energyb EAS 510 mJ

Repetitive Avalanche Currenta IAR 8.0 A

Repetitive Avalanche Energya EAR 13 mJ

Maximum Power Dissipation TC = 25 °C PD 125 W

Peak Diode Recovery dV/dtc dV/dt 5.0 V/ns

Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150 °C

Soldering Recommendations (Peak Temperature) for 10 s 300d

Mounting Torque 6-32 or M3 screw10 lbf · in

1.1 N · m

* Pb containing terminations are not RoHS compliant, exemptions may apply

www.vishay.com Document Number: 910652 S11-0506-Rev. B, 21-Mar-11



Notesa. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).b. Pulse width 300 μs; duty cycle 2 %.c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS.

THERMAL RESISTANCE RATINGSPARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient RthJA - 62

°C/WCase-to-Sink, Flat, Greased Surface RthCS 0.50 -

Maximum Junction-to-Case (Drain) RthJC - 1.0

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 μA 500 - - V

VDS Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.58 - V/°C

Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V

Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA

Zero Gate Voltage Drain Current IDSS VDS = 500 V, VGS = 0 V - - 25

μA VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250

Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = 4.8 Ab - - 0.85

Forward Transconductance gfs VDS = 50 V, ID = 4.8 Ab 3.7 - - S

Dynamic

Input Capacitance Ciss VGS = 0 V,VDS = 25 V,

f = 1.0 MHz, see fig. 5

- 1018 -

pF

Output Capacitance Coss - 155 -

Reverse Transfer Capacitance Crss - 8.0 -

Output Capacitance Coss VGS = 0 V; VDS = 1.0 V, f = 1.0 MHz 1490

Output Capacitance Coss VGS = 0 V; VDS = 400 V, f = 1.0 MHz 42

Effective Output Capacitance Coss eff. VGS = 0 V; VDS = 0 V to 400 Vc 56

Total Gate Charge Qg

VGS = 10 V ID = 8 A, VDS = 400 V,see fig. 6 and 13b

- - 38

nC Gate-Source Charge Qgs - - 9.0

Gate-Drain Charge Qgd - - 18

Turn-On Delay Time td(on)

VDD = 250 V, ID = 8 A Rg = 9.1 , RD = 31, see fig. 10b

- 11 -

nsRise Time tr - 23 -

Turn-Off Delay Time td(off) - 26 -

Fall Time tf - 19 -

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current ISMOSFET symbolshowing the integral reversep - n junction diode

- - 8.0A

Pulsed Diode Forward Currenta ISM - - 32

Body Diode Voltage VSD TJ = 25 °C, IS = 8 A, VGS = 0 Vb - - 2.0 V

Body Diode Reverse Recovery Time trrTJ = 25 °C, IF = 8 A, dI/dt = 100 A/μsb

- 422 633 ns

Body Diode Reverse Recovery Charge Qrr - 2.16 3.24 μC

Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

S

D

G



IRF840A, SiHF840A Vishay Siliconix

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Fig. 1 - Typical Output Characteristics, TC = 25 °C

Fig. 2 - Typical Output Characteristics, TC = 150 °C

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

102101

91065_01

Bottom

TopVGS

15 V10 V8.0 V7.0 V6.0 V5.5 V5.0 V4.5 V

20 µs Pulse WidthTC = 25 °C

4.5 V

VDS, Drain-to-Source Voltage (V)

I D, D

rain

-to-

Sou

rce

Cur

rent

(A

)

102

10

1

0.10.1

1021010.1

102

10

1

0.1

91065_02

Bottom

TopVGS

15 V10 V8.0 V7.0 V6.0 V5.5 V5.0 V4.5 V

20 µs Pulse WidthTC = 150 °C

4.5 V


I D, D

rain

-to-

Sou

rce

Cur

rent

(A

)

102

10

1

0.1

91065_03

TJ = 25 °C

20 µs Pulse WidthVDS = 50 V

I D, D

rain

-to-

Sou

rce

Cur

rent

(A

)

VGS, Gate-to-Source Voltage (V)

4.0 5.0 6.0 7.0 8.0 9.0

TJ = 150 °C

91065_04

ID = 8.0 AVGS = 10 V

3.0

0.0

0.5

1.0

1.5

2.0

2.5

- 60 - 40 - 20 0 20 40 60 80 100 120 140 160

TJ, Junction Temperature (°C)

RD

S(o

n), D

rain

-to-

Sou

rce

On

Res

ista

nce

(Nor

mal

ized

)




Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

11

102 103

102

91065_05

Cap

acita

nce

(pF

)


Ciss

Crss

Coss

VGS = 0 V, f = 1 MHzCiss = Cgs + Cgd, Cds ShortedCrss = CgdCoss = Cds + Cgd

10

10

105

104

103

91065_06 QG, Total Gate Charge (nC)

VG

S, G

ate-

to-S

ourc

e V

olta

ge (

V)

20

16

12

8

0

4

0 10 403020

ID = 8.0 A

VDS = 100 V

VDS = 250 V

For test circuitsee figure 13

VDS = 400 V

91065_07

VGS = 0 V

VSD, Source-to-Drain Voltage (V)

I SD, R

ever

se D

rain

Cur

rent

(A

)

102

10

1

0.10.2 0.5 0.8 1.41.1

TJ = 25 °C

TJ = 150 °C

102

91065_08

10 µs

100 µs

1 ms

10 ms

Operation in this area limitedby RDS(on)

TC = 25 °CTJ = 150 °CSingle Pulse


I D, D

rain

Cur

rent

(A

)

10

1

0.110410 103102




Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10a - Switching Time Test Circuit

Fig. 10b - Switching Time Waveforms

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

91065_09

I D, D

rain

Cur

rent

(A

)

TC, Case Temperature (°C)

0.0

2.0

4.0

8.0

6.0

25 1501251007550

Pulse width ≤ 1 µsDuty factor ≤ 0.1 %

RD

VGS

RG

D.U.T.

10 V

+-

VDS

VDD

VDS

90 %

10 %VGS

td(on) tr td(off) tf

0.1 1

91065_11

The

rmal

Res

pons

e (Z

thJC

)

t1, Rectangular Pulse Duration (s)

10

1

0.1

10-2

10-4 10-3 10-2

D = 0.5

0.2

0.10.05

0.020.01

PDM

t1t2

Notes:1. Duty Factor, D = t1/t22. Peak Tj = PDM x ZthJC + TC

Single Pulse(Thermal Response)

10-5




Fig. 12a - Unclamped Inductive Test Circuit

Fig. 12b - Unclamped Inductive Waveforms

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Fig. 12d - Basic Gate Charge Waveform

Fig. 13a - Typical Drain-to-Source Voltage vs.Avalanche Current

Fig. 13b - Gate Charge Test Circuit

RG

IAS

0.01 Ωtp

D.U.T

LVDS

+

-VDD

10 V

Vary tp to obtainrequired IAS

IAS

VDS

VDD

VDS

tp

91065_12c

1000

0

200

400

600

800

25 1501251007550

Starting TJ, Junction Temperature (°C)

EA

S, S

ingl

e P

ulse

Ava

lanc

he E

nerg

y (m

J) 1200

Bottom

TopID

3.6 A5.1 A8.0 A

QGS QGD

QG

VG

Charge

10 V

91065_12d

580

520

540

560

0.0 5.04.03.02.01.0

IAV, Avalanche Current (A)

VD

Sav

, Ava

lanc

he V

olta

ge (

V)

600

8.07.06.0

D.U.T.

3 mA

VGS

VDS

IG ID

0.3 µF0.2 µF

50 kΩ

12 V

Current regulator

Current sampling resistors

Same type as D.U.T.

+

-




Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for SiliconTechnology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, andreliability data, see www.vishay.com/ppg?91065.

P.W.Period

dI/dt

Diode recoverydV/dt

Ripple ≤ 5 %

Body diode forward drop

Re-appliedvoltage

Reverserecoverycurrent

Body diode forwardcurrent

VGS = 10 Va

ISD

Driver gate drive

D.U.T. lSD waveform

D.U.T. VDS waveform

Inductor current

D = P.W.Period

+

-

+

+

+-

-

-

Peak Diode Recovery dV/dt Test Circuit

VDD

• dV/dt controlled by Rg

• Driver same type as D.U.T.• ISD controlled by duty factor “D”• D.U.T. - device under test

D.U.T.Circuit layout considerations

• Low stray inductance• Ground plane• Low leakage inductance

current transformer

Rg

Notea. VGS = 5 V for logic level devices

VDD

Package Informationwww.vishay.com Vishay Siliconix

Revison: 19-Jan-15 1 Document Number: 66542For technical questions, contact: [email protected]

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

TO-220-1

Notes• M* = 0.052 inches to 0.064 inches (dimension including

protrusion), heatsink hole for HVM• Outline conforms to JEDEC® outline TO-220AB with exception

of dimension F

M*

321

L

L(1)

D

H(1

)

Q

Ø P

A

F

J(1)

b(1)

e(1)

e

E

bC

MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX.

A 4.14 4.70 0.163 0.185

b 0.69 1.02 0.027 0.040

b(1) 1.14 1.73 0.045 0.068

c 0.36 0.61 0.014 0.024

D 14.33 15.85 0.564 0.624

E 9.96 10.52 0.392 0.414

e 2.41 2.67 0.095 0.105

e(1) 4.88 5.28 0.192 0.208

F 0.43 1.40 0.017 0.055

H(1) 6.10 6.48 0.240 0.255

J(1) 2.41 2.92 0.095 0.115

L 13.36 14.40 0.526 0.567

L(1) 3.33 4.04 0.131 0.159

Ø P 3.53 3.94 0.139 0.155

Q 2.59 3.00 0.102 0.118

ECN: X15-0003-Rev. A, 19-Jan-15DWG: 6031

http://www.vishay.com

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Revision: 02-Oct-12 1 Document Number: 91000

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IRF840

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